Optoelectronic unit
By using optoelectronic units made of polycrystalline silicon, microcrystalline silicon, or amorphous silicon materials, the problems of complex manufacturing processes and high costs have been solved, resulting in high-performance optoelectronic units that are suitable for photovoltaic generators and photoelectric relays.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- WISETOP TECHNOLOGY CO LTD
- Filing Date
- 2025-04-22
- Publication Date
- 2026-04-21
AI Technical Summary
In the existing technology, optoelectronic units with complex manufacturing processes and high prices are difficult to achieve high cost performance, and there are electrical interference problems in optocoupler components.
The first and second doped semiconductor layers, made of polycrystalline silicon, microcrystalline silicon, or amorphous silicon, are combined with a conductive layer and an insulating filler to form an optoelectronic unit, avoiding the use of silicon-on-insulator (STI) processes for monocrystalline silicon, simplifying the process and reducing costs.
It realizes a simple and inexpensive optoelectronic unit with high cost performance, capable of sensing visible light or near-infrared light, enhancing light absorption and response speed, and integrating more functions, suitable for photovoltaic generators and photoelectric relays.
Smart Images

Figure CN224154570U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to an optoelectronic unit. Background Technology
[0002] An optocoupler, also known as a photocoupler, optocoupler, optoisolator, or opto-relay, is a device that transmits electrical signals using visible light or infrared light as a medium. Optocouplers feature electrical isolation between their input and output circuits.
[0003] A photoelectric relay may include, for example, a light-emitting unit and a photoelectric unit. When the photoelectric relay is connected to an input electrical signal source, the light-emitting unit emits light, and the photoelectric unit receives the light and generates an electrical signal. In other words, the input electrical signal source causes a change in the light emitted by the light-emitting unit, and this change in light causes the photoelectric unit to generate an electrical signal. The electrical signal may be, for example, a voltage signal or a current signal, thereby achieving the function of the relay.
[0004] The manufacturing process for optoelectronic units used in opto-relays typically involves obtaining silicon on insulating layer (SOI), and then using semiconductor patterning processes to form components such as photodiodes. Because the silicon used in SOI is a single crystal, the SOI process is difficult and expensive.
[0005] In view of this, designing a simple and inexpensive optoelectronic unit with other beneficial functions to improve cost-effectiveness is one of the urgent problems to be solved. Utility Model Content
[0006] This invention provides an optoelectronic unit that is simple to manufacture, inexpensive, and has other beneficial effects, making it cost-effective.
[0007] This utility model provides an optoelectronic unit, including: a substrate layer; an isolation layer disposed on the substrate layer; and a first semiconductor component disposed on the isolation layer, further including: a first doped semiconductor layer disposed on the isolation layer; and a second doped semiconductor layer disposed on the first doped semiconductor layer, wherein the first doped semiconductor layer and the second doped semiconductor layer are semiconductors of different doping types; wherein the first doped semiconductor layer and the second doped semiconductor layer are composed of a polycrystalline silicon material, a microcrystalline silicon material, or an amorphous silicon material.
[0008] In some embodiments, the substrate layer further includes a circuit layer disposed on one side of the substrate layer; wherein an isolation layer is disposed on the circuit layer. The first semiconductor component and the circuit of the circuit layer can be electrically connected via vias.
[0009] In some embodiments, the first semiconductor component further includes an intrinsic semiconductor layer sandwiched between the first doped semiconductor layer and the second doped semiconductor layer.
[0010] In some embodiments, the first semiconductor component has a thickness defined along the normal direction of the isolation layer, which is greater than or equal to about 20 nanometers and less than or equal to about 2 micrometers.
[0011] In some embodiments, the first semiconductor component further includes a third doped semiconductor layer disposed on the second doped semiconductor layer, wherein the third doped semiconductor layer and the first doped semiconductor layer are semiconductors of the same doping type.
[0012] In some embodiments, the photoelectric unit further includes a second semiconductor component disposed on an isolation layer and adjacent to the first semiconductor component. The material of the second semiconductor component includes a polycrystalline silicon material, a microcrystalline silicon material, or an amorphous silicon material. The second semiconductor component is substantially different from the first semiconductor component.
[0013] In some embodiments, the photoelectric unit further includes a plurality of first semiconductor components disposed on an isolation layer, with the first semiconductor components being adjacent to each other.
[0014] In some embodiments, the photoelectric unit further includes an insulating filler sandwiched between one of the first semiconductor components and the other of the first semiconductor component.
[0015] In some embodiments, the photoelectric unit further includes a conductive layer electrically connected to a first doped semiconductor layer of one of the first semiconductor components and a second doped semiconductor layer of the other of the first semiconductor component.
[0016] In some embodiments, the substrate layer comprises silicon, and the isolation layer comprises silicon oxide.
[0017] As described above, the first and second doped semiconductor layers of the optoelectronic unit of this invention are made of polycrystalline silicon, microcrystalline silicon, or amorphous silicon. Therefore, the optoelectronic unit of this invention does not require the use of silicon-on-insulator (SOI) processes to form photodiodes or other components, yet it can still achieve the effect of receiving light and generating voltage.
[0018] The optoelectronic unit of this invention has a simple and inexpensive manufacturing process, offering high cost-effectiveness. Furthermore, the thickness of the first semiconductor component in the optoelectronic unit is greater than or equal to approximately 20 nanometers and less than or equal to approximately 2 micrometers, enabling the first semiconductor component to sense visible light or near-infrared light (wavelength ≤ 700nm). The optoelectronic unit can have a circuit layer to integrate more functions without electrically interfering with the first semiconductor component. For example, the first semiconductor component is a circuit with low-voltage characteristics, and the circuit layer is a circuit with high-voltage characteristics. The first semiconductor component and the circuit layer can be electrically connected via vias. The optoelectronic unit can have an intrinsically semiconductor layer to enhance its light absorption capability and photoelectric response speed. The optoelectronic unit can have a third doped semiconductor layer to form a phototransistor, providing greater current output under low light intensity. The optoelectronic unit can have a second semiconductor component to integrate more functions. The optoelectronic unit can have multiple first semiconductor components, insulating fillers, and conductive layers to generate greater voltage for application in different products. The photoelectric unit of this invention can be applied, for example, to a photovoltaic generator (PVG) or a photorelay. Attached Figure Description
[0019] Details of one or more embodiments of the subject matter described herein are set forth in the following drawings and description. Other features, aspects, and advantages of the subject matter of this specification will become apparent from the description, drawings, and claims, wherein:
[0020] Figure 1 This is a cross-sectional schematic diagram of the photoelectric unit according to an embodiment of the present invention.
[0021] Figure 2 This is a cross-sectional schematic diagram of a photoelectric unit in a modified form according to an embodiment of the present invention.
[0022] Figure 3 This is a cross-sectional schematic diagram of a photoelectric unit in a modified form according to an embodiment of the present invention.
[0023] Figure 4 This is a cross-sectional schematic diagram of a photoelectric unit in a modified form according to an embodiment of the present invention.
[0024] Figure 5 This is a cross-sectional schematic diagram of a photoelectric unit in a modified form according to an embodiment of the present invention.
[0025] Figure 6A This is a top view schematic diagram of a modified photoelectric unit according to an embodiment of the present invention.
[0026] Figure 6BThis is a cross-sectional schematic diagram of a photoelectric unit in a modified form according to an embodiment of the present invention.
[0027] Figure 6C This is an equivalent circuit diagram of a photoelectric unit in a variant form according to an embodiment of the present invention.
[0028] Figure 7A This is an equivalent circuit diagram showing the usage state of a photoelectric unit in a variation of an embodiment of the present invention.
[0029] Figure 7B This is a schematic diagram of the usage state of a photoelectric unit in a variation of an embodiment of the present invention.
[0030] Figure 8 This is a cross-sectional schematic diagram of a photoelectric unit in a modified form according to an embodiment of the present invention.
[0031] Figures 9A to 9F This is a schematic diagram of the manufacturing process of a modified photoelectric unit according to an embodiment of the present invention. Detailed Implementation
[0032] The detailed description and technical content of this utility model are explained below with reference to the accompanying drawings. However, the accompanying drawings are provided for reference and illustration only and are not intended to limit this utility model.
[0033] As used herein, terms such as “first,” “second,” and “third” describe various components, parts, regions, layers, and / or portions, which should not be limited by these terms. These terms are used only to distinguish one element, component, region, layer, or portion from another. Unless the context clearly indicates otherwise, the use of terms such as “first,” “second,” and “third” herein does not imply order or sequence.
[0034] Figure 1 This is a cross-sectional schematic diagram of a photoelectric unit according to an embodiment of the present invention. Please refer to... Figure 1 As shown, the optoelectronic unit 1 in this embodiment includes a substrate layer 10, an isolation layer 20, and a first semiconductor component 30.
[0035] The substrate layer 10 is typically a high-purity silicon wafer with diameters of 3 inches, 4 inches, 5 inches, 6 inches, 8 inches, etc. Recently, 12-inch wafers and even larger sizes (14 inches, 15 inches, 16 inches, 20 inches and above) have been developed, but this is not a limitation. Silicon wafers can be obtained, for example, through the following process: melting high-purity bulk polycrystalline silicon to form a molten liquid; inserting a seed crystal into the molten liquid; slowly rotating and pulling up the seed crystal to form a single-crystal silicon pillar; dicing the single-crystal silicon pillar; and polishing the diced single-crystal silicon pillar to form a wafer. The above process is not limiting.
[0036] An isolation layer 20 is disposed on the substrate layer 10. One side of the isolation layer 20 may, for example, be in flat contact with one side of the substrate layer 10. The isolation layer 20 may cover part or all of the substrate layer 10, but this is not a limitation. The isolation layer 20 is typically composed of silicon oxide such as silicon dioxide, electrically isolating the substrate layer 10 from other layers of the optoelectronic unit 1 to prevent current interference between different components. In some embodiments, the isolation layer 20 may include vias (not shown) defined thereon and conductive material (not shown) passing through the vias. The conductive material may, for example, include tungsten, aluminum, or copper. The conductive material may be formed, for example, by filling or plating. In this way, the circuits on both sides of the isolation layer 20 can be electrically connected by the conductive material passing through the vias, integrating the circuits on both sides into a single circuit.
[0037] A first semiconductor component 30 is disposed on an isolation layer 20 and includes a first doped semiconductor layer 31 and a second doped semiconductor layer 32. The first semiconductor component 30 may be composed of, for example, a combination of one or more hole-type (P-type) semiconductors and one or more electron-type (N-type) semiconductors, and its functionality may vary depending on the structure and number of P-type and N-type semiconductors. In this embodiment, the first semiconductor component 30 is a photodiode with a PN junction. When a photon strikes the depletion layer of the first semiconductor component 30, the first semiconductor component 30 can generate a voltage.
[0038] A first doped semiconductor layer 31 is disposed on the isolation layer 20. One side of the first doped semiconductor layer 31 may be in flat contact with one side of the isolation layer 20, and the first doped semiconductor layer 31 may cover part or all of the isolation layer 20. In this embodiment, the first doped semiconductor layer 31 covers a portion of the isolation layer 20. The doping type of the first doped semiconductor layer 31 may be P-type or N-type. In this embodiment, the doping type of the first doped semiconductor layer 31 is P-type.
[0039] It is worth noting that the first doped semiconductor layer 31 is composed of polycrystalline silicon, microcrystalline silicon, or amorphous silicon. Polycrystalline silicon (Poly-Si) consists of multiple grains with grain boundaries between them. The advantage of polycrystalline silicon is its lower manufacturing cost. Amorphous silicon (a-Si) lacks long-range atomic order. The advantages of amorphous silicon are its lower manufacturing cost and excellent light absorption characteristics in some optoelectronic components. Microcrystalline silicon (μc-Si) lies between single-crystal and polycrystalline silicon, possessing a micron-scale grain structure. The advantages of microcrystalline silicon are its higher conductivity and lower manufacturing cost.
[0040] A second doped semiconductor layer 32 is disposed on top of a first doped semiconductor layer 31, wherein the first doped semiconductor layer 31 and the second doped semiconductor layer 32 are semiconductors with different doping types. One side of the second doped semiconductor layer 32 can, for example, be in flat contact with one side of the first doped semiconductor layer 31. In this embodiment, the first doped semiconductor layer 31 is P-type and the second doped semiconductor layer 32 is N-type.
[0041] It is worth noting that the second doped semiconductor layer 32 is composed of polycrystalline silicon, microcrystalline silicon, or amorphous silicon. The specific types of polycrystalline silicon, microcrystalline silicon, or amorphous silicon will not be described further here.
[0042] In some embodiments, the first semiconductor component 30 has a thickness T defined along the normal direction N of the isolation layer 20, where the thickness T is greater than or equal to about 20 nanometers and less than or equal to about 2 micrometers. In other words, the height of the first semiconductor component 30 perpendicular to the isolation layer 20 is greater than or equal to about 20 nanometers and less than or equal to about 2 micrometers. When the thickness T is greater than or equal to about 20 nanometers and less than or equal to about 2 micrometers, the first semiconductor component 30 readily receives visible light or near-infrared radiation (wavelength ≤ 700 nm) to generate a voltage, but is not readily able to receive infrared radiation with longer wavelengths. Therefore, the first semiconductor component 30 can sense visible light or near-infrared radiation (wavelength ≤ 700 nm), optimally matching the penetration depth with the thickness T of the first semiconductor component 30.
[0043] As described above, the first doped semiconductor layer 31 and the second doped semiconductor layer 32 of the photoelectric unit 1 in this embodiment are made of polycrystalline silicon, microcrystalline silicon, or amorphous silicon. Therefore, the photoelectric unit 1 can achieve the effect of receiving light and generating voltage, and the manufacturing process is simple, inexpensive, and cost-effective. Furthermore, the thickness T of the first semiconductor component 30 is greater than or equal to about 20 nanometers and less than or equal to about 2 micrometers, enabling the first semiconductor component 30 to sense visible light or near-infrared light (wavelength ≤ 700 nm).
[0044] Figure 2 This is a cross-sectional schematic diagram of a modified photoelectric unit according to an embodiment of the present invention. Please refer to... Figure 2 As shown, photoelectric unit 1A is photoelectric unit 1 (as shown in the image). Figure 1 The difference is that the substrate layer 10 of the photoelectric unit 1A also includes a circuit layer 40.
[0045] A circuit layer 40 is disposed on one side of the substrate layer 10. For example, the substrate layer 10 can be formed with components such as diodes and transistors through semiconductor processes, or it can be formed with integrated circuits through semiconductor processes. In other words, the circuit layer 40 can be pre-disposed on the substrate layer 10. In some embodiments, the circuit layer 40 may include, for example, a high-voltage metal-oxide-semiconductor field-effect transistor (MOSFET) switch, the gate of which can receive a photovoltaic voltage signal or other signals from components such as the first semiconductor component 30, and the MOSFET turns on or off according to the photovoltaic voltage signal or other signals. In other embodiments, the circuit layer 40 may include, for example, a high-voltage power MOSFET.
[0046] Additionally, an isolation layer 20 is disposed on the circuit layer 40. The isolation layer 20 can electrically isolate the circuit layer 40 from the first semiconductor component 30 when in contact with the circuit layer 40.
[0047] Therefore, the photoelectric unit 1A in this embodiment has a circuit layer 40, and the photoelectric unit 1A can be compared with the photoelectric unit 1 (such as...). Figure 1 (As shown) It has more functions and does not electrically interfere with the first semiconductor component 30. For example, the first semiconductor component 30 is a circuit with low-voltage characteristics, and the circuit layer 40 is a circuit with high-voltage characteristics. In the field of opto-relays, the low voltage is less than or equal to about 30 volts, and the high voltage is greater than about 30 volts. In some embodiments, the low voltage is about 10 volts, and the high voltage is greater than 100 volts, but this is not limiting.
[0048] Figure 3 This is a cross-sectional schematic diagram of a modified photoelectric unit according to an embodiment of the present invention. Please refer to... Figure 3 As shown, photoelectric unit 1B is photoelectric unit 1 (as shown in the image). Figure 1 The variation shown is different in that the photoelectric unit 1B also includes an intrinsic semiconductor layer I, sandwiched between the first doped semiconductor layer 31 and the second doped semiconductor layer 32, forming a PIN diode. The intrinsic semiconductor layer I can also be called an intrinsic semiconductor layer, which refers to a semiconductor without additional doping or with low doping. PIN diodes typically have a wider depletion layer and a smaller junction capacitance than ordinary diodes, which can enhance light absorption and improve photoelectric response speed.
[0049] Therefore, the photoelectric unit 1B of this embodiment has an intrinsically semiconductor layer I, and the photoelectric unit 1B can be compared with the photoelectric unit 1 (such as...). Figure 1 (As shown) It has stronger light absorption capacity and higher photoelectric response speed.
[0050] Figure 4 This is a cross-sectional schematic diagram of a modified photoelectric unit according to an embodiment of the present invention. Please refer to... Figure 4 As shown, photoelectric unit 1C is photoelectric unit 1 (as shown in the image). Figure 1 The variation shown is that the photoelectric unit 1C further includes a third doped semiconductor layer 33 disposed on the second doped semiconductor layer 32. The third doped semiconductor layer 33 and the first doped semiconductor layer 31 are semiconductors of the same doping type. For example, the first doped semiconductor layer 31 and the third doped semiconductor layer 33 are P-type semiconductors, and the second doped semiconductor layer 32 is an N-type semiconductor to form a PNP type phototransistor; or the first doped semiconductor layer 31 and the third doped semiconductor layer 33 are N-type semiconductors, and the second doped semiconductor layer 32 is a P-type semiconductor to form an NPN type phototransistor. A phototransistor can convert light signals into electrical signals. The structure of a phototransistor is similar to that of a bipolar junction transistor (BJT), but the base receives photons to generate electron-hole pairs, thereby changing the current gain of the transistor.
[0051] Therefore, the photoelectric unit 1C of this embodiment has a third doped semiconductor layer 33 and can form a phototransistor. The photoelectric unit 1C can be more efficient than the photoelectric unit 1 (e.g., ...). Figure 1 (As shown) It provides a larger current output under low light intensity.
[0052] Figure 5 This is a cross-sectional schematic diagram of a modified photoelectric unit according to an embodiment of the present invention. Please refer to... Figure 5 As shown, photoelectric unit 1D is photoelectric unit 1 (e.g., Figure 1 The difference is that the photoelectric unit 1D also includes a second semiconductor component 50.
[0053] The second semiconductor component 50 is disposed on the isolation layer 20 and adjacent to the first semiconductor component 30. The material of the second semiconductor component 50 includes polycrystalline silicon, microcrystalline silicon, or amorphous silicon. The second semiconductor component 50 is substantially different from the first semiconductor component 30. The second semiconductor component 50 can be electrically connected to or electrically isolated from the first semiconductor component 30. The specific materials used (polycrystalline silicon, microcrystalline silicon, or amorphous silicon) will not be further elaborated here. The first semiconductor component 30 can be, for example, a photodiode, and the second semiconductor component 50 can be, for example, a phototransistor.
[0054] Therefore, the photoelectric unit 1D of this embodiment has a second semiconductor component 50, and the photoelectric unit 1D is compared with the photoelectric unit 1 (such as...). Figure 1 (As shown) can integrate more functions.
[0055] Figure 6A This is a top view schematic diagram of a modified photoelectric unit according to an embodiment of the present invention. Figure 6B This is a cross-sectional schematic diagram of a photoelectric unit in a modified form according to an embodiment of the present invention. Figure 6C This is an equivalent circuit diagram of a modified photoelectric unit according to an embodiment of the present invention. Please refer to... Figure 6A , 6B As shown in Figure 6C, photoelectric unit 1E is photoelectric unit 1 (as shown in Figure 6C). Figure 1 The variation shown is that the photoelectric unit 1E includes multiple first semiconductor components 30, electrodes 311, electrodes 321, insulating filler 60, and conductive layer 70.
[0056] Multiple first semiconductor components 30 are disposed on the isolation layer 20, and the first semiconductor components 30 are arranged adjacent to each other. The first semiconductor components 30 may be arranged adjacent to each other with equal or unequal spacing. The arrangement of the first doped semiconductor layer 31 and the second doped semiconductor layer 32 of each first semiconductor component 30 may be the same or different.
[0057] Electrode 311 can be disposed on the first doped semiconductor layer 31 and electrode 321 can be disposed on the second doped semiconductor layer 32, so as to facilitate the electrical connection of the first semiconductor components 30 to each other.
[0058] An insulating filler 60 is sandwiched between one of the first semiconductor components 30 and the other. The insulating filler 60 can contact all or part of one side of each of the first semiconductor components 30, thereby preventing unnecessary electrical connections between the first semiconductor components 30 that would affect the circuit structure.
[0059] The conductive layer 70 is electrically connected to the first doped semiconductor layer 31 of one of the first semiconductor components 30 and the second doped semiconductor layer 32 of the other of the first semiconductor component 30. For example, such as Figure 6A As shown, the P-type region of the first semiconductor component 30 (left 1) is electrically connected to the N-type region of the first semiconductor component 30 (left 2); the P-type region of the first semiconductor component 30 (left 2) is electrically connected to the N-type region of the first semiconductor component 30 (left 3); and the P-type region of the first semiconductor component 30 (left 3) is electrically connected to the N-type region of the first semiconductor component 30 (left 4). This allows for the formation of... Figure 6C The diode series circuit shown. In some embodiments, the electrical connection is an ohmic contact.
[0060] Figure 7A This is an equivalent circuit diagram showing the usage state of a photoelectric unit in a variation of an embodiment of the present invention. Figure 7BThis is a schematic diagram illustrating the usage state of a photoelectric unit in a variation of one embodiment of the present invention. Please refer to... Figure 7A and 7B As shown, the photoelectric unit 1E can be coupled with the light-emitting component 80 and packaged into a relay. The light-emitting component 80 emits light L, which passes through the insulating film 90. Multiple first semiconductor components 30 receive the light L and form a voltage. Since the multiple first semiconductor components 30 are connected in series, the voltages formed by each first semiconductor component 30 are added together to form a larger voltage. Therefore, the photoelectric unit 1E can drive a relay with a metal-oxide-semiconductor field-effect transistor (MOSFET) or other relays requiring a larger voltage.
[0061] Please refer to the following: Figure 6A , 6B As shown in 6C, the photoelectric unit 1E of this embodiment has a plurality of first semiconductor components 30, insulating filler 60 and conductive layer 70. Compared with photoelectric unit 1 (as shown in 6C), photoelectric unit 1E has a plurality of first semiconductor components 30, insulating filler 60 and conductive layer 70. Figure 1 (As shown) can generate larger voltages for application in different products.
[0062] Figure 8 This is a cross-sectional schematic diagram of a modified photoelectric unit according to an embodiment of the present invention. Please refer to... Figure 8 As shown, photoelectric unit 1F is photoelectric unit 1E (as shown in the image). Figure 6B The variation shown is different in that the photoelectric unit 1F also includes a circuit layer 40 disposed on one side of the substrate layer 10. For example, the substrate layer 10 can be formed into components such as diodes and transistors through semiconductor processes, or it can be formed into integrated circuits through semiconductor processes. In other words, the circuit layer 40 can be pre-disposed on the substrate layer 10.
[0063] Therefore, the photoelectric unit 1F in this embodiment has a circuit layer 40, and the photoelectric unit 1F can be compared with the photoelectric unit 1E (such as...). Figure 6B (As shown) It has more functions and does not electrically interfere with the first semiconductor component 30.
[0064] Figures 9A to 9F This is a schematic diagram illustrating the manufacturing process of a modified photoelectric unit according to an embodiment of the present invention. The top view is a top view, and the bottom view is a side view. Please refer to... Figure 8 and Figures 9A to 9F As shown, the manufacturing process of this embodiment can, for example, manufacture the photoelectric unit 1F.
[0065] like Figure 9A As shown, a substrate layer 10 with a circuit layer 40 is first obtained.
[0066] like Figure 9B As shown, an isolation layer 20 is deposited on the substrate layer 10. For example, silicon dioxide is deposited on silicon by chemical vapor deposition (CVD) or plasma-enhanced chemical vapor deposition (PECVD).
[0067] like Figure 9C As shown, a first doped semiconductor layer 31 is deposited on the isolation layer 20. For example, a P-type semiconductor is deposited on silicon dioxide by CVD or PECVD.
[0068] like Figure 9D As shown, a second doped semiconductor layer 32 is formed on top of the first doped semiconductor layer 31. For example, doping can be performed by in-situ doping, diffusion, or ion implantation, and can be combined with a photolithography process to form a pattern.
[0069] like Figure 9E As shown, the insulating filler 60 is hollowed out and backfilled. For example, the insulating filler 60 is hollowed out and backfilled through a process similar to shallow trench isolation (STI).
[0070] like Figure 9F As shown, a conductive layer 70 is formed. For example, the conductive layer 70 is formed by a photolithography process and a metal thin film deposition method such as physical vapor deposition (PVD) or a copper process such as electroplating, so that the P-type region of one of the first semiconductor components 30 is in contact with the N-type region of the other of the first semiconductor component 30 for electrical connection.
[0071] In this way, such as Figure 8 As shown, the optoelectronic unit 1F does not require the use of silicon-on-insulator (SOI) processes to form photodiodes and other components. The optoelectronic unit 1F has a simple and inexpensive manufacturing process, and also offers other advantages, making it cost-effective.
[0072] In summary, the first and second doped semiconductor layers of the optoelectronic unit of this invention are made of polycrystalline silicon, microcrystalline silicon, or amorphous silicon. Therefore, the optoelectronic unit of this invention does not require the use of silicon-on-insulator (SOI) processes to form photodiodes or other components, yet it can still achieve the effect of receiving light and generating voltage.
[0073] The optoelectronic unit of this invention has a simple and inexpensive manufacturing process, offering high cost-effectiveness. Furthermore, the thickness of the first semiconductor component in the optoelectronic unit is greater than or equal to approximately 20 nanometers and less than or equal to approximately 2 micrometers, enabling the first semiconductor component to sense visible light or near-infrared light (wavelength ≤ 700nm). The optoelectronic unit can have a circuit layer to integrate more functions without electrically interfering with the first semiconductor component. For example, the first semiconductor component is a circuit with low-voltage characteristics, and the circuit layer is a circuit with high-voltage characteristics. The first semiconductor component and the circuit layer can be electrically connected via vias. The optoelectronic unit can have an intrinsically semiconductor layer to enhance its light absorption capability and photoelectric response speed. The optoelectronic unit can have a third doped semiconductor layer to form a phototransistor, providing greater current output under low light intensity. The optoelectronic unit can have a second semiconductor component to integrate more functions. The optoelectronic unit can have multiple first semiconductor components, insulating fillers, and conductive layers to generate greater voltage for application in different products. The photoelectric unit of this invention can be applied, for example, to a photovoltaic generator (PVG) or a photorelay.
[0074] Unless otherwise defined, the terms "substantially" are used to describe and narrate minor changes. When combined with an event or situation, the term may include the precise moment the event or situation occurred, or an approximate point in time. For example, when combined with a numerical value, the term may include a specific range of variation that is less than or equal to that numerical value.
[0075] The foregoing outlines components of several embodiments to enable those skilled in the art to better understand the concepts of the embodiments of this utility model. Those skilled in the art should understand that other processes and structures can be designed or modified based on the embodiments of this utility model to achieve the same purpose and / or benefits as the embodiments described herein. Those skilled in the art should also understand that these equivalent structures do not depart from the spirit and scope of this utility model, and various changes, substitutions, and other options can be made therein without departing from the spirit and scope of this utility model. Therefore, the scope of protection of this utility model shall be determined by the appended claims.
[0076] [Symbol Explanation]
[0077] 1, 1A, 1B, 1C, 1D, 1E, 1F: Photoelectric unit
[0078] 10: Substrate layer
[0079] 20: Isolation layer
[0080] 30: First Semiconductor Component
[0081] 31: First doped semiconductor layer
[0082] 311: Electrode
[0083] 32: Second doped semiconductor layer
[0084] 321: Electrode
[0085] 33: Third doped semiconductor layer
[0086] 40: Circuit Layer
[0087] 50: Second semiconductor component
[0088] 60: Insulating filler
[0089] 70: Conductive layer
[0090] 80: Light-emitting components
[0091] 90: Separating membrane
[0092] I: Intrinsic Semiconductor Layer
[0093] L: Light
[0094] N: Normal direction
[0095] T: Thickness
Claims
1. An optoelectronic unit, characterized by include: One substrate layer; An isolation layer is disposed on the substrate layer; and A first semiconductor component, disposed on the isolation layer, and comprising: A first doped semiconductor layer is disposed on the isolation layer; and A second doped semiconductor layer is disposed on top of the first doped semiconductor layer, wherein the first doped semiconductor layer and the second doped semiconductor layer are semiconductors with different doping types; The first doped semiconductor layer and the second doped semiconductor layer are composed of a polycrystalline silicon material, a microcrystalline silicon material, or an amorphous silicon material.
2. The optoelectronic unit of claim 1, wherein, The substrate layer further includes: A circuit layer is disposed on one side of the substrate layer; The isolation layer is disposed on the circuit layer.
3. The optoelectronic unit of claim 1, wherein, The first semiconductor component further includes: An intrinsic semiconductor layer is sandwiched between the first doped semiconductor layer and the second doped semiconductor layer.
4. The photovoltaic unit of claim 1, wherein, The first semiconductor component defines a thickness along a normal direction of the isolation layer, the thickness being greater than or equal to about 20 nanometers and less than or equal to about 2 micrometers.
5. The photovoltaic unit of claim 1, wherein, The first semiconductor component further includes: A third doped semiconductor layer is disposed on the second doped semiconductor layer, wherein the third doped semiconductor layer and the first doped semiconductor layer are semiconductors of the same doping type.
6. The photoelectric unit according to claim 1, characterized in that, Also includes: A second semiconductor component is disposed on the isolation layer and adjacent to the first semiconductor component. The material of the second semiconductor component includes a polycrystalline silicon material, a microcrystalline silicon material, or an amorphous silicon material. The second semiconductor component is substantially different from the first semiconductor component.
7. The optoelectronic unit of claim 1, wherein, Also includes: A plurality of the first semiconductor components are disposed on the isolation layer, and the first semiconductor components are adjacent to each other.
8. The optoelectronic unit of claim 7, wherein, Also includes: An insulating filler is sandwiched between one of the first semiconductor components and the other of the first semiconductor components.
9. The optoelectronic unit of claim 8, wherein, Also includes: A conductive layer is electrically connected to the first doped semiconductor layer of one of the first semiconductor components and the second doped semiconductor layer of the other of the first semiconductor components.
10. The photovoltaic unit of claim 1, wherein, The substrate layer comprises silicon, and the isolation layer comprises silicon oxide.