Electronic package and electronic component
By employing a multilayer insulating module on the silicon interposer, including silicon nitride and titanium nitride materials, the warpage problem caused by a single PI layer is solved, improving the electrical connection reliability and yield of electronic packages.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SILICONWARE PRECISION IND CO LTD
- Filing Date
- 2025-04-14
- Publication Date
- 2026-05-01
AI Technical Summary
The insulating layer of existing silicon interposers is a single PI layer, which results in poor rigidity and mechanical strength, making them prone to warping during thermal processing and affecting the reliability and yield of electrical connections.
The insulation module employs a multi-layer structure, including a passivation layer and an insulating layer. The passivation layer is made of silicon nitride, and the insulating layer is made of titanium nitride, replacing a single PI layer to improve the rigidity and mechanical strength of the electronic components.
The multi-layer structure improves the rigidity and mechanical strength of electronic components, avoids warping problems, enhances the reliability of electrical connections between circuit structures and electronic components, and improves the yield of electronic packages.
Smart Images
Figure CN224192427U_ABST
Abstract
Description
Electronic packages and electronic components Technical Field
[0001] This application relates to a semiconductor packaging technology, and more particularly to an electronic package and electronic component that can reduce costs. Background Technology
[0002] With the booming development of the electronics industry, the development of various related products is also trending towards high density, high performance, and lightness, thinness, shortness, and smallness. To this end, the industry has developed various advanced packaging forms that integrate multiple functions in order to meet the requirements of lightness, thinness, smallness, and high density of electronic products.
[0003] Currently, in addition to continuously developing advanced processes, the semiconductor industry is also looking for ways to keep chips small while maintaining high performance. As a result, the concept of "heterogeneous integration" has become a popular topic, and chips have shifted from single-layer packaging to advanced packaging with multi-layer 3D stacking.
[0004] Figure 1 is a cross-sectional schematic diagram of a conventional through-silicon interposer (TSI). As shown in Figure 1, the fabrication of the TSI includes placing a silicon substrate 11 on a glass plate 9. The silicon substrate 11 has opposing first sides 11a and second sides 11b, with the second side 11b of the silicon substrate 11 positioned on the glass plate 9. A plurality of through-silicon vias (TSVs) 110 are formed in the silicon substrate 11, penetrating the first side 11a and the second side 11b, and the through-silicon vias 110 protrude from the first side 11a of the silicon substrate 11, serving as protrusions 110a. Next, an insulating layer 12 is formed on the first side 11a of the silicon substrate 11, covering the side surface 110c of the protrusions 110a. The insulating layer 12 is a single polyimide (PI) layer. Subsequently, conductive bumps 112 and solder material 113 are formed on the top surface of the protruding section 110a by electroplating a conductive layer 111.
[0005] In subsequent applications, such as the packaging of fan-out embedded bridge (FOEB) components, the glass plate 9 is first removed, and then the silicon interposer 1 is embedded in an encapsulating colloid as an electrical bridging component to electrically connect the circuit structure on the encapsulating colloid. This allows multiple semiconductor wafers on the circuit structure to be electrically bridged to the solder material 113 on the protrusion 110a of the conductive silicon via 110 of the silicon interposer 1 through the circuit structure.
[0006] However, in the existing manufacturing method of silicon interposer 1, a single PI layer is used as the insulating layer 12, which results in poor rigidity and mechanical strength of the silicon interposer 1. Therefore, in subsequent thermal processes (such as the process of embedding the silicon interposer 1 into the encapsulating colloid), the silicon interposer 1 is prone to warping (as shown by the dashed line L in Figure 1, which shows the warping shape of the silicon interposer 1). This causes misalignment in the electrical connection between the circuit structure and the protrusion 110a, resulting in an inability to effectively connect the two. Consequently, the overall electrical connection reliability is poor, making it difficult to improve the yield of the electronic package.
[0007] Therefore, overcoming the problems of the existing technology has become an urgent issue that needs to be addressed. Summary of the Invention
[0008] In view of the various deficiencies of the prior art, this application provides an electronic component, including: an intermediate plate having a first side and a second side opposite to each other, wherein a plurality of through conductors are formed in the intermediate plate and the conductors protrude from the first side of the intermediate plate as conductive protrusions; and an insulating module formed on the first side of the intermediate plate and covering the side of the conductive protrusions, wherein the insulating module is a multilayer structure, including a passivation layer and an insulating layer, the passivation layer including silicon nitride material and the insulating layer including titanium nitride material.
[0009] This application also provides a method for manufacturing an electronic component, comprising: providing an intermediate plate having opposing first and second sides, wherein a plurality of through conductors are formed in the intermediate plate and the conductors protrude from the first side of the intermediate plate as conductive protrusions; and forming an insulating module on the first side of the intermediate plate, wherein the insulating module covers the side of the conductive protrusions, wherein the insulating module is a multilayer structure, comprising a passivation layer and an insulating layer, the passivation layer comprising silicon nitride and the insulating layer comprising titanium nitride.
[0010] In the aforementioned electronic components and their manufacturing methods, the passivation layer covers the side surface of the conductive protrusion.
[0011] In the aforementioned electronic components and their manufacturing methods, an insulating layer is formed between any two of the plurality of conductors.
[0012] In the aforementioned electronic components and their manufacturing methods, the insulating layer does not directly contact each of the conductors.
[0013] The aforementioned electronic component and its manufacturing method further include forming conductive bumps on the conductive protrusion. For example, a conductive layer is formed between the conductive protrusion and the conductive bump, and the conductive layer comprises a titanium-copper alloy.
[0014] This application also provides an electronic package, comprising: a cover layer; the aforementioned electronic component, which serves as an electrical bridging element and is embedded in the cover layer; a circuit structure disposed on the cover layer and electrically connected to the conductive protrusion of the electronic component; and a functional element disposed on the circuit structure and electrically connected to the circuit structure, such that the functional element is electrically bridged to the electronic component through the circuit structure.
[0015] This application also provides a method for manufacturing an electronic package, comprising: embedding the aforementioned electronic component as an electrical bridging element in a cover layer; forming a circuit structure on the cover layer and electrically connecting the circuit structure to the conductive protrusion of the electronic component; and disposing a functional element on the circuit structure and electrically connecting the functional element to the circuit structure, so that the functional element electrically bridges the electronic component through the circuit structure.
[0016] The aforementioned electronic package and its manufacturing method further include embedding a plurality of conductive pillars in the covering layer, and the plurality of conductive pillars are electrically connected to the circuit structure.
[0017] The aforementioned electronic package and its manufacturing method further include forming a wiring structure on a second side of the intermediate plate, and the wiring structure being electrically connected to the conductor. Further, it may include forming a plurality of conductive elements on the wiring structure.
[0018] As can be seen from the above, the electronic package and electronic component of this application mainly replace the existing single PI layer with a multi-layer structure such as the passivation layer (silicon nitride) and the insulating layer (titanium nitride) to improve the rigidity and mechanical strength of the electronic component. Therefore, compared with the prior art, the electronic package of this application can avoid the problem of warping of the electronic component during the thermal process, thereby improving the reliability of the electrical connection between the circuit structure and the electronic component, and effectively improving the yield of the electronic package. Attached Figure Description
[0019] Figure 1 is a cross-sectional schematic diagram of an existing silicon interposer.
[0020] Figures 2A to 2E are cross-sectional schematic diagrams illustrating the manufacturing process of the electronic components of this application.
[0021] Figure 3 is a cross-sectional schematic diagram of the electronic package of this application.
[0022] Explanation of reference numerals in the attached figures
[0023] 1. Silicon Interchange
[0024] 11 Silicon Plate
[0025] 11a,21a First side
[0026] 11b, 21b Second side
[0027] 110 Conductive Silicon Through-Hole
[0028] 110a Protruding segment
[0029] 110c, 210c side view
[0030] 111,211 conductive layer
[0031] 112,212 Conductive bumps
[0032] 113,213 Solder materials
[0033] 12 Insulation layer
[0034] 2 Electronic Packages
[0035] 2a Electronic components
[0036] 20. Wiring Structure
[0037] 21 Intermediate plate body
[0038] 210 Conductor
[0039] 210a Conductive protrusion
[0040] 22 Insulation Module
[0041] 221 First passivation layer
[0042] 222 Second passivation layer
[0043] 223 Insulation layer
[0044] 23 Conductive pillars
[0045] 24. Circuit Structure
[0046] 240 dielectric layer
[0047] 241 Line Layer
[0048] 25 coating layers
[0049] 26 Functional Components
[0050] 260 conductive bumps
[0051] 261,31 base rubber
[0052] 27 Encapsulation layer
[0053] 29. Conductive elements
[0054] 3 Electronic devices
[0055] 30 Heat sink
[0056] 8 Temporary vehicles
[0057] 9. Glass plate
[0058] L (dashed line). Detailed Implementation
[0059] The following specific embodiments illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification.
[0060] It should be understood that the structures, proportions, sizes, etc., depicted in the accompanying drawings are merely for illustrative purposes to aid those skilled in the art in understanding and reading the content disclosed herein, and are not intended to limit the scope of this application. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and purpose of this application, should still fall within the scope of the technical content disclosed herein. Furthermore, the terms such as "above," "first," "second," and "one" used in this specification are merely for clarity of description and are not intended to limit the scope of this application. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of this application's implementation.
[0061] Figures 2A to 2E are cross-sectional schematic diagrams illustrating the manufacturing process of the electronic component 2a of this application.
[0062] As shown in Figure 2A, an intermediate plate 21 is provided, having a first side 21a and a second side 21b opposite to each other. A plurality of conductive bodies 210 are formed in the intermediate plate 21, penetrating (or communicating with) the first side 21a and the second side 21b, with each conductive body 210 protruding from the first side 21a of the intermediate plate 21 to serve as a conductive protrusion 210a. Next, a first passivation layer 221 is formed on the first side 21a of the intermediate plate 21, covering the upper surface of the intermediate plate 21 and encapsulating the conductive protrusion 210a of the conductive body 210.
[0063] In this embodiment, the interposer 21 is a semiconductor substrate such as silicon or glass, and the conductor 210 is a metal such as copper, making the conductor 210 a through-silicon via (TSV). For example, a portion of the material on the first side 21a of the interposer 21 is removed by etching, causing the conductor 210 to protrude from the first side 21a of the interposer 21.
[0064] Furthermore, the intermediate plate 21 is mounted on a temporary carrier 8 with its second side 21b. For example, the temporary carrier 8 is a glass plate.
[0065] Furthermore, the first passivation layer 221 is a silicon nitride (Si3N4) layer or a silicon oxide layer. For example, the first passivation layer 221 is formed by physical vapor deposition (PVD).
[0066] As shown in Figure 2B, an insulating layer 223 is first formed on the first passivation layer 221, and then a second passivation layer 222 is formed on the insulating layer 223, so that the first passivation layer 221, the insulating layer 223 and the second passivation layer 222 serve as an insulating module 22.
[0067] In this embodiment, the insulating layer 223 is a titanium nitride (TiN) layer, and the second passivation layer 222 is a silicon nitride (Si3N4) layer or a silicon oxide layer. For example, the second passivation layer 222 is formed using physical vapor deposition (PVD). It should be understood that the materials of the first passivation layer 221 and the second passivation layer 222 may be the same or different, but the insulating module 22 must contain silicon nitride (Si3N4) material.
[0068] As shown in Figure 2C, a leveling process is performed to make the end face of the conductive protrusion 210a of the conductor 210 and the surface of the insulating module 22 (the surface of the first passivation layer 221, the surface of the insulating layer 223 and the surface of the second passivation layer 222) flush with each other, so that the end face of the conductive protrusion 210a of the conductor 210 is exposed to the insulating module 22, and the first passivation layer 221 covers the side surface 210c of the conductive protrusion 210a of the conductor 210.
[0069] In this embodiment, a portion of the material of the conductive protrusion 210a, the first passivation layer 221, the insulating layer 223, and the second passivation layer 222 of the conductor 210 are removed by grinding, so that the end face of the conductive protrusion 210a, the surface of the first passivation layer 221, the surface of the insulating layer 223, and the surface of the second passivation layer 222 of the conductor 210 are flush with each other.
[0070] Furthermore, an insulating layer 223 is formed between each of the conductors 210, and the insulating layer 223 does not directly contact each of the conductors 210.
[0071] As shown in Figure 2D, a plurality of conductive bumps 212 electrically connected to the conductive protrusions 210a are electroplated on the first side 21a of the intermediate plate 21 through a conductive layer 211.
[0072] In this embodiment, the conductive layer 211 is a titanium-copper (TiCu) alloy layer. The conductive layer 211 is first applied to the first side 21a of the intermediate plate 21, and then a patterned photoresist (not shown) is formed on the conductive layer 211 to form conductive bumps 212 within the patterned photoresist. Afterward, the patterned photoresist and the underlying conductive layer 211 are removed. For example, the conductive bumps 212 are copper pillars, and solder material 213 can be formed on the conductive bumps 212 as needed.
[0073] As shown in Figure 2E, the temporary carrier 8 is removed, and then a cut-off process is performed to obtain multiple electronic components 2a.
[0074] In this embodiment, the electronic component 2a can be used as an electrical bridging element and disposed in an electronic package 2 as shown in FIG3. For example, the electronic package 2 includes a cover layer 25, at least one electronic component 2a embedded in the cover layer 25, at least one conductive post 23 embedded in the cover layer 25, a circuit structure 24 disposed on the upper side of the cover layer 25 and electrically connected to the electronic component 2a, at least one functional element 26 disposed on the circuit structure 24 and electrically connected to the circuit structure 24, and a package layer 27 covering the functional element 26.
[0075] The circuit structure 24 includes at least one dielectric layer 240 and a circuit layer 241 disposed on the dielectric layer 240 and electrically connected to the conductive protrusion 210a (via conductive bump 212 or solder material 213), such as a redistribution layer (RDL). For example, the circuit layer 241 is formed of copper, and the dielectric layer 240 is formed of materials such as polybenzoxazole (PBO), polyimide (PI), prepreg (PP), or other dielectric materials.
[0076] The conductive post 23 is electrically connected to the circuit structure 24, which is made of a metal such as copper or solder, but is not limited thereto.
[0077] The coating layer 25 is an insulating material, such as polyimide (PI), dry film, or an encapsulating compound such as epoxy resin. For example, the coating layer 25 can be formed by methods such as liquid compounding, injection, lamination, or compression molding.
[0078] The functional element 26 is, for example, an active element, a passive element, a package structure, or a combination thereof, so that a plurality of the functional elements 26 are electrically bridged to each other through the circuit structure 24 and the electronic element 2a, wherein the active element is, for example, a semiconductor chip, and the passive element is, for example, a resistor, a capacitor, and an inductor.
[0079] In this embodiment, the functional element 26 is a semiconductor wafer, which can be disposed on the circuit structure 24 and electrically connected to the circuit layer 241 via multiple conductive bumps 260 such as solder bumps, copper bumps, or others in a flip-chip manner. Alternatively, the conductive bumps 260 can be covered with an adhesive base 261; or, the functional element 26 can be electrically connected to the circuit layer 241 via multiple wire bonding methods; or, the functional element 26 can directly contact the circuit layer 241. It should be understood that there are many ways in which the functional element 26 is electrically connected to the circuit structure 24, and it is not limited to the above.
[0080] The encapsulation layer 27 is an insulating material, such as polyimide (PI), dry film, or an encapsulating compound like epoxy resin. For example, the encapsulation layer 27 can be formed on the circuit structure 24 using methods such as liquid compounding, injection, lamination, or compression molding. It should be understood that the encapsulation layer 27 and the covering layer 25 may be made of the same or different materials.
[0081] In addition, a wiring structure 20 that electrically connects the conductive post 23 and the conductor 210 can be formed on the lower side of the covering layer 25 and the second side 21b of the intermediate plate 21, and a plurality of conductive elements 29, such as solder balls, can be attached to the wiring structure 20.
[0082] In this embodiment, the electronic package 2 can be connected to an electronic device 3, such as a circuit board, via the conductive elements 29, and the conductive elements 29 can be covered with an adhesive base 31. For example, a heat sink 30 can be disposed on the electronic device 3 to cover the electronic package 2 for heat dissipation.
[0083] Therefore, the manufacturing method of the electronic component 2a in this application mainly adopts a multi-layer structure design for the insulating module 22, which includes a first passivation layer 221, a second passivation layer 222 (silicon nitride), and an insulating layer 223 (titanium nitride) with different materials to improve the rigidity and mechanical strength of the electronic component 2a. Therefore, compared with the single PI layer of the prior art, the electronic package 2 of this application can avoid the problem of warpage of the electronic component 2a in the thermal process (such as the process of forming the covering layer 25), thereby improving the reliability of the electrical connection between the circuit structure 24 and the electronic component 2a, and effectively improving the yield of the electronic package 2.
[0084] This application provides an electronic component 2a, including: an intermediate plate 21 and an insulating module 22.
[0085] The intermediate plate 21 has a first side 21a and a second side 21b, and a plurality of through conductive bodies 210 are formed in the intermediate plate 21, with the conductive bodies 210 protruding from the first side 21a of the intermediate plate 21 to serve as conductive protrusions 210a.
[0086] The insulating module 22 is formed on the first side 21a of the intermediate plate 21 and covers the side 210c of the conductive protrusion 210a. The insulating module 22 includes a first passivation layer 221, a second passivation layer 222, and an insulating layer 223. The first passivation layer 221 and the second passivation layer 222 are silicon nitride layers, and the insulating layer 223 includes titanium nitride material.
[0087] In one embodiment, the first passivation layer 221 covers the side surface 210c of the conductive protrusion 210a.
[0088] In one embodiment, the insulating layer 223 is formed between any two of the plurality of conductors 210.
[0089] In one embodiment, the insulating layer 223 does not directly contact each of the conductors 210.
[0090] In one embodiment, the electronic component 2a further includes a conductive bump 212 formed on the conductive protrusion 210a. Further, a conductive layer 211 is formed between the conductive protrusion 210a and the conductive bump 212, and the conductive layer 211 comprises a titanium-copper alloy.
[0091] This application also provides an electronic package 2, including: a cover layer 25, at least one electronic component 2a, a circuit structure 24, and at least one functional component 26.
[0092] The electronic component 2a serves as an electrical bridging element and is embedded in the covering layer 25.
[0093] The circuit structure 24 is disposed on the cladding layer 25 and electrically connected to the conductive protrusion 210a of the first side 21a of the intermediate plate 21 of the electronic component 2a.
[0094] The functional element 26 is disposed on the circuit structure 24 and electrically connected to the circuit structure 24, so that the functional element 26 is electrically bridged to the electronic element 2a through the circuit structure 24.
[0095] In one embodiment, the electronic package 2 further includes a plurality of conductive pillars 23 embedded in the cover layer 25, which are electrically connected to the circuit structure 24.
[0096] In one embodiment, the electronic package 2 further includes a wiring structure 20 formed on the second side 21b of the intermediate plate 21, which is electrically connected to the conductor 210. Further, it may include a plurality of conductive elements 29 formed on the wiring structure 20.
[0097] In summary, the electronic package and electronic component of this application replace the existing single PI layer with a multilayer structure consisting of a first passivation layer, a second passivation layer (silicon nitride), and an insulating layer (titanium nitride) to improve the rigidity and mechanical strength of the electronic component. Therefore, the electronic package of this application can avoid the problem of warping of the electronic component during the thermal process, thereby improving the reliability of the electrical connection between the circuit structure and the electronic component, and effectively improving the yield of the electronic package.
[0098] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Those skilled in the art can modify the above embodiments without departing from the spirit and scope of this application. Therefore, the scope of protection of this application should be as set forth in the claims.
Claims
1. An electronic component, characterized in that, include: An intermediate plate has a first side and a second side, and a plurality of through conductive bodies are formed in the intermediate plate, with the conductive bodies protruding from the first side of the intermediate plate as conductive protrusions. And an insulating module, which is a multi-layer structure including a passivation layer and an insulating layer, is formed on the first side of the intermediate plate and covers the side of the conductive protrusion.
2. The electronic component as claimed in claim 1, characterized in that, The passivation layer contains silicon nitride, and the insulating layer contains titanium nitride.
3. The electronic component as described in claim 1, characterized in that, The passivation layer covers the sides of the conductive protrusion.
4. The electronic component as claimed in claim 1, characterized in that, The insulating layer is formed between any two of the plurality of conductors.
5. The electronic component as claimed in claim 1, characterized in that, The insulating layer does not directly contact each of the conductors.
6. The electronic component as claimed in claim 1, characterized in that... The electronic component also includes conductive bumps formed on the conductive protrusion.
7. The electronic component as claimed in claim 6, characterized in that, A conductive layer is formed between the conductive protrusion and the conductive bump, and the conductive layer comprises a titanium-copper alloy.
8. An electronic package, characterized in that, include: A coating layer; an electronic component as an electrical bridging element, as described in any one of claims 1 to 7, is embedded in the coating layer; The circuit structure includes conductive protrusions disposed on the cladding layer and electrically connected to the electronic component; And functional elements, disposed on the circuit structure and electrically connected to the circuit structure, so that the functional elements are electrically bridged to the electronic components through the circuit structure.
9. The electronic package as described in claim 8, characterized in that... The electronic package also includes multiple conductive pillars embedded in the cover layer, which are electrically connected to the circuit structure.
10. The electronic package as claimed in claim 8, characterized in that... The electronic package also includes a wiring structure formed on the second side of the interposer plate, which is electrically connected to the conductor.
11. The electronic package as claimed in claim 10, characterized in that... The electronic package also includes multiple conductive elements formed on the wiring structure.