Test fixture and test system
By designing test fixtures and using printed circuit boards and probes to connect and construct excitation and measurement circuits, the problem of insufficient applicability of semiconductor device testing is solved, and more accurate electrical parameter measurement is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SHENZHEN SHENAI SEMICON CO LTD
- Filing Date
- 2025-03-20
- Publication Date
- 2026-06-02
AI Technical Summary
In existing technologies, semiconductor devices are not suitable for testing during the production stage, and cannot achieve more accurate electrical parameter measurements.
A test fixture was designed, including a printed circuit board, a signal source interface, and a power interface. The power device under test is connected through signal probes and power probes to form an excitation circuit and a measurement circuit, realizing Kelvin connection, which can measure electrical parameters more accurately.
It enables more accurate measurement of electrical parameters of semiconductor devices, has a simple structure, small size, and is easy to connect to different test equipment and devices.
Smart Images
Figure CN224317739U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor testing technology, and in particular to a test fixture and a test system. Background Technology
[0002] With the development of semiconductor technology, people are paying more and more attention to the various performance characteristics of semiconductor devices, requiring more performance testing. Currently, semiconductor devices in the production stage are usually tested on simple test benches. Although this can barely achieve basic testing results, it has insufficient applicability. Utility Model Content
[0003] Therefore, it is necessary to provide a universal test fixture and test system.
[0004] Firstly, this application provides a test fixture, comprising:
[0005] Printed circuit boards;
[0006] Multiple signal source interfaces are disposed on the first side of the printed circuit board, and each signal source interface includes a signal probe; different signal source interfaces are used to connect to test equipment through the signal probes.
[0007] A power interface is disposed on the second side of the printed circuit board, with the first side opposite to the second side; the power interface includes a plurality of power probes; the power interface is connected to the power device under test through each of the power probes.
[0008] Each of the signal probes is connected to a power probe via internal traces on the printed circuit board.
[0009] In one embodiment, the power probe includes a first power probe, a second power probe, and a third power probe, wherein the first power probe, the second power probe, and the third power probe are respectively disposed at intervals on a second side of the printed circuit board; wherein...
[0010] The first power probe is used to connect to the first electrode of the power device under test;
[0011] The second power probe is used to connect to the second electrode of the power device under test;
[0012] The third power probe is used to connect to the third electrode of the power device under test.
[0013] In one embodiment, the plurality of signal source interfaces include a first signal source interface, a second signal source interface, and at least one third signal source interface, wherein the first signal source interface, the second signal source interface, and the third signal source interface are respectively spaced apart and disposed on a first side of the first printed circuit board; wherein...
[0014] The first signal source interface includes a first signal probe and a second signal probe, the second signal source interface includes a third signal probe and a fourth signal probe, and the third signal source interface includes a fifth signal probe and a sixth signal probe;
[0015] The first signal probe and the third signal probe are respectively connected to the first power probe;
[0016] The second signal probe and the fourth signal probe are respectively connected to the second power probe;
[0017] The fifth signal probe and the sixth signal probe are respectively connected to the third power probe.
[0018] In one embodiment, the plurality of signal source interfaces includes two third signal source interfaces, namely a third A signal source interface and a third B signal source interface;
[0019] The fifth signal probe of the third A signal source interface and the fifth signal probe of the third B signal source interface are respectively connected to the third power probe;
[0020] The sixth signal probe of the third A signal source interface and the sixth signal probe of the third B signal source interface are respectively connected to the reference ground.
[0021] In one embodiment, the projected area of the first signal source interface on the printed circuit board is greater than the projected area of the third signal source interface on the printed circuit board, and the projected area of the second signal source interface on the printed circuit board is greater than the projected area of the third signal source interface on the printed circuit board.
[0022] In one embodiment, the plurality of power probes are arranged along a first direction on a second side of the printed circuit board;
[0023] Each of the signal source interfaces is located on one side of the power probe in the second direction; the first direction intersects the second direction.
[0024] In one embodiment, the test fixture further includes a plurality of first fixing components, each of the signal source interfaces being fixedly connected to the printed circuit board via at least one of the first fixing components.
[0025] In one embodiment, the test fixture further includes a first fixing plate and a plurality of second fixing components. The first fixing plate is fixedly connected to the printed circuit board via each of the second fixing components, and the first fixing plate is located on a first side of the printed circuit board.
[0026] Each of the signal source interfaces is fixedly connected to the first fixed plate and passes through the first fixed plate. The end of each signal source interface near the printed circuit board is connected to the printed circuit board.
[0027] In one embodiment, the test fixture further includes:
[0028] A second fixing plate is located on the second side of the printed circuit board. The second fixing plate is provided with an opening that exposes the plurality of power probes.
[0029] The plurality of the second fixing components are also used to fix the printed circuit board and the second fixing plate.
[0030] Secondly, this application also provides a testing system, including:
[0031] Test equipment;
[0032] Power device under test;
[0033] The test fixture provided in any of the above embodiments has a signal source interface connected to the test equipment and a power interface connected to the power device under test.
[0034] In the aforementioned test fixture and system, the test fixture includes a printed circuit board (PCB), a power interface, and multiple signal source interfaces. The multiple signal source interfaces are located on the first side of the PCB, and the power interface is located on the second side, with the first and second sides opposite each other. Each signal source interface includes a signal probe, and the power interface includes multiple power probes. Each signal probe is connected to a power probe via internal traces on the PCB. Connecting each power probe to the source, drain, or gate of the power device under test (DUT) on the test equipment, a portion of the power probes, a portion of the signal probes, and the traces between them constitute the excitation circuit of the power device. Another portion of the power probes, another portion of the signal probes, and the traces between them constitute the measurement circuit of the power device, enabling Kelvin connection of the power device and more accurate measurement of its electrical parameters. Furthermore, the test fixture of this application has a simple structure and small size, allowing for easier connection to different test equipment and power devices. Attached Figure Description
[0035] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0036] Figure 1 A schematic diagram of the structure of the first side of a test fixture provided in one embodiment;
[0037] Figure 2 This is a schematic diagram of the structure of the second side of a test fixture provided in one embodiment;
[0038] Figure 3 This is a schematic diagram of the internal wiring of a printed circuit board in a test fixture provided in one embodiment.
[0039] Figure 4 for Figure 3 A schematic diagram of the enlarged structure of the medium power interface;
[0040] Figure 5 This is a schematic diagram of an avalanche test for power devices.
[0041] Figure 6 A schematic diagram of the structure of a first fixing component provided in one embodiment;
[0042] Figure 7 This is a schematic diagram of the structure of a test fixture provided in one embodiment.
[0043] Explanation of reference numerals in the attached figures:
[0044] 100 - Printed circuit board; 200 - Signal source interface; 210 - First signal source interface; 211 - First signal probe; 212 - Second signal probe; 220 - Second signal source interface; 221 - Third signal probe; 222 - Fourth signal probe; 230 - Third A signal source interface; 231 - Fifth signal probe of the third A signal source interface; 232 - Sixth signal probe of the third A signal source interface; 240 - Third B signal source interface; 241 - Fifth signal probe of the third B signal source interface; 242 - Sixth signal probe of the third B signal source interface; 300 - Power interface; 310 - First power probe; 320 - Second power probe; 330 - Third power probe; 400 - First fixing component; 410 - Third fixing plate; 420 - First bolt; 500 - First fixing plate; 600 - Second fixing component; 700 - Second fixing plate. Detailed Implementation
[0045] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.
[0046] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
[0047] It is understood that the terms "first," "second," etc., used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first power probe may be referred to as a second power probe, and similarly, a second power probe may be referred to as a first power probe. Both the first power probe and the second power probe are power probes, but they are not the same power probe.
[0048] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.
[0049] It is understandable that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a part of an element" refers to part or all of an element.
[0050] When used herein, the singular forms of “a,” “an,” and “ / the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.
[0051] In one embodiment, such as Figure 1 , Figure 2 and Figure 3 As shown, this application provides a test fixture, including a printed circuit board 100, a power interface 300 and a plurality of signal source interfaces 200, wherein the plurality of signal source interfaces 200 are disposed on a first side of the printed circuit board 100, and the power interface 300 is disposed on a second side of the printed circuit board 100, with the first side and the second side opposite to each other.
[0052] Each signal source interface 200 includes a signal probe, and different signal source interfaces 200 are used to connect to the test equipment via the signal probe. Different signal source interfaces 200 are connected to different terminals of the test equipment.
[0053] The power interface 300 includes multiple power probes, which connect to the power device under test (DUT) via the probes. Some of the power probes can be connected to the same terminal of the power device. For example... Figure 3 As shown, each signal probe is connected to a power probe via internal traces of the printed circuit board 100.
[0054] It is understood that when using the test fixture of this application to test the power device under test, each power probe is connected to the source, drain or gate of the power device under test, and the signal source interface 200 is connected to the test equipment. A part of the power probes, a part of the signal probes and the wiring between them constitute the excitation circuit of the power device, and another part of the power probes, another part of the signal probes and the wiring between them constitute the measurement circuit of the power device. Kelvin connection of the power device can be realized, and the electrical parameters of the power device can be measured more accurately.
[0055] Furthermore, the test fixture of this application has a simple structure and small size, which makes it easier to connect different test equipment and power devices. For example, the signal source interface can be connected to an avalanche tester, and the power probe can be directly connected to the power device to perform avalanche testing on the power device. Alternatively, the signal source interface can be connected to the test equipment, and the power probe can be connected to a test sorter to test the power device.
[0056] In one embodiment, such as Figure 4 As shown, the power probe includes a first power probe 310, a second power probe 320 and a third power probe 330, which are respectively disposed at intervals on the second side of the printed circuit board 100.
[0057] The first power probe 310 is connected to the first terminal of the power device under test. The second power probe 320 is connected to the second terminal of the power device under test. The third power probe 330 is connected to the third terminal of the power device under test.
[0058] One of the source, drain, or gate of the power device can be used as the first terminal, another of the source, drain, or gate of the power device can be used as the second terminal, and the remaining terminal of the source, drain, or gate of the power device can be used as the third terminal. For example, the source of the power device can be used as the first terminal, the drain as the second terminal, and the gate as the third terminal; alternatively, the drain of the power device can be used as the first terminal, the source as the second terminal, and the gate as the third terminal; alternatively, the gate can be used as the first terminal, the source as the second terminal, and the drain as the third terminal.
[0059] Further, the first power probe 310 may include a first sub-power probe SS and a second sub-power probe SF, and the second power probe 320 may include a third sub-power probe DF and a fourth sub-power probe DS. The third power probe may include a fifth sub-power probe GF and a sixth sub-power probe GS. The first sub-power probe SS and the second sub-power probe SF are respectively connected to the first electrode of the power device. The first sub-power probe SS can serve as a measurement probe for the first electrode of the power device, transmitting the electrical signal on the first electrode to the measurement device. The second sub-power probe SF can serve as an excitation probe for the first electrode, transmitting the electrical signal applied by the test device to the first electrode of the power device. The third sub-power probe DF and the fourth sub-power probe DS are respectively connected to the second electrode of the power device. The third sub-power probe DF can serve as an excitation probe for the second electrode of the power device, transmitting the electrical signal applied by the test device to the second electrode of the power device. The fourth sub-power probe DS can serve as a measurement probe for the second electrode, transmitting the electrical signal on the second electrode of the power device to the measurement device. The fifth sub-power probe GF and the sixth sub-power probe GS are respectively connected to the third terminal of the power device. The fifth sub-power probe GF can act as an excitation probe for the third terminal of the power device, transmitting the electrical signal applied by the test equipment to the third terminal of the power device. The sixth sub-power probe GS can act as a measurement probe for the third terminal, transmitting the electrical signal on the third terminal of the power device to the measurement equipment. This connection method decouples the excitation circuit and the measurement circuit, reduces the influence of the internal resistance of the test equipment on the detected electrical signal, and allows for more accurate measurement of the electrical parameters of the power device.
[0060] In one embodiment, the plurality of signal source interfaces include a first signal source interface, a second signal source interface, and at least one third signal source interface. The first signal source interface, the second signal source interface, and the third signal source interface are respectively disposed at intervals on a first side of the first printed circuit board.
[0061] The first signal source interface includes a first signal probe and a second signal probe; the second signal source interface includes a third signal probe and a fourth signal probe; and the third signal source interface includes a fifth signal probe and a sixth signal probe. The first and third signal probes are respectively connected to the first power probe; the second and fourth signal probes are respectively connected to the second power probe; and the fifth and sixth signal probes are respectively connected to the third power probe.
[0062] Alternatively, please continue reading Figure 3 The system includes multiple signal source interfaces, including a first signal source interface 210, a second signal source interface 220, and two third signal source interfaces. The two third signal source interfaces are a third A signal source interface 230 and a third B signal source interface 240.
[0063] The fifth signal probe 231 of the third A signal source interface 230 and the fifth signal probe 241 of the third B signal source interface 240 are respectively connected to the third power probe 330. The sixth signal probe 232 of the third A signal source interface 230 and the sixth signal probe 242 of the third B signal source interface 240 are respectively connected to the reference ground. More specifically, the first signal probe 211 is connected to the first sub-power probe SS, the second signal probe 212 is connected to the third sub-power probe DF, the third signal probe 231 is connected to the second sub-power probe SF, the fourth signal probe 222 is connected to the fourth sub-power probe DS, the fifth signal probe 231 of the third A signal source interface 230 is connected to the fifth sub-power probe GF, the fifth signal probe 241 of the third B signal source interface 240 is connected to the sixth sub-power probe GS, and the sixth signal probe 232 of the third A signal source interface 230 and the sixth signal probe 242 of the third B signal source interface 240 are respectively connected to the reference ground GG.
[0064] The following example, using avalanche testing of power devices, illustrates the connection principle between signal probes and power probes. EAS testing, or single-pulse avalanche energy testing, is an important test for power devices (such as power MOSFETs and IGBTs). Through EAS testing, devices prone to failure under extreme conditions can be screened out, thereby improving the stability and reliability of devices in practical applications. Figure 5 This is the EAS test schematic. The power device is in the off state, and the drain-source voltage V is at this time. DS Equal to bus voltage V DD There is no stored energy in the inductor L; when an appropriate pulse is applied to the gate electrode, the device turns on. At this time, the voltage source charges the inductor L until the drain current I... DThe maximum value is reached. The control gate electrode voltage is 0, the power device is turned off again, and the inductor L begins to release stored energy through the power device. When the voltage across the power device reaches the breakdown voltage, the MOS device undergoes avalanche breakdown, and the energy in the inductor is released through the power device, with current I... D Decrease. Until the inductor energy is fully released, I D When the voltage drops to zero, the power device turns off, and the voltage across its terminals returns to the capacitor voltage V. DD The energy absorbed by the power during this process is called EAS.
[0065] The signal source interface uses a BNC connector, and the source of the power device is grounded. Therefore, the outer shell of the first signal source interface 210 can be used as the first signal probe 211 and connected to the first sub-power probe SS; the outer shell of the second signal source interface 220 can be used as the third signal probe 221 and connected to the second sub-power probe SF; the center pin of the first signal source interface 210 can be used as the second signal probe 212 and connected to the third sub-power probe DF; the center pin of the second signal source interface 220 can be used as the fourth signal probe 222 and connected to the fourth sub-power probe DS; the center pin of the third A signal source interface 230 can be used as the fifth signal probe 231 and connected to the fifth sub-power probe GF; and the center pin of the third B signal source interface 240 can be used as the fifth signal probe 241 and connected to the sixth sub-power probe GS. In this way, the third signal probe 221, the second sub-power probe SF, the third power probe DF, and the second signal probe 212 constitute the source-drain voltage V. DS The excitation circuit consists of the first signal probe 211, the first sub-power probe SS, the fourth sub-power probe DS, and the fourth signal probe 222, which together form the source-drain voltage V. DS The measurement circuit, consisting of the third signal probe 221, the second sub-power probe SF, the fifth sub-power probe GF, and the fifth signal probe 241 in the third signal source interface, constitutes the gate-source voltage V. GS The excitation circuit, consisting of the first signal probe 211, the first sub-power probe SS, the sixth sub-power probe GS, and the fifth signal probe 231 of the third A signal source interface, constitutes the gate-source voltage V. GS The measurement circuit.
[0066] In one embodiment, please refer to... Figure 3The projected area of the first signal source interface 210 on the printed circuit board 100 is larger than that of the third signal source interface 230, and the projected area of the second signal source interface 220 on the printed circuit board 100 is larger than that of the third signal source interface 230. The first and second signal source interfaces 210 transmit relatively large signal voltages; therefore, thicker interfaces are required to better shield against external interference and ensure the safety of the testing process.
[0067] The projected area of the first signal source interface 210 on the printed circuit board 100 and the projected area of the second signal source interface 220 on the printed circuit board 100 can be the same or different.
[0068] In one embodiment, see Figure 3 Multiple power probes are arranged along a first direction on the second side of the printed circuit board 100. Each signal source interface 200 is located on one side of the power probes in the second direction. The first direction intersects the second direction. Both the first and second directions are perpendicular to the direction from the first side of the printed circuit board 100 to the second side.
[0069] Each signal source interface 200 can be located on the same side of the power probe in the second direction, or it can be located on a different side of the power probe in the second direction.
[0070] In one embodiment, see Figure 1 and Figure 6 The test fixture also includes multiple first fixing components 400, and each signal source interface 200 is fixedly connected to the printed circuit board 100 through at least one first fixing component 400. Each first fixing component 400 may include a third fixing plate 410 and multiple first bolts 420. The third fixing plate 410 has through holes that can be precisely inserted into the signal source interfaces, and the multiple first bolts 420 can fix the third fixing plate 410 and the printed circuit board 100. Each first fixing component 400 may have four first bolts 420.
[0071] In one embodiment, see Figure 7The test fixture also includes a first fixing plate 500 and multiple second fixing components 600. The first fixing plate 500 is fixedly connected to the printed circuit board 100 through each of the second fixing components 600, and the first fixing plate 500 is located on the first side of the printed circuit board 100. Each signal source interface 200 is fixedly connected to the first fixing plate 500 and passes through the first fixing plate 500. The end of each signal source interface 200 closest to the printed circuit board 100 is connected to the printed circuit board 100. The first fixing plate 500 can also be a PCB board. The first fixing plate 500 can serve as a support plate for the signal source interface 200 and can also protect the contact area between the signal source interface 200 and the printed circuit board 100 from interference. The second fixing components 600 can be copper pillars.
[0072] In one embodiment, see Figure 7 The test fixture also includes a second fixing plate 700. The second fixing plate 700 is located on the second side of the printed circuit board 100 and has an opening that exposes multiple power probes. Multiple second fixing components 600 are also used to securely connect the printed circuit board 100 and the second fixing plate 700.
[0073] In one embodiment, this application also provides a test system, including a test device, a power device under test, and a test fixture provided in any of the above embodiments, wherein the signal source interface of the test fixture is connected to the test device, and the power interface of the test fixture is connected to the power device under test.
[0074] In the description of this specification, references to terms such as "some embodiments," "other embodiments," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.
[0075] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0076] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.
Claims
1. A test fixture, comprising: include: Printed circuit boards; Multiple signal source interfaces are disposed on the first side of the printed circuit board, and each signal source interface includes a signal probe; different signal source interfaces are used to connect to test equipment through the signal probes. A power interface is disposed on the second side of the printed circuit board, with the first side opposite to the second side; the power interface includes a plurality of power probes; the power interface is connected to the power device under test through each of the power probes. Each of the signal probes is connected to a power probe via internal traces on the printed circuit board.
2. The test fixture of claim 1, wherein, The power probe includes a first power probe, a second power probe, and a third power probe, which are respectively disposed at intervals on the second side of the printed circuit board; wherein... The first power probe is used to connect to the first electrode of the power device under test; The second power probe is used to connect to the second electrode of the power device under test; The third power probe is used to connect to the third electrode of the power device under test.
3. The test fixture of claim 2, wherein, The plurality of signal source interfaces includes a first signal source interface, a second signal source interface, and at least one third signal source interface, wherein the first signal source interface, the second signal source interface, and the third signal source interface are respectively spaced apart and disposed on a first side of the printed circuit board; wherein... The first signal source interface includes a first signal probe and a second signal probe, the second signal source interface includes a third signal probe and a fourth signal probe, and the third signal source interface includes a fifth signal probe and a sixth signal probe; The first signal probe and the third signal probe are respectively connected to the first power probe; The second signal probe and the fourth signal probe are respectively connected to the second power probe; The fifth signal probe and the sixth signal probe are respectively connected to the third power probe.
4. The test fixture of claim 3, wherein, The plurality of signal source interfaces includes two third signal source interfaces, namely, the third A signal source interface and the third B signal source interface; The fifth signal probe of the third A signal source interface and the fifth signal probe of the third B signal source interface are respectively connected to the third power probe; The sixth signal probe of the third A signal source interface and the sixth signal probe of the third B signal source interface are respectively connected to the reference ground.
5. The test fixture of claim 3, wherein, The projected area of the first signal source interface on the printed circuit board is greater than the projected area of the third signal source interface on the printed circuit board, and the projected area of the second signal source interface on the printed circuit board is greater than the projected area of the third signal source interface on the printed circuit board.
6. The test fixture of any one of claims 1-5, wherein, The plurality of power probes are arranged along a first direction on the second side of the printed circuit board; Each of the signal source interfaces is located on one side of the power probe in the second direction; the first direction intersects the second direction.
7. The test fixture of any of claims 1-5, wherein, The test fixture also includes multiple first fixing components, and each of the signal source interfaces is fixedly connected to the printed circuit board through at least one of the first fixing components.
8. The test fixture of any one of claims 1-5, wherein, The test fixture further comprises a first fixing plate and a plurality of second fixing components, the first fixing plate is fixedly connected with the printed circuit board through each of the second fixing components, and the first fixing plate is located at a first side of the printed circuit board. Each of the signal source interfaces is fixedly connected on the first fixing plate and penetrates through the first fixing plate, and one end of each of the signal source interfaces close to the printed circuit board is connected with the printed circuit board.
9. The test fixture of claim 8, wherein, The test fixture further comprises: a second fixing plate located at a second side of the printed circuit board, the second fixing plate is provided with an opening, and the opening exposes the plurality of power probes; wherein the plurality of second fixing components are further used for fixedly connecting the printed circuit board and the second fixing plate.
10. A test system, characterized by comprise: a test device; a power device to be tested; the test fixture of any one of claims 1-9, wherein a signal source interface of the test fixture is connected with the test device, and a power interface of the test fixture is connected with the power device to be tested.