A package structure of a ring integrated passive device

Abstract

The utility model belongs to chip packaging technical field, specifically disclose a kind of packaging structure of annular integrated passive device, it include: substrate, frame base island, intermediate base island chip, annular PCB, passive device and outer output pin, the substrate outer surface is arranged frame base island, annular PCB, the outer output pin is arranged in the outermost peripheral edge of substrate one week, the intermediate base island chip is attached on frame base island, the passive device is attached on annular PCB, it is connected through wire between the intermediate base island chip and outer output pin, the intermediate base island chip is connected with annular PCB through lead, the passive device includes synchronous passive device, chip level passive device, the synchronous passive device, chip level passive device is attached on annular PCB. It can be contacted by increasing radio frequency device and base island, guarantee the heat dissipation of product, synchronous integrated passive device chip and passive device, guarantee radio frequency device power output and more device integration.

Description

Technical Field

[0001] This utility model relates to the field of chip packaging technology, specifically to a packaging structure for a ring-shaped integrated passive device. Background Technology

[0002] Heat dissipation is a significant challenge in modern electronic device design, especially in 5G communication equipment. RF devices generate substantial heat during operation, and if not properly cooled, this can lead to performance degradation or even damage. As device integration and component density increase, heat dissipation becomes more difficult; furthermore, improved chip performance leads to increased power consumption and consequently, greater heat generation. The increasing frequency of RF signals exacerbates the problem of RF heat generation in products.

[0003] Currently, passive components are integrated using LGA packaging, but this can affect the product's heat dissipation; alternatively, passive components cannot be integrated using the QFN-WB method.

[0004] like Figure 2 As shown, the implementation of LGA involves integrating PCB and passive components to form a complete package; the disadvantages are that the product area becomes larger and the heat dissipation is poor due to the LGA package.

[0005] like Figure 3 As shown, the QFN package implementation can connect the chip to the metal substrate, ensuring heat dissipation of the product; however, it cannot integrate passive components, resulting in the inability to integrate adjustable circuits inside the product. Utility Model Content

[0006] The purpose of this invention is to provide a packaging structure for a ring-shaped integrated passive device to solve the problems mentioned in the background art.

[0007] To achieve the above objectives, this utility model provides the following technical solution: a packaging structure for a ring-shaped integrated passive device, comprising:

[0008] Substrate, frame base island, intermediate base island chip, ring PCB, passive components and external output pins;

[0009] The substrate has a frame base island and a ring PCB on its outer surface. The external output pins are arranged around the outermost edge of the substrate. The middle base island chip is mounted on the frame base island. The passive device is mounted on the ring PCB.

[0010] The intermediate base island chip is connected to the external output pin via wire bonding, and the intermediate base island chip is connected to the ring PCB via lead wires.

[0011] Preferably, the passive device includes a synchronous passive device and a chip-level passive device, which are mounted on a ring-shaped PCB.

[0012] Preferably, it also includes welding fingers, which are disposed on a ring PCB and are connected to the external output pins to form a path.

[0013] Compared with the prior art, the beneficial effects of this utility model are:

[0014] By increasing the contact between the RF device and the base island, the heat dissipation of the product can be guaranteed, and passive device chips and passive devices can be integrated simultaneously to ensure the power output of the RF device and the integration of more devices. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the structure of this utility model;

[0016] Figure 2 This is a schematic diagram of the LGA package structure;

[0017] Figure 3 This is a schematic diagram of a QFN package.

[0018] In the diagram: 1. Substrate; 2. Frame base island; 3. Middle base island chip; 4. Ring PCB; 5. Synchronous passive device; 6. Soldering finger; 7. Chip-level passive device; 8. External output pin. Detailed Implementation

[0019] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0020] In the description of this utility model, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0021] Example 1:

[0022] Please see Figures 1-3This utility model provides a technical solution: a ring-shaped integrated passive device packaging structure, including: a substrate 1, a frame base island 2, a middle base island chip 3, a ring PCB 4, a passive device, and an external output pin 8;

[0023] The substrate 1 has a frame base island 2 and an annular PCB 4 on its outer surface. The external output pins 8 are arranged around the outermost edge of the substrate 1. The intermediate base island chip 3 is mounted on the frame base island 2, and the passive device is mounted on the annular PCB 4. The intermediate base island chip 3 and the external output pins 8 are connected by wire bonding, and the intermediate base island chip 3 and the annular PCB 4 are connected by lead wires.

[0024] Analysis of the above content:

[0025] The intermediate base island chip 3 is mounted on the frame base island 2, and the passive components are mounted on the ring PCB 4; the ring PCB 4 is mounted synchronously with the frame base island 2; the intermediate base island chip 3 can be directly interconnected with the external output pin 8 through wire bonding to form a path.

[0026] Analysis of the above content: The intermediate base island chip 3 is mounted on the frame base island 2, and the ring PCB 4 is mounted synchronously with the frame base island 2; the intermediate base island chip 3 and the ring PCB 4 are interconnected using leads, and the intermediate base island chip 3 on the frame base island 2 and the passive devices on the ring PCB 4 form a path.

[0027] Example 2:

[0028] Please see Figures 1-3 Based on Embodiment 1, this utility model provides a technical solution: the passive device includes a synchronous passive device 5 and a chip-level passive device 7, which are mounted on a ring-shaped PCB 4.

[0029] Analysis of the above: The intermediate base island chip 3 is mounted on the frame base island 2, and the ring PCB 4 is mounted synchronously with the frame base island 2. The chip-level passive device 7 is mounted on the ring PCB 4, and the synchronous passive device 5 is also mounted synchronously on the ring PCB 4. The intermediate base island chip 3 and the ring PCB 4 are interconnected using leads. The frame base island 2 can be directly connected to the external output pin 8. The synchronous passive device 5 and the chip-level passive device 7 of the intermediate base island chip 3 and the ring PCB 4 are interconnected through leads and can be wire-soldered to the external output pin 8. The synchronous passive device 5 and the chip-level passive device 7 on the ring PCB 4 are interconnected with the external pins to form a path.

[0030] Example 3:

[0031] Please see Figures 1-3The present invention provides a technical solution based on Embodiment 1: it further includes a welding finger 6, which is disposed on a ring PCB4, and the welding finger 6 of the ring PCB4 is connected to the external output pin 8 to form a passage.

[0032] In the above-mentioned solution, the chip, PCB, passive components, etc. all adopt existing technologies. The connection method and structural layout are the innovative parts of the design of this solution. Based on the above design, this solution has a good heat dissipation effect under the premise of integrating passive components and internal integrated adjustable circuit.

[0033] The foregoing has shown and described the basic principles, main features, and advantages of this utility model. It is obvious to those skilled in the art that this utility model is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or basic characteristics of this utility model. Therefore, the embodiments should be considered exemplary and non-limiting in all respects. The scope of this utility model is defined by the appended claims rather than the foregoing description. Therefore, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within this utility model, and no reference numerals in the claims should be considered as limiting the scope of the claims.

[0034] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A packaging structure for a ring-shaped integrated passive device, characterized in that, include: Substrate (1), frame base island (2), intermediate base island chip (3), ring PCB (4), passive components and external output pins (8); Among them, the outer surface of the substrate (1) is provided with a frame base island (2) and a ring PCB (4), the external output pin (8) is provided around the outermost edge of the substrate (1), the middle base island chip (3) is mounted on the frame base island (2), and the passive device is mounted on the ring PCB (4). The intermediate base island chip (3) is connected to the external output pin (8) by wire bonding, and the intermediate base island chip (3) is connected to the ring PCB (4) by lead wire.

2. The packaging structure of a ring-shaped integrated passive device according to claim 1, characterized in that: The passive devices include a synchronous passive device (5) and a chip-level passive device (7), which are mounted on a ring PCB (4).

3. The packaging structure of a ring-shaped integrated passive device according to claim 1, characterized in that: It also includes welding fingers (6), which are disposed on the annular PCB (4) and the welding fingers (6) of the annular PCB (4) are connected to the external output pins (8) to form a path.

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