A power isolation circuit, a power sequencer and a power sequencer chassis
By using electromagnetic induction technology with isolation transformers in the power sequencer, the interference problem of the power sequencer when high- and low-power devices share power supply is solved, achieving better power isolation and noise reduction.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- 广州市迪士普音响科技有限公司
- Filing Date
- 2025-07-31
- Publication Date
- 2026-06-23
AI Technical Summary
When existing power sequencers share power with high-power and low-power devices, the common-mode LC filter circuit cannot completely eliminate interference, leading to increased noise in low-power devices and even introducing significant current noise.
Multiple isolation transformers are used, each including first and second coils wound on a magnetic core, to isolate AC power through electromagnetic induction. Power isolation circuits and power sequencers are designed to enhance power isolation performance and reduce interference between devices.
It effectively filters out interference signals in the power supply, reduces noise from the front-end equipment, improves power isolation performance, and adapts to the power requirements of different devices.
Smart Images
Figure CN224401391U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of electronic equipment technology, and in particular to a power isolation circuit, a power sequencer, and a power sequencer chassis. Background Technology
[0002] In related technologies, power sequencers (or power timing circuits) typically employ multiple channels to output power. Each channel can perform power detection and filtering, and each channel is equipped with a switch to control its conduction. To address power supply interference between devices, power sequencers generally use common-mode LC filter circuits. These circuits consist of capacitors and inductors, with the live and neutral wires connected. Power passes through the common-mode inductor and filter capacitor, outputting power after interference signals have been filtered out. However, common-mode LC filter circuits have limitations: when high-power devices (such as power amplifiers with rated power of hundreds or even thousands of watts) share the same power supply with low-power pre-amplifier devices (such as audio playback devices, audio processors, feedback suppressors, etc.), the circuit struggles to completely eliminate interference from the high-power load. This interference, when conducted to low-power devices, can increase the device's inherent noise level and even introduce significant current noise. Utility Model Content
[0003] To address at least one of the aforementioned technical problems, this utility model proposes a power isolation circuit, a power sequencer, and a power sequencer chassis, which can enhance power isolation performance and reduce interference between devices.
[0004] To achieve the above objectives, one aspect of this application provides a power isolation circuit, which includes a plurality of isolation transformers, each of which includes a first coil, a second coil, and a magnetic core, wherein the first coil and the second coil are both wound on the magnetic core;
[0005] The two ends of the first coil serve as the input terminals of the isolation transformer, which are used to connect to the power output channels of the power timing circuit.
[0006] The two ends of the second coil serve as the output terminals of the isolation transformer, used to output power.
[0007] To achieve the above objectives, another aspect of the embodiments of this application proposes a power sequencer, which includes a power timing circuit and a power isolation circuit as described above. The power timing circuit includes multiple power output channels, and the input terminal of each isolation transformer in the power isolation circuit is connected to one of the power output channels.
[0008] In some embodiments, the power timing circuit includes a relay control circuit and a power detection circuit;
[0009] The power detection circuit includes multiple power output channels, and each power output channel is equipped with a relay switch.
[0010] The relay control circuit includes multiple relay controllers and a main control chip. Each relay controller is connected to a corresponding relay switch, and multiple communication pins of the main control chip are respectively connected to multiple relay controllers.
[0011] In some embodiments, the relay control circuit further includes a signal enhancement chip; the plurality of input pins of the signal enhancement chip are respectively connected to the plurality of communication pins of the main control chip, and the plurality of output pins of the signal enhancement chip are respectively connected to the plurality of relay controllers.
[0012] In some embodiments, the plurality of power output channels are divided into a first output channel and a second output channel, wherein the first output channel is connected to the input terminal of the isolation transformer and the second output channel is connected to the power output interface.
[0013] In some embodiments, the power sequencer further includes a power conversion circuit; the plurality of DC output ports of the power conversion circuit are respectively connected to the relay control circuit and the power detection circuit.
[0014] To achieve the above objectives, another aspect of the embodiments of this application proposes a power sequencer chassis, the power sequencer chassis including a power input interface, a plurality of power output interfaces and a power sequencer as described in any of the above claims; the power sequencer includes a sequencer input terminal and a plurality of sequencer output terminals, wherein at least one of the sequencer output terminals is the output terminal of an isolation transformer;
[0015] The power input interface and the plurality of power output interfaces are disposed on the surface of the outer shell of the power sequencer chassis, and the power sequencer is disposed inside the outer shell;
[0016] The power input interface is electrically connected to the input terminal of the power timing circuit of the power sequencer, and each power output interface is electrically connected to a corresponding output terminal of the sequencer.
[0017] In some embodiments, the power sequencer chassis further includes an air switch disposed on the surface of the housing and connected between the power input interface and the sequencer input.
[0018] In some embodiments, the power sequencer chassis further includes a display disposed on the surface of the housing, the input of the display being connected to the output pin of the main control chip in the power sequencer.
[0019] In some embodiments, the power sequencer chassis further includes a keypad, which is disposed on the surface of the housing and connected to the input pins of the main control chip in the power sequencer.
[0020] The above-described technical solution of this utility model has at least one of the following advantages or beneficial effects: The isolation transformer includes two coils and a magnetic core, with the two coils winding around the same magnetic core. Through electromagnetic induction, the alternating current of the first coil is induced into the second coil. By applying the power isolation circuit to the power output channel of the power sequence circuit, interference signals between the load and the power sequence circuit can be isolated, thereby filtering out interference signals in the power supply, enhancing the power isolation performance of the power sequence circuit, and reducing the noise generated by the front-end equipment. Attached Figure Description
[0021] Figure 1 This is a schematic diagram of the power isolation circuit provided in an embodiment of this application;
[0022] Figure 2 This is a schematic diagram of the structure of a relay control circuit provided in an embodiment of this application;
[0023] Figure 3 This is a schematic diagram of the structure of an electrical energy detection circuit provided in an embodiment of this application;
[0024] Figure 4 This is a schematic diagram of a power conversion circuit provided in an embodiment of this application;
[0025] Figure 5 This is a schematic diagram of the overall layout of the power sequencer chassis provided in an embodiment of this application. Detailed Implementation
[0026] The embodiments of this utility model are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this utility model, and should not be construed as limiting this utility model.
[0027] In the description of this utility model, it should be understood that the directional descriptions, such as up, down, left, right, etc., indicate the directional or positional relationship based on the directional or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.
[0028] In the description of this utility model, the use of terms such as "first" and "second" is only for the purpose of distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of technical features indicated, or implicitly indicating the order of the technical features indicated.
[0029] In the description of this utility model, unless otherwise explicitly defined, terms such as "setting," "installation," and "connection" should be interpreted broadly, and those skilled in the art can reasonably determine the general specific meaning of the above terms in this utility model in conjunction with the specific content of the technical solution.
[0030] This invention proposes a power isolation circuit, a power sequencer, and a power sequencer chassis, which can enhance power isolation performance and reduce interference between devices.
[0031] One aspect of this utility model proposes a power isolation circuit, which includes multiple isolation transformers. Each isolation transformer includes a first coil, a second coil, and a magnetic core. Both the first coil and the second coil are wound on the magnetic core.
[0032] The two ends of the first coil serve as the input terminals of the isolation transformer, which are used to connect to the power output channels of the power timing circuit.
[0033] The two ends of the second coil serve as the output terminals of the isolation transformer, used for power output.
[0034] Specifically, please refer to Figure 1 The power isolation circuit can include four independent power isolation channels, each equipped with an isolation transformer. Each isolation transformer includes a first coil, a second coil, and a magnetic core. Ports 1 and 2 of the first coil serve as the input terminals of the isolation transformer, and ports 3 and 4 of the second coil serve as the output terminals. For example, port 2 is connected to the live wire output port L_OUT7 of one of the power output channels, and port 1 is connected to the neutral wire output port N_OUT7. The power output channel inputs 220V AC to the first coil, which, through the magnetic core T1, induces the 220V AC to the second coil. Ports 3 and 4 of the second coil are connected to power output 1, which can serve as a power output interface. External devices are connected to this interface, allowing the isolation transformer to output 220V AC to the external devices. The two coils of the isolation transformer are not directly connected; electromagnetic conduction suppresses interference signals in the power supply, thus filtering out interference signals in the original AC power and reducing noise in the pre-amplifier. Interference signals include frequency interference from the switching power supply, DC interference from potential differences, and transient interference from power amplifier power increases.
[0035] In some embodiments, the two coils have the same number of turns, wire diameter, and material, which can achieve equal power transfer of alternating current.
[0036] This application also proposes a power sequencer, which includes a power timing circuit and a power isolation circuit as described in the above embodiments. The power timing circuit includes multiple power output channels, and the input terminal of each isolation transformer in the power isolation circuit is connected to a corresponding power output channel.
[0037] Specifically, please refer to Figure 1 and Figure 3 The power output channel includes a live wire output port L_OUTx and a neutral wire output port N_OUTx, where x represents 0-7. For example, port 2 of the input terminal of the isolation transformer is connected to the live wire output port L_OUT7 of the power output channel, and port 1 is connected to the neutral wire output port N_OUT7.
[0038] In some embodiments, the power timing circuit includes a relay control circuit and a power detection circuit;
[0039] The power detection circuit includes multiple power output channels, and each power output channel is equipped with a relay switch;
[0040] The relay control circuit includes multiple relay controllers and a main control chip. Each relay controller is connected to a corresponding relay switch, and multiple communication pins of the main control chip are respectively connected to multiple relay controllers.
[0041] Specifically, please refer to Figure 2 and Figure 3 , Figure 2 This is a schematic diagram of a relay control circuit. Figure 3This is a schematic diagram of the power detection circuit. The circuit includes multiple power output channels, each connected to a live wire bus L_IN and a neutral wire bus N_IN. These channels are connected in parallel. Each power output channel includes a live wire output port L_OUTx and a neutral wire output port N_OUTx. A relay switch RLXB is placed between the live wire bus L_IN and the live wire output port L_OUTx, and a relay switch RLXC is placed between the neutral wire bus N_IN and the neutral wire output port N_OUTx. Here, X represents 1-8. The relay control circuit includes multiple relay controllers RLXA (RL1A-RL8A) and a main control chip. P1 is a connector for the main control chip, which can be a microcontroller (MCU). The main control chip sends control signals to control the relay controllers RLXA, which in turn control the corresponding relay switches RLXB and RLXC, thereby controlling the conduction of the power output channels. Therefore, users can control the power output of different power output channels according to their actual needs.
[0042] For example, the relay controller can use a RELAY-3 relay. The RELAY-3 is an 8-channel live / neutral dual-switch relay, with each channel connected to the live wire bus L-IN and the neutral wire bus N-IN. RLXA, RLXB, and RLXC belong to the same relay circuit channel. The switching direction of RL8B and RL8C is controlled by RL8A. When pins 1 and 2 are connected, and pins 4 and 5 are connected, pins 2 and 5 are floating, so the live and neutral wires are not connected, meaning no power flows. When RL8A controls RL8B and RL8C to engage, pins 1 and 3 are connected, and pins 4 and 6 are connected, thus providing power. AC power can then be output to the isolation transformer T1 through L_OUT7 and N_OUT7.
[0043] In some embodiments, the relay control circuit further includes a signal enhancement chip; the multiple input pins of the signal enhancement chip are respectively connected to the multiple communication pins of the main control chip, and the multiple output pins of the signal enhancement chip are respectively connected to the multiple relay controllers.
[0044] Specifically, please refer to Figure 2The relay control circuit also includes a signal enhancement chip U1 and a multi-channel relay. The signal enhancement chip U1 amplifies the enable signal from the main control chip, thereby driving the relay. The driver chip U1 is a ULN2803A chip, an 8-channel Darlington transistor array chip used to drive power loads such as relays and stepper motors. The input terminals IN1-IN8 of the signal enhancement chip U1 are connected to the communication pins (IO ports) of the main control chip (microcontroller), and the output terminals OUT1-OUT8 are connected to the eight channels of the relay, with IN1-IN8 and OUT1-OUT8 corresponding one-to-one. For example, when the microcontroller's level signal is received at IN1, U1 amplifies the signal and outputs it through OUT1, thereby driving the control part RL8A of the relay on the OUT1 channel.
[0045] In some embodiments, the multiple power output channels are divided into a first output channel and a second output channel. The first output channel is connected to the input terminal of the isolation transformer, and the second output channel is connected to the power output interface.
[0046] Specifically, please refer to Figure 1 and Figure 3 The power detection circuit includes eight power output channels, four of which serve as first output channels and the remaining four as second output channels. Each first output channel is connected to the input terminal of a corresponding isolation transformer, and each second output channel is connected to a corresponding power output interface. The power output from the second output channels does not undergo processing by the isolation transformer and can be directly output to external devices. For example, the output terminals of the first output channels include L_OUT7 and N_OUT7, L_OUT6 and N_OUT6, L_OUT5 and N_OUT5, and L_OUT4 and N_OUT4. The output terminals of different first output channels are respectively connected to the input terminals of the isolation transformer. After passing through the isolation transformer, the power is output through power outputs 1-4. The output terminals of the second output channels, L_OUT3 and N_OUT3, L_OUT2 and N_OUT2, L_OUT1 and N_OUT1, and L_OUT0 and N_OUT0, are connected to different power outputs (power outputs 5-8). These two different power outputs can adapt to different peripheral power requirements while reasonably balancing the manufacturing cost and performance of the power sequencer.
[0047] In some embodiments, the power sequencer further includes a power conversion circuit; the multiple DC output ports of the power conversion circuit are respectively connected to a relay control circuit and a power detection circuit.
[0048] Specifically, please refer to Figure 4The power conversion circuit includes an AC-DC conversion module M1 and its peripheral circuitry. The live wire (L) and neutral wire (N) are connected to the input terminals of M1. M1 converts 220V AC power to 12V DC power. The peripheral circuitry further processes the 12V DC power to obtain 5V DC power. The DC output port can output both 12V and 5V DC power, which can provide DC voltage for the relay control circuit and the power detection circuit. The DC power can also power relays, the screen, and the MCU. The power sequencer performs internal power conversion without requiring an external DC power supply, enabling the circuit to operate normally.
[0049] In some embodiments, the power module of the power detection circuit is connected to the main control chip. The power module is used to detect the power data of the AC power supply and transmit the power data to the main control chip.
[0050] Specifically, please refer to Figure 3 The power module M1 can detect the power data of the AC power supply, such as voltage, current, frequency and power. The main control chip can receive the power data through the serial port PA10_USART1_RX.
[0051] This application also proposes a power sequencer chassis, which includes a power input interface, multiple power output interfaces, and a power sequencer as described in the above embodiments; the power sequencer includes a sequencer input terminal and multiple sequencer output terminals, wherein at least one sequencer output terminal is the output terminal of an isolation transformer.
[0052] The power input interface and multiple power output interfaces are located on the surface of the power sequencer chassis, while the power sequencer is located inside the chassis.
[0053] The power input interface is electrically connected to the input terminal of the power sequencer's power timing circuit, and each power output interface is electrically connected to one corresponding output terminal of the sequencer.
[0054] Specifically, please refer to Figure 5 The power input interface can be connected to a 2.5mm² 3-core wire to receive external AC power. 2.5mm² refers to the cross-sectional area of a single conductor being 2.5mm². 2"3-core" refers to a cable containing three independent conductors. The power output interface uses a 10A national standard two-and-three-pin socket, which conforms to Chinese national standards. The power input interface and multiple power output interfaces are located on the surface of the power sequencer chassis for easy plugging and unplugging of the power cord. The power sequencer is housed inside the chassis, protecting its electronic components. The power input interface connects to the power sequencer's power timing circuit, providing power to ensure its normal operation. Some power output interfaces connect to the output of the isolation transformer, while others connect to the power output channel. The power output interfaces connected to the isolation transformer output isolated power, suitable for devices with high power quality requirements. The power output interfaces directly connected to the power output channel output unisolated power, suitable for devices with lower power quality requirements. Users can choose the appropriate power output interface based on their needs; this power sequencer chassis offers a variety of options.
[0055] In some embodiments, the power sequencer chassis also includes an air switch disposed on the surface of the housing and connected between the power input interface and the sequencer input.
[0056] Specifically, the circuit breaker is mounted on the surface of the casing for easy user control. The circuit breaker connects to both the power input interface and the power sequencer circuit, allowing users to control the power input and protect the power sequencer.
[0057] In some embodiments, the power sequencer chassis further includes a display disposed on the surface of the housing, the input of which is connected to the output pin of the main control chip in the power sequencer.
[0058] Specifically, the display can be a 3.2-inch screen. The input terminal of the screen is connected to the output pin of the main control chip. After receiving the power data from the power module M2, the main control chip outputs it to the screen, displaying the power data so that users can monitor the operation of the power sequencer more intuitively.
[0059] In some embodiments, the power sequencer chassis further includes a keypad, which is disposed on the surface of the housing and connected to the input pins of the main control chip in the power sequencer.
[0060] Specifically, the keypad is connected to the main control chip. Users can input control commands to the main control chip through the keypad, and the main control chip controls the transformer to control the detection module, such as controlling the conduction and cutoff of a certain channel. The keypad makes it more convenient for users to use the sequencer.
[0061] In some embodiments, an isolated power sequencer is provided. This device has eight timing power channels, four of which are isolated with a maximum power of 500W, and the other four channels each have a maximum current of 10A. Generally, the power of front-end devices is relatively small, and 500W is sufficient to meet the functional requirements of most front-end devices.
[0062] Please refer to Figure 5 , Figure 5 This is a schematic diagram of the overall layout of the power sequencer chassis. The entire device is a 19-inch rack-mount unit, 3U in height, with four 500W isolation transformers. Each isolation transformer has a diameter of 142mm and is located inside the chassis. Since the isolation transformers occupy a certain amount of space, the number of isolation transformers can be determined based on actual needs. For example, for... Figure 5 The chassis specifications shown indicate that installing four isolation transformers is the maximum allowed; therefore, a power sequencer including four isolation transformers is used within the chassis. AC power first enters from the power input at the top left, then flows to a 32A circuit breaker as the main power switch for this device. Power then enters the relay control and detection board, which includes relay control circuitry, power detection circuitry, and power conversion circuitry. After passing through eight relays, four of these relays supply power to the isolation transformers, with outputs from power outputs 1-4. The other four relays supply power to power outputs 5-8. The eight power output interfaces are located at the top right of the chassis. These interfaces use 10A standard two-prong and three-prong sockets (compliant with Chinese national standards). The bottom of the chassis houses the 32A circuit breaker, a power output direct-through port, a 3.2-inch screen, and a keypad. The 32A circuit breaker has a rated current of 32A. The power output direct-through port with two outputs means there are two directly powered interfaces. The auxiliary power load (DC power supply) of the relay control detection board supplies power to the panel screen and MCU, etc.
[0063] This utility model has at least the following beneficial effects:
[0064] 1. The power sequencer is designed with a power isolation channel to prevent mutual interference between different devices under various conditions. Compared with the common-mode LC filter circuit, the transformer has a better isolation effect.
[0065] 2. This device is designed for a 19-inch rack mount, achieving a small chassis design that makes it easy to carry and use, while the power of the isolation channel reaches 500W, which is suitable for the pre-power supply of many products in broadcast equipment. The pre-power supply can isolate the power supply of the device from high-power amplifiers and other equipment to prevent transient interference.
[0066] The above is a detailed description of the preferred embodiments of the present utility model. However, the present utility model is not limited to the above embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present utility model. All such equivalent modifications or substitutions are included within the scope defined by the claims of the present utility model.
Claims
1. A power isolation circuit, characterized in that, The power isolation circuit includes multiple isolation transformers, each of which includes a first coil, a second coil, and a magnetic core, with the first coil and the second coil both wound on the magnetic core; The two ends of the first coil serve as the input terminals of the isolation transformer, which are used to connect to the power output channels of the power timing circuit. The two ends of the second coil serve as the output terminals of the isolation transformer, used to output power.
2. A power sequencer, characterized in that, The power sequencer includes a power timing circuit and a power isolation circuit as described in claim 1. The power timing circuit includes multiple power output channels, and the input terminal of each isolation transformer in the power isolation circuit is connected to one of the power output channels.
3. The power sequencer according to claim 2, characterized in that, The power supply timing circuit includes a relay control circuit and a power detection circuit; The power detection circuit includes multiple power output channels, and each power output channel is equipped with a relay switch. The relay control circuit includes multiple relay controllers and a main control chip. Each relay controller is connected to a corresponding relay switch, and multiple communication pins of the main control chip are respectively connected to multiple relay controllers.
4. The power sequencer according to claim 3, characterized in that, The relay control circuit also includes a signal enhancement chip; the multiple input pins of the signal enhancement chip are respectively connected to the multiple communication pins of the main control chip, and the multiple output pins of the signal enhancement chip are respectively connected to the multiple relay controllers.
5. The power sequencer according to claim 2, characterized in that, The multiple power output channels are divided into a first output channel and a second output channel. The first output channel is connected to the input terminal of the isolation transformer, and the second output channel is connected to the power output interface.
6. The power sequencer according to claim 3, characterized in that, The power sequencer also includes a power conversion circuit; the multiple DC output ports of the power conversion circuit are respectively connected to the relay control circuit and the power detection circuit.
7. A power sequencer chassis, characterized in that, The power sequencer chassis includes a power input interface, multiple power output interfaces, and a power sequencer as described in any one of claims 2 to 6; the power sequencer includes a sequencer input terminal and multiple sequencer output terminals, wherein at least one of the sequencer output terminals is the output terminal of an isolation transformer. The power input interface and the plurality of power output interfaces are disposed on the surface of the outer shell of the power sequencer chassis, and the power sequencer is disposed inside the outer shell; The power input interface is electrically connected to the input terminal of the power timing circuit of the power sequencer, and each power output interface is electrically connected to a corresponding output terminal of the sequencer.
8. The power sequencer chassis according to claim 7, characterized in that, The power sequencer chassis also includes an air switch, which is disposed on the surface of the housing and connected between the power input interface and the sequencer input terminal.
9. The power sequencer chassis according to claim 7, characterized in that, The power sequencer chassis also includes a display, which is disposed on the surface of the housing, and the input terminal of the display is connected to the output pin of the main control chip in the power sequencer.
10. The power sequencer chassis according to claim 7, characterized in that, The power sequencer chassis also includes a keypad, which is disposed on the surface of the housing and connected to the input pins of the main control chip in the power sequencer.