A solid state relay circuit

CN224746534UActive Publication Date: 2026-09-11SHAANXI QUNLI ELECTRIC
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Patent Information

Application Number
CN202521873637.1
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-09-01
Publication Date
2026-09-11
Estimated Expiration
2035-09-01

AI Technical Summary

Technical Problem

[0003]为解决上述现有技术导致固体继电器抗干扰能力差、缺乏延时保护功能的缺陷,本实用新型提供一种固体继电器电路

Benefits of technology

[0010] The beneficial effects of this utility model are as follows: By adding a voltage discrimination circuit to the input terminal of the solid-state relay circuit, this utility model ensures that the relay is triggered only when the input signal voltage reaches the set threshold, thus avoiding malfunctions caused by interference pulses. The delay discrimination circuit discriminates the input signal time and only outputs when the duration exceeds the set value, effectively suppressing interference signals.

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Abstract

A kind of solid-state relay circuit, including voltage discrimination circuit, delay discrimination circuit, isolation drive circuit and power output circuit, the utility model discloses an input terminal of solid-state relay circuit is increased voltage discrimination circuit, guarantee only input signal voltage reaches set threshold value when triggering, avoid interference pulse misoperation, and delay discrimination circuit is discriminated to input signal time, when duration exceeds set value only output, effectively suppress interference signal.
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Description

Technical Field

[0001] This utility model relates to the field of relay technology, specifically to a solid-state relay circuit. Background Technology

[0002] Traditional solid-state relays rely on simple drive circuits to control the conduction of power devices. When there are spike pulses or interference signals at the input, the power transistor is prone to malfunction. Even when the input signal time is too short, the output may still be triggered, affecting the reliability of the system. This results in solid-state relays having poor anti-interference ability and lacking time delay protection function. Summary of the Invention

[0003] To address the shortcomings of existing technologies, such as poor anti-interference capability and lack of time delay protection function in solid-state relays, this invention provides a solid-state relay circuit.

[0004] The technical solution of this utility model is: a solid-state relay circuit, the circuit including a voltage discrimination circuit, a delay discrimination circuit, an isolation drive circuit, and a power output circuit; the voltage discrimination circuit is used to discriminate the voltage amplitude of the input control signal, and when the input voltage is higher than a set threshold, it outputs a control signal to the delay discrimination circuit; the delay discrimination circuit is used to discriminate the duration of the control signal output by the voltage discrimination circuit, and when the duration of the input signal reaches a set duration, it outputs a control signal to the isolation drive circuit; the isolation drive circuit is used to electrically isolate the control signal discriminated by the delay discrimination circuit from the power output circuit, and drives the power output circuit; the power output circuit is used to realize the switching output of the load circuit under the control of the isolation drive circuit.

[0005] Preferably, the voltage discrimination circuit includes a first diode D1, a first transistor V1, a second transistor V2, a first resistor R1, a second resistor R2, a third resistor R3, a second diode D2, and a third diode D3; The positive terminal of the circuit is connected to the anode of the first diode D1, and the negative terminal of the circuit is connected to the anodes of the second diode D2 and the second diode D3, respectively; the cathode of the first diode D1 is connected to the emitter of the first transistor V1 and one end of the first resistor R1, respectively. The base of the first transistor V1 is connected to one end of the second resistor R2, and the collector of the first transistor V1 is connected to one end of the third resistor R3; the other end of the first resistor R1 is connected to the other end of the second resistor R2, and is also connected to the cathode of the second diode D2 and the collector of the second transistor V2 respectively; the base of the second transistor V2 is connected to the other end of the third resistor R3, and the emitter of the second transistor V2 is connected to the cathode of the second diode D2.

[0006] Preferably, the delay discrimination circuit includes a fourth diode D4, a fifth diode D5, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first capacitor C1, and a third field-effect transistor V3. The collector of transistor V1 and the third resistor R3 are respectively connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is respectively connected to the cathode of the fourth diode D4 and one end of the fifth resistor R5. The anode of the fourth diode D4 is connected to the anode of the fifth diode D5, and the cathode of the fifth diode D5 is connected to one end of the first capacitor C1 and the sixth resistor R6 in parallel. The other end of the first capacitor C1 and the sixth resistor R6 connected in parallel is connected to the fifth resistor R5 and the gate of the third field-effect transistor V3; the source of the third field-effect transistor V3 is connected to the other end of the sixth resistor R6.

[0007] Preferably, the isolation drive circuit includes a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fourth transistor V4, a fifth transistor V5, a first transformer T1, a sixth diode D6, a seventh diode D7, and an eighth diode D8. One end of the seventh resistor R7 is connected to the fourth resistor R4, the collector of the transistor V1, and the third resistor R3, respectively. The other end of the seventh resistor R7 is connected to the eighth resistor R8, the second capacitor C2, the third capacitor C3, and the base of the fourth transistor V4, respectively. One end of the eighth resistor R8 is connected to the seventh resistor R7, the second capacitor C2, and the third capacitor C3, respectively, and the other end of the eighth resistor R8 is connected to the source of the third field-effect transistor V3. The other end of the fourth capacitor C4 is connected to the emitter of the fourth transistor V4, the third capacitor C3, and the eighth resistor R8. One end of the primary coil of transformer T1 is connected to the other end of the seventh resistor R7 and the other end of the second capacitor C2. The other end of the primary coil of transformer T1 is connected to the collector of the fourth transistor V4 and one end of the fourth capacitor C4. One end of the secondary winding of transformer T1 is connected to the anode of the sixth diode D6. The other end of the secondary winding of transformer T1 is connected to the ninth resistor R9, the collector of the fifth transistor V5, and the anode of the eighth diode D8. The cathode of the sixth diode D6 is connected to the anode of the seventh diode D7, the ninth resistor R9, and the base of the fifth transistor V5, respectively; the cathode of the seventh diode D7 is connected to the emitter of the fifth transistor V5 and the cathode of the eighth diode D8, respectively; the collector of the fifth transistor V5 is connected to the ninth resistor R9 and the anode of the eighth diode D8, respectively, and the anode of the eighth diode D8 is connected to the ninth resistor R9.

[0008] Preferably, the power output circuit includes a tenth resistor R10, an eleventh resistor R11, a sixth field-effect transistor V6, and a seventh field-effect transistor V7. One end of the tenth resistor R10 is connected to the cathode of the seventh diode D7, the emitter of the fifth transistor V5, and the cathode of the eighth diode, respectively. One end of the eleventh resistor R11 is connected to the cathode of the seventh diode D7, the emitter of the fifth transistor V5, and the cathode of the eighth diode, respectively. The tenth resistor is connected to the eleventh resistor R11. The gate of the sixth field-effect transistor V6 is connected to the other end of the tenth resistor R10, and the drain of the sixth field-effect transistor V6 is connected to the positive terminal of the output of the circuit; the gate of the seventh field-effect transistor V7 is connected to one end of the eleventh resistor R11, and the source of the seventh field-effect transistor V7 is connected to the negative terminal of the output of the circuit. The source of the sixth field-effect transistor V6 is connected to the drain of the seventh field-effect transistor V7, and the source of the sixth field-effect transistor V6 and the drain of the seventh field-effect transistor V7 are also connected to the anode of the eighth diode D8, the collector of the fifth transistor V5, the ninth resistor R9 and the transformer T1, respectively.

[0009] Preferably, the circuit consists of two sets arranged side-by-side on the base of the solid-state relay, with both the input and output terminals of the circuit located on the base.

[0010] The beneficial effects of this utility model are as follows: By adding a voltage discrimination circuit to the input terminal of the solid-state relay circuit, this utility model ensures that the relay is triggered only when the input signal voltage reaches the set threshold, thus avoiding malfunctions caused by interference pulses. The delay discrimination circuit discriminates the input signal time and only outputs when the duration exceeds the set value, effectively suppressing interference signals. Attached Figure Description

[0011] Figure 1 This is a circuit block diagram of the present invention; Figure 2 This is the circuit schematic diagram of this utility model; Figure 3 This is a schematic diagram of the internal structure of the relay of this utility model; Figure 4 This is a schematic diagram of the external structure of the relay of this utility model. Detailed Implementation

[0012] To better understand the concept of this utility model, the technical solution of this utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0013] The technical solution of this utility model is as follows: a solid-state relay circuit, such as... Figure 1The circuit shown includes a voltage discrimination circuit, a delay discrimination circuit, an isolation drive circuit, and a power output circuit. The voltage discrimination circuit is used to discriminate the voltage amplitude of the input control signal. When the input voltage is higher than a set threshold, it outputs a control signal to the delay discrimination circuit. The delay discrimination circuit is used to discriminate the duration of the control signal output by the voltage discrimination circuit. When the duration of the input signal reaches a set duration, it outputs a control signal to the isolation drive circuit. The isolation drive circuit is used to electrically isolate the control signal discriminated by the delay discrimination circuit from the power output circuit and to drive the power output circuit. The power output circuit is used to realize the switching output of the load circuit under the control of the isolation drive circuit.

[0014] The voltage discrimination circuit includes a first diode D1, a first transistor V1, a second transistor V2, a first resistor R1, a second resistor R2, a third resistor R3, a second diode D2, and a third diode D3; The positive terminal of the circuit is connected to the anode of the first diode D1, and the negative terminal of the circuit is connected to the anodes of the second diode D2 and the second diode D3, respectively; the cathode of the first diode D1 is connected to the emitter of the first transistor V1 and one end of the first resistor R1, respectively. The base of the first transistor V1 is connected to one end of the second resistor R2, and the collector of the first transistor V1 is connected to one end of the third resistor R3; the other end of the first resistor R1 is connected to the other end of the second resistor R2, and is also connected to the cathode of the second diode D2 and the collector of the second transistor V2 respectively; the base of the second transistor V2 is connected to the other end of the third resistor R3, and the emitter of the second transistor V2 is connected to the cathode of the second diode D2.

[0015] Working principle of the voltage discrimination circuit: When the input terminals IN+ and IN- receive an external control voltage signal, the signal first enters the voltage discrimination circuit. The input signal IN+ enters through diode D1. The first diode D1 is used to prevent reverse voltage at the input terminal. The first resistor R1 and the second resistor R2 divide the input signal and apply it to the base of the first transistor V1. The first transistor V1 and the second transistor V2 constitute the voltage discrimination amplification unit. If the input voltage is less than the set threshold, the first transistor V1 and the second transistor V2 are in the cutoff state, and the subsequent circuit does not output a signal. When the input voltage is higher than the threshold, the first transistor V1 is turned on, driving the second transistor V2 to operate and generate a valid high-level output to the delay discrimination circuit.

[0016] The delay discrimination circuit includes a fourth diode D4, a fifth diode D5, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first capacitor C1, and a third field-effect transistor V3. The collector of transistor V1 and the third resistor R3 are respectively connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is respectively connected to the cathode of the fourth diode D4 and one end of the fifth resistor R5. The anode of the fourth diode D4 is connected to the anode of the fifth diode D5, and the cathode of the fifth diode D5 is connected to one end of the first capacitor C1 and the sixth resistor R6 in parallel. The other end of the first capacitor C1 and the sixth resistor R6 connected in parallel is connected to the fifth resistor R5 and the gate of the third field-effect transistor V3; the source of the third field-effect transistor V3 is connected to the other end of the sixth resistor R6.

[0017] Working principle of the delay discrimination circuit: The signal of the voltage discrimination circuit enters through the fourth resistor R4. The first capacitor C1 is gradually charged when the input signal is continuous, and the voltage rises slowly. If the input signal is only a momentary spike or the duration is insufficient, the first C1 has not yet been charged to the gate threshold of the third field-effect transistor V3. The third field-effect transistor V3 remains cut off, and the signal is filtered out. When the input signal continues to reach the preset delay time, the voltage of the first capacitor C1 rises to a level sufficient to turn on the third field-effect transistor V3. Only then is an effective control signal generated and transmitted to the isolation drive circuit.

[0018] The isolated drive circuit includes a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fourth transistor V4, a fifth transistor V5, a first transformer T1, a sixth diode D6, a seventh diode D7, and an eighth diode D8. One end of the seventh resistor R7 is connected to the fourth resistor R4, the collector of the transistor V1, and the third resistor R3, respectively. The other end of the seventh resistor R7 is connected to the eighth resistor R8, the second capacitor C2, the third capacitor C3, and the base of the fourth transistor V4, respectively. One end of the eighth resistor R8 is connected to the seventh resistor R7, the second capacitor C2, and the third capacitor C3, respectively, and the other end of the eighth resistor R8 is connected to the source of the third field-effect transistor V3. The other end of the fourth capacitor C4 is connected to the emitter of the fourth transistor V4, the third capacitor C3, and the eighth resistor R8. One end of the primary coil of transformer T1 is connected to the other end of the seventh resistor R7 and the other end of the second capacitor C2. The other end of the primary coil of transformer T1 is connected to the collector of the fourth transistor V4 and one end of the fourth capacitor C4. One end of the secondary winding of transformer T1 is connected to the anode of the sixth diode D6. The other end of the secondary winding of transformer T1 is connected to the ninth resistor R9, the collector of the fifth transistor V5, and the anode of the eighth diode D8. The cathode of the sixth diode D6 is connected to the anode of the seventh diode D7, the ninth resistor R9, and the base of the fifth transistor V5, respectively; the cathode of the seventh diode D7 is connected to the emitter of the fifth transistor V5 and the cathode of the eighth diode D8, respectively; the collector of the fifth transistor V5 is connected to the ninth resistor R9 and the anode of the eighth diode D8, respectively, and the anode of the eighth diode D8 is connected to the ninth resistor R9.

[0019] The working principle of the isolation drive circuit is as follows: When the third field-effect transistor V3 is turned on, the current enters the drive stage through the seventh resistor R7 and the eighth resistor R8, driving the fourth transistor V4 to turn on. The collector current of the fourth transistor V4 drives the primary coil of the transformer T1 to generate an induced signal. The secondary output of the transformer T1 is rectified by the sixth resistor D6 and the seventh resistor D7, and the eighth diode D8 is reverse protected. It is then amplified by the fifth transistor V5 and isolated by the transformer T1. The input side and the output side are completely electrically separated, and the output side obtains sufficient drive current to drive the power MOSFET.

[0020] The power output circuit includes a tenth resistor R10, an eleventh resistor R11, a sixth field-effect transistor V6, and a seventh field-effect transistor V7. One end of the tenth resistor R10 is connected to the cathode of the seventh diode D7, the emitter of the fifth transistor V5, and the cathode of the eighth diode, respectively. One end of the eleventh resistor R11 is connected to the cathode of the seventh diode D7, the emitter of the fifth transistor V5, and the cathode of the eighth diode, respectively. The tenth resistor is connected to the eleventh resistor R11. The gate of the sixth field-effect transistor V6 is connected to the other end of the tenth resistor R10, and the drain of the sixth field-effect transistor V6 is connected to the positive terminal of the output of the circuit; the gate of the seventh field-effect transistor V7 is connected to one end of the eleventh resistor R11, and the source of the seventh field-effect transistor V7 is connected to the negative terminal of the output of the circuit. The source of the sixth field-effect transistor V6 is connected to the drain of the seventh field-effect transistor V7, and the source of the sixth field-effect transistor V6 and the drain of the seventh field-effect transistor V7 are also connected to the anode of the eighth diode D8, the collector of the fifth transistor V5, the ninth resistor R9 and the transformer T1, respectively.

[0021] Working principle of power output circuit: When the fifth transistor V5 outputs a valid signal, the gate of the fifth transistor V5 applies voltage to the gate of the sixth field-effect transistor V6 and the gate of the seventh field-effect transistor V7 through the tenth resistor R10 and the eleventh resistor R11 respectively. The sixth field-effect transistor V6 and the seventh field-effect transistor V7 then conduct, the load circuit is closed, and the output terminal is powered on. When the input signal is removed, the voltage discrimination circuit and the delay circuit lose their drive, the third field-effect transistor V3 is turned off, the isolation drive circuit stops, the gates of the sixth field-effect transistor V6 and the seventh field-effect transistor V7 lose their drive and are turned off, and the load circuit is disconnected.

[0022] Solid-state relay circuits such as Figure 2 The diagram shows two sets of circuits arranged side-by-side on the base 1 of the solid-state relay. Each circuit 2 consists of a voltage discrimination circuit, a delay discrimination circuit, an isolation drive circuit, and a power output circuit. These circuits can respectively realize the discrimination of input signals and load control, thereby achieving dual-output functionality. Figure 3 As shown, the lower part of the base 1 is provided with two sets of input terminals 3 and two sets of output terminals 4 respectively. The cover is set on the top of the base 1 and is welded to the base 1 for sealing.

[0023] The above description is merely a preferred embodiment of this utility model and is not intended to limit the scope of protection of this utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model are included within the scope of protection of this utility model.

Claims

1. A solid-state relay circuit, characterized in that: The circuit includes a voltage discrimination circuit, a delay discrimination circuit, an isolation drive circuit, and a power output circuit. The voltage discrimination circuit is used to discriminate the voltage amplitude of the input control signal. When the input voltage is higher than a set threshold, it outputs a control signal to the delay discrimination circuit. The delay discrimination circuit is used to discriminate the duration of the control signal output by the voltage discrimination circuit. When the duration of the input signal reaches a set duration, it outputs a control signal to the isolation drive circuit. The isolation drive circuit is used to electrically isolate the control signal discriminated by the delay discrimination circuit from the power output circuit and to drive the power output circuit. The power output circuit is used to realize the switching output of the load circuit under the control of the isolation drive circuit.

2. A solid-state relay circuit according to claim 1, characterized in that: The voltage discrimination circuit includes a first diode D1, a first transistor V1, a second transistor V2, a first resistor R1, a second resistor R2, a third resistor R3, a second diode D2, and a third diode D3; The positive terminal of the circuit is connected to the anode of the first diode D1, and the negative terminal of the circuit is connected to the anodes of the second diode D2 and the second diode D3, respectively; the cathode of the first diode D1 is connected to the emitter of the first transistor V1 and one end of the first resistor R1, respectively. The base of the first transistor V1 is connected to one end of the second resistor R2, and the collector of the first transistor V1 is connected to one end of the third resistor R3; the other end of the first resistor R1 is connected to the other end of the second resistor R2, and is also connected to the cathode of the second diode D2 and the collector of the second transistor V2 respectively; the base of the second transistor V2 is connected to the other end of the third resistor R3, and the emitter of the second transistor V2 is connected to the cathode of the second diode D2.

3. A solid-state relay circuit according to claim 2, characterized in that: The delay discrimination circuit includes a fourth diode D4, a fifth diode D5, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first capacitor C1, and a third field-effect transistor V3. The collector of transistor V1 and the third resistor R3 are respectively connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is respectively connected to the cathode of the fourth diode D4 and one end of the fifth resistor R5. The anode of the fourth diode D4 is connected to the anode of the fifth diode D5, and the cathode of the fifth diode D5 is connected to one end of the first capacitor C1 and the sixth resistor R6 in parallel. The other end of the first capacitor C1 and the sixth resistor R6 connected in parallel is connected to the fifth resistor R5 and the gate of the third field-effect transistor V3; the source of the third field-effect transistor V3 is connected to the other end of the sixth resistor R6.

4. A solid-state relay circuit according to claim 3, characterized in that: The isolated drive circuit includes a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fourth transistor V4, a fifth transistor V5, a first transformer T1, a sixth diode D6, a seventh diode D7, and an eighth diode D8. One end of the seventh resistor R7 is connected to the fourth resistor R4, the collector of the transistor V1, and the third resistor R3, respectively. The other end of the seventh resistor R7 is connected to the eighth resistor R8, the second capacitor C2, the third capacitor C3, and the base of the fourth transistor V4, respectively. One end of the eighth resistor R8 is connected to the seventh resistor R7, the second capacitor C2, and the third capacitor C3, respectively, and the other end of the eighth resistor R8 is connected to the source of the third field-effect transistor V3. The other end of the fourth capacitor C4 is connected to the emitter of the fourth transistor V4, the third capacitor C3, and the eighth resistor R8. One end of the primary coil of transformer T1 is connected to the other end of the seventh resistor R7 and the other end of the second capacitor C2. The other end of the primary coil of transformer T1 is connected to the collector of the fourth transistor V4 and one end of the fourth capacitor C4. One end of the secondary winding of transformer T1 is connected to the anode of the sixth diode D6. The other end of the secondary winding of transformer T1 is connected to the ninth resistor R9, the collector of the fifth transistor V5, and the anode of the eighth diode D8. The cathode of the sixth diode D6 is connected to the anode of the seventh diode D7, the ninth resistor R9, and the base of the fifth transistor V5, respectively; the cathode of the seventh diode D7 is connected to the emitter of the fifth transistor V5 and the cathode of the eighth diode D8, respectively; the collector of the fifth transistor V5 is connected to the ninth resistor R9 and the anode of the eighth diode D8, respectively, and the anode of the eighth diode D8 is connected to the ninth resistor R9.

5. A solid-state relay circuit according to claim 4, characterized in that: The power output circuit includes a tenth resistor R10, an eleventh resistor R11, a sixth field-effect transistor V6, and a seventh field-effect transistor V7. One end of the tenth resistor R10 is connected to the cathode of the seventh diode D7, the emitter of the fifth transistor V5, and the cathode of the eighth diode, respectively. One end of the eleventh resistor R11 is connected to the cathode of the seventh diode D7, the emitter of the fifth transistor V5, and the cathode of the eighth diode, respectively. The tenth resistor is connected to the eleventh resistor R11. The gate of the sixth field-effect transistor V6 is connected to the other end of the tenth resistor R10, and the drain of the sixth field-effect transistor V6 is connected to the positive terminal of the output of the circuit; the gate of the seventh field-effect transistor V7 is connected to one end of the eleventh resistor R11, and the source of the seventh field-effect transistor V7 is connected to the negative terminal of the output of the circuit. The source of the sixth field-effect transistor V6 is connected to the drain of the seventh field-effect transistor V7, and the source of the sixth field-effect transistor V6 and the drain of the seventh field-effect transistor V7 are also connected to the anode of the eighth diode D8, the collector of the fifth transistor V5, the ninth resistor R9 and the transformer T1, respectively.

6. A solid-state relay circuit according to claim 5, characterized in that: The circuit consists of two sets arranged side-by-side on the base of the solid-state relay, with both the input and output terminals of the circuit located on the base.