WAFER HOLDING DEVICE

DE102024102079A1Pending Publication Date: 2025-03-06TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information

Application Number
DE102024102079
Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-01-18
Filing Date
2024-01-25
Publication Date
2025-03-06

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Abstract

A wafer holding device is provided. The wafer holding device comprises a plate configured to support a semiconductor wafer and a holder unit. The wafer holding device further comprises a mounting element connected to the plate; a lever; and a biasing element with a first end connected to the lever and a second end connected to the mounting element. The biasing element is configured to bias the lever to a closed position with respect to the plate. The lever blocks movement of the semiconductor wafer when the lever is in the closed position.
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Description

Related registration

[0001] This application claims priority to U.S. Provisional Patent Application Serial No. 63 / 536,528, filed September 5, 2023, entitled "SUBSTRATE RETAINING DEVICE," which is incorporated by reference into this application. background

[0002] Semiconductor devices are manufactured on, in, and / or from semiconductor wafers and are used in a wide variety of electronic devices such as mobile phones, laptops, desktops, tablets, watches, gaming systems, and various other industrial, commercial, and consumer electronics devices. One or more semiconductor manufacturing processes are performed to manufacture semiconductor devices on, in, and / or from a semiconductor wafer. Short description of the drawings

[0003] Aspects of the present disclosure are best understood by reference to the following detailed description when taken in conjunction with the accompanying drawings. It should be noted that, in accordance with industry practice, various features are not drawn to scale. Rather, the dimensions of various features may be arbitrarily exaggerated or reduced for clarity of illustration. Fig. 1 shows a side view of a wafer holding apparatus according to some embodiments. Fig. 2A shows a wafer holding device in a closed state Fig. 2B shows a wafer holding device during a transition from a closed state to an open state, according to some embodiments. Fig. 2C shows a wafer holding device in an open state, according to some embodiments. Fig. 2D shows a semiconductor wafer being positioned relative to a wafer holding device in an open state, according to some embodiments. Fig. 2E shows a semiconductor wafer held by a wafer holding device in a closed state, according to some embodiments. Fig. 3 shows a perspective view of a portion of a wafer holding apparatus, according to some embodiments. Fig. 4 shows a top view of a wafer holding apparatus in the case where a semiconductor wafer is held by the wafer holding apparatus, according to some embodiments. Fig. 5A shows a top view of a wafer holding apparatus according to some embodiments. Fig. 5B shows a top view of a wafer holding device according to some embodiments. Fig. 6 shows a cross-sectional view of a portion of a semiconductor wafer including an edge of the semiconductor wafer, according to some embodiments. Fig. 7A shows a holder unit of a wafer holding apparatus, according to some embodiments. Fig. 7B shows a biasing element of a wafer holding device, according to some embodiments. Fig. 8A shows a top view of a wafer holding device in an environment including a handler container and / or a processing chamber, according to some embodiments. Fig. 8B shows a top view of a wafer holding device in an environment including a handler container and / or a processing chamber, according to some embodiments. Fig. 8C shows a top view of a wafer holding device in an environment including a handler container and / or a processing chamber, according to some embodiments. Fig. 8D shows a top view of a wafer holding device in an environment including a handler container and / or a processing chamber, according to some embodiments. Fig. 8E shows a top view of a wafer holding device in an environment including a handler container and / or a processing chamber, according to some embodiments. Fig. 9 illustrates a scenario associated with a semiconductor manufacturing process, according to some embodiments. Fig. 10A shows a wafer holding device in a closed state, according to some embodiments. Fig. 10B shows a wafer holding device in an open state, according to some embodiments. Fig. 11 is a flow diagram illustrating a method of operating a wafer chuck, according to some embodiments. Fig. 12 illustrates an exemplary machine-readable medium that may contain processor-executable instructions configured to embody one or more of the measures recited herein, according to some embodiments. Detailed description

[0004] The following disclosure provides many different embodiments or examples for implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the fabrication of a first element over or on top of a second element in the following description may include embodiments in which the first and second elements are fabricated in direct contact, and may also include embodiments in which additional elements may be fabricated between the first and second elements such that the first and second elements are not in direct contact. Furthermore, in the present disclosure, reference numerals and / or letters may be repeated in the various examples.This repetition is for simplicity and clarity and does not, in itself, prescribe any relationship between the various embodiments and / or configurations discussed.

[0005] Furthermore, spatially relative terms such as "beneath," "under," "lower," "above," "upper," and the like may be used herein to conveniently describe the relationship of one element or structural element to one or more other elements or structural elements illustrated in the figures. The spatially relative terms are intended to encompass other orientations of the device in use or operation, in addition to the orientation illustrated in the figures. The device may be oriented differently (rotated 90° or in a different orientation), and the spatially relative descriptors used herein may be interpreted accordingly.

[0006] During the manufacturing of semiconductor devices, semiconductor wafers undergo various processes. In some embodiments, a semiconductor wafer is held by a wafer holding device while a semiconductor manufacturing process is performed on the semiconductor wafer. Some wafer holding devices hold the semiconductor wafer by means of a clamping ring with clamps extending inward from the clamping ring and requiring the semiconductor wafer to be passed through a slot in the clamping ring to be held. However, passing the semiconductor wafer through the slot increases the likelihood of the semiconductor wafer being damaged, such as being scratched and / or chipped.

[0007] According to some embodiments, a wafer holding apparatus is provided that includes a platen and a holder unit connected to the platen. The holder unit includes a mounting member, a lever, and / or a biasing member. In some embodiments, the holder unit has a first end connected to the lever and a second end connected to the mounting member. In some embodiments, the biasing member is configured to bias the lever toward a closed position with respect to the platen. In some embodiments, the wafer holding apparatus includes a lever latching member configured to apply a lever opening force to the lever to move it from the closed position to an open position with respect to the platen.In some embodiments, the semiconductor wafer is positioned relative to the wafer holding device when the lever is in the open position, thereby reducing the risk of damaging the semiconductor wafer when positioning it relative to the incoming wafer holding device, as compared to wafer holding devices in which the semiconductor wafer must be passed through the slot defined by the clamping ring.

[0008] Fig. 1 shows a wafer holding apparatus 100 according to some embodiments. In some embodiments, the wafer holding apparatus 100 includes: a platen 114 configured to support a semiconductor wafer 104; a first holder unit 152; a second holder unit 154; a lever-lock structure 156; and / or one or more other components. In some embodiments, the semiconductor wafer 104 is disposed on a surface 114a of the platen 114. In some embodiments, the semiconductor wafer 104 includes a substrate, a photomask, a semiconductor device, and / or a die, etc. In some embodiments, the wafer holding apparatus 100 is configured to hold the semiconductor wafer 104 while a semiconductor manufacturing process is performed on the semiconductor wafer 104.

[0009] In some embodiments, the first holder unit 152 (such as a first clamping unit) includes a first lever 102, a first mounting element 106 (which in Fig. 1 with a dashed line outline), a first biasing member 108 and / or one or more other suitable components. In some embodiments, the first mounting member 106 is connected to the plate 114. In some embodiments, when the first mounting member 106 is connected to the plate 114, the first mounting member 106 has a fixed position relative to the plate 114. For example, in some embodiments, the first lever 102 is pivotally connected to the first mounting member 106. In some embodiments, the first biasing member 108 has a first end 108a connected to the first lever 102 and / or a second end 108b connected to the first mounting member 106. In some embodiments, the first biasing member 108 is a first spring, a first solenoid (not shown), and / or another suitable biasing device.In some embodiments, the first lever 102 includes a first weight portion 162, a first pivot portion 164, and / or a first energy portion 165. In some embodiments, the first pivot portion 164 is pivotally connected to the first mounting member 106.

[0010] In some embodiments, the first biasing member 108 is configured to bias the first lever 102 to a first closed position with respect to the plate 114. Fig. 1 shows the first lever 102 in the first closed position according to some embodiments. In some embodiments, the first lever 102 alternates between the first closed position and a first open position relative to the plate 114. Fig. 2C shows the first lever 102 in the first open position according to some embodiments. In some embodiments, the first biasing member 108 is configured to apply a first biasing force to the first lever 102. In some embodiments, the first end 108a of the first biasing member 108 is connected to the first power portion 165 of the first lever 102. In some embodiments, the first biasing member 108 applies a first biasing force to the first power portion 165 of the first lever 102 to rotate the first lever 102 in a first lever closing direction 168 about an axis 166 through the first pivot portion 164. In some embodiments, the axis 166 passes through a position of a first pivot joint (not shown) that pivotally connects the first pivot portion 164 to the first mounting member 106.In some embodiments, the wafer holding device 100 includes a first full braking part (not shown) configured to block movement of the first lever 102 in the first lever closing direction 168 after a defined position, such as after the first closed position of the first lever 102 or after another position of the first lever 102. Thus, in some embodiments, when the first lever 102 is in the first closed position, the first full braking part prevents the first lever 102 from moving (further) in the first lever closing direction 168, even if the first biasing element 108 applies the first biasing force to the first energy region 165.

[0011] In some embodiments, the first spring of the first biasing member 108 is in a non-compressed and / or an extended state when the first lever 102 is in the first open position. In some embodiments, the first spring of the first biasing member 108 is in a compressed and / or loaded state when the first lever 102 is in the first open position. Other configurations of the first spring and / or the first biasing member 108 are also within the scope of the present disclosure. In some embodiments, the first biasing force is greater when the first lever 102 is in the first open position than when it is in the first closed position.

[0012] In some embodiments, the first lever 102 blocks a first path of movement 158 ​​of the semiconductor wafer 104 when the first lever 102 is in the first closed position. In some embodiments, a first projection 162a of the first weight portion 162 is located above the semiconductor wafer 104 when the first lever 102 is in the first closed position. In some embodiments, the first lever 102 is in direct and / or indirect contact with the semiconductor wafer 104 when the first lever 102 is in the first closed position. In some embodiments, the first lever 102 is in direct and / or indirect contact with a first surface 104a of the semiconductor wafer 104 when the first lever 102 is in the first closed position. In some embodiments, the first lever 102 is in direct and / or indirect contact with an edge of the semiconductor wafer 104 when the first lever 102 is in the first closed position.In some embodiments, when the first lever 102 is in the first closed position, the first lever 102 and / or one or more other levers of the wafer holding apparatus 100 apply a wafer securing force to the semiconductor wafer 104 to secure it in a desired wafer position, such as in the position shown in FIG. Fig. 1. In some embodiments, the first lever 102 applies a first wafer securing force to the semiconductor wafer 104 (e.g., to the edge of the semiconductor wafer 104) in the first lever closing direction 168 when the first lever 102 is in the first closed position. In some embodiments, the first wafer securing force applied to the semiconductor wafer 104 is a result of the first biasing force applied to the first lever 102 by the first biasing element 108.

[0013] In some embodiments, a lever latch structure 156 includes a first lever latch member 120 configured to latch the first lever 102. In some embodiments, the first lever latch member 120 is configured to apply a first lever opening force to the first lever 102 to move the first lever 102 from the first closed position to the first open position with respect to the plate 114. In some embodiments, the first lever latch member 120 is connected to the first power portion 165 of the first lever 102. In some embodiments, the first lever latch member 120 applies the first lever opening force to the first power portion 165 of the first lever 102 to rotate the first lever 102 in a first lever opening direction 160 about the axis 166 through the first pivot portion 164.In some embodiments, the first lever opening direction 160 is opposite to the first lever closing direction 168. In some embodiments, the first lever 102 moves from the first closed position (shown in . Fig. 1) to the first open position (shown in Fig. 2C) when the first lever opening force applied by the first lever engaging member 120 overcomes the first biasing force applied by the first biasing member 108.

[0014] In some embodiments, the first lever 102 does not block the first path of movement 158 ​​of the semiconductor wafer 104 when the first lever 102 is in the first open position. In some embodiments, the first protrusion 162a is not located above the semiconductor wafer 104 when the first lever 102 is in the first open position. In some embodiments, the first lever 102 is not in contact with the semiconductor wafer 104 when the first lever 102 is in the first open position. In some embodiments, the first lever 102 and / or one or more other levers of the wafer holding device 100 do not apply a wafer securing force to the semiconductor wafer 104 when the first lever 102 is in the first open position. In some embodiments, the first lever 102 does not apply a wafer securing force to the semiconductor wafer 104 in the first lever closing direction 168 when the first lever 102 is in the first open position.

[0015] In some embodiments, the second holder unit 154 (such as a second clamping unit) includes a second lever 110, a second mounting member 112 (which in Fig. 1 with a dashed line outline), a second biasing member 142 and / or one or more other suitable components. In some embodiments, the second mounting member 112 is connected to the plate 114. In some embodiments, when the second mounting member 112 is connected to the plate 114, the second mounting member 112 has a fixed position relative to the plate 114. For example, in some embodiments, the second lever 110 is pivotally connected to the second mounting member 112. In some embodiments, the second biasing member 142 has a first end 142a connected to the second lever 110 and / or a second end 142b connected to the second mounting member 112. In some embodiments, the second biasing member 142 is a second spring, a second solenoid (not shown), and / or another suitable biasing device.In some embodiments, the second lever 110 includes a second weight portion 172, a second pivot portion 174, and / or a second energy portion 175. In some embodiments, the second pivot portion 174 is pivotally connected to the second mounting member 112.

[0016] In some embodiments, the second biasing member 142 is configured to bias the second lever 110 to a second closed position with respect to the plate 114. Fig. 1 shows the second lever 110 in the second closed position according to some embodiments. In some embodiments, the second lever 110 alternates between the second closed position and a second open position relative to the plate 114. Fig. 2C shows the second lever 110 in the second open position according to some embodiments. In some embodiments, the second biasing member 142 is configured to apply a second biasing force to the second lever 110. In some embodiments, the first end 142a of the second biasing member 142 is connected to the second power portion 175 of the second lever 110. In some embodiments, the second biasing member 142 applies the second biasing force to the second power portion 175 of the second lever 110 to rotate the second lever 110 in a second lever closing direction 178 about an axis 176 through the second pivot portion 174. In some embodiments, the axis 176 passes through a position of a second pivot joint (not shown) that pivotally connects the second pivot portion 174 to the second mounting member 112.In some embodiments, the wafer holding device 100 includes a second full braking part (not shown) configured to block movement of the second lever 110 in the second lever closing direction 178 after a defined position, such as after the second closed position of the second lever 110 or after another position of the second lever 110. Thus, in some embodiments, when the second lever 110 is in the second closed position, the second full braking part prevents the second lever 110 from moving (further) in the second lever closing direction 178, even if the second biasing element 142 applies the second biasing force to the second energy region 175.

[0017] In some embodiments, the second spring of the second biasing member 142 is in a non-compressed and / or an extended state when the second lever 110 is in the second open position. In some embodiments, the second spring of the second biasing member 142 is in a compressed and / or loaded state when the second lever 110 is in the second open position. Other configurations of the second spring and / or the second biasing member 142 are also within the scope of the present disclosure. In some embodiments, the second biasing force is greater when the second lever 110 is in the second open position than when it is in the second closed position.

[0018] In some embodiments, the second lever 110 blocks the first path of movement 158 ​​of the semiconductor wafer 104 when the second lever 110 is in the second closed position. In some embodiments, a second projection 172a of the second weight portion 172 is located above the semiconductor wafer 104 when the second lever 110 is in the second closed position. In some embodiments, the second lever 110 is in direct and / or indirect contact with the semiconductor wafer 104 when the second lever 110 is in the second closed position. In some embodiments, the second lever 110 is in direct and / or indirect contact with the first surface 104a of the semiconductor wafer 104 when the second lever 110 is in the second closed position.In some embodiments, the second lever 110 is in direct and / or indirect contact with the edge of the semiconductor wafer 104 when the second lever 110 is in the second closed position. In some embodiments, when the second lever 110 is in the second closed position, the second lever 110 and / or one or more other levers of the wafer holding device 100 apply a wafer securing force to the semiconductor wafer 104 to secure it in the desired wafer position. In some embodiments, the second lever 110 applies a second wafer securing force to the semiconductor wafer 104 (e.g., to the edge of the semiconductor wafer 104) in the second lever closing direction 178 when the second lever 110 is in the second closed position.In some embodiments, the second wafer securing force applied to the semiconductor wafer 104 is a result of the second biasing force applied by the second biasing member 142 to the second lever 110.

[0019] In some embodiments, the lever latch structure 156 includes a second lever latch member 122 configured to latch the second lever 110. In some embodiments, the second lever latch member 122 is configured to apply a second lever opening force to the second lever 110 to move the second lever 110 from the second closed position to the second open position with respect to the plate 114. In some embodiments, the second lever latch member 122 is connected to the second power portion 175 of the second lever 110. In some embodiments, the second lever latch member 122 applies the second lever opening force to the second power portion 175 of the second lever 110 to rotate the second lever 110 in a second lever opening direction 170 about the axis 176 through the second pivot portion 174.In some embodiments, the second lever opening direction 170 is opposite to the second lever closing direction 178. In some embodiments, the second lever 110 moves from the second closed position (shown in . Fig. 1) to the second open position (shown in Fig. 2C) when the second lever opening force applied by the second lever engaging member 122 overcomes the second biasing force applied by the second biasing member 142.

[0020] In some embodiments, the second lever 110 does not block the first path of movement 158 ​​of the semiconductor wafer 104 when the second lever 110 is in the second open position. In some embodiments, the second protrusion 172a is not over the semiconductor wafer 104 when the second lever 110 is in the second open position. In some embodiments, the second lever 110 is not in contact with the semiconductor wafer 104 when the second lever 110 is in the second open position. In some embodiments, the second lever 110 does not apply a second wafer securing force to the semiconductor wafer 104 in the second lever closing direction 178 when the second lever 110 is in the second open position.

[0021] In some embodiments, the wafer holding apparatus 100 includes any number of holder units, such as only one holder unit (e.g., the first holder unit 152), two holder units (e.g., the first holder unit 152 and the second holder unit 154), three holder units, four holder units, or more than four holder units. In some embodiments, each holder unit of some or all of the holder units of the wafer holding apparatus 100 includes at least some of the elements (e.g., a lever, a mounting member, and / or a biasing member), configurations, etc., provided herein for the first holder unit 152 and / or the second holder unit 154, and relationships between them. In some embodiments, holder units of the wafer holding apparatus 100 are configured to be operable simultaneously using the lever-lock structure.

[0022] In some embodiments, the lever latch structure 156 includes a body 124. In some embodiments, the first lever latch member 120 and / or the second lever latch member 122 protrude from the body 124 of the lever latch structure 156. In some embodiments, the first lever latch member 120 and / or the second lever latch member 122 are attached to the body 124. It should be understood that, by virtue of the first lever latch member 120, the second lever latch member 122, and the body 124 being attached, they are not limited to having three separate structures that are attached. Rather, in some embodiments, at least two of the first lever latch member 120, the second lever latch member 122, and the body 124 are manufactured as a unit, as a single piece, as a single composite part, etc.In some embodiments, the lever latch structure 156 comprises two or three or more separate structures that are attached, such as with mechanical fasteners, welding, adhesives, etc.

[0023] In some embodiments, the lever locking structure 156 is configured to lock some or all of the levers of the wafer holding apparatus 100 simultaneously. In some embodiments, the lever locking structure 156 includes any number of lever locking elements, such as only one lever locking element (e.g., the first lever locking element 120), two lever locking elements (e.g., the first lever locking element 120 and the second lever locking element 122), three lever locking elements, four lever locking elements, or more than four lever locking elements. In some embodiments, the number of lever locking elements of the lever locking structure 156 corresponds to the number of holder units of the wafer holding apparatus 100. In some embodiments, the lever locking structure 156 includes a lever locking element for each holder unit of the wafer holding apparatus 100, the lever locking element being configured to lock a lever of the holder unit.In some embodiments, each lever engagement element of one, some, or all of the lever engagement elements of the lever engagement structure 156 includes a (alignment) pin. In some embodiments, the first lever engagement element 120 includes a first (alignment) pin, and / or the second lever engagement element 122 includes a second (alignment) pin. In some embodiments, each holder unit of one, some, or all of the holder units of the wafer holding apparatus 100 includes a (side clamp) tension pin. In some embodiments, the first lever 102 includes a first (side clamp) tension pin, or the second lever 110 includes a second (side clamp) tension pin.

[0024] In some embodiments, the wafer holding device 100 is switched between an open state and a closed state. Fig. 1 shows the wafer holding device 100 in the closed state according to some embodiments. Fig. 2C shows the wafer chuck 100 in the open state according to some embodiments. In some embodiments, when the wafer chuck 100 is in the open state, one, some, or all of the levers of the wafer chuck 100 are in respective open positions with respect to the platen 114. When the wafer chuck 100 is in the open state, for example, the first lever 102 is in the first open position, the second lever 110 is in the second open position, or one or more other levers of the wafer chuck 100 are in respective open positions. In some embodiments, when the wafer chuck 100 is in the open state, the first trajectory 158 of the semiconductor wafer 104 is not blocked by one, some, or all of the levers of the wafer chuck 100.

[0025] In some embodiments, when the wafer holding device 100 is in the closed state, one, some, or all of the levers of the wafer holding device 100 are in respective open positions with respect to the platen 114. In some embodiments, when the wafer holding device 100 is in the closed state, one, some, or all of the levers of the wafer holding device 100 are in respective closed positions with respect to the platen 114. When the wafer holding device 100 is in the closed state, for example, the first lever 102 is in the first closed position, the second lever 110 is in the second closed position, or one or more other levers of the wafer holding device 100 are in respective closed positions.In some embodiments, when the wafer holding apparatus 100 is in the closed state, the first path of travel 158 of the semiconductor wafer 104 is blocked by one, some, or all of the levers of the wafer holding apparatus 100. In some embodiments, when the wafer holding apparatus 100 is in the closed state, one, some, or all of the levers of the wafer holding apparatus 100 apply a wafer securing force to the semiconductor wafer 104, such as the first wafer securing force applied by the first lever 102, the second wafer securing force applied by the second lever 110, and / or one or more other wafer securing forces applied by one or more other levers of the wafer holding apparatus 100, to secure the semiconductor wafer 104 in the desired wafer position relative to the platen 114.

[0026] In some embodiments, before the semiconductor wafer 104 is held by the wafer holding apparatus 100, the wafer holding apparatus 100 switches from the closed state to the open state to receive the semiconductor wafer 104. In some embodiments, after switching to the open state, the wafer holding apparatus 100 remains in the open state for a period of time during which the semiconductor wafer 104 is moved to the target wafer position with respect to the platen 114. In some embodiments, the semiconductor wafer 104 is conveyed to the target wafer position by means of a robotic arm, a transport component, and / or other suitable component and placed, for example, on the surface 114a of the platen 114. In some embodiments, in response to the semiconductor wafer 104 being moved to the target wafer position (e.g.,In response to the semiconductor wafer 104 being placed on the surface 114a of the platen 114, the wafer holding apparatus 100 transitions from the open state to the closed state to hold the semiconductor wafer 104. In some embodiments, after switching to the closed state, the wafer holding apparatus 100 remains in the closed state for a while to hold the semiconductor wafer 104 in the desired wafer position relative to the platen 114 while a semiconductor manufacturing process is performed on the semiconductor wafer 104. In some embodiments, in response to the completion of the semiconductor manufacturing process, the wafer holding apparatus 100 transitions from the closed state to the open state to release the semiconductor wafer 104.In some embodiments, after switching to the open state, the wafer holding apparatus 100 remains in the open state for a while to allow the semiconductor wafer 104 to be removed and / or transferred from the target wafer position relative to the platen 114 to another location, such as a wafer storage device and / or a processing station, etc. In some embodiments, the wafer storage device (not shown) is a front opening unified pod (FOUP), a cassette container, a reticle container, and / or another type of wafer storage device. In some embodiments, the semiconductor wafer 104 is removed and / or transferred to the location using a robotic arm, a transport component, and / or another suitable component.

[0027] In some embodiments, the wafer holding device 100 includes a full braking device 116 (which in Fig. 1) configured to space the semiconductor wafer 104 from a semiconductor processing component by at least a threshold distance. In some embodiments, the full braking device 116 is connected to the platen 114 and is, for example, releasably attached thereto. In some embodiments, the full braking device 116 has a fixed position relative to the platen 114.

[0028] (I) A dimension d1 (which is Fig. 1) is about 15 mm to about 25 mm, (II) a dimension d2 is about 15 mm to about 22 mm, (III) a sum of a dimension d3 and a dimension d4 is about 150 mm to about 235 mm, (IV) a dimension d5 is about 15 mm to about 18.5 mm, and / or (V) a dimension d6 is about 18.5 mm to about 19.5 mm. Other values ​​for dimension d1, dimension d2, the sum of dimension d3 and dimension d4, dimension d5, and dimension d6 are also within the scope of the present disclosure. In some embodiments, the dimension d1, the dimension d2, the dimension d3, the dimension d4, the dimension d5, and / or the dimension d6 are configured based on a size of the semiconductor wafer 104 and / or one or more other semiconductor wafers that the wafer holding device 100 is to hold. In some embodiments, the dimension d1 corresponds to a length (e.g., a maximum length) of a lever (e.g.,of the first lever 102, the second lever 110 and / or the like) along a z-direction (which is shown in . Fig. 1). In some embodiments, the dimension d2 corresponds to a thickness of the plate 114 along the z-direction. In some embodiments, the dimension d3 corresponds to a length of the plate 114 in an x-direction (which is shown in Fig. 1). In some embodiments, the x-direction corresponds to a radial direction (e.g., with respect to the plate 114). In some embodiments, the dimension d3 corresponds to a diameter of the plate 114. In some embodiments, the dimension d4 corresponds to a length of the full braking device 116 along the x-direction. In some embodiments, the dimension d5 corresponds to a length of a lever (e.g., the first lever 102, the second lever 110, and / or the like) along the x-direction. In some embodiments, the dimension d6 corresponds to a length of a mounting member (e.g., the first mounting member 106, the second mounting member 112, and / or the like) along the z-direction. An angle θ1 between a line 182 drawn along a surface 186 of a lever (e.g.,The angle θ1 between a line 184 extending along a surface 188 of the first lever 102, the second lever 110, and / or the like, and a line 184 extending along a surface 188 of the lever is about 15° to about 19°. Other values ​​for the angle θ1 are also within the scope of the present disclosure. In some embodiments, the line 184 is parallel to the z-direction. In some embodiments, the angle θ1 is configured based on a wafer edge profile of the semiconductor wafer 104.

[0029] The Fig. 2A to 2E show a scenario 200 associated with the use of the wafer holding apparatus 100 to hold the semiconductor wafer 104. Fig. 2A shows the wafer holding apparatus 100 in the closed state according to some embodiments. In some embodiments, the wafer holding apparatus 100 is disposed over a pedestal 208. In some embodiments, the pedestal 208 has a fixed position and / or does not move. In some embodiments, the lever locking structure 156 comprises auxiliary structure between the body 124 and the pedestal 208. In some embodiments, the auxiliary structure comprises: an auxiliary body 206; a structure 202 connected to the auxiliary body 206 and / or the body 124; and / or a structure 204 connected to the auxiliary body 206 and / or the body 124.

[0030] The Fig. 2B and Fig. 2C illustrate the switching of the wafer holding device 100 from the closed state to the open state. In some embodiments, the switching from the closed state to the open state occurs before picking up the semiconductor wafer 104. Fig. Figure 2B shows the wafer holding device 100 during transition from the closed state to the open state according to some embodiments. In some embodiments, at least a portion of the wafer holding device 100, including the lever-lock structure 156, is moved in a first direction 230 toward the socket 208. Fig. 2B shows the wafer holding device 100 in the event that the lever-locking structure 156 reaches the pedestal 208 during movement in the first direction 230. In some embodiments, the wafer holding device 100 is moved in the first direction 230 by means of a robotic arm, a transport component, and / or another suitable component. In some embodiments, at least a portion of the wafer holding device 100 is moved further in the first direction 230 with respect to the lever-locking structure 156 when the wafer holding device 100 has reached the pedestal 208 (such as in Fig. 2B). For example, the platen 114, holder units, and / or the like of the wafer holding apparatus 100 are moved in the first direction 230 relative to the lever locking structure 156, wherein the lever locking structure 156 does not move in the first direction 230 because it abuts the base 208. In some embodiments, when the lever locking structure 156 abuts the base 208, the movement of at least a portion of the wafer holding apparatus 100 in the first direction 230 causes a counterforce to be applied from the base 208 via the lever locking structure 156 to one, some, or all of the levers of the wafer holding apparatus 100. In some embodiments, the counterforce is applied to the lever locking structure 156 in a second direction 232. In some embodiments, the second direction 232 is opposite the first direction 230.In some embodiments, the counterforce applied to the lever latching structure 156 is converted into lever opening forces applied to one, some, or all of the levers of the wafer holding device 100 by latching elements of the lever latching structure 156, such as a first lever opening force applied via the first lever latching element 120 to the first energy region 165 of the first lever 102 to move it in the first lever opening direction 160, a second lever opening force applied via the second lever latching element 122 to the second energy region 175 of the second lever 110 to move it in the second lever opening direction 170, and / or the like.Thus, in some embodiments, the wafer holding apparatus 100 transitions from the closed to the open state by the lever latching structure 156 simultaneously moving one, some, or all of the levers of the wafer holding apparatus 100 in respective lever opening directions from respective closed positions of the levers to respective open positions of the levers. In some embodiments, the levers transition from the respective closed positions to the respective open positions to transition the wafer holding apparatus 100 to the open state when respective lever opening forces applied by the lever latching structure 156 to levers of the wafer holding apparatus 100 overcome respective biasing forces applied by respective biasing elements of the wafer holding apparatus 100, e.g.when the first lever opening force overcomes the first preload force, the second lever opening force overcomes the second preload force, and / or one or more additional lever opening forces applied via the lever latch structure 156 overcome one or more additional preload forces. . Fig. 2C shows the wafer holding device 100 in the open state, according to some embodiments. In some embodiments, in the open state, the first energy portion 165 of the first lever 102, the second energy portion 175 of the second lever 110, the first lever engagement member 120, and / or the second lever engagement member 122 extend into one or more openings defined by the plate 114, such as a groove, slot, gap, and / or the like.

[0031] Fig. Figure 2D illustrates the conveyance of the semiconductor wafer 104 to the target wafer position relative to the platen 114, according to some embodiments. In some embodiments, when the semiconductor wafer 104 is in the target wafer position, a second surface 104b of the semiconductor wafer 104 is in direct and / or indirect contact with the surface 114a of the platen 114. In some embodiments, the semiconductor wafer 104 is conveyed to the target wafer position via a second trajectory 234. In some embodiments, the second trajectory 234 overlaps the first trajectory 158 and / or has a direction opposite the direction of the first trajectory 158.

[0032] Fig. 2E illustrates the transition of the wafer holding apparatus 100 from the open to the closed state. In some embodiments, the transition from the open to the closed state is performed to hold the semiconductor wafer 104 in the desired wafer position. In some embodiments, the wafer holding apparatus 100 is in the closed state while a semiconductor manufacturing process is being performed on the semiconductor wafer 104 to hold the semiconductor wafer 104 in the desired wafer position relative to the platen 114 while the semiconductor manufacturing process is being performed.

[0033] In some embodiments, at least a portion of the wafer holding device 100, including the lever-lock structure 156, is moved away from the base 208 in the second direction 232. In some embodiments, the wafer holding device 100 is moved in the second direction 232 by means of a robotic arm, a transport component, and / or another suitable component.In some embodiments, during movement of the wafer holding apparatus 100 in the second direction 232, at least a portion of the counterforce applied by the base 208 via the lever latch structure 156 is released such that biasing forces applied by one, some, or all of the biasing elements of the wafer holding apparatus 100 move one, some, or all of the levers of the wafer holding apparatus 100 in one or more respective lever closing directions to switch from one or more respective open positions to one or more respective closed positions.For example, during movement of the wafer holding device 100 in the second direction 232, the first biasing force applied by the first biasing element 108 moves the first lever 102 in the first lever closing direction 168, and / or the second biasing force applied by the second biasing element 142 moves the second lever 110 in the second lever closing direction 178, etc. Thus, in some embodiments, the wafer holding device 100 is transitioned from the open state to the closed state by the biasing elements of the wafer holding device 100 simultaneously moving one, some, or all of the levers of the wafer holding device 100 in respective lever closing directions from respective open positions of the levers to respective closed positions of the levers.

[0034] Fig. 3 shows a perspective view of a portion 300 of the wafer holding device 100, according to some embodiments. In some embodiments, the wafer holding device 100 includes a first protective structure 302 that at least partially encloses the first lever 102. In some embodiments, the first protective structure 302 protects the first lever 102 and / or one or more other components of the first holder unit 152 against dirt, damage from a collision with an object, and / or the like. In some embodiments, the first protective structure 302 at least partially encloses the first pivot point region 164 of the first lever 102 and / or the first pivot joint connecting the first pivot point region 164 to the first mounting element 106. In some embodiments, the first protective structure 302 is connected to the first mounting element 106 and / or the plate 114.

[0035] In some embodiments, the first mounting member 106 includes a first portion 106a and / or a second portion 106b. In some embodiments, the first portion 106a is attached to the second portion 106b. It should be understood that, by attaching the first portion 106a and the second portion 106b, they are not limited to comprising two separate structures that are attached. Rather, in some embodiments, the first portion 106a and the second portion 106b are manufactured as a unit, as a single piece, as a single composite part, etc. In some embodiments, the first portion 106a includes two or three or more separate structures that are attached, such as with mechanical fasteners, by welding, with adhesives, etc.

[0036] In some embodiments, the second end 108b of the first biasing member 108 is connected to the first portion 106a of the first mounting member 106. In some embodiments, the first portion 106a and / or the second portion 106b of the first mounting member 106 are connected to the plate 114 such that the first mounting member 106 has a fixed position relative to the plate 114. In some embodiments, the first portion 106a and / or the second portion 106b of the first mounting member 106 are connected to a portion 308 of the plate 114. In some embodiments, the plate 114 defines an opening 304 between the portion 308 and a second portion (not shown) of the plate 114.In some embodiments, the first energy portion 165 of the first lever 102 may move (e.g., in the first lever opening direction 160) through the opening 304 from the first closed position to the first open position when the wafer chuck 100 transitions from the closed state to the open state.

[0037] Fig. 4 shows a top view of the wafer holding apparatus 100 in the case that the semiconductor wafer 104 is held by the wafer holding apparatus 100, according to some embodiments. Fig. Figure 4 shows the wafer holding device 100 in the closed state according to some embodiments. In some embodiments, the wafer holding device 100 includes the first holder unit 152 with the first lever 102, the second holder unit 154 with the second lever 110, and a third holder unit with a third lever 402. The Fig. The view shown in Figure 4 shows tops of respective weight regions of the first lever 102, the second lever 110, and the third lever 402.

[0038] In some embodiments, the third retainer unit includes at least some of the elements, configurations, etc., provided herein for the first retainer unit 152 and / or the second retainer unit 154, and relationships between them. In some embodiments, the third retainer unit includes a third mounting member (not shown), a third biasing member (not shown), and / or one or more other suitable components.

[0039] In some embodiments, the third mounting member is connected to the plate 114. In some embodiments, when the third mounting member is connected to the plate 114, the third mounting member has a fixed position relative to the plate 114. In some embodiments, the third biasing member has a first end connected to the third lever 402 and / or a second end connected to the third mounting member. In some embodiments, the third biasing member is a third spring, a third solenoid (not shown), and / or another suitable biasing device. In some embodiments, the third lever 402 has a third weight portion, a third pivot portion, and / or a third energy portion. In some embodiments, the third pivot portion is pivotally connected to the third mounting member.In some embodiments, the third biasing member is configured to bias the third lever 402 to a third closed position with respect to the plate 114. In some embodiments, the third lever 402 transitions between the third closed position and a third open position with respect to the plate 114. In some embodiments, the third biasing member is configured to apply a third biasing force to the third lever 402 (e.g., when the third lever 402 is in the third closed position). In some embodiments, the first end of the third biasing member is connected to the third power portion of the third lever 402.In some embodiments, the third biasing member applies the third biasing force to the third energy region of the third lever 402 to rotate the third lever 402 in a third lever closing direction about an axis 414 through the third pivot region. In some embodiments, the axis 414 passes through a position of a third pivot joint (not shown) that pivotally connects the third pivot region to the third mounting member. Illustrations of the axis 166 associated with the first lever 102 and the axis 176 associated with the second lever 110 are shown in FIG. Fig. 4 according to some embodiments. In some embodiments, the wafer holding device 100 includes a third full brake part (not shown) configured to block movement of the third lever 402 in the third lever closing direction after a defined position, such as after the third closed position of the third lever 402 or after another position of the third lever 402.

[0040] In some embodiments, the third spring of the third biasing member is in a non-compressed and / or an extended state when the third lever 402 is in the third open position. In some embodiments, the third spring of the third biasing member is in a compressed and / or loaded state when the third lever 402 is in the third open position. Other configurations of the third spring and / or the third biasing member are also within the scope of the present disclosure. In some embodiments, the third biasing force is greater when the third lever 402 is in the third open position than when it is in the third closed position.

[0041] In some embodiments, the third lever 402 blocks the (in Fig. 1) of the semiconductor wafer 104 when the third lever 402 is in the third closed position. In some embodiments, a third projection 416 of the third weight portion of the third lever 402 is located above the semiconductor wafer 104 when the third lever 402 is in the third closed position. In some embodiments, the third lever 402 is in direct and / or indirect contact with the semiconductor wafer 104 when the third lever 402 is in the third closed position. In some embodiments, the third lever 402 is in direct and / or indirect contact with the first surface 104a of the semiconductor wafer 104 when the third lever 402 is in the third closed position. In some embodiments, the third lever 402 is in direct and / or indirect contact with the edge of the semiconductor wafer 104 when the third lever 402 is in the third closed position.In some embodiments, when the third lever 402 is in the third closed position, the third lever 402 and / or one or more other levers of the wafer holding apparatus 100 apply a wafer securing force to the semiconductor wafer 104 to secure it in the desired wafer position. In some embodiments, the third lever 402 applies a third wafer securing force to the semiconductor wafer 104 (e.g., to the edge of the semiconductor wafer 104) in the third lever closing direction when the third lever 402 is in the third closed position. In some embodiments, the third wafer securing force applied to the semiconductor wafer 104 is a result of the third biasing force applied to the third lever 402 by the third biasing element.

[0042] In some embodiments, the lever latch structure 156 includes a third lever latch member (not shown) configured to latch the third lever 402. In some embodiments, the third lever latch member is configured to apply a third lever opening force to the third lever 402 to move it from the third closed position to the third open position with respect to the plate 114. In some embodiments, the third lever latch member is connected to the third power portion of the third lever 402. In some embodiments, the third lever latch member applies the third lever opening force to the third power portion of the third lever 402 to rotate it in a third lever opening direction about the axis 414. In some embodiments, the third lever opening direction is opposite the third lever closing direction.In some embodiments, the third lever 402 moves from the third closed position to the third open position when the third lever opening force applied by the third lever latching member overcomes the third biasing force applied by the third biasing member.

[0043] In some embodiments, the third lever 402 does not block the first path of travel 158 of the semiconductor wafer 104 when the third lever 402 is in the third open position. In some embodiments, the third protrusion 416 is not located above the semiconductor wafer 104 when the third lever 402 is in the third open position. In some embodiments, the third lever 402 is not in contact with the semiconductor wafer 104 when the third lever 402 is in the third open position. In some embodiments, the third lever 402 does not apply a third wafer securing force to the semiconductor wafer 104 in the third lever closing direction when the third lever 402 is in the third open position.

[0044] Fig. 4 shows a line L1 extending from the first lever 102 to a point 412; a line L2 extending from the second lever 110 to the point 412; and a line L3 extending from the third lever 402 to the point 412. In some embodiments, the point 412 corresponds to a center point of the platen 114 and / or the semiconductor wafer 104. In some embodiments, levers of the wafer holding apparatus 100 are approximately evenly spaced around the platen 114 such that angles 406, 408, and 410 are approximately equal. The angle 410 between the line L1 and the line L2 is about 110° to about 130°. The angle 406 between the line L1 and the line L3 is also about 110° to about 130°. The angle 408 between line L2 and line L3 is also about 110° to about 130°. Other values ​​for angles 406, 408, and 410 are also within the scope of the present disclosure.

[0045] Embodiments are contemplated where one, some, or all of the protrusions of respective levers, such as the first protrusion 162a, the second protrusion 172a, and / or the third protrusion 416, are not located above the semiconductor wafer 104 when the respective levers are in respective closed positions. Embodiments are also contemplated where the first lever 102 does not include the first protrusion 162a, the second lever 110 does not include the second protrusion 172a, and / or the third lever 402 does not include the third protrusion 416, etc.

[0046] Fig. 5A shows a first top view illustration 500 of the wafer holding apparatus 100 having no semiconductor wafer thereon, according to some embodiments. Fig. 5A shows top surfaces of protective structures arranged above the first lever 102, the second lever 110, and the third lever 402, respectively. In some embodiments, the wafer holding device 100 includes: the first protective structure 302 at least partially enclosing the first lever 102; a second protective structure 510 at least partially enclosing the second lever 110; and / or a third protective structure 502 at least partially enclosing the third lever 402. Fig. 5A shows surface 114a of plate 114 according to some embodiments. In some embodiments, plate 114 includes one or more annular grooves defined in surface 114a for heat dissipation. In some embodiments, the one or more annular grooves include an annular groove 506a, an annular groove 506b, an annular groove 506c, and / or one or more other annular grooves. A dimension 520 is a maximum of about 120 mm. A dimension 522 is a maximum of about 115 mm. A dimension 524 is about 150 mm to about 235 mm. Other values ​​for dimension 520, dimension 522, and dimension 524 are also within the scope of the present disclosure.In some embodiments, dimension 520, dimension 522, and / or dimension 524 are designed based on a wafer size of semiconductor wafer 104 and / or one or more other semiconductor wafers that wafer holding apparatus 100 is to hold.

[0047] Fig. 5B shows a second top view 550 of the wafer holding device 100, which does not have a semiconductor wafer thereon, according to some embodiments. In some embodiments, the wafer holding device 100 includes the first protection structure 302, the second protection structure 510, and / or the third protection structure 502. Fig. 5B shows surface 114a of plate 114 according to some embodiments. In some embodiments, the one or more annular grooves defined by surface 114a include an annular groove 506a, an annular groove 506b, an annular groove 506c, an annular groove 506d, an annular groove 506e, and / or one or more other annular grooves. In some embodiments, plate 114 has one or more first radial grooves defined in surface 114a. In some embodiments, the one or more first radial grooves include a radial groove 552a, a radial groove 552b, a radial groove 552c, and / or one or more other radial grooves. In some embodiments, the one or more first radial grooves are configured to receive a lifter.

[0048] Fig. 6 shows a cross-sectional view of a portion 600 of the semiconductor wafer 104 including an edge (denoted by reference numeral 610) of the semiconductor wafer 104, according to some embodiments. In some embodiments, a first portion 602 of the first surface 104a is tapered at an angle θ3 with respect to a second portion 604 of the first surface 104a. The angle θ3 is about 15° to about 40°. Other values ​​for the angle θ3 are also within the scope of the present disclosure. In some embodiments, a first portion 606 of the second surface 104b is tapered at an angle θ4 with respect to a second portion 608 of the second surface 104b. The angle θ4 is also about 15° to about 40°. Other values ​​for the angle θ4 are also within the scope of the present disclosure. In some embodiments, the angle θ1 (which is Fig. 1) is designed based on the angle θ3 and / or the angle θ4 of the semiconductor wafer 104.

[0049] Fig. 7A shows a holder unit 700 of the wafer holding apparatus 100, according to some embodiments. In some embodiments, the holder unit 700 corresponds to the first holder unit 152, the second holder unit 154, and / or the third holder unit. In some embodiments, the holder unit 700 includes a lever 701; a mounting member 703; and / or a biasing member 702, such as a spring, a solenoid (not shown), and / or another suitable biasing device. In some embodiments, the lever 701 corresponds to the first lever 102, the second lever 110, and / or the third lever 402. In some embodiments, the lever 701 includes a side clamp tension pin. In some embodiments, the mounting member 703 corresponds to the first mounting member 106, the second mounting member 112, and / or the third mounting member. In some embodiments, the mounting member 703 includes a first portion 704 and a second portion 708.In some embodiments, the biasing element 702 corresponds to the first biasing element 108, the second biasing element 142 and / or the third biasing element.

[0050] Fig. 7A shows the lever 701 in an open position, according to some embodiments. In some embodiments, the lever 701 includes a weight region 706, a pivot region 710, and / or an energy region 709. In some embodiments, the lever 701 includes one or more metals, one or more polymer-based materials, and / or one or more other suitable materials. In some embodiments, a first portion of the lever 701 includes one or more first materials, and a second portion of the lever 701 includes one or more second materials. In some embodiments, the first portion of the lever 701 includes the weight region 706 and / or the energy region 709. In some embodiments, the one or more first materials include one or more metals, such as an aluminum alloy, and / or one or more other suitable materials.In some embodiments, the second portion of the lever 701 includes the pivot region. In some embodiments, the one or more second materials comprise one or more polymer-based materials, such as a polyimide, Vespel®, and / or one or more other suitable polymer-based materials.

[0051] In some embodiments, the power portion 709 is in contact with a lever engagement element 714 connected to the body 124 of the lever engagement structure 156. In some embodiments, the lever engagement element 714 corresponds to the first lever engagement element 120, the second lever engagement element 122, and / or the third lever engagement element. In some embodiments, a bearing 715 of the lever engagement element 714 is in direct and / or indirect contact with the power portion 709 of the lever 701. In some embodiments, the pivot portion 710 is pivotally connected to the second part 708 of the mounting member 703 such that the lever 701 rotates about an axis 711 through the pivot portion 710 in a lever opening direction 721 and a lever closing direction 723. In some embodiments, the axis 711 extends through a position of a pivot joint (not shown) that pivotally connects the pivot region 710 to the mounting member 703.In some embodiments, the pivot joint (or another component of the holder unit 700) includes a locking member to hold the lever 701 in the open position after the lever 701 (I) has moved beyond a reversal limit point during its movement in the lever opening direction 721 or (II) after the lever 701 has reached the open position.

[0052] (I) A dimension A is about 5 mm to about 12 mm, (II) a dimension C is also about 5 mm to about 12 mm, and / or (III) a dimension D is also about 5 mm to about 12 mm. Other values ​​for dimension A, dimension C, and dimension D are also within the scope of the present disclosure. In some embodiments, dimension D corresponds to a spring length (e.g., a minimum spring length) of biasing member 702 when lever 701 is in the open position. In some embodiments, dimension A is greater than dimension C. In some embodiments, dimension D is greater than dimension A. In some embodiments, a ratio of dimension A to dimension B is about 1:1 to about 1:3, e.g., about 1:2.2. In some embodiments, a ratio of dimension A to dimension C is about 1:1 to about 3:1, e.g., about 1.8:1.In some embodiments, a ratio of dimension B to dimension C is about 2:1 to about 8:1, e.g., about 3.9:1. In some embodiments, a ratio A:B:C is about 1.8:3.9:1. An angle θ2 between a surface 724 of the lever 701 and a line 722 is about 20° to about 30°. Other values ​​for the angle θ2 are also within the scope of the present disclosure. In some embodiments, the line 722 is parallel to at least a portion of the surface 114a of the plate 114. In some embodiments, the line 722 corresponds to an extension direction of a surface 725 of the second part 708 of the mounting member 703.

[0053] Fig. 7B shows the biasing element 702 according to some embodiments. In some embodiments, the biasing element 702 is a spring having a spring diameter E and a spring length F. In some embodiments, the spring includes one or more metals, such as steel and / or one or more other suitable metals. In some embodiments, the spring diameter E and the spring length F correspond, respectively, to a spring diameter and a spring length of the spring in a non-compressed and / or an extended state, e.g., when the lever 701 is in the closed position. The spring diameter E is about 3 mm to about 7 mm. The spring length F is about 18 mm to about 22 mm. A spring constant k of the spring is at least about 0.08 kp / mm. Other values ​​for the spring diameter E, the spring length F, and the spring constant k are also within the scope of the present disclosure.

[0054] The Fig. 8A to 8E show top views of a scenario 800 associated with using the wafer holding apparatus 100 to hold the semiconductor wafer 104. Fig. 8A shows the wafer holding apparatus 100 in an environment 850 having a handler container 812 and / or a processing chamber 814, such as a target chamber, according to some embodiments. In some embodiments, an arm 802 and / or a wafer holder 804 connected to the arm 802 are disposed within the handler container 812. In some embodiments, the arm 802 is a robotic arm. In some embodiments, the wafer holding apparatus 100 is disposed within the processing chamber 814. In some embodiments, a lifter 808 is disposed above the platen 114 within the processing chamber 814. In some embodiments, the lifter 808 is used to mount the semiconductor wafer 104 in the desired wafer position relative to the platen 114. Fig. Figure 8B shows semiconductor wafer 104 held by wafer holder 804, according to some embodiments. In some embodiments, lifter 808 is located above platen 114. Fig. Figure 8C illustrates the transition of the semiconductor wafer 104 from a first position in the handler container 812 to a second position in the processing chamber 814, according to some embodiments. In some embodiments, the semiconductor wafer 104 is located on the elevator 808 above the platen 114 when the semiconductor wafer 104 is in the second position (e.g., Fig. 8C). In some embodiments, the semiconductor wafer 104 is transported from the first position to the second position by the arm 802. Fig. 8D shows the transfer of the wafer holder 804 to the handler container 812, according to some embodiments. In some embodiments, in response to or concurrent with the transfer of the wafer holder 804 to the handler container 812, the lifter 808 moves toward the platen 114 while the semiconductor wafer 104 is mounted to the lifter 808 to move the semiconductor wafer 104 to the desired wafer position relative to the platen 114, for example, along the second trajectory 234 (which is shown in Fig. 2D). In some embodiments, the lifter 808 is inserted into one or more radial grooves in the plate 114, such as the one or more first radial grooves (shown in Fig. 5B) to enable the semiconductor wafer 104 to be held in the target wafer position of the wafer holding apparatus 100. In some embodiments, at least a portion of the elevator 808 is disposed in the one or more radial grooves, such as the one or more first radial grooves, when the semiconductor wafer 104 is in the target wafer position. In some embodiments, prior to moving the semiconductor wafer 104 to the target wafer position with respect to the platen 114, the wafer holding apparatus 100 transitions from the closed to the open state. In some embodiments, in response to the semiconductor wafer 104 moving to the target wafer position with respect to the platen 114, the wafer holding apparatus 100 transitions from the open to the closed state to retain the semiconductor wafer 104. Fig. Figure 8E illustrates a rotation 806 of the semiconductor wafer 104 and the wafer holding device 100 into a vertical orientation, according to some embodiments. In some embodiments, a semiconductor manufacturing process is performed on the semiconductor wafer 104 while the semiconductor wafer 104 and the wafer holding device 100 are in the Fig. 8E shown vertical orientation.

[0055] In some embodiments, the processing chamber 814 is defined by one or more walls of a processing station configured to perform the semiconductor manufacturing process on the semiconductor wafer 104 to produce a processed semiconductor wafer. In some embodiments, the processing station includes the handler container 812. In some embodiments, the processing station performs the semiconductor manufacturing process on the semiconductor wafer 104 while the semiconductor wafer 104 is held in the processing chamber 814 by the wafer holding apparatus 100.In some embodiments, the processing station comprises: (I) an ion implantation tool; (II) a chemical vapor deposition (CVD) tool; (III) a physical vapor deposition (PVD) tool; (IV) an etching tool, such as a plasma etching tool, a wet etching tool, a dry etching tool, a reactive ion etching (RIE), an atomic layer etching (ALE), a buffer oxide etching tool, and / or an ion beam milling tool; (V) a lithography tool; (VI) a chemical mechanical planarization (CMP) tool; (VII) a plating tool; (VIII) a cleaning tool; (IX) a furnace, such as a semiconductor furnace; and / or other tool.In some embodiments, the semiconductor manufacturing process includes an ion implantation process, a PVD process, a plating process, an etching process, a lithography process, a CMP process, a CVD process, a thermal process, a cleaning process, and / or another process.

[0056] In some embodiments, after performing the semiconductor manufacturing process on the semiconductor wafer 104 to produce a processed semiconductor wafer, the wafer chuck 100 releases the semiconductor wafer 104 by transitioning from the closed state to the open state, wherein the processed semiconductor wafer is removed from the wafer chuck 100 while in the open state.

[0057] Fig. 9 shows a scenario 900 associated with the semiconductor manufacturing process performed on the semiconductor wafer 104, according to some embodiments. In some embodiments, the processing chamber 814 is an ion implantation chamber, and the semiconductor manufacturing process is an ion implantation process. In some embodiments, the processing station includes an implantation tool 902 having one or more ion implantation components used in the ion implantation process. In some embodiments, the processing station includes: an ion source component 930, a first plate P1, a beamline chamber 906, a second plate P2, a first Faraday cage C1, a fourth plate P4, a second Faraday cage C2, a third Faraday cage C3, a first current source 936, and / or a second current source 934.

[0058] In some embodiments, ions 932, such as an ion plasma, move along an ion plasma path 924 to treat the semiconductor wafer 104. In some embodiments, at least some of the ions 932 are implanted into the semiconductor wafer 104. In some embodiments, the ions 932 are implanted into the semiconductor wafer 104 to create a doped region of a semiconductor device, such as a transistor, a diode, and / or the like. In some embodiments, the first plate P1, the second plate P2, the third plate P3, and / or the fourth plate P4 define openings for shaping the ion plasma that moves along the ion plasma path 924. In some embodiments, the first plate P1, the second plate P2, the third plate P3, and / or the fourth plate P4 include graphite and / or another suitable material.In some embodiments, a voltage between the first plate P1 and the ion source component 930 and / or a voltage between the third plate P3 and the semiconductor wafer 104 is regulated to control a flow direction of the ion plasma. In some embodiments, a number of plates of the processing station or a voltage applied by the first power source 936 and / or the second power source 934 depends on one or more parameters of the ion implantation process, such as a target implantation depth of the ion implantation process.

[0059] In some embodiments, the first plate P1 serves as a limiter electrode to prevent secondary electrons from interacting with the ion plasma. In some embodiments, the secondary electrons are created by collisions between ions and electrons and / or gas molecules in the processing chamber 814. In some embodiments, a vacuum is created in the processing chamber 814. In some embodiments, an implantation depth of the ion implantation process depends on an energy level of the ion plasma used for the semiconductor wafer 104, which in turn depends on the voltage between the third plate P3 and the semiconductor wafer 104. In some embodiments, the voltage is controlled to achieve the desired implantation depth, e.g., by controlling the voltage such that ions implanted into the semiconductor wafer 104 have a depth approximately equal to the desired implantation depth.The fourth plate P4 is grounded (as in scenario 900 of . Fig. 9) or not.

[0060] In some embodiments, a Faraday cage of the processing station, such as the first Faraday cage C1, the second Faraday cage C2, and / or the third Faraday cage C3, is configured to detect ions during the implantation process performed on the semiconductor wafer 104. In some embodiments, the Faraday cage measures a number of ions that impact the Faraday cage during the ion implantation process. In some embodiments, the first Faraday cage C1 is positioned at a location in the wafer during a first portion of the ion implantation process. Fig. 9. In some embodiments, the first Faraday cage C1 is configured to measure a first number of ions during the first part of the ion implantation process. In some embodiments, after the first part of the ion implantation process, the first Faraday cage C1 is moved to a position away from the ion plasma path 924 to allow ions 932 to move along the ion plasma path 924 through the third plate P3 and / or the fourth plate P4. In some embodiments, one or more parameters of the implantation process are controlled, adjusted, and / or the like based on the first number of ions.

[0061] In some embodiments, the second Faraday cage C2 is arranged at a detection position (not shown) to detect and / or measure ions 932. In some embodiments, the detection position corresponds to a position of the semiconductor wafer 104 that is Fig. 9. In some embodiments, the second Faraday cage C2 is arranged at the detection position before the semiconductor wafer 104 and the wafer holding device 100 are positioned at respective positions shown in Fig. 9. In some embodiments, the second Faraday cage C2, when positioned at the detection position, measures a second number of ions of the ion implantation process. In some embodiments, in response to measuring the second number of ions (I), the second Faraday cage C2 is moved to its Fig. 9, and / or (II) the semiconductor wafer 104 and the wafer holding device 100 are positioned at their respective positions shown in Fig. 9. In some embodiments, one or more parameters of the implantation process are controlled, adjusted, and / or the like based on the second number of ions.

[0062] In some embodiments, the third Faraday cage C3 is used to detect ions and / or to determine one or more numbers of ions during the ion implantation process, for example, while the semiconductor wafer 104 is treated with an ion plasma. In some embodiments, the one or more numbers of ions comprise a number of ions detected by the third Faraday cage C3. In some embodiments, the full braking device 116 is configured to space the semiconductor wafer 104 from the third Faraday cage C3 by at least a threshold distance 933. The threshold distance 933 is about 100 mm to about 300 mm. Other values ​​for the threshold distance 933 are also within the scope of the present disclosure.In some embodiments, the third Faraday cage C3 is connected to, moved with, and / or maintained in proximity to the wafer holding device 100. In some embodiments, using the full braking device 116 to achieve a distance between the semiconductor wafer 104 and the third Faraday cage C3 that is at least as large as the threshold distance 933 enables increased accuracy and / or precision of the one or more numbers of ions determined using the third Faraday cage C3. In some embodiments, one or more parameters of the implantation process are controlled, adjusted, and / or the like based on the one or more numbers of ions determined using the third Faraday cage C3.

[0063] Other configurations of one or more biasing elements of the wafer holding device 100 than those shown in the Fig. 1 and 2A to 2E are also within the scope of the present disclosure. Fig. 10A and Fig. 10B show a scenario 1000 associated with the wafer holding device 100 according to an embodiment, wherein a spring of a biasing element is (I) in a non-compressed state when a corresponding lever is in a closed position and / or (II) in an extended state when the corresponding lever is in an open position. Fig. 10A shows the wafer holding apparatus 100 in the closed state, according to some embodiments. In some embodiments, the first spring of the first biasing member 108 is connected to the first lever 102 and the body 124 of the lever latch structure 156, e.g., one end of the first spring is connected to the first lever 102 and another end of the first spring is connected to the body 124. In some embodiments, the second spring of the second biasing member 142 is connected to the second lever 110 and the body 124 of the lever latch structure 156, e.g., one end of the second spring is connected to the second lever 110 and another end of the second spring is connected to the body 124. In some embodiments, the first spring of the first biasing member 108 is in a non-compressed state when the first lever 102 is in the first closed position.In some embodiments, the second spring of the second biasing member 142 is in a non-compressed state when the second lever 110 is in the second closed position. When a spring is in a non-compressed state, a non-extended state, etc., it is generally in equilibrium, relaxed, etc., so that it exerts little to no force (e.g., no pushing force, no pulling force, no tension, etc.).

[0064] Fig. 10A shows the wafer holding device 100 in the open state, according to some embodiments. In some embodiments, the first spring of the first biasing member 108 is in the extended state when the first lever 102 is in the first open position. In some embodiments, when the first spring is in the Fig. 10B, the first spring applies the first biasing force to the first lever 102 by having a length of the first spring greater than an equilibrium length of the first spring, whereby a tensile force is applied by the first spring to the first lever 102. In some embodiments, the second spring of the second biasing member 142 is in the stretched state when the second lever 110 is in the second open position. In some embodiments, when the second spring is in the Fig. 10B, the second spring applies the second biasing force to the second lever 110 by having a length of the second spring greater than an equilibrium length of the second spring, whereby a tensile force is applied by the second spring to the second lever 110.

[0065] In some embodiments, the first biasing force applied by the first spring of the first biasing member 108 is greater when the first spring is in the Fig. 10B is in the stretched state shown in Fig. 10A shown non-compressed state.

[0066] In some embodiments, the second biasing force applied by the second spring of the second biasing member 142 is greater when the second spring is in the Fig. 10B is in the stretched state shown in Fig. 10A shown non-compressed state.

[0067] A method 1100 for operating a wafer holding apparatus, such as wafer holding apparatus 100, is described in accordance with some embodiments in Fig. 11. The wafer holding apparatus comprises: (I) a platen configured to support a semiconductor wafer; (II) a holder unit having a mounting member connected to the platen, a lever, and / or a biasing member configured to bias the lever into a closed position relative to the platen; and / or (III) a lever locking member configured to lock the lever.In some embodiments, (I) the platen is platen 114; (II) the semiconductor wafer is semiconductor wafer 104; (III) the chuck unit is the first chuck unit 152, the second chuck unit 154, and / or the third chuck unit; (IV) the mounting member is the first mounting member 106, the second mounting member 112, and / or the third mounting member; (V) the lever is the first lever 102, the second lever 110, and / or the third lever 402; (VI) the biasing member is the first biasing member 108, the second biasing member 142, and / or the third biasing member; and / or (VII) the lever engaging member is the first lever engaging member 120, the second lever engaging member 122, and / or the third lever engaging member. In an operation 1102, a lever opening force is applied to the lever via the lever latch to move it from the closed position to an open position with respect to the plate.In operation 1104, the semiconductor wafer is conveyed to a target wafer position relative to the platen when the lever is in the open position. In some embodiments, the semiconductor wafer is conveyed from a wafer storage device to the target wafer position relative to the platen.

[0068] In some embodiments, when the semiconductor wafer is in the target wafer position relative to the platen, a biasing force applied by the biasing member is used to move the lever to the closed position relative to the platen. As in Fig. 2C, in some embodiments, the biasing force is applied by a spring of the biasing element that (I) has a length less than an equilibrium length of the spring, and / or (II) applies a thrust force to the lever. As shown in Fig. As shown in Figure 10B, the biasing force is applied by a spring of the biasing element that (i) has a length greater than an equilibrium length of the spring and / or (ii) applies a tensile force to the lever. In some embodiments, the lever blocks movement of the semiconductor wafer from the target wafer position when the lever is in the closed position.

[0069] In some embodiments, the lever does not block a trajectory, such as the second trajectory 234, of the semiconductor wafer when the lever is in the open position. In some embodiments, the semiconductor wafer is conveyed to the target wafer position by moving it along the trajectory to the target wafer position when the lever is in the open position. In some embodiments, the lever blocks the trajectory of the semiconductor wafer when the lever is in the closed position.

[0070] In some embodiments, the lever moves from the closed position to the open position when the lever opening force overcomes a biasing force applied to the lever by the biasing member.

[0071] In one or more embodiments, a machine-readable medium is used with processor-executable instructions configured to implement one or more of the methods described herein. An exemplary machine-readable medium is described in Fig.12, an embodiment 1200 comprises a machine-readable medium 1208 (e.g., a CD-R, a DVD-R, a USB flash drive, a hard drive, etc.) having machine-readable data 1206 encoded thereon. This machine-readable data 1206, in turn, comprises a set of processor-executable computer instructions 1204 configured to implement one or more of the principles recited herein when executed by a processor. In some embodiments 1200, the processor-executable computer instructions 1204 are configured to implement a method 1202, such as at least some of the aforementioned methods, when executed by a processor. In some embodiments, the processor-executable computer instructions 1204 are configured to implement a system, such as at least some of the aforementioned systems, when executed by a processor.A person of ordinary skill in the art can devise numerous such machine-readable media configured to function in accordance with the techniques described herein.

[0072] In some embodiments, a wafer holding apparatus is provided. The wafer holding apparatus includes: a platen configured to support a semiconductor wafer; and a holder unit. The holder unit includes: a mounting member connected to the platen; a lever; and a biasing member having a first end connected to the lever and a second end connected to the mounting member. The biasing member is configured to bias the lever toward a closed position with respect to the platen. The lever prevents movement of the semiconductor wafer when the lever is in the closed position.

[0073] In some embodiments, the wafer holding device includes a lever latch configured to apply a lever opening force to the lever to move the lever from the closed position to an open position with respect to the platen.

[0074] In some embodiments, the lever blocks a first path of movement of the semiconductor wafer when the lever is in the closed position, and the lever does not block the first path of movement of the semiconductor wafer when the lever is in the open position.

[0075] In some embodiments, the lever moves from the closed position to the open position when the lever opening force overcomes a biasing force applied to the lever by the biasing member.

[0076] In some embodiments, the wafer holding device includes a full braking device connected to the platen and configured to space the semiconductor wafer at least a threshold distance from a semiconductor processing component.

[0077] In some embodiments, the semiconductor processing component is a Faraday cage configured to detect ions during an ion implantation process performed on the semiconductor wafer.

[0078] In some embodiments, the biasing element is a spring.

[0079] In some embodiments, the lever includes: a power portion connected to the first end of the biasing member; a weight portion that blocks a path of movement of the semiconductor wafer when the lever is in the closed position; and a pivot portion pivotally connected to the mounting member.

[0080] In some embodiments, a wafer holding apparatus is provided. The wafer holding apparatus comprises: a platen configured to support a semiconductor wafer; a holder unit; and a lever engagement member. The holder unit includes a mounting member connected to the platen and a lever, the lever having a weight portion configured to block movement of the semiconductor wafer when the lever is in a closed position with respect to the platen, and a pivot portion pivotally connected to the mounting member. The lever engagement member is configured to apply a lever opening force to the lever to move it from the closed position to an open position with respect to the platen. Movement of the lever from the closed position to the open position includes rotation of the lever about an axis through the pivot portion.

[0081] In some embodiments, the lever blocks a first path of movement of the semiconductor wafer when the lever is in the closed position, and the lever does not block the first path of movement of the semiconductor wafer when the lever is in the open position.

[0082] In some embodiments, the wafer holding device includes a full braking device connected to the platen and configured to space the semiconductor wafer at least a threshold distance from a semiconductor processing component.

[0083] In some embodiments, the semiconductor processing component is a Faraday cage configured to detect ions during an ion implantation process performed on the semiconductor wafer.

[0084] In some embodiments, a method of operating a wafer chuck is provided. The wafer chuck comprises: (I) a platen configured to support a semiconductor wafer; (II) a chuck unit having a lever and a biasing member configured to bias the lever to a closed position relative to the platen; and (III) a lever latching member configured to latch the lever. The method includes applying, via the lever latching member, a lever opening force to the lever to move it from the closed position to an open position relative to the platen. The method further includes conveying the semiconductor wafer to a target wafer position relative to the platen when the lever is in the open position.

[0085] In some embodiments, the method includes moving, using a biasing force applied to the lever by the biasing member, the lever to the closed position with respect to the platen when the semiconductor wafer is in the target wafer position, wherein the lever blocks movement of the semiconductor wafer from the target wafer position when the lever is in the closed position.

[0086] In some embodiments, the lever does not block a path of movement of the semiconductor wafer when the lever is in the open position. Conveying the semiconductor wafer to the target wafer position includes moving the semiconductor wafer along the path of movement to the target wafer position when the lever is in the open position. The method includes blocking the path of movement of the semiconductor wafer using the lever when the lever is in the closed position.

[0087] In some embodiments, the lever moves from the closed position to the open position when the lever opening force overcomes a biasing force applied to the lever by the biasing member.

[0088] In some embodiments, a wafer holding apparatus is provided. The wafer holding apparatus includes: a platen configured to support a semiconductor wafer; a first holder unit; a second holder unit; and a lever engagement structure. The first holder unit includes: a first mounting member connected to the platen; and a first lever pivotally connected to the first mounting member. The second holder unit includes: a second mounting member connected to the platen; and a second lever pivotally connected to the second mounting member. The lever engagement structure includes: a body; a first lever engagement member protruding from the body and configured to engage the first lever; and a second lever engagement member protruding from the body and configured to engage the second lever.The first lever blocks movement of the semiconductor wafer when the first lever is in a first closed position with respect to the platen. The second lever blocks movement of the semiconductor wafer when the second lever is in a second closed position with respect to the platen. The lever latching structure is configured to apply a first lever opening force to the first lever via the first lever latching element to move it from the first closed position to a first open position with respect to the platen, and simultaneously apply a second lever opening force to the second lever via the second lever latching element to move it from the second closed position to a second open position with respect to the platen.

[0089] In some embodiments, the first lever blocks a first trajectory of the semiconductor wafer when the first lever is in the first closed position; the first lever does not block the first trajectory of the semiconductor wafer when the first lever is in the first open position; the second lever blocks the first trajectory of the semiconductor wafer when the second lever is in the second closed position; and the second lever does not block the first trajectory of the semiconductor wafer when the second lever is in the second open position.

[0090] In some embodiments, the first retainer unit includes a first biasing member having a first end connected to the first lever and a second end connected to the first mounting member, the first biasing member configured to bias the first lever toward the first closed position. The second retainer unit includes a second biasing member having a first end connected to the second lever and a second end connected to the second mounting member, the second biasing member configured to bias the second lever toward the second closed position.

[0091] In some embodiments, the first biasing member is a first spring and the second biasing member is a second spring.

[0092] In some embodiments, the first lever moves from the first closed position to the first open position when the first lever opening force overcomes a first biasing force applied to the first lever by the first biasing member; and the second lever moves from the second closed position to the second open position when the second lever opening force overcomes a second biasing force applied to the second lever by the second biasing member.

[0093] In some embodiments, the wafer holding device includes a full braking device connected to the platen and configured to space the semiconductor wafer at least a threshold distance from a semiconductor processing component.

[0094] In some embodiments, the semiconductor processing component is a Faraday cage configured to detect ions during an ion implantation process performed on the semiconductor wafer.

[0095] In some embodiments, the wafer holding device comprises a first protective structure at least partially enclosing the first lever and a second protective structure at least partially enclosing the second lever.

[0096] Features of various embodiments have been described above so that those skilled in the art can better understand aspects of the present disclosure. Those skilled in the art will appreciate that they can readily use the present disclosure as a basis for designing or modifying other methods and structures for achieving the same objectives and / or obtaining the same benefits as the embodiments presented herein. Those skilled in the art will also appreciate that such equivalent interpretations do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.

[0097] While the subject matter has been described in language specific to structural elements or method steps, it is to be understood that the subject matter of the appended claims is not necessarily limited to the specific elements or steps described above. Rather, the specific elements and steps described above are disclosed as exemplary forms of implementing at least some of the claims.

[0098] Various operations of embodiments are provided herein. The order in which some or all operations are described should not be construed to imply that these operations are necessarily order-dependent. It is understood that an alternative order that retains the benefit of this description is possible. It is also understood that not all operations are necessarily present in every embodiment provided herein. It is also understood that not all operations are necessary in some embodiments.

[0099] It is understood that layers, features, elements, etc., illustrated herein are illustrated with specific dimensions, such as structural dimensions or orientations, relative to one another for simplicity and clarity, and that, in some embodiments, their actual dimensions may differ significantly from the dimensions shown herein. Furthermore, there are many different methods for fabricating layers, regions, features, elements, etc., mentioned herein, such as etching methods, planarization methods, implantation methods, doping methods, spin-on methods, sputtering methods, growth methods, and / or deposition methods, e.g., chemical vapor deposition (CVD).

[0100] Furthermore, terms such as "exemplary" and / or the like are intended to serve as an example, instance, illustration, etc., and do not necessarily mean "advantageous." The term "or" as used in the present application is intended to mean an inclusive "or" and not an exclusive "or." Furthermore, the term "a(n)" as used in the present application and the appended claims is generally intended to mean "one or more" unless otherwise indicated or unless the context indicates a singular form. Furthermore, "A and / or B and / or the like" generally means "A or B" or "A and B." Furthermore, to the extent the terms "comprises," "having," "has," or variations thereof are used, these terms are intended to be inclusive in a manner similar to the term "comprise."Furthermore, unless otherwise specified, terms such as "first," "second," or the like are not intended to imply any temporal aspect, spatial aspect, order, etc. Rather, these terms are used merely as labels, etc., for structural elements, items, objects, etc. For example, a first element and a second element generally correspond to an element A and an element B, or to two different or two identical elements, or to one and the same element.

[0101] While the disclosure has been described with reference to one or more implementations, equivalent variations and modifications will be apparent to those of ordinary skill in the art upon reading and understanding this specification and the accompanying drawings. The disclosure encompasses all such variations and modifications and is limited only by the scope of the following claims. In particular, with respect to the various functions performed by the components described above (e.g., elements, resources, etc.), unless otherwise indicated, the terms used to describe such components are intended to refer to a component that performs the stated function of the described component (e.g., that is functionally equivalent), even if it does not structurally correspond to the disclosed structure.In addition, although a particular element of the disclosure may have been described in terms of only one or more implementations, that element may be combined with one or more other elements of the other implementations as may be desirable and advantageous for a given or particular application. QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] US 63 / 536,528

[0001]

Claims

[1] Wafer holding device with: a plate configured to support a semiconductor wafer; and a holder unit comprising: a mounting element connected to the plate, a lever, and a biasing element having a first end connected to the lever, and with a second end connected to the mounting element, where the biasing member is configured to bias the lever to a closed position relative to the plate, and the lever prevents movement of the semiconductor wafer when the lever is in the closed position. [2] A wafer holding apparatus according to claim 1, further comprising: a lever latching member configured to apply a lever opening force to the lever to move the lever from the closed position to an open position with respect to the plate. [3] Wafer holding device according to claim 2, wherein the lever blocks a first movement path of the semiconductor wafer when the lever is in the closed position, and the lever does not block the first movement path of the semiconductor wafer when the lever is in the open position. [4] The wafer holding apparatus of claim 2 or 3, wherein the lever moves from the closed position to the open position when the lever opening force overcomes a biasing force applied to the lever by the biasing member. [5] Wafer holding device according to one of the preceding claims, further comprising: a full braking device connected to the platen and configured to space the semiconductor wafer at least a threshold distance from a semiconductor processing component. [6] The wafer holding apparatus of claim 5, wherein the semiconductor processing component is a Faraday cage configured to detect ions during an ion implantation process performed on the semiconductor wafer. [7] Wafer holding device according to one of the preceding claims, wherein the biasing element is a spring. [8] Wafer holding device according to one of the preceding claims, wherein the lever comprises: an energy region connected to the first end of the biasing element; a weight portion that blocks a path of movement of the semiconductor wafer when the lever is in the closed position; and a pivot point area that is pivotally connected to the mounting element. [9] A method for operating a wafer holding device, wherein the wafer holding device comprises: a plate configured to support a semiconductor wafer; a holder unit having a lever and a biasing member configured to bias the lever to a closed position relative to the plate; and a lever engagement member configured to engage the lever, and the method comprises: Applying, via the lever engaging element, a lever opening force to the lever to move it from the closed position to an open position with respect to the plate; and when the lever is in the open position, conveying the semiconductor wafer to a target wafer position relative to the platen. [10] The method of claim 9, further comprising: when the semiconductor wafer is in the target wafer position with respect to the platen, moving, using a biasing force applied to the lever by the biasing member, the lever to the closed position with respect to the platen, wherein the lever blocks movement of the semiconductor wafer from the target wafer position when the lever is in the closed position. [11] Method according to claim 9 or 10, wherein the lever does not block a movement path of the semiconductor wafer when the lever is in the open position, conveying the semiconductor wafer to the target wafer position comprises moving the semiconductor wafer along the movement path to the target wafer position when the lever is in the open position, and the method further comprises blocking the path of movement of the semiconductor wafer using the lever when the lever is in the closed position. [12] A method according to any one of claims 9 to 11, wherein the lever moves from the closed position to the open position when the lever opening force overcomes a biasing force applied to the lever by the biasing member. [13] Wafer holding device with: a plate configured to support a semiconductor wafer; a first holder unit comprising: a first mounting element connected to the plate, and a first lever pivotally connected to the first mounting member; and a second holder unit comprising: a second mounting element connected to the plate, and a second lever pivotally connected to the second mounting member; and a lever-locking structure comprising: a body, a first lever engagement member projecting from the body and configured to engage the first lever, and a second lever locking element that protrudes from the body and thus configured to engage the second lever, where the first lever blocks movement of the semiconductor wafer when the first lever is in a first closed position with respect to the plate, the second lever blocks movement of the semiconductor wafer when the second lever is in a second closed position with respect to the plate, and the lever locking structure is configured to simultaneously applies a first lever opening force to the first lever via the first lever engaging element to move it from the first closed position to a first open position with respect to the plate, and applies a second lever opening force to the second lever via the second lever engaging element to move it from the second closed position to a second open position with respect to the plate. [14] Wafer holding device according to claim 13, wherein the first lever blocks a first movement path of the semiconductor wafer when the first lever is in the first closed position, the first lever does not block the first movement path of the semiconductor wafer when the first lever is in the first open position, the second lever blocks the first movement path of the semiconductor wafer when the second lever is in the second closed position, and the second lever does not block the first movement path of the semiconductor wafer when the second lever is in the second open position. [15] Wafer holding device according to claim 13 or 14, wherein the first holder unit comprises a first biasing member having a first end connected to the first lever and a second end connected to the first mounting member, the first biasing member being configured to bias the first lever to the first closed position, and the second holder unit comprises a second biasing member having a first end connected to the second lever and a second end connected to the second mounting member, the second biasing member being configured to bias the second lever toward the second closed position. [16] Wafer holding device according to claim 15, wherein the first biasing element is a first spring, and the second biasing element is a second spring. [17] Wafer holding device according to one of claims 13 to 16, wherein the first lever moves from the first closed position to the first open position when the first lever opening force overcomes a first biasing force applied to the first lever by the first biasing element, and the second lever moves from the second closed position to the second open position when the second lever opening force overcomes a second biasing force applied to the second lever by the second biasing member. [18] Wafer holding device according to one of claims 13 to 17, further comprising: a full braking device connected to the platen and configured to space the semiconductor wafer at least a threshold distance from a semiconductor processing component. [19] The wafer holding apparatus of claim 18, wherein the semiconductor processing component is a Faraday cage configured to detect ions during an ion implantation process performed on the semiconductor wafer. [20] Wafer holding apparatus according to any one of claims 13 to 19, further comprising: a first protective structure at least partially enclosing the first lever; and a second protective structure that at least partially encloses the second lever.

Citation Information

Patent Citations

  • 63/536.528