METHOD AND DEVICE FOR REGULATING A POWER FACTOR CORRECTOR

Abstract

A method for controlling a power factor correction (PFC) is proposed. The PFC is used to absorb input power and deliver power to a load via a DC / DC converter. The method is executed by a PFC controller, which incorporates a voltage regulator. The method comprises: receiving a first signal transmitted by a DC / DC controller used to regulate the DC / DC converter, where the first signal specifies the load; deriving a second signal based on the first signal, where the second signal is an expected power control signal from the voltage regulator under the load specified by the first signal; and configuring the voltage regulator according to the second signal to provide an output voltage V. Bulk to keep the PFC stable at the DC / DC converter.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a method and apparatus for controlling a power factor corrector (PFC). BACKGROUND

[0002] The power factor corrector (PFC) is typically used as a front-end converter, ensuring power supplies with a high power factor and low input current distortion (good iTHD, input current total harmonic distortion). Fig. Figure 1 is a schematic diagram showing a power supply with conventional PFC control. The power supply unit may include a PFC 101, a PFC regulator 103, a DC / DC converter 105, and a DC / DC regulator 107. The PFC 101 may receive input power and supply power to a load via the DC / DC converter 105. The PFC 101 may be controlled by the PFC regulator 103. The DC / DC converter 105 may be controlled by the DC / DC regulator 107. The PFC control typically comprises two control loops, as shown in Fig. 1. An inner control loop is a fast-response input current control loop that shapes the input current according to a sinusoidal input waveform. This ensures that the input current meets a low iTHD requirement. An outer control loop is a slow-response PFC output voltage control loop that forces the output to an expected voltage (defined by a reference signal V ref). This voltage control circuit outputs a control signal VCL op which provides a current reference signal I ref so that the input current can be regulated. By adjusting the signal VCL op The input power of the PFC can be changed and the PFC output voltage V Bulk be kept stable at different output loads. PFC control is well known to those skilled in the art and will not be described in detail here.

[0003] Theoretically, the PFC output voltage should be V Bulkhave an output voltage ripple with a ripple frequency twice the mains frequency. This is because the input voltage and current are rectified at twice the mains frequency, and the charging and discharging of the PFC output capacitor in each AC half-cycle generates the voltage ripple. The voltage regulation circuit should respond slowly so that it is not affected by the voltage ripple of V Bulk This means that the bandwidth of the voltage control loop must be much smaller than twice the input line frequency. If the voltage control loop responds too quickly, the control output VCL op constantly changes within half an AC input cycle. This causes the signal I ref distorted and the iTHD and the power factor of the PFC are affected.

[0004] Good dynamic load performance at the output is a common requirement for the DC / DC converter 105. Some computer systems even require step loads of 5% to 100% within a millisecond with an output voltage drop of less than 1%. Good dynamic load performance depends on the DC / DC regulator 107 and also on the stability of V bulk If a high step load occurs at the DC / DC converter output, the PFC output also experiences a high step load, causing the high V bulk caused to overshoot or undershoot because the PFC voltage control circuit reacts slowly.

[0005] Fig. 2A and Fig. 2B are schematic diagrams showing an undershoot of V bulk when the DC / DC converter output experiences a high step load (Iout changes from 20A to 70A). Fig. 3A and Fig. 3B are schematic diagrams showing an overshoot of V bulkwhen the DC / DC converter output experiences a high step load (Iout changes from 70A to 20A). Fig. 2B and Fig. 3B are the 5x magnified versions of Fig. 2A and 3A respectively. It can be seen that V bulk has a large undershoot and overshoot that reaches the protection thresholds, causing V bulk in the cases from 20A to 70A or from 70A to 20A it continues to decrease or increase.

[0006] The strong undershoot and overshoot of V bulk disturbs the stability and thus impairs the dynamic load behavior of the DC / DC converter 105 at the output. Therefore, it is desired to provide an effective method to improve the stability of V bulk when the DC / DC converter output experiences a high step load. DEPICTION

[0007] The present disclosure proposes a method and apparatus for detecting the overshoot or undershoot of Vbulk to eliminate when the DC / DC converter output experiences a high step load.

[0008] One aspect of the present disclosure provides a method for controlling a power factor corrector (PFC), wherein the PFC is configured to receive input power and supply power to a load via a DC / DC converter, the method is performed by a PFC controller configured to control the PFC, and the PFC controller comprises a voltage regulator.

[0009] The method comprises: receiving a first signal transmitted from a DC / DC regulator configured to regulate the DC / DC converter, the first signal indicating the load; deriving a second signal based on the first signal, the second signal being an expected power regulation signal of the voltage regulator under the load indicated by the first signal; and configuring the voltage regulator according to the second signal to provide an output voltage V Bulk of the PFC to the DC / DC converter stable.

[0010] According to an embodiment of the present disclosure, the voltage regulator may be configured to provide a power control signal VCL op wherein configuring the voltage regulator according to the second signal comprises: selectively generating the power control signal VCL according to the second signal opbased on a difference between a reference voltage signal and the output voltage V Bulk of the PFC, or adjusting the power control signal VCL op in that it is equal to the second signal.

[0011] According to an embodiment of the present disclosure, the PFC controller may further comprise a current controller, wherein the current controller may be configured to control a difference between a product of a reference current signal and K and a current I PFC of the PFC as input, so that the current I PFC of the PFC is controlled such that it is equal to the product of the reference current signal and K, where K can be a constant scaling factor.

[0012] According to an embodiment of the present disclosure, the first signal may have an output power P out of the DC / DC converter.

[0013] According to an embodiment of the present disclosure, deriving a second signal may comprise: obtaining the second signal by dividing the output power P out by a product of an efficiency η and K, where the efficiency η indicates the efficiency of supplying power to the consumer from the input power, K can be a constant scaling factor and a current I PFC the PFC is controlled such that it is equal to a product of a reference current signal and K.

[0014] According to an embodiment of the present disclosure, if there is no RMS filter in the PFC controller, the second signal is obtained by measuring the output power P out by a product of a square of a root mean square of the input voltage V in , the efficiency η and K.

[0015] According to an embodiment of the present disclosure, configuring the voltage regulator according to the second signal may include: when an amount of a difference between the second signal and the power control signal VCL op is greater than a threshold value, setting the power control signal VCL op such that it is equal to the second signal, and changing an associated state variable of the voltage regulator so that the voltage regulator jumps to a state corresponding to a last input power.

[0016] According to an embodiment of the present disclosure, the threshold may be a certain percentage of a value of the power control signal VCL op be in steady state at full load.

[0017] According to an embodiment of the present disclosure, the voltage regulator may be achieved using a proportional-integral-derivative, PID control, and configuring the voltage regulator according to the second signal may include: if the magnitude of the difference is less than or equal to the threshold, determining a sum of a proportional quantity, an integral quantity, and a derivative quantity as the power control signal VCL op , and if the amount of the difference is greater than the threshold, setting the power control signal VCL op to be equal to the second signal and setting the integral quantity to be equal to the second signal

[0018] According to an embodiment of the present disclosure, receiving a first signal transmitted by a DC / DC regulator comprises: in a case where a safety isolation barrier is present between the PFC regulator and the DC / DC regulator, receiving the first signal transmitted by the DC / DC regulator via a signal transmitter.

[0019] According to one embodiment of the present disclosure, the first signal is transmitted in digital form, and the transmission, encoding, and decoding are completed within half a millisecond.

[0020] Another aspect of the present disclosure is a power factor corrector PFC controller configured to control a power factor corrector PFC, wherein the PFC may be configured to receive input power and supply power to a load via a DC / DC converter, and the PFC controller may include a voltage regulator and may be configured to: receive a first signal from a DC / DC regulator, the first signal indicative of the load; derive a second signal based on the first signal, the second signal being an expected power control signal of the voltage regulator under the load indicated by the first signal; and, in accordance with the second signal, configure the voltage regulator to provide an output voltage V Bulk of the PFC to the DC / DC converter stable.

[0021] Another aspect of the present disclosure further provides a power supply device comprising: a DC / DC converter; a power factor corrector (PFC) configured to receive input power and supply power to a load via the DC / DC converter; a DC / DC regulator configured to control the DC / DC converter and transmit a first signal to a PFC regulator; and the PFC regulator configured to regulate the PFC and perform the following operations: receiving the first signal from the DC / DC regulator, wherein the first signal indicates the load; deriving a second signal based on the first signal, wherein the second signal is an expected power control signal of a voltage regulator included in the PFC regulator under the load indicated by the first signal; and configuring the voltage regulator according to the second signal to provide an output voltage V Bulkof the PFC to the DC / DC converter stable.

[0022] According to one embodiment of the present disclosure, the stable V bulk the dynamic behavior of V out of the DC / DC converter while ensuring that the PFC voltage control circuit reacts slowly so that the input power factor and iTHD performance are not affected. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Other purposes, features and advantages will become apparent after the detailed description of the embodiments provided with reference to the accompanying drawings. Fig. Figure 1 is a schematic diagram of a prior art power supply with PFC control; Fig. 2A and Fig. 2B are schematic diagrams showing an undershoot of V bulkshow when the DC / DC converter output experiences a high step load (Iout changes from 20A to 70A); Fig. 3A and Fig. 3B are schematic diagrams showing an overshoot of V bulk show when the DC / DC converter output experiences a high step load (Iout changes from 70A to 20A); Fig. 4 is a schematic diagram of a power supply with a PFC controller according to an embodiment of the present disclosure; Fig. 5 is a flowchart of a method for controlling the PFC performed by the PFC controller according to an embodiment of the present disclosure; Fig. 6A and Fig. 6B each show a change of V bulk when the DC / DC converter output experiences a high step load under the control of the PFC controller according to an embodiment of the present disclosure; and Fig. 7 shows a PFC controller according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0024] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be noted, however, that these descriptions are for illustrative purposes only and are not intended to limit the scope of the present disclosure. Furthermore, descriptions of known structures and techniques are omitted from the following explanation to avoid unnecessary confusion with the concepts of the present disclosure.

[0025] The terms used herein are for the purpose of describing particular embodiments only and are not intended to be limiting of the present disclosure. As used herein, the terms "a," "an," "the," etc., should also include the meanings of "multiple" and "a plurality of," unless the context clearly indicates otherwise. Furthermore, the terms "include / comprising," "containing," etc., as used herein, indicate the presence of the features, steps, operations, and / or components, but do not preclude the presence or addition of one or more other features, steps, operations, or components.

[0026] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the meaning commonly understood by one of ordinary skill in the art. It is noted that the terms used herein should be interpreted to have a meaning consistent with the context of this explanatory document and should not be interpreted in an idealized or overly rigid manner.

[0027] As mentioned above, good dynamic load performance at the output is a general requirement for the DC / DC converter. Some computer systems even require step loads of 5% to 100% within a millisecond with an output voltage drop of less than 1%. Good dynamic load performance depends on the DC / DC regulator and also on the stability of V bulk If a high step load occurs at the DC / DC converter output, the PFC output also experiences a high step load, causing the high Vbulk caused to overshoot or undershoot because the PFC voltage control circuit reacts slowly.

[0028] To solve the above problems, the present disclosure proposes a concept for achieving the power control of the PFC by the feedforward function. Fig. 4 is a schematic diagram showing a power supply with a PFC controller according to an embodiment of the present disclosure.

[0029] The voltage unit may include a PFC 401, a PFC regulator 403, a DC / DC converter 405, and a DC / DC regulator 407. The PFC 401 may typically be connected to the DC / DC converter 405 and may receive input power and supply power to a load via the DC / DC converter 405. The PFC regulator 403 may include a voltage regulator. Furthermore, the DC / DC converter 405 may typically include a safety isolation barrier. However, the concept of the present disclosure is applicable regardless of the presence or absence of the safety isolation barrier.

[0030] According to one embodiment of the present disclosure, the PFC controller 403 may further include a current controller. The current controller may be configured to control a difference between a product of a reference current signal and K and a current I PFC the PFC 401 receives as input, so that the current I PFCthe PFC 401 can be controlled such that it is equal to the product of the reference current signal and K. In this embodiment, K can be a constant scaling factor and a positive number. Depending on the scaling, K can be greater or less than 1.

[0031] According to an embodiment of the present disclosure, the DC / DC regulator 407 may provide the signals V out and I out for control purposes, so that it receives an additional signal P out (or the signal I out , if the V out remains unchanged) to the PFC controller 403. However, the present disclosure is not limited thereto. The DC / DC controller 407 may also transmit other signals to the PFC controller 403, as long as these signals enable the PFC controller 403 to maintain the stability of V bulk to be achieved when the DC / DC converter output experiences the high step load.

[0032] To ensure a quick response from V bulkto the change in the output load, the transfer of P out fast. It is better if the DC / DC regulator 407 provides a continuous analog P out signal and feeds it into the PFC controller 403. If a safety isolation barrier exists between the two controllers, some high-speed analog signal transmission devices with input / output isolation should be used.

[0033] Therefore, according to one embodiment of the present disclosure, the voltage unit may further include a signal generator 409. This may be a pre-isolated analog signal generator or a high-frequency PWM (pulse width modulation) signal together with an optical or magnetic isolator.

[0034] The latter converts the signal P out into a high-frequency PWM signal (e.g. the duty cycle is proportional to P out). The PWM signal is transmitted to the PFC controller via an optocoupler or a signal transformer and then filtered back into an analog signal. The P out can also be transmitted in digital form, but the transmission, encoding and decoding speeds must be fast enough (e.g. completed within half a millisecond).

[0035] In the following, a process performed by the PFC controller 403 is described with reference to Fig. 5 described.

[0036] Fig. 5 is a flow diagram of a method 500 for controlling the PFC performed by the PFC controller according to an embodiment of the present disclosure.

[0037] In step S502, a first signal sent from a DC / DC regulator may be received. The first signal may indicate the load.

[0038] In one embodiment of the present disclosure, the first signal may include an output power Pout of the power supply. In this embodiment, in a case where a safety isolation barrier is present between the PFC regulator and the DC / DC regulator, the first signal from the DC / DC regulator can be received via the above-mentioned signal generator.

[0039] In step S504, based on the first signal (e.g., the output power P out ) a second signal is derived. In one embodiment of the present disclosure, the second signal may be an expected power control signal of the voltage regulator under the load indicated by the first signal.

[0040] Referring to Fig. 4, the PFC controller 403 may, after receiving the P sent by the DC / DC controller 407, out calculate a Vc signal (ie the second signal) that corresponds to the expected VCL op signal after the load changes. The new VCL op Signal increased / decreased I ref, so that the PFC's input current can be adjusted to the expected amplitude in a short time. The specific calculation process for the Vc signal is described below.

[0041] In this embodiment, let η be an efficiency of the power supply, and the efficiency η can represent the efficiency of supplying power to the load from the input power, ie: Pin=Pout / η where P in the input power of the power supply and P out the output power of the power supply.

[0042] In addition, the current I PFC of the PFC can be controlled by the above-mentioned current controller in such a way that it is connected to the reference current I ref satisfies the following equation: IPFC=K x Iref, where K can be a constant scaling factor and a positive number. Depending on the scaling, K can be greater than, equal to, or less than 1.

[0043] The input power (Pin = Vin(rms) × I PFC(rms) ) of the power supply can therefore be calculated using the following equation: Pin=Vin(rms) x K x Iref(rms) where the subscript value rms can stand for the root mean square of the variable, e.g. Vin(rms) the root mean square of V in represent.

[0044] Furthermore, according to an embodiment of the present disclosure, Vc should be used as a signal representing the normal voltage regulator output VCL op can replace, as in the example in Fig. 4, the following relationship to the reference current I ref have: lref=Vc×Vin / Vin(rms)2 lref(rms)=Vc×Vin(rms) / Vin(rms)2

[0045] Therefore, I ref(rms) can be derived as follows: lref(RMS value)=Vc / Vin(RMS value)

[0046] By combining equations 1, 2 and 3, the following equation can be derived: Vc=Pout / (η×K)

[0047] Therefore, in this embodiment, deriving the second signal may comprise: obtaining the second signal by dividing the output power P out by a product of an efficiency η and K.

[0048] However, the present disclosure is not limited to this. The concept is also applicable to other PFC controllers with other methods for calculating I ref applicable. For example, if the PFC controller does not include an RMS filter, then: lref=Vc×Vin lref(effective value)=Vc×Vin(effective value)

[0049] By combining equations 1, 2 and 3a, the following equation can be derived: Vc=Pout / (η×K×Vin(RMS))2

[0050] Therefore, according to an embodiment of the present disclosure, if there is no RMS filter in the PFC controller, the second signal can be obtained by determining the output power P out by a product of a square of a root mean square of the input voltage V in , the efficiency η and K.

[0051] Reference to Fig. 5: In step S506, the voltage regulator may be configured according to the second signal to provide an output voltage V Bulk of the PFC to the DC / DC converter stable.

[0052] According to an embodiment of the present disclosure, the voltage regulator may be configured to provide a power control signal VCL op In this embodiment, configuring the voltage regulator according to the second signal may include: selectively generating the power control signal VCL according to the second signal opbased on a difference between a reference voltage signal and the output voltage V Bulk of the PFC, or adjusting the power control signal VCL op in that it is equal to the second signal.

[0053] When the PFC controller receives the signal P out from the DC / DC regulator, it can choose whether to supply Vc or VCL op for the calculation of I ref In order not to disturb the normal PFC operation at a uniform load, it is recommended to use Vc instead of VCL op should only be used if their values ​​differ significantly. For example, the dynamic load of the power supply output at a load step of 20% (of full load) is also without this new P out Feedforward control is good, but the dynamic load of the power supply output is due to the large overshoot / undershoot of V bulk worse if the load step is more than 20%. Then the PFC controller VCLop set to Vc.

[0054] Therefore, according to an embodiment of the present disclosure, configuring the voltage regulator according to the second signal (i.e., the Vc signal) may include: when an amount of a difference between the second signal and the power control signal VCL op of the voltage regulator is greater than a threshold, the power control signal VCL op set to be equal to the second signal. The threshold may be a certain percentage of a value of the power control signal VCL op at full load in steady state. In this embodiment, the threshold value can be 20% of the value of VCL opat full load in steady state. It is noted that "20% of full load" is merely a reference value, and the present disclosure is not limited thereto. The criteria for applying Vc may depend on different applications, and various criteria should be incorporated into the present disclosure.

[0055] It can be assumed that the voltage control loop is implemented using PID (proportional-integral-derivative) control. However, the present disclosure is not limited thereto. The present disclosure is also applicable to other types of controllers.

[0056] The following provides a detailed description of how to configure the voltage regulator according to the Vc signal under PID control.

[0057] The PID algorithm refers to proportional-integral-derivative control, which is a common "stability-maintaining" control algorithm. Conventional PID control can include a proportional variable, an integral variable, and a derivative variable.

[0058] Proportional variable (n) = K p × V err (n), where K p is a proportional gain. As in Fig. 4, V err the voltage error signal, which is determined by V ref - V bulk is calculated.

[0059] Integral quantity (n) = Integral quantity (n-1) + K i × V err (n), where K i is an integral gain.

[0060] Derivative quantity (n) = K d (V err (n) - V err (n-1)), where K d is a lead gain.

[0061] So if abs(VCL op - Vc) ≤ VCL op FL × 20%, where VCL op_FL the value of VCL opat full load in steady state is: VCLop=proportional size + integral size + lead size.

[0062] Therefore, if abs(VCL op - Vc) > VCL op _FL × 20%: Therefore, if abs(VCLop−Vc)>VCLop_FL×20%:

[0063] The purpose of updating the integral quantity is to make the voltage regulator jump to the state corresponding to the latest input power. The voltage regulator can then continue operating in this state without waiting for the slow integral term to assume the expected value (e.g., V err be close to zero after applying Vc).

[0064] For controllers other than the PID controller, the associated state variables may also need to be changed so that the voltage controller jumps to the state that corresponds to the current input power.

[0065] Therefore, according to an embodiment of the present disclosure, when setting the power control signal VCL op in that it is equal to the second signal, at the same time an associated state variable of the voltage regulator is changed so that the voltage regulator jumps to a state that corresponds to a current input power.

[0066] Therefore, as mentioned above, the PFC controller executing the method 500 according to the embodiment may detect the overshoot or undershoot of V bulk when the DC / DC converter output experiences a high step load. The stable V bulk improves the dynamic behavior of V out of the DC / DC converter while ensuring that the PFC voltage control circuit reacts slowly so that the input power factor and iTHD performance are not affected.

[0067] The Fig. 6A and Fig. 6B show the change of V bulkwhen the DC / DC converter output experiences a high step load under the control of the PFC controller according to an embodiment of the present disclosure. From the figures, it can be seen that V bulk when changing Iout from 20A to 120A and from 120A to 20A, there is no undershoot or overshoot in the load steps, which ensures the stability of V bulk is achieved.

[0068] Fig. Figure 7 shows a PFC controller 700 according to an embodiment of the present disclosure. The PFC controller 700 can be used to control the Fig. 4. The PFC controller 700 may include a current regulator 710 and a voltage regulator 720, as shown in the figure. The PFC controller 700 may be configured to Fig. 5 of the present disclosure.

[0069] The present disclosure relates to block diagrams and / or flowcharts of computer-implemented methods, apparatus (systems and / or devices), and / or computer program products for describing exemplary embodiments. It is noted that blocks in block diagrams and / or flowcharts, and the combination of blocks in block diagrams and / or flowcharts, may be achieved by computer program instructions executed by one or more computer circuits.These computer program instructions may be provided to processor circuits such as general-purpose computer circuits, specialized computer circuits, and / or other programmable data processing circuits to create machines such that transistors, values ​​stored in memory locations, and other hardware components within such circuits are converted and controlled via instructions executed by processors of computers and / or other programmable data processing devices to achieve the functions / acts specified in the block diagrams and / or flowchart, thereby creating devices (functional units) and / or structures for achieving the functions / acts specified in the block diagrams and / or flowchart.

[0070] These computer program instructions may also be stored in tangible, computer-readable media that can direct computers or other programmable data processing devices to function in particular ways, such that the instructions stored in the computer-readable media produce products, including instructions that perform the functions / acts specified in the blocks of the block diagrams and / or flowcharts. Therefore, the embodiments of the present disclosure may be implemented with hardware and / or software (including firmware, resident software, microcode, etc.) running on processors such as digital signal processors, which may be collectively referred to as "circuits," "modules," or variants thereof.

[0071] References in this disclosure to "one embodiment," "an embodiment," etc., mean that the described embodiments may include certain features, structures, or characteristics, but not every embodiment must include the specific features, structures, or characteristics. Furthermore, these terms may not necessarily refer to the same embodiment. Moreover, when describing specific features, structures, or characteristics in conjunction with embodiments, it should be understood that implementing such features, structures, or characteristics in conjunction with other embodiments (whether expressly described or not) is within the skill of one skilled in the art.

[0072] Although the terms "first," "second," etc., may be used in the present disclosure to describe various elements, it should be noted that these elements are not intended to be limited by these terms. These terms are used only to distinguish elements from one another. For example, within the scope of the present disclosure, the first element may be referred to as the second element, and similarly, the second element may be referred to as the first element. As used in the present disclosure, the term "and / or" includes all combinations of one or more of the relevant listed elements.

[0073] Under the premise of not departing from the conceptual principles of the present disclosure, various changes and modifications may be made to the embodiments. All such changes and modifications are intended to be included within the scope of the inventive spirit of the present disclosure. Therefore, the above matters are to be considered as exemplary rather than limiting, and the embodiments are intended to cover all such modifications, improvements, and other embodiments that are encompassed within the spirit and scope of the inventive spirit. Therefore, to the greatest extent permitted by law, the scope of the inventive spirit of the present disclosure should be determined by the broadest possible interpretation of the present disclosure, including the embodiments and their equivalents, and should not be defined by or limited to any prior specific embodiments.

Claims

[1] A method for controlling a power factor corrector PFC, wherein the PFC is configured to receive input power and supply power to a load via a DC / DC converter, the method being carried out by a PFC controller configured to control the PFC, the PFC controller comprising a voltage regulator, and the method comprising: Receiving a first signal transmitted from a DC / DC regulator configured to regulate the DC / DC converter, the first signal indicative of the load; Deriving a second signal based on the first signal, the second signal being an expected power control signal of the voltage regulator under the load indicated by the first signal; and Configuring the voltage regulator according to the second signal to provide an output voltage V Bulk of the PFC to the DC / DC converter stable. [2] The method of claim 1, wherein the voltage regulator is configured to provide a power control signal VCL op generated, and wherein configuring the voltage regulator according to the second signal comprises: selectively generating the power control signal VCL according to the second signal op based on a difference between a reference voltage signal and the output voltage V Bulk of the PFC, or adjusting the power control signal VCL op in that it is equal to the second signal. [3] The method of claim 2, wherein the PFC controller further comprises a current controller configured to control a difference between a product of a reference current signal and K and a current I PFC of the PFC as input, so that the current I PFC of the PFC is controlled such that it is equal to the product of the reference current signal and K, where K is a constant scaling factor. [4] The method of claim 1, wherein the first signal has an output power P out of the DC / DC converter. [5] The method of claim 4, wherein deriving a second signal comprises: Obtaining the second signal by dividing the output power P out by a product of an efficiency η and K, where the efficiency η indicates the efficiency of supplying power to the consumer from the input power, where K is a constant scaling factor and a current I PFC of the PFC is controlled such that it is equal to a product of a reference current signal and K, and wherein the reference current signal is based on a power control signal VCL op of the voltage regulator and an input voltage V in of the PFC is obtained. [6] A method according to claim 5, wherein in a case where there is no RMS filter in the PFC controller, the second signal is obtained by determining the output power P out by a product of a square of a root mean square of the input voltage V in , the efficiency η and K. [7] The method of claim 2, wherein configuring the voltage regulator according to the second signal comprises: if an amount of difference between the second signal and the power control signal VCL op is greater than a threshold value, setting the power control signal VCL op such that it is equal to the second signal, and changing an associated state variable of the voltage regulator so that the voltage regulator jumps to a state corresponding to a last input power. [8] The method of claim 7, wherein the threshold value is a certain percentage of a value of the power control signal VCL op is in steady state at full load. [9] The method of claim 7, wherein the voltage regulator is achieved using proportional-integral-derivative, PID, control and configuring the voltage regulator according to the second signal comprises: if the amount of the difference is less than or equal to the threshold value, determining a sum of a proportional variable, an integral variable and a derivative variable as the power control signal VCL op , and if the amount of the difference is greater than the threshold, setting the power control signal VCL op to be equal to the second signal and setting the integral quantity to be equal to the second signal. [10] The method of claim 1, wherein receiving a first signal transmitted from a DC / DC regulator comprises: in a case where a safety isolation barrier is present between the PFC controller and the DC / DC controller, receiving the first signal transmitted from the DC / DC controller via a signal transmitter. [11] The method of claim 1, wherein the first signal is transmitted in digital form and the transmission, encoding and decoding are completed within half a millisecond. [12] A power factor corrector PFC controller configured to control a power factor corrector PFC, the PFC being configured to receive input power and supply power to a load via a DC / DC converter, the PFC controller comprising a voltage regulator and being configured to: receive a first signal from a DC / DC regulator, the first signal indicating the load; derive a second signal based on the first signal, the second signal being an expected power control signal of the voltage regulator under the load indicated by the first signal; and to configure the voltage regulator according to the second signal, an output voltage V Bulk of the PFC to the DC / DC converter stable. [13] Power supply device, comprising: a DC / DC converter; a power factor corrector PFC configured to receive input power and supply power to a load via the DC / DC converter; a DC / DC regulator configured to control the DC / DC converter and transmit a first signal to a PFC regulator; and the PFC controller, which is configured to control the PFC and perform the following operations: Receiving the first signal from the DC / DC regulator, the first signal indicating the load; Deriving a second signal based on the first signal, wherein the second signal is an expected power control signal of a voltage regulator included in the PFC regulator under the load indicated by the first signal; and Configuring the voltage regulator according to the second signal to provide an output voltage V Bulk of the PFC to the DC / DC converter stable. [14] The power supply device according to claim 13, wherein the voltage regulator is configured to generate a power control signal VCL op generated, and wherein configuring the voltage regulator according to the second signal comprises: selectively generating the power control signal VCL according to the second signal opbased on a difference between a reference voltage signal and the output voltage V Bulk of the PFC, or adjusting the power control signal VCL op , in that it is equal to the second signal. [15] The power supply device of claim 14, wherein configuring the voltage regulator according to the second signal further comprises: if an amount of difference between the second signal and the power control signal VCL op is greater than a threshold value, setting the power control signal VCL op such that it is equal to the second signal, and changing an associated state variable of the voltage regulator so that the voltage regulator jumps to a state corresponding to a last input power. [16] The power supply device according to claim 13, wherein in a case where a safety isolation barrier is provided between the PFC regulator and the DC / DC regulator, the power supply device further comprises a signal transmitter, and the DC / DC regulator transmits the first signal to the PFC regulator via the signal transmitter.

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