Dead time reduction using a gate current mirror in a current converter
Patent Information
- Application Number
- DE602022025587
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-11-10
- Publication Date
- 2025-11-26
- Estimated Expiration
- 2042-11-10
AI Technical Summary
Existing power converters face significant challenges in controlling dead-time transitions due to the risk of shoot-through currents and high losses associated with reverse conduction modes, particularly in wide band gap devices like SiC and GaN, which are exacerbated by complex and costly solutions involving additional sensors and controllers.
A gate driver circuit using current mirroring circuits to sense and mirror gate current signals across insulation barriers, allowing advanced control of switching transitions to reduce dead-time without shoot-through, using pre-driver circuits and gate buffers for insulation and signal conditioning.
Effectively reduces dead-time transitions, minimizing reverse conduction losses and shoot-through risks, while maintaining fast switching speeds and reducing system complexity and cost.