Vertical growth process of a III-V material

FR3128818B1Active Publication Date: 2025-02-28COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES +1
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Patent Information

Application Number
FR2021011632
Authority / Receiving Office
FR · FR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-11-02
Publication Date
2025-02-28
Estimated Expiration
2041-11-02

AI Technical Summary

Technical Problem

Current methods for growing thick layers of III-V materials, such as GaN, on silicon substrates face challenges like high dislocation densities and difficulty in achieving large substrate dimensions, which are economically viable and of high quality.

Method used

A process involving a seed layer, masking layers, and selective etching to create cavities for epitaxial growth, allowing for vertical growth of III-V materials with low defect density, using techniques like MOVPE and MBE to form thick epitaxial layers.

Benefits of technology

This method enables the growth of thick, low-defect III-V layers, reducing dislocation propagation and enabling the production of high-quality vertical microelectronic devices on silicon substrates, overcoming the limitations of existing techniques.

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Abstract

Title: Method for vertical growth of a III-V material. The invention relates to a method for growing a III-V material comprising supplying a stack including a crystalline layer of III-V material, a first masking layer overlying the germination layer, the first masking layer having at least one first aperture, the formation of at least one layer, the deposition of a second masking layer covering an upper face of the sacrificial layer, the formation of at least one second aperture in the second masking layer, the selective removal of the sacrificial layer from the first and second masking layers, and the epitaxial growth of a material based on the III-V material from the germination layer.the formation of at least a third aperture in the second masking layer and epitaxial growth of at least one material based on material III-V from the first epitaxially formed layer. Figure for the abstract: Fig. 12,
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Description

Technical field The present invention relates to the growth of III-V materials, such as GaN. It advantageously allows the growth of III-V materials to produce so-called vertical microelectronic devices. It finds, for example, a particularly advantageous application in the field of power electronics. STATE OF THE ART Power electronic components, typically based on GaN, are currently made from so-called lateral devices, such as high electron mobility transistors (HEMT), or from so-called vertical devices made mainly on GaN substrates. Vertical devices have many advantages. Due to their size, they take up less space than lateral devices, and also encounter fewer problems related to the presence of traps. However, current solutions for obtaining these vertical devices have many drawbacks. One solution is to grow a GaN layer vertically from GaN substrates, also known as free-standing GaN substrates. This solution achieves good performance. However, the disadvantage of this solution is that these GaN substrates are very expensive and are only available in small sizes, typically 5 cm (5.10?m) in diameter. An alternative to growth on GaN substrates is growth on silicon substrates ("GaN on silicon"), which has the advantage of being more economical and allowing access to large diameter substrates. However, this alternative has two major drawbacks. The resulting GaN layers have very high dislocation densities, of the order of 10° cm? Furthermore, due to the difference between the lattice parameter of GaN and that of silicon, it is difficult to obtain very thick layers, which are necessary for the manufacture of vertical devices. The present invention therefore aims to reduce the disadvantages mentioned above linked to the growth of thick layers of III-V materials, and for example the growth of thick layers of III-N materials and more particularly of GaN on a substrate of silicon. Other objects, features, and advantages of the present invention will become apparent from the following description and accompanying drawings. It is understood that other advantages may be incorporated. SUMMARY To achieve the above-mentioned objectives, a first aspect of the invention relates to a method for growing a III-V material comprising: A supply of a stack comprising a crystalline layer in III-V material called seed layer, a first masking layer overcoming the seed layer, the first masking layer having at least a first opening exposing part of a face upper part of the germination layer, A formation of at least one sacrificial layer filling the first opening and extending from the first opening over at least one first region of an upper face of the first masking layer, A deposit of a second masking layer covering an upper face of the sacrificial layer and covering at least a second region of the upper face of the first masking layer, the second region being not covered by the sacrificial layer, Formation of at least one second opening in the second layer masking so as to make accessible a part of the upper face of the sacrificial layer, A removal of the sacrificial layer selectively relative to the first masking layer and the second masking layer, so as to form at least one cavity, Epitaxial growth of a III-V material from the germination layer in the first opening and in the cavity, so to form at least a first epitaxial layer extending into the first opening and in the cavity and having an upper face extending principally- palely in an XY plane, A formation of at least a third opening in the second layer masking on a portion allowing part of the su- face to be exposed above at least one first epitaxial layer, Epitaxial growth of at least one material based on the III-V material at from the first epitaxial layer, the preferred direction of growth being normal to the XY plane, so as to form at least a second layer epitaxially grown extending from the at least one first epitaxial layer. Confinement during the growth of the first epitaxial layer, as well as the elbow shape of the latter, makes it possible to avoid the propagation of dislocations and to obtain a first epitaxial layer having a very low defect density, conducive to the vertical growth, from this same first epitaxial layer, of a second thick epitaxial layer and itself having few defects. Thus, the process makes it possible to achieve vertical growth of a III-V material while avoiding the problems linked to the propagation of dislocations. According to another aspect, the invention relates to a microelectronic device, comprising a stack of layers in a vertical direction, said stack comprising, from a lower surface of said stack, a crystalline seed layer made of a III-V material, a first crystalline layer based on this same material and a second crystalline layer based on this same material, characterized in that the first crystalline layer has a zone which forms a projection, in projection in the XY plane, relative to the second layer. Preferably, the first layer extends in a Z direction normal to the XY plane over a thickness H;0 and the second layer extends in this Z direction over a thickness H,29, with H,20>2*H 0 and preferably H,20>3*H10. Preferably the seed layer and the first epitaxial layer on the one hand, and the first epitaxial layer and the second epitaxial layer on the other hand, are in contact. BRIEF DESCRIPTION OF THE FIGURES The aims, objects, as well as the characteristics and advantages of the invention will emerge more clearly from the detailed description of an embodiment thereof which is illustrated by the following accompanying drawings in which: Figures 1 to 12 represent the main steps of an example of a production process. [Fig.1] [Fig.1] represents a stack comprising a crystalline layer of a III-V material, called the seed layer, and a first masking layer overlying the seed layer. [Fig.2] Figures 2 to 12 show steps applied to the stack illustrated in [Fig.1]. [Fig.12] illustrates an example of a structure that can be obtained, and which comprises a thick epitaxial layer of III-V material. [Fig.3] [Fig.4] [Fig.5] [Fig.6] [Fig.7] [Fig.8] [Fig.9] [Fig.10] [Fig.11] [Fig.12] Figures 13 and 14 illustrate an alternative embodiment, making it possible to reduce the risks of parasitic doping of the epitaxial layer of III-V material. [Fig.13] [Fig.14] [Fig.15] Figures 15 and 16 illustrate unfavorable situations for vertical electrical conduction and defect confinement that can occur during the growth of the first and second epitaxial layers respectively, when the process is not implemented. [Fig.16] [Fig.17] Figures 17 and 21 illustrate different examples of shapes of sacrificial layers that can be adopted in the context of implementing the process, these shapes making it possible to obtain varied shapes of epitaxial layer of III-V material. [Fig.18] [Fig.19] [Fig.20] [Fig.21] Figures 22 to 27 illustrate several embodiments for making power microelectronic components such as pn diodes or LEDs. Figures 22 to 24 illustrate steps in the production of a pn diode. [Fig.22] [Fig.23] [Fig.24] Figures 25 to 27 illustrate specific steps in making an LED. [Fig.25] [Fig.26] [Fig.27] The drawings are given as examples and are not limiting of the invention. They constitute schematic representations of principle intended to facilitate the understanding of the invention and are not necessarily on the scale of practical applications. In particular, the dimensions and thicknesses of the different layers are not representative of reality. DETAILED DESCRIPTION Before commencing a detailed review of embodiments of the invention, optional features which may possibly be set out below are set out. used in combination or alternatively: According to a particular example, in a section parallel to the XY plane, the first opening has a dimension Ls;, and the upper face of the first epitaxial layer has a dimension L;1;, with L;11>5*L31p, preferably L,11>10*L3;9 and preferably L,;1>20*L3;0. Advantageously, in a section parallel to the XY plane, the first opening extends over a surface S3,p and the upper face of the first epitaxial layer over a surface S;1,, with S,1:>5*S310, preferably S,1,>10*S;;p and preferably S,1,>20*S,10. Thus, the dimension of the first opening is much smaller than the dimension of the first epitaxial layer. This makes it possible to avoid the propagation of dislocations from the upper face of the seed layer into the first epitaxial layer. Preferably, the first epitaxial layer has a thickness H, 9 and the second epitaxial layer has a thickness H;2y, with preferably H,,0>2*H10, preferably H,20>3*H 19 and preferably H,20>5*H10, the thicknesses H,0 and H110 being taken in a Z direction perpendicular to the XY plane. Thus, the thickness of the second epitaxial layer is much greater than the thickness of the first epitaxial layer. This makes it possible to avoid the propagation of dislocations in the first epitaxial layer, then to obtain a significant thickness of III-V material thanks to the second epitaxial layer. In one example, the XY plane is parallel to the upper face of the seed layer and to an upper face of the substrate. According to a particular example, the method comprises, after the formation of the first epitaxial layer and before the removal of the second masking layer, a deposition of a third masking layer on the second masking layer, and a formation in the third masking layer of at least a fourth opening having flanks and configured to expose a portion of the second masking layer, the flanks of the third masking layer being preserved during the growth of the second epitaxial layer from the first epitaxial layer. This makes it possible to confine the growth of the ITI-V material during the production of the second epitaxial layer. Advantageously, the sides of the third masking layer have a height Hz, and the second epitaxial layer has a thickness H,2, such that Ha: 2H, the thicknesses H>;, and H,29 being taken in a direction Z perpendicular to the XY plane. According to one embodiment, a protective layer is deposited at least on the sides of the third masking layer, and preferably on sides defining the third opening of the second masking layer, before the step of growing the second epitaxial layer, this protective layer covering the sides of the third masking layer, and preferably the sides of the second masking layer, during the growth step of the second epitaxial layer. This prevents the inadvertent diffusion of elements from the third masking layer into the second epitaxial layer. This prevents inadvertent doping of the second epitaxial layer. According to a particular example, the cavity has a portion of triangular section according to a section parallel to the XY plane, said portion extending from the plumb line of the first opening. According to another embodiment, the growth of the first epitaxial layer is carried out in all directions of the XY plane. According to one embodiment, the first opening is located directly above a center of the cavity. According to a particular example, the cavity is hexagonal in shape. According to one embodiment, the method also comprises the following steps: one of N-type or P-type doping of the first layer epitaxial, a doping of the other type among an N-type or P-type doping of a second doped zone of the second epitaxial layer, the second zone doped extending from the upper face of the second epitaxial layer. According to one example, at least one doping among the P-type doping and the N-type doping is made from deep acceptors and / or donors respectively. This makes it possible to increase the electrical resistivity of the second epitaxial layer. This embodiment finds its applications in particular in the field of optically triggered high-voltage switches. A deep acceptor and deep donor are compounds having traps whose energy level difference with the valence or conduction band respectively is at least twice greater than the characteristic energy kT, k being the Boltzmann constant and T the absolute temperature. According to a particular example, the doping of the first epitaxial layer is carried out during the deposition of this same layer. According to one example, the doping of the second epitaxial layer is carried out during the growth of this same layer. According to one embodiment, the method further comprises: an embodiment of a first electrode in electrical contact with the second epitaxial layer, an embodiment of a second electrode in electrical contact with the first epitaxial layer. In one example, the stack forms a PN junction. According to one embodiment, the method further comprises well formation quantum dots within the second epitaxial layer, so as to produce an LED. According to a particular example, the first electrode is deposited in a fifth opening previously made in the third masking layer and in the second masking layer so as to expose a portion of the upper face of the first epitaxial layer and make it accessible from an upper face of the third masking layer. In one example, the fifth opening is located directly above the first opening. According to one embodiment, the III-V material of the first epitaxial layer and the III-V material of the second epitaxial layer are III-N materials, and preferably are gallium nitride-based materials and preferably are made of gallium nitride. According to one example, the III-V material of the first epitaxial layer and the III-V material of the second epitaxial layer are identical. According to one example, the second epitaxial layer has several III-V materials. A portion of the second epitaxial layer in contact with the first epitaxial layer has a III-V material identical to that of the first epitaxial layer. Another portion of the second epitaxial layer which is not in contact with the first epitaxial layer has a III-V material different from that of the first epitaxial layer. This different III-V material can, for example, form a quantum well. Preferably, the materials of the first epitaxial layer and the second epitaxial layer are based on the same material as that of the seed layer. Preferably, the material of the first epitaxial layer is identical to the material of the seed layer. According to one embodiment, the steps of the method have the following characteristics: the first masking layer has a plurality of first or- openings each exposing a part of the upper face of the layer of germination, the step of forming at least one sacrificial layer is carried out so to form a plurality of sacrificial layers, separate from each other, each filling at least one first opening, the second masking layer covers the plurality of sacrificial layers official, the step of forming at least one second opening is carried out so to make accessible a part of the upper face of each of the sa- layers critical, the step of forming at least one second opening is carried out so to form a plurality of second openings, so as to make accessible a portion of the upper face of each sacrificial layer, the step of removing each sacrificial layer selectively with respect to the first masking layer and to the second masking layer, is carried out so as to form at least a plurality of cavities, The epitaxial growth step of III-V material from the layer of germination is carried out so as to form a plurality of first layers epitaxially grown, each first epitaxial layer being located in a cavity, The formation of at least a third opening is carried out so as to expose a portion of the upper face of each first epitaxial layer, The epitaxial growth step of III-V material from at least one first epitaxial layer is carried out so as to form a second epitaxial layer extending from each first epitaxial layer. Thus, a plurality of thick layers of III-V material are obtained on the same substrate by vertical epitaxy. Advantageously, the first epitaxial layers are disjoint. Advantageously, the step of epitaxial growth of the III-V material from each first epitaxial layer is carried out so that the second epitaxial layers are disjoint. According to one example, each second epitaxial layer is intended to form a microelectronic device, preferably a vertical device. In one example, the epitaxial growth of III-V material from the seed layer is carried out so that the first layer is epitaxially grown throughout the cavity. Thus it completely fills the cavity. The device may have at least one of the optional features which may possibly be used in combination or alternatively: According to a particular example, the first epitaxial layer has a first doped zone, of N-type or P-type doping, and the second epitaxial layer has on its surface a second doped zone, of doping of the other type among the N-type or P-type. According to one example, the stack forms in part at least one Schottky diode or one of a nin, pin or pip diode or even a MOSFET transistor. According to a particular embodiment, the device comprises a first electrode in contact with the second doped zone, and a second electrode in contact with the first doped zone. In a particular example, the second epitaxial layer is surrounded by a fourth masking layer and the second electrode extends through the fourth masking layer and from an upper face of the fourth layer. masking up to the first doped area. In the present invention, the method is particularly dedicated to the manufacture of vertical microelectronic devices. This means that the growth of the III-N material is carried out in a preferred manner in a direction perpendicular to the plane of the lower face of the substrate, this direction corresponding to the Z axis of the orthogonal XYZ reference frame illustrated in [Fig.1]. It is specified that, in the context of the present invention, the terms "on", "overcomes", "covers", "underlying", "facing" and their equivalents do not necessarily mean "in contact with". Thus, for example, the deposition, transfer, bonding, assembly or application of a first layer on a second layer does not necessarily mean that the two layers are directly in contact with each other, but means that the first layer at least partially covers the second layer by being either directly in contact with it, or by being separated from it by at least one other layer or at least one other element. A layer can also be composed of several sub-layers of the same material or of different materials. In the following description, unless otherwise indicated, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", etc. or relative position qualifiers, such as the terms "above", "below", "upper", "lower", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", "lateral", etc., reference is made to the orientation of the corresponding figures, it being understood that, in practice, the devices and assemblies described may be oriented differently. Similarly, when an element is indicated to be located in line with another element, this means that these two elements are located on the same line perpendicular to the main plane in which a face of the substrate mainly extends, that is to say on the same line oriented vertically in the figures. An element located "in line with" or "in line with" another element means that these two elements are both located on the same line perpendicular to a plane in which a lower or upper face of a substrate mainly extends. The terms "substantially", "approximately", "of the order of" mean "within 10%, preferably within 5%" or, when it comes to an angular orientation, "within 10°". Thus, a direction substantially normal to a plane means a direction presenting an angle of 90+10° with respect to the plane. A portion or element described as "sacrificial" means that this element is intended to be "sacrificed", that is to say removed during a later stage of the process. A substrate, a layer, a device, “based” on a material M, means a substrate, a layer, a device comprising this material M only or this material M and possibly other materials, for example alloying elements, impurities or doping elements. Thus a material based on a III-N material may comprise a III-N material with added dopants. Similarly, a GaN-based layer typically comprises GaN and alloys of AIGaN or InGaN. The term "III-V material" refers to a semiconductor composed of one or more elements from column III and column V of Mendeleev's periodic table. Elements in column III include boron, gallium, aluminum, and indium. Column V contains, for example, nitrogen, arsenic, antimony, and phosphorus. “Selective etching with respect to” or “etching exhibiting selectivity with respect to” means etching configured to remove a material A or a layer A with respect to a material B or a layer B, and exhibiting an etching rate of the material A greater than the etching rate of the material B. The selectivity is the ratio between the etching rate of the material A and the etching rate of the material B. The selectivity between A and B is denoted S.…5. A reference frame, preferably orthonormal, comprising the x, y, z axes is represented in [Fig.1]. This reference frame is applicable by extension to the other figures. In this patent application, we will preferably speak of thickness for a layer and of height for a structure or a device. The thickness is taken along a direction normal to the main extension plane of the layer, and the height is taken perpendicular to the base plane XY. Thus, a layer typically has a thickness along z, when it extends mainly along an XY plane, and a projecting element, for example an isolation trench, has a height along z. The relative terms “on”, “under”, “underlying” preferably refer to positions taken along the z direction. The steps of the method as claimed are understood in the broad sense and may optionally be carried out in several sub-steps. An example of a production method will now be described with reference to figures 1 to 10. This method makes it possible to obtain the structure illustrated in [Fig.10], and which comprises a layer 120 of III-V material having a high thickness in the Z direction of the orthogonal XYZ reference frame illustrated in [Fig.1]. [Fig. 1] illustrates a stack 1 comprising a crystalline layer of an IIT-V material called seed layer 100 and a first masking layer 210 overlying the seed layer 100. The seed layer 100 is for example made or is based on GaN. It has an upper face 101 which extends mainly in an XY plane of the orthogonal XYZ reference frame. The first masking layer 210 can for example be made of SIN. It can be deposited by chemical vapor deposition (CVD). Advantageously, the stack 1 also comprises a substrate 10 for mechanically supporting the seed layer 100. This substrate 10 may also be referred to as a support or support substrate. This substrate 10 is, for example, silicon-based or made of silicon to reduce costs and to facilitate the compatibility of the method with the usual equipment and technologies of the microelectronics industry. In the latter case, it may be in the form of a wafer, also referred to as a wafer, the diameter of which is, for example, 200 mm or 300 mm. The substrate 10 may also be made of sapphire or SiC. In certain cases, provision may be made to provide, between the substrate 10 and the seed layer 100, a buffer layer 20, also referred to as a nucleation layer. This buffer layer 20 may be any layer known to those skilled in the art allowing the nucleation and growth of the material constituting the seed layer 100. The buffer layer 20 is preferably based on AlN. It may alternatively be based on other III-N type metal nitrides, for example based on AlGaN. Furthermore, this buffer layer 20 may serve to avoid unwanted reactions between the substrate 10 and the seed layer 100.For example, if the substrate 10 is made of Si and the seed layer 100 is made of GaN, it is necessary to provide a buffer layer 20, for example a layer of AIN, in order to avoid the appearance of the meltback etching phenomenon, called "meltback etching" in English, which appears due to the high reactivity between silicon and gallium at high temperature. As illustrated in [Fig.2], a step comprises the production of at least one first through opening 310, produced in the masking layer 210 so as to expose a portion 102 of the upper face 101 of the seed layer 100. This first opening 310 may be formed by first carrying out a UV (ultraviolet) or DUV (acronym for Deep UV), electron beam lithography, or NIL (acronym for “Nanoimprint lithography”) step, then for example an anisotropic etching step, this etching being able to be a dry or wet etching. For example, it may be a dry etching step in chlorinated or fluorocarbon chemistry. As also illustrated in [Fig.2], the deposition of a sacrificial layer 30 is then provided which covers the upper face 211 of the masking layer 210 and which fills the opening 310, preferably which completely fills the opening 310. Preferably, this sacrificial layer 30 comes into contact with the upper face 101 of the seed layer 100. The sacrificial layer 30 may be made of SiO, SiN, polySi, SiGe, TiN or based on at least one of these materials. The deposition of this sacrificial layer 30 may initially be done on a full plate, by chemical vapor deposition, known as “Low Pressure Chemical Vapor Deposition” (LPCVD), or by plasma-enhanced chemical vapor deposition, known as “Plasma-enhanced chemical vapor deposition” (PECVD). As illustrated in [Fig.3], the sacrificial layer 30 is then etched so that this layer extends over only a portion of the first masking layer 210, starting from the opening 310. More precisely, on the same plate corresponding to the structure illustrated in [Fig.1], after its etching, the sacrificial layer 30 forms disjointed islands, each island extending from at least one opening 310 formed in the first masking layer 210. According to an alternative embodiment, each island formed by the sacrificial layer 30 extends from several openings 310 formed by the first masking layer 210. Naturally, the structure illustrated in [Fig. 3] can be reproduced many times on the surface of the seed layer 100. Thus, at the end of the step illustrated in [Fig. 3], a plurality of disjointed sacrificial layers will be present on the same plate. The steps which will be described subsequently will be applied to each of these sacrificial layers. As illustrated in [Fig.4], a second masking layer 220 is then deposited on the upper face 211 of the first masking layer 210 and on the upper face 31 of the sacrificial layer 30. The second masking layer 220 has an upper face 221 which extends mainly in a plane parallel to the XY plane of the orthogonal reference frame XYZ. Like the first masking layer 210, the second masking layer 220 may be made of SiN, or another material, which will not be etched when the sacrificial layer is removed. It may be deposited by chemical vapor deposition CVD. Advantageously, the second masking layer 220 is made of the same material as the first masking layer 210. This makes it possible to obtain a homogeneous environment for the growth of the first epitaxial layer which will be described later and therefore to obtain homogeneous growth. This also makes it possible to simplify the manufacturing process. As illustrated in [Fig.5], one step comprises the fabrication of at least one second opening 320 made in the second masking layer 220 so as to expose a portion 32 of the upper face 31 of the sacrificial layer 30. The second opening 320 may be formed by first performing a step UV or DUV lithography, electron beam lithography, or NIL, then for example to an anisotropic etching step, this etching can be a dry or wet etching. For example, it can be a dry etching step in chlorinated or fluorocarbon chemistry. As illustrated in [Fig.6], a step then comprises removing the sacrificial layer 30 while retaining the first masking layer 210 and the second masking layer 220. The material constituting the sacrificial layer 30 must therefore be chosen such that it has good etching selectivity relative to the material of the first masking layer 210 and to the material of the second masking layer 220 when said sacrificial layer 30 is removed. If the first masking layer 210 or the second masking layer 220 is made, as given as an example, of SiN, it is therefore excluded to make the sacrificial layer 30 in this same material. For example, if the first masking layer 210 or the second masking layer 220 is made of SiN, it is possible to make the sacrificial layer 30 based on SiO> or SiO; only. The removal of the sacrificial layer 30 selectively with respect to the first masking layer 210 and the second masking layer 220 can be done by wet isotropic etching from the second opening 320. It is possible to use an HF solution for a sacrificial layer in SiO>. Preferably, the etching of the sacrificial layer 30 is selective with respect to the seed layer 100. A dry isotropic etching is also possible. This withdrawal makes it possible to form a cavity 40 intended for the growth of a first epitaxial layer 110 of the III-V material as illustrated in [Fig.7]. This cavity 40 extends from the seed layer 100 through the first opening 310. Thus this growth takes place from the part 102 of the upper face 101 of the seed layer 100 exposed thanks to the first opening 310. The first epitaxial layer 110 may be fabricated by MOVPE (acronym for “MetalOrganic Vapor Phase Epitaxy”), sometimes referred to as MOCVD (acronym for “MetalOrganic Chemical Vapor Deposition”). The source of gallium in the form of an organometallic precursor (precursor III) may typically be trimethylgallium (TMGa) or triethylgallium (TEGa). The source of nitrogen may typically be ammonia (NH3) (precursor V). The growth temperature is preferably greater than 600°C, for example of the order of 1000°C. The gas pressure within the growth reactor is for example of the order of 100 Torr (1 Torr = 133,322 Pa = 133,322 kg.mr!.s”). Growth is preferably carried out in a neutral and / or reducing atmosphere, typically by adding nitrogen N; and / or dihydrogen H. The flows of the different gases may be adapted in a manner known to those skilled in the art, in particular depending on the volume of the reactor. The first epitaxial layer 110 can alternatively be manufactured by molecular beam epitaxy MBE (acronym for “Molecular Beam Epitaxy”), by vapor phase epitaxy with chlorinated gas precursors HVPE (acronym for “Hydride Vapor Phase Epitaxy”) or by chemical vapor deposition CVD. During the growth of the first epitaxial layer 110, the latter is blocked vertically by the ceiling of the cavity 40, which is formed by the lower face 222 of the second masking layer 220. The first epitaxial layer 110 therefore grows preferentially laterally, in a direction parallel to the XY plane. This makes it possible to achieve a high growth speed without increasing the thickness of the first epitaxial layer 110. The upper face of the first epitaxial layer 111 extends mainly in a plane parallel to the XY plane. Advantageously, the second opening 320 exposes a portion 32 of the upper face 31 of the sacrificial layer 30 remote from the area of ​​the sacrificial layer 30 located directly above the first opening 310. Preferably, this exposed portion 32 of the sacrificial layer 30 is located at the opposite end of the upper face 31 of the sacrificial layer 30 relative to the area of ​​the sacrificial layer 30 directly above the first opening 310. The further the second opening 320, which allows access to the cavity 40 left after the removal of the sacrificial layer 30 for the growth of the first epitaxial layer 110, is from the first opening 310, which allows access to the seed layer 100, the more the proportion of the first epitaxial layer 110 which grows while being confined in the cavity 40 increases. all directions in space, except in the XY plane.Making the second opening 320 at the opposite end of the upper face 31 of the sacrificial layer 30 relative to the area of ​​the sacrificial layer 30 directly above the first opening 310 therefore makes it possible to grow the first epitaxial layer 110 in a confined manner in its quasi-entirety. In the method according to the invention, the initiation of growth occurs at the first opening 310 exposing the portion 102 of the upper face 101 of the seed layer 100, and not on the entire upper face 101 of the seed layer 100. The surface area of ​​the initiation zone is therefore limited. However, as mentioned above, the seed layer 100, the growth of which was carried out from a substrate typically of silicon, has a very high density of dislocations or induces a high density of dislocations at the Si / III-V material interface. Limiting the surface area of ​​the initiation zone therefore makes it possible to limit the number of defects likely to propagate in the first epitaxial layer 110. In addition, the growth of the first epitaxial layer 110 being essentially in the XY plane, this makes it possible to reduce, or even eliminate, the propagation of dislocations in this first epitaxial layer 110. More precisely, the dislocations formed at the interface between the seed layer 100 and the epitaxial material in the first opening 310, as well as the dislocations extending in this first opening 310, do not propagate laterally in the XY plane and therefore in the first epitaxial layer 110. In addition, the elbow shape given to the cavity 40 by the method according to the invention makes it possible to limit the propagation of dislocations. Thus, the first epitaxial layer 110 has a very low dislocation density. As illustrated in [Fig. 9], a step then comprises the removal of a portion of the second masking layer 220 making it possible to expose a portion 112 of the upper face 111 of the first epitaxial layer 110, thus forming a third opening 330. The dimensions of this removal define the dimensions in the XY plane of the second epitaxial layer 120. Preferably, the area of ​​the upper face 111 of the first epitaxial layer 110 directly above the first opening 310 is not exposed by the opening 330. Advantageously, and as will be detailed later with reference to FIGS. 26 and 27, this makes it possible to facilitate resumption of contact at the level of the first epitaxial layer, from a front face of the device opposite this first epitaxial layer. Following the formation of the opening 330, an epitaxy step illustrated in [Fig. 10] is provided for producing the second epitaxial layer 120. This second epitaxial layer 120 can be manufactured by the same methods as the first epitaxial layer 110. The growth is carried out from the part 112 of the upper face 111 of the first epitaxial layer 110. As mentioned previously, this first epitaxial layer 110 has a low dislocation density. As a result, few dislocations are propagated to the second epitaxial layer 120 during its growth. The second epitaxial layer 120 therefore itself has a very low dislocation density. Preferably, the materials and precursors used for the growth of the first 110 and second 120 epitaxial layers are identical. It will nevertheless be noted that dopants can be added to a part or to the entirety of only one of these two layers 110, 120. This is for example the case if it is desired to carry out in all or part of the first epitaxial layer a doping of a P or N type, and if it is desired to carry out in all or part of the second epitaxial layer an inverse doping. Similarly, this is also the case if it is desired to form an active zone comprising quantum wells within the second epitaxial layer. According to one embodiment, according to a section parallel to the XY plane, the first opening 310 has a dimension called Lao and the upper face 111 of the first epitaxial layer 110 has a dimension called L,;1, with L11>5*L310, preferably Li11>10*L310 and preferably L,11>20*L310. The dimensions L;;; and Lz1 are the maximum dimensions of these openings. Thus, for openings having a circular shape in the XY plane, these dimensions correspond to the diameter. For openings having a polygonal shape in the XY plane, these dimensions correspond to the largest diagonal. Thus, the dimension of the first opening is much smaller than the dimension of the first epitaxial layer. This makes it possible to avoid the propagation of dislocations from the upper face 102 of the seed layer 100 into the first epitaxial layer 110. According to one embodiment, according to a section parallel to the XY plane, the first opening 310 has a surface called S3;, and the upper face 111 of the first epitaxial layer 110 a surface called S,1;, with S,11>5*S310, preferably S,1:>10*S310 and preferably S,,1>20*S310. According to one embodiment, the first epitaxial layer 110 has a thickness H19 and the second epitaxial layer 120 has a thickness H129, with H no>1.5*H10, preferably H;20>3*H 19 and preferably H,20>5*H 10. Thus, the thickness of the second epitaxial layer 120 is much greater than the thickness of the first epitaxial layer 110. This makes it possible to avoid the propagation of dislocations in the first epitaxial layer 110, then to obtain a significant thickness of III-V material thanks to the second epitaxial layer 120. Figures 8, 11 and 12 illustrate an optional example. The step illustrated in [Fig. 8] follows the steps described with reference to figures 1 to 7. As illustrated in [Fig. 8], after the growth of the first epitaxial layer 110 and before the growth of the second epitaxial layer 120, a third masking layer 230 is deposited on the upper face 221 of the second masking layer 220. Preferably, this third masking layer 230 is also deposited before the creation of the opening 330. The step illustrated in [Fig. 11] follows the step illustrated in [Fig. 8]. As illustrated in [Fig. 11], in this embodiment, a step then comprises the removal of a portion of the third masking layer 230 allowing at least the portion 112 of the upper face 111 of the first epitaxial layer 110 to be exposed and forming an opening 340. Preferably, the fourth opening 340 is located exactly in line with the third opening 330, as illustrated in [Fig. 11]. Advantageously, the manufacturing of the third opening 330 and that of the fourth opening 340 are carried out simultaneously. As illustrated in [Fig.12], the growth of the second epitaxial layer 120 is then limited in the XY plane by the sides 231 of the third masking layer 230. This makes it possible to constrain the growth laterally, therefore to control more precisely the dimensions of the second epitaxial layer 120 and by way of consequence of better controlling the dimensions of the vertical device made from this second epitaxial layer 120. This therefore makes it possible to avoid uncontrolled laterally growing of the second epitaxial layer 120. In particular, this makes it possible to prevent second layers 120, which are adjacent but which are desired to be separate because they are intended to form separate components on the same plate, from coming into contact. The masking layer 230 thus acts as an insulator between adjacent second layers 120. According to one embodiment, the sides 231 of the third masking layer 230 have a height Hz3, such that H,3,>H{20- Figures 13 and 14 illustrate an optional embodiment. According to this embodiment, a protective layer 50 is deposited on the sides 231 of the third masking layer 230 and on the sides 223 of the second masking layer 220 before the growth of the second epitaxial layer 120. The deposition of this protective layer 50 can initially be carried out full wafer, by LPCVD, by PECVD, by atomic layer deposition (ALD) or by plasma-assisted atomic layer deposition (PEALD). The part of the protective layer 50 covering the upper face 111 of the first epitaxial layer 110 is then removed to expose the latter. This removal is preferably carried out by dry or ion etching.Advantageously, a subsequent step of cleaning the upper surface 111 of the first epitaxial layer 110 is provided. The protective layer 50 acts as a barrier preventing the diffusion of atoms from the second masking layer 220 or from the third masking layer 230 into the second epitaxial layer 120 during the growth of the latter. This makes it possible to avoid unintentional doping of the second epitaxial layer 120. Preferably, the protective layer 50 is made of ALO4. Figures 15 and 16 illustrate an unclaimed method, different from that described above and which does not provide for growing the first epitaxial layer within a cavity having a ceiling formed by the lower face 222 of the second masking layer 220. In this case, the growth of the first epitaxial layer 110 is not blocked vertically and is therefore not forced to progress in the XY plane. It therefore grows at a distance from the first masking layer 100. This does not make it possible to satisfactorily block the dislocations in the second epitaxial layer 120. Figures 17 to 21 illustrate different shapes of cavity and shape of layers obtained by epitaxy. Each of these figures illustrates, in top view, a structure obtained at the end of the step of forming the first epitaxial layer 110 and before the creation of the opening 330 in the second masking layer 220. In these examples, to facilitate the explanation, it is considered that the first 210 and the second 220 masking layers 220 are transparent. The textures used in these figures thus make it possible to observe the first epitaxial layer 110 either directly or by transparency through the second masking layer 220. According to an embodiment shown in [Fig. 17], the cavity 40 has, in the XY plane, the shape of two juxtaposed rectangles, one directly above the first opening 310 and the second, of larger dimensions, extending from one of the edges of the first rectangle. This shape makes it possible to guide the growth of the first epitaxial layer 110 in a first zone still very confined in the XY plane, before allowing it to extend further laterally, thus ensuring very low propagation of the dislocations. According to another embodiment illustrated in [Fig. 18], the cavity 40 has, still in the XY plane, a funnel shape that widens as it moves away from the first opening 310. This shape makes it possible to guide the growth of the first epitaxial layer 110 in a first zone that is still very confined in the XY plane, then in a second zone of increasing width. This has the effect of avoiding a sudden change in dimension and the generation of growth defects linked thereto. According to another embodiment shown in [Fig.19], the shape of the sacrificial layer 30 makes it possible to give the cavity 40 and therefore the first epitaxial layer 110 a rectangular shape in the XY plane, such as. According to other embodiments illustrated in figures 20 and 21, the growth of the first epitaxial layer 110 takes place in all directions of the XY plane. Preferably, the first opening 310 is then in the center of the cavity 40 or at least at a distance from the edges of the cavity 40. Thus, the first epitaxial layer 110 can grow from the first opening 310 in several directions of the XY plane, preferably in all directions of the XY plane. For example, the cavity 40 has a hexagonal shape along an XY section. It can also have a circular shape along an XY section. The first epitaxial layer 110 grows until it comes into contact with the edges 41 of the cavity 40, which imposes its shape on it along an XY section.In these embodiments where the growth of the first epitaxial layer 110 is carried out in all directions of the XY plane, it is necessary for the portion 224 of the second masking layer 220 confining the growth of the first epitaxial layer 110 in the z direction and the remainder of the second masking layer 220 to be continuous in order to ensure that the portion 224 is maintained in its initial position during the removal of the sacrificial layer 30. Thus, preferably, provision is made for the portion 224 of the second masking layer 220 to be connected to the remainder of the second masking layer 220 by parts of the second masking layer 220 not shown in FIGS. 20 and 21 for the sake of clarity. Thus, the . growth is carried out in such a way as to form bridges that connect the central islets and the peripheral regions that surround the islets. Another aspect of the invention relates to components that can be obtained by the method that is the subject of the invention as well as other usual manufacturing steps in microelectronics. Figures 22 to 27 illustrate these components as well as steps that allow their production. Figures 22 to 24 illustrate an example for producing a first component. This component comprises a seed layer 100 made of a III-V material, a first epitaxial layer 110 of the same material having an elbow shape in a plane normal to the XY plane and a second epitaxial layer 120 having a large thickness in the z direction of the orthogonal XYZ reference frame illustrated in [Fig. 22], the seed layer 100 and the first epitaxial layer 110 on the one hand, and the first epitaxial layer 110 and the second epitaxial layer 120 on the other hand, being in contact. The seed layer 100, the first epitaxial layer 110 and the second epitaxial layer 120 form an assembly 130 made of the same TV material. According to one embodiment, the component has a first doped zone 1001, of N-type or P-type doping. This doped zone 1001 extends in at least a portion of the first epitaxial layer 110, preferably from the face of the first epitaxial layer in contact with the first masking layer 210. This doped zone 1001 may extend over only a portion or over the entire thickness of the first epitaxial layer 110. It may also be provided that this doped zone 1001 also extends in a portion of the second epitaxial layer 120 which extends from the first epitaxial layer 110. The second epitaxial layer 120 has a second doped area 1002, doped with the other type among the N type or the P type. The second doped area 1002 is located at an upper end of the second epitaxial layer 120 opposite a lower end which is in contact with the first epitaxial layer 110. The second doped area 1002 preferably extends from the surface 121 of the second epitaxial layer 120. Preferably, the first doped area 1001 and the second doped area 1002 have thicknesses in the Z direction of between 2 μm and 20 μm, preferably between 5 and 15 μm, and between 50 nm and 2 μm, preferably between 100 nm and 500 nm, respectively. The component comprises a first electrode 2001 on the surface of the second doped zone 1002. In a perfectly conventional manner, this first electrode 2001 can be formed by depositing a metal on the surface 121 of the second epitaxial layer 120. This deposition can be conformal. This layer is then flattened, for example by chemical mechanical polishing (CMP). Advantageously, this planarization is expected to form a flat surface formed by the first electrode 2001 and by a fourth masking layer 240 surrounding the second epitaxial layer 120. The fourth masking layer 240 may optionally be made up of several masking layers, as indicated above with reference to [Fig. 12], where the fourth masking layer 240 is made up of the second masking layer 220 and the third masking layer 230. The result of these steps is illustrated in [Fig. 23]. The component comprises a second electrode 2002 in contact with the first doped zone 1001. To do this, the following steps can be carried out: fixing a handle substrate 5000 on the face comprising the first electrode 2001, turning the stack so that the substrate 10 is oriented towards the top, removal of the substrate 10, the optional buffer layer 20 and the layer of germination 100. These withdrawals can be carried out for example by CMP, by mechanical thinning or grinding (a technique known as English for “grinding”) or by dry or wet engraving. deposition of a metal electrode 2002 on the first doped zone 1001. The result obtained at the end of these steps is illustrated in [Fig.24]. It allows for example the production of a PN diode. [Fig.25] illustrates another component, typically an LED. According to this embodiment, the component comprises an active zone 3000. This active zone 3000 typically comprises a plurality of quantum wells. Conventionally, in these layers, an electron will recombine with a hole by emitting a photon of given energy. These photons form the light radiation of wavelength λ. The active zone 3000 comprises for example or is constituted by a stack of one or more emissive layers each forming a quantum well, for example based on GaN, InN, INGaN, AIGaN, AIN, AlInGaN, GaP, AIGaP, AlInGaP, AlGaAs, GaÂs, InGaAs, AllnAs, or a combination of one or more of these materials. Preferably the material of the second epitaxial layer 120 is based on the material of the first epitaxial layer 110, ie.this means that the material of the second epitaxial layer 120 is identical to the material of the first epitaxial layer 110 with the exception of the dopants incorporated at the level of the active zone 3000 comprising the quantum wells. As a variant, the active zone 3000 may be a layer of intrinsic gallium nitride, that is to say not intentionally doped, for example with a residual donor concentration of between 10'5 and 10!* atoms / cm°, for example of the order of 10!7 atoms / cm°. The active area 3000 can be formed during the epitaxial growth of the second epitaxial layer 120. With the exception of this doping, the steps for producing this component are then identical to those described with reference to figures 22 to 24. The component obtained thus forms an LED. According to another example illustrated in figures 26 and 27. In this embodiment, the first doped zone 1001 has a shape such that it allows contact to be made vertically. More precisely, in this embodiment, the second electrode 2002 has been produced in an opening 350 itself manufactured in a fourth masking layer 240 surrounding the second epitaxial layer 120. It is perfectly conceivable that instead of the fourth masking layer 240, the confinement of the second epitaxial layer 120 is ensured by a second 220 and a third masking layer 230 as described above with reference to figures 12 and 14. This opening 350 thus forms a via which makes the first doped zone 1001 accessible from the opposite face of the structure, for example from an upper face 232 of the fourth masking layer 240.This contact recovery is carried out in a zone 113 of the first epitaxial layer 110 which protrudes relative to the sides of the second epitaxial layer 120, according to a projection of these two layers on an XY plane. This zone 113 is illustrated in [Fig.27]. The dimension of this zone 113, taken in the XY plane, is sufficient to allow contact recovery while retaining a portion of the electrically insulating material of the masking layer 240 / 230, in order to ensure good insulation between the electrode 2002 and the second epitaxial layer 120. Such contact recovery allows the two electrodes of the device to be located on the same side of the device. This can be useful in certain architectures and facilitates the processing of the plates on which the device is located. According to another embodiment not illustrated, the component comprises a single doped zone, of N-type or P-type doping, extending in part or all of the second epitaxial layer 120, from the surface 121 of the second epitaxial layer. It is also possible to provide for this single doped zone to also extend in a part of the first epitaxial layer 110 which extends from the second epitaxial layer 120. The component thus obtained may be intended for the manufacture of a Schottky diode, a nin, pin or pip diode or even a MOSFET transistor. Through the different embodiments described above, it clearly appears that the invention provides an effective solution for vertically growing a thick layer of III-V material. The invention is not limited to the embodiments previously described and extends to all embodiments covered by its spirit.

Claims

Demands

1. A process for growing a III-V material comprising: A supply of a stack (1) comprising a layer crystalline in III-V material called nucleation layer (100), a first masking layer (210) on top of the layer germination (100), the first masking layer (210) featuring at least one first opening (310) exponent a portion (102) of an upper face (101) of the layer of germination (100), A formation of at least one sacrificial layer (30) rem- pleating the first opening (310) and extending from the first opening (310) on at least one first region (213) of an upper face (211) of the first layer of masking (210), A deposit of a second masking layer (220) re- covering an upper face (31) of the sacrificial layer (30) and covering at least a second region (214) of the upper face (211) of the first masking layer (210), the second region (214) not being covered by the sacrificial layer (30), A [formation of at least a second opening (320) in the second masking layer (220) so as to make ac- transferable a portion (32) of the upper face (31) of the layer sacrificial (30), A selective removal of the sacrificial layer (30) by in relation to the first masking layer (210) and to the second masking layer (220), so as to form at minus one cavity (40), Epitaxial growth of a material based on the material II-V from the germination layer (100) in the first opening (310) and into the cavity (40), so that form at least one first epitaxial layer (110) extending into the first opening (310) and into the cavity (40) and having an upper face (111) extending principally pale in an XY plane, A formation of at least one third opening (330) in the second masking layer (220) on a portion allowing exposure of a part (112) of the su- face perieure (111) at least one first epitaxial layer (110), Epitaxial growth of at least one material based on III-V material from the first epitaxial layer (110), the preferred direction of growth being normal in the plan XY, so as to form at least a second layer epitaxial (120) extending from at least a first epitaxial layer (110).

2. A method according to the preceding claim, wherein according to a cut Parallel to the XY plane, the first opening (310) presents a dimension La, and the upper face (111) of the first layer epitaxial (110) presents a dimension L,,,, with L,11>5*L310, of preference L,,1>10*L310 and preference L,11>20*L310.

3. A method according to any one of the preceding claims, in in which the first epitaxial layer (110) has a thickness H, 10 and the second epitaxial layer (120) has a thickness H,0, with H 10>2*H; 10, preferably H, 0>3*H; 10 and preferably H, 0>5*H, 10, the thicknesses Hn and Hn being taken along a perpendicular direction Z on the XY plane.

4. A method according to any one of the preceding claims, including, after the formation of the first epitaxial layer (110) and before the formation of the third opening (330) in the second masking layer (220), a deposit of a third layer of masking (230) on the second masking layer (220), and a formation in the third masking layer (230) of at least one fourth opening (340) featuring flanks (231) and configured for expose part of the second masking layer (220), the sides (231) of the third masking layer (230) being retained during the growth of the second epitaxial layer (120) from the first epitaxial layer (110).

5. A method according to the preceding claim, wherein a layer of protection (50) is deposited at least on the flanks (231) of the third masking layer (230), and preferably on the flanks (223) de- finishing the third opening (330) of the second layer of masking (220), before the second layer growth stage epitaxial (120), this protective layer (50) covering the flanks (231) of the third masking layer (230), and preferably the sides (223) of the second masking layer (220), during the step growth of the second epitaxial layer.

6. A method according to any one of the preceding claims, in in which the cavity (40) has a portion of triangular cross-section according a section parallel to the XY plane, said portion extending from the vertical line of the first opening (310).

7. A method according to any one of claims | to 5, wherein the growth of the first epitaxial layer (110) occurs in all the directions of the XY plane.

8. A method according to the preceding claim, wherein the first The opening (310) is located directly above a center of the cavity (40).

9. A method according to any one of the two preceding claims, in which the cavity (40) is hexagonal in shape.

10. A method according to any one of the preceding claims, including: doping among type N or type P doping of the first epitaxial layer (110), doping of the other type, such as N-type doping or type P of a second doped zone (1002) of the second epitaxial layer (120), the second doped zone extending from the upper face (121) of the second epitaxial layer (120).

11. A method according to the preceding claim, further comprising: the creation of a first electrode (2001) in contact electrical with the second epitaxial layer (120), a realization of a second electrode (2002) in contact electrical with the first epitaxial layer (110).

12. A method according to the preceding claim, wherein the stacking forms a PN junction.

13. A method according to claim 11, further comprising a training of quantum wells within the second epitaxial layer (120), of so as to make an LED.

14. | Method according to any one of the three preceding claims taken in combination with any one of claims 4 to 5, in which the first electrode (2001) is deposited in a fifth opening (350) previously made in the third masking layer (230) and in the second masking layer (220) so as to expose a part of the upper face (111) of the first epitaxial layer (110) and make it accessible from a face upper (232) the third masking layer (230).

15. A method according to any one of the preceding claims, in which the III-V material of the first epitaxial layer (110) and the material III-V of the second epitaxial layer (120) are III-N materials, and preferably are nitride-based materials gallium and preferably are made of gallium nitride.

16. A method according to any one of the preceding claims, in which : the first masking layer (210) has a plurality first openings (310) each exposing a part (102) of the upper surface (101) of the germination layer (100) the step of forming at least one sacrificial layer (30) is carried out in such a way as to form a plurality of sacrificial layers 30 ficicies, disjoint from one another, filling each at least one first opening (310), the second masking layer (220) covers the plurality sacrificial layers (30), the step of forming at least a second opening (320) is carried out in such a way as to make accessible a part (32) of the upper face (31) of each of the sacrificial layers (30), the step of forming at least a second opening (320) is performed in such a way as to form a plurality of second or- vertures (320), so as to make accessible a part (32) of the upper face (31) of each sacrificial layer (30), the step of removing each sacrificial layer (30) select- tively to the first masking layer (210) and to the The second masking layer (220) is applied so that form at least a plurality of cavities (40), the growth stage by epitaxy of material III-V from the germination layer (100) is made so as to form a plurality of first epitaxial layers (110), each first epitaxial layer (110) being located in a cavity (40), the formation of at least a third opening (330) is carried out so as to expose a part (112) of the face su- perieure (111) of each first epitaxial layer (110), the growth stage by epitaxy of material III-V from at least one first epitaxial layer (110) is carried out so as to form a second epitaxial layer (120) extending from each first epitaxial layer (110).

17. Microelectronic device, comprising a stack of layers along a vertical direction (z), said stack comprising, from of a smaller surface (500) of said stacking, a layer of ger- mination (100) crystalline into a III-V material, a first layer {110) crystalline based on this same material and a second layer (120) crystalline based on this same material, further comprising a first layer of masking (210) and a second layer of masking (220), characterized in that the first layer (110) presents a zone (113) which forms a protrusion, in projection onto a normal XY plane in the vertical direction (z), relative to the second layer (120), the germination layer (100) and the first epitaxial layer (110) on the one hand, and the first epitaxial layer (110) and the second layer epitaxial (120) on the other hand, are in contact.

18. Device according to the preceding claim, wherein the first layer (110) extends along the vertical direction (z) over a thickness H 110 €t the second layer (120) extends along the vertical direction (z) on a thickness Hy20, with H20>2*H10 and preferably H20>3*H10-

19. Device according to the preceding claim, wherein the first layer (110) has a first doped zone (1001), doping of type N or type P, and the second layer (120) present on its surface a second doped zone (1002), of doping of the other type among the type N or type P.

20. Device according to the preceding claim, comprising a first electrode (2001) in contact with the second doped zone (1002), and a second electrode (2002) in contact with the first doped zone (1001) and in which, preferably, the second epitaxial layer (120) is surrounded by a fourth masking layer (240), and the second electrode (2002) extends through the fourth masking layer (240, 230) and from an upper face (2342) of the fourth masking layer (240, 230) to the first doped area (1001).