Substrateless and Reduced-Substrate Flexible Integrated Circuits

Abstract

A method for manufacturing a flexible integrated circuit (FlexIC) comprises the steps depositing a first polymer layer on a first carrier S402; depositing a second polymer layer on the first polymer layer S404; forming a component layer on the second polymer; and detaching the second polymer layer from the first polymer layer S410 to separate the flexible IC from the first carrier. A barrier layer which may comprise one or more dielectric material layers may be deposited on the second polymer layer and the component layer may be formed on the barrier layer. The second polymer layer may be detached from the first polymer layer using laser ablation and the flexible IC wafer may then be transferred to a second carrier.

Description

[0001] The present invention relates to methods of providing substrateless flexible integrated circuits (ICs). In particular, the present disclosure relates to substrateless flexible thin-film ICs and methods of manufacturing substrateless flexible thin-film ICs. BACKGROUND

[0002] In the past decade, flexible circuitry has been branching out significantly from its initial role as a simple wire replacement to providing very cost-effective, but more complex interconnects, as well as, low-cost flexible integrated circuits (ICs) that can easily be embedded into everyday objects.

[0003] A flexible circuit element or structure, such as, for example, a flexible integrated circuit (e.g., flexible IC or FlexIC), is a patterned arrangement of circuitry and components provided on a flexible base material with or without flexible overlay. The circuitry patterned on each flexible circuit element may comprise any of resistors, capacitors, transistors, diodes, inductors, conductors, etc. The flexible base material (or flexible substrate) may be a polymer layer. The base material also provides enhanced mechanical properties to the patterned arrangement of circuitry and components, such as higher tensile strength and durability. As such, the flexible circuit structure can be bent or even stretched while maintaining the integrity and functionality of the integrated circuit.

[0004] However, the use of a flexible base material upon which the flexible IC is fabricated also has a number of disadvantages, such as adding to the thickness of the resulting IC structure, increased used of polymer material, and restricting connection placement. BRIEF SUMMARY OF THE DISCLOSURE

[0005] In accordance with a first aspect of the present disclosure, there is provided a method for manufacturing a flexible integrated circuit (IC), the method comprising: depositing a first polymer layer on a first carrier; depositing a second polymer layer on the first polymer layer; forming a component layer on the second polymer layer; and detaching the second polymer layer from the first polymer layer to separate the flexible IC from the first carrier.

[0006] In an example, the method further comprises depositing a barrier layer on the second polymer layer and forming the component layer on the barrier layer.

[0007] In an example, the second polymer layer has a thickness of between 5pm and 0.01pm.

[0008] In an example, the first polymer layer and the second polymer are formed from different materials.

[0009] In an example, the first polymer layer and the second polymer layer have one or more of different coefficients of thermal expansion, different solubilities, and different optical absorption properties.

[0010] In an example, the first polymer layer is at least partially cured before deposition of the second polymer layer.

[0011] In an example, an adhesion strength of the first polymer layer to the first carrier is greater than an adhesion strength of the second polymer layer to the first polymer layer.

[0012] In an example, the method further comprises depositing an intermediate layer on the first polymer layer prior to depositing the second polymer layer.

[0013] In an example, the intermediate layer is an adhesive layer.

[0014] In an example, the method further comprises forming one or more contact members on the first polymer layer prior to depositing the second polymer layer.

[0015] In an example, the method further comprises forming one or more vias from the component layer through the second polymer layer to electrically connect the component layer to one or more of the contact members.

[0016] In an example, the method further comprises formingone or more contact members on a topmost layer of the flexible IC.

[0017] In an example, the component layer includes one or more conductive, semiconductive, or insulating layers.

[0018] In an example, detaching the second polymer layer from the first polymer layer includes laser ablation of an interface between the first polymer layer and the second polymer layer.

[0019] In an example, detaching the second polymer layer from the first polymer layer is performed whilst at least one of the first polymer layer and the flexible IC are at least partially submerged in a fluid.

[0020] In an example, the method further comprises adhering a substrate layer to the second polymer layer after detachment of the second polymer layer from the first polymer layer.

[0021] In an example, the substrate layer is formed from one or more of paper, recyclable polymer, and biodegradable polymer.

[0022] In an example, detaching the second polymer layer from the first polymer layer includes: depositing a temporary auxiliary layer on an upper (i.e. exposed) surface of the flexible IC; adhering the temporary auxiliary layer to a second carrier; and detaching the second polymer layer from the first polymer layer by withdrawing the second carrier from the first carrier.

[0023] In an example, the temporary auxiliary layer is one of a polymer layer, a release tape, or an adhesive.

[0024] In an example, the method further comprises attaching the detached second polymer layer to a third carrier and detaching the flexible IC from the second carrier by removing the temporary auxiliary layer.

[0025] In an example, detaching the second polymer layer from the first polymer layer includes: bonding an application item to the flexible IC; and withdrawing the application item from the first carrier to detach the second polymer layer from the first polymer layer.

[0026] In an example, the second polymer layer and the component layer form a plurality of flexible ICs, and the method further comprises singulating the plurality of flexible ICs.

[0027] In an example, the method further comprises: depositing a passivation layer on the component layer; forming one or more vias through the passivation layer to electrically connect to the component layer; and forming one or more contact members on the passivation layer and electrically connected to the vias through the passivation layer.

[0028] In accordance with a second aspect of the present disclosure, there is provided a flexible IC comprising a component layer and polymer substrate layer, wherein the polymer substrate layer has a thickness of between 5pm and 0.01pm.

[0029] In accordance with a third aspect of the present disclosure, there is provided a method for manufacturing a flexible integrated circuit (IC), the method comprising: depositing a barrier layer on a first carrier; forming a component layer on the barrier layer; and detaching the barrier layer from the first carrier or detaching the component layer from the barrier layer to separate the flexible IC from the first carrier.

[0030] In an example, the method further comprises depositing an adhesive layer or a polymer layer on the carrier prior to deposition of the barrier layer.

[0031] In an example, the barrier layer has a thickness between 5pm and 0.001pm.

[0032] In an example, an adhesion strength between the component layer and the barrier layer is greater than an adhesion strength between the first carrier and the barrier layer.

[0033] In an example, an adhesion strength between the component layer and the barrier layer is less than an adhesion strength between the first carrier and the barrier layer.

[0034] In an example, the method further comprises, prior to deposition of the barrier layer: forming one or more contact members on the first carrier; depositing an insulating layer on the one or more contact members and the first carrier; and planarising the insulting layer to a level of the one or more contact members.

[0035] In an example, detaching the barrier layer from the first carrier or detaching the component layer from the barrier layer includes: depositing a temporary auxiliary layer on an upper surface of the flexible IC; adhering the temporary auxiliary layer to a second carrier; and detaching the barrier layer from the first carrier or detaching the component layer from the barrier layer by withdrawing the second carrier from the first carrier.

[0036] In an example, the temporary auxiliary layer is one of a polymer layer, a release tape, and an adhesive.

[0037] In an example, the method further comprises attaching the underside (i.e. the barrier layer or the component layer) of the flexible IC to a third carrier and removing the temporary auxiliary layer to detach the flexible IC from the second carrier.

[0038] In an example, detaching the barrier layer from the first carrier or detaching the component layer from the barrier layer includes: bonding an application item to the flexible IC; and withdrawing the application item from the first carrier to perform the detaching.

[0039] In an example, detaching the barrier layer from the first carrier includes laser ablation of the interface between the barrier layer and the first carrier.

[0040] In an example, detaching the barrier layer from the first carrier or detaching the component layer from the barrier layer is performed whilst the flexible IC is at least partially submerged in a fluid.

[0041] In an example, the method further comprises adhering a substrate layer to the detached surface of the flexible IC after detachment from the first carrier.

[0042] In an example, the substrate layer is formed from one or more of paper, recyclable polymer, and biodegradable polymer.

[0043] In an example, the component layer forms a plurality of flexible ICs, and the method further comprises singulating the plurality of flexible ICs.

[0044] In an example, the method further comprises forming one or more contact members on the first carrier prior to depositing the barrier layer.

[0045] In an example, the method further comprises forming one or more vias from the component layer through the barrier layer to electrically connect the component layer to one or more of the contact members.

[0046] In an example, the method further comprises forming one or more contact members on a topmost layer of the flexible IC.

[0047] In an example, the method further comprises: depositing a passivation layer on the component layer; forming one or more vias through the passivation layer to electrically connect to the component layer; and forming one or more contact members on the passivation layer and electrically connected to the vias through the passivation layer.

[0048] In accordance with a fourth aspect of the present disclosure, there is provided a flexible integrated circuit (IC), wherein the flexible IC does not include a polymer substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] The invention will now be described, purely by way of example, with reference to the accompanying drawings, in which: Figure 1 provides a flow diagram of a manufacturing process for a conventional flexible integrated circuit (IC); Figure 2 provides a schematic diagram of an architecture of a conventional flexible IC wafer; Figure 3 provides schematic diagram of an architecture of a conventional flexible IC; Figure 4 provides a flow diagram of a manufacturing process for a flexible IC wafer; Figure 5 provides a schematic diagram of a flexible IC wafer; Figure 6 provides a schematic diagram of a flexible IC; Figure 7 provides schematic diagram of an architecture of a flexible IC; Figure 8 provides a flow diagram of a manufacturing process for a flexible IC wafer; Figure 9 provides a schematic diagram of a flexible IC wafer; Figures 10a and 10b provide schematic diagrams of flexible ICs; Figure 11 provides schematic diagram of an architecture of a flexible IC; Figure 12 provides schematic diagram of an architecture of a flexible IC; Figure 13 provides a flow diagram of a process for transferring flexible ICs from a flexible IC wafer to an application product; Figure 14 provides a flow diagram of a process for transferring flexible ICs from a flexible IC wafer to an application product; Figure 15 provides a schematic diagram of an attachment technique of a flexible IC to an application product; Figure 16 provides a schematic diagram of a flexible IC wafer; Figure 17 provides a flow diagram of a process for transferring flexible ICs from a flexible IC wafer to an application product; Figure 18 provides a schematic diagram of an encapsulated flexible IC; Figure 19 provides a schematic diagram of a flexible IC wafer; Figure 20 provides a schematic diagram of a flexible IC wafer; and Figure 21 provides a schematic diagram of a flexible IC wafer. Detailed description

[0050] In the present disclosure, a flexible IC comprises a component layer, which includes the electronic circuitry / components of the flexible IC, such as insulating, conducting, active, passive and connecting components. A flexible IC may also comprise one or more material layers, such as a substrate, which may be used as mechanical support for the electronic components, protection of the flexible IC, or as part of the manufacturing process. The flexible ICs may be thin-film flexible ICs but may take any suitable form and are not restricted to being thin-film flexible ICs. A plurality of flexible ICs, where the electronic components of the plurality of flexible ICs have been formed from one or more common component layers, and, optionally, fabricated on the same substrate or other material layer, may be referred to as a flexible IC wafer. The plurality of flexible ICs of a flexible IC wafer may be singulated and separated, and picked and placed with respect to an application item, such as an external application circuit or any other external item, structure, or circuitry. The term integrated circuit (IC) refers to circuitry that has been fabricated as a single integrated entity as opposed to each component being discrete and fabricated separately prior to assembly of the circuitry.

[0051] Figure 1 provides a flow diagram of an example manufacturing process for a conventional flexible IC, where Figure 2 provides a schematic diagram of a conventional flexible IC wafer that may result from the manufacturing process of Figure 1.

[0052] Referring to Figures 1 and 2, the flexible IC wafer 210 is fabricated on a substantially rigid carrier 200, such as a glass, polycarbonate, quartz, or silicon carrier for example.

[0053] At step S102, a flexible polymer layer 202 (i.e. polymer substrate or polymer substrate layer) is deposited onto the carrier 200. Throughout this disclosure, the terminology of “deposited on", “deposited onto” covers the direct deposition onto a surface but also the indirect deposition, such that this terminology does not exclude the presence of one or more optional intermediate layers between the surface and the deposited material, such as a barrier layer / material for example.

[0054] Although a polymer layer is referred to, flexible polymer layer 202 is not restricted to being formed from polymers and may be formed from any other materials that provide suitable electrical, chemical, and / or structural properties. The flexible polymer layer (i.e. flexible substrate layer) 202 may be formed from the same material, different materials, or different types of a same material. The flexible polymer layer (i.e. flexible substrate layer) 202 may comprise materials selected from one or more of: flexible glass, polymer materials, metal oxide materials, resin materials, resist materials, foil materials, paper, insulator coated metals, or any other suitable material.

[0055] Polymer materials may comprise polymers selected from one or more of: polyethylene naphthalates, polyethylene terephthalates; polymethyl methacrylates; polycarbonates, polyvinyl alcohols, polyvinyl acetates, polyvinyl pyrrolidones, polyvinyl phenols, polyvinyl chlorides, polystyrenes, polyimides, polyamides (e.g. Nylon); poly(hydroxy ethers), polyurethanes, polycarbonates, polysulfones, parylenes, polyarylates, polyether ether ketones (PEEKs); acrylonitrile butadiene styrene (ABS), 1 Methoxy 2 propyl acetates, Benzocyclobutenes (BCB), polylactic acid (PLA), polyhydroxyalkanoates (PHAs), polybutylene succinate (PBS), polybutylene adipate terephthalate (PBAT), cellulose polymers, or any other suitable polymer material.

[0056] Metal oxide materials comprise metal oxides selected from one or more of: AI2O3, SiOxNy, SiO2, Si3N4, or any other suitable metal oxide. Resin materials comprise resins selected from one or more of: a UV-curable resin or any other suitable resin. Resist materials comprise resists selected from one or more of: nanoimprint resists, photoresists such as, for example, Bisphenol A novolac epoxy (SU-8) or polyhydroxybenzyl silsesquioxane, or any other suitable resist. Foil materials comprise foils selected from one or more of: polymeric foils or any other suitable foil. Insulator-coated metals comprise one or more of: insulator coated stainless-steel or any other suitable insulator-coated metal.

[0057] Optionally, a barrier layer (not shown) is deposited on flexible polymer layer 202. Although the use of a barrier layer may allow for improved formation of the component layer, the use of a barrier layer is not essential and the component layer 206 may be formed directly onto the flexible polymer layer 202. The barrier layer may be deposited using any of the aforementioned thin film processes, and may comprise one or more layers of dielectric materials. The one or more layers of dielectric material may be formed from the same or different materials. The one or more layers of dielectric material may be formed using the same or different thin film processes and / or the same or different processing conditions.

[0058] Dielectric materials may be selected from one or more of: metal oxides, metal phosphates, metal sulphates, metal sulphites, metal nitrides, metal oxynitrides, inorganic insulators, spin-on glass, polymeric dielectric materials, UV-curable resins, nanoimprint resists, photoresists or any other suitable dielectric material. Dielectric materials may be selected from one or more of: metal oxides such as AI2O3, ZrO2, HfO2, Y2O3, Si3N5, TiO2, Ta2O5 or any other suitable metal oxide; metal phosphates such as AI2POx or any other suitable metal phosphate; metal sulphates such as HfSOx or any other suitable metal sulphate, metal sulphites such as HfSOx or any other suitable metal sulphite; metal nitrides such as AIN, TiN, ZrN, TaN, HfN or any other suitable metal nitride; metal oxynitrides such as AIOxNy or any other suitable metal oxynitride; inorganic insulators such as SiO2, Si3N4, SiNx or any other suitable inorganic insulator; spin on glass such as polyhydroxybenzyl silsesquioxane or any other suitable spin on glass; polymeric dielectric materials such as amorphous fluoropolymers (Cytop®), Bisphenol A novolac epoxy (Sll-8), benzocyclobutenes (BCB), polyimides, polymethyl methacrylates, polybutyl methacrylates, polyethyl methacrylates, polyvinyl acetates, polyvinyl pyrrolidones, polyvinyl alcohols, polyvinyl phenols, polyvinyl chlorides, polystyrenes, polyethylenes, polycarbonates, parylenes, silicone, or any other suitable polymeric dielectric materials. The dielectric material may have a relatively low dielectric constant k (Iow-k) such as Cytop®, polyhydroxybenzyl silsesquioxane, parylenes) or a relatively high dielectric constant k (high-k) such as Ta2O5, HfO2, or any other insulating oxides, oxynitrides, silicates, etc. The barrier layer may be formed from one or more layers of metal such as, for example, titanium, steel, gold, or any other suitable metal

[0059] At step S104, the flexible IC’s remaining architecture, including the component layer 206, is formed on the polymer layer 202. The remaining architecture may be formed on the barrier layer if present. The component layer includes the electronic components of the flexible IC, including active, passive, conducting, insulating, and contact components. The component layer may comprise one or more layers that are sequentially formed using any of the aforementioned thin film deposition and patterning processes, or any other suitable fabrication processes, where each layer may include one or more of active, passive, conducting, insulating, and contact components. The component layer may also include a contact layer 208 that provides contacts for mechanically and / or electrically connecting the flexible ICs to external circuitry, such as, for example, an application item or any other external structure. The contact layer may be positioned at or towards the upper and / or lower surfaces of the component layer. The contacts may be connection pads or contact members. It will be appreciated that the number of contact members is variable, and, optionally, no contact members can be included in the flexible IC. Other surfaces of the flexible IC may also include one or more contact members, if desired. The contact members may be raised, recessed or substantially planar with the respective surface of the flexible IC.

[0060] The component layer 206 may include components of a plurality of flexible ICs such that the flexible polymer layer 202, the barrier layer (if present), and component layer 206 form a flexible IC wafer 210 that includes a plurality of flexible ICs. Lines 212 illustrate the division of the flexible IC wafer of Figure 2 into individual flexible ICs 214.

[0061] The component layer may comprise one or more layers of conductive materials. Conductive materials may be selected from one or more of: metals, metal alloys, transparent conductive oxides, metal nitrides, carbon materials, conducting polymers, semiconductor materials, or any other suitable conducting material. For example, conductive materials may be selected from one or more of: metals such as Au, Ti, Al, Mo, Pt, Pd, Ag, Cu, Ni, Cr, Ta, W or any other suitable metal; metal alloys such as MoNi, MoCr, AlSi or any other suitable metal alloys; transparent conductive oxides such as ITO, IZO, AZO, or any other suitable transparent conductive oxide; metal nitrides such as TiN or any other suitable metal nitride; carbon materials such as carbon black, carbon nanotubes, graphene or any other suitable carbon material; conducting polymers such as polyaniline, poly(3,4-ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS) or any other suitable conducting polymer.

[0062] Semiconductor materials may be selected from one or more of: compound semiconductors, metal oxides, metal oxynitrides, inorganic semiconductors, organic semiconductors, polymer semiconductors, 2D semiconductor materials, chalcogenides, perovskites, or any other semiconductor material. For example, semiconductor materials may be selected from one or more of: GaAs, GaN, InP, CdSe, InGaAs, InGaAsSb, ZnO, SnO2, NiO, SnO, Cu2O, ln2O3, LiZnO, ZnSnO, InSnO (ITO), InZnO (IZO), HflnZnO (HIZO), InGaZnO (IGZO) ZnxOyNz amorphous, microcrystalline or nanocrystalline Si, Copper(ll) phthalocyanine (CuPc), pentacene, Perylenetetracarboxylic dianhydride (PTCDA), methylene blue, Orange G, rubrene; PEDOT:PSS, poly(3-octylthiophene) (POT), poly(3-octylthiophene-2,5-diyl) (P3OT), poly(3-hexylthiophene) (P3HT), polyaniline, polycarbazole, grapheneMoS2, GeSbTeSrTiO3, CH3NH3PbCI3, H2NCHNH2PbCI3, CsSnl3, or any other suitable semiconductor material. These semiconductor materials may also be doped or contain a doping gradient and may be n-type or p-type. Further treatments may be applied to the component layers to modify their semiconductor properties such as, for example, thermal or laser annealing, or any other known processes.

[0063] At step S106, the polymer substrate layer 202 is detached from the carrier 200 such that the flexible IC wafer 210 is detached from the carrier 200. The detachment may be performed using one or more optional processes for assisting with the detachment of the polymer layer 202 from the carrier 200. For example, the interface between the polymer layer 202 and the carrier 200 may be laser ablated to assist with the release of the polymer layer 202 from the carrier 200.

[0064] At step S108, the flexible IC wafer may then be transferred to a second carrier different to carrier 200 (i.e. first carrier) from which the flexible ICs can be singulated and separated, and subsequently picked and placed.

[0065] At step S110, the plurality of flexible ICs 214 of the flexible IC wafer are singulated such that they are able to be separately pick and placed from the second carrier.

[0066] At step S112, the singulated flexible ICs (dies) 214 may be individually picked and placed onto an application item, such as external application circuitry (e.g. an antenna) or an external structure (e.g. a label or product).

[0067] Figure 3 shows a schematic of a conventional flexible IC 214 which may be formed using the method of claim 1.

[0068] As shown in Figure 3, flexible IC 214 comprises a first horizontal surface 20-1 and a second horizontal surface 20-2 opposing the first surface 20-1. The flexible IC (which may also be referred to as a flexible IC structure or IC structure) 214further includes flexible substrate layer (i.e. flexible polymer layer) 202, which comprises first surface 20-1 of the flexible IC 214 on its lowermost surface, contact members 21, and through substrate vias 25. The component layer 206 of flexible IC 214, including one or more layers 206-0, 206-2, 206-4, is provided over the topmost surface of flexible substrate layer 202. One or more layers 206-0, 206-2, 206-4 may comprise one or more layers of dielectric materials or component layers. Component layers comprise the electronic circuitry / components of IC 214 such as active, passive, conducting, connecting and insulating components. Component layers may comprise one or more conductive materials, for example the component layer may comprise one or more layers of conductive material. Component layers may comprise one or more metals, for example the component layer may comprise one or more metal layers. Component layers may be a layer of conductive material, for example, the component layer may be a metal layer. Conductive materials may be used to form connectors such as, for example, contact members 21,22, one or more vias 25, etc of and / or to form conductive elements of active and / or passive components of IC 214. The conductive elements may include, for example, capacitor plates, inductor windings or transistor electrodes, etc. One or more of layers 206-0, 206-2, 206-4 may comprise shielding metal layers. Shielding metal layers may serve, for example, to reduce any unwanted coupling between components

[0069] One or more contact members 21 (herein, contact members may also be termed contacts, contact elements, contact portions, contact regions etc., as appropriate) may be included in or on flexible IC 214, being provided on the first surface 20-1. Additionally, or alternatively, one or more contact members 22 may be included in or on flexible IC 214, being provided on the second surface 20-2.

[0070] One or more of contact members 21, 22 may be used for coupling IC 214 with one or more of: an external IC, an external circuit such as an application circuit, or any other external structure(s). For example, one or more of the contact members 21, 22 may be for electrically coupling or mechanically coupling IC 214 with an external item or circuit. It will be appreciated that the number of contact members on the first surface 20-1 and on the second surface 20-2 is variable. Optionally, flexible IC 214 may not include contact members on the first and / or second surfaces 20-1, 20-2. Alternatively, flexible IC 214 may not include any contact members. Other surfaces of the flexible IC 214, further to the first surface 20-1 and second surface 20-2, may include one or more contact members.

[0071] As shown in Figure 3, flexible IC 214 includes three layers: layers 206-0, 206-2, 206-4. It will be appreciated that this is merely for illustrative purposes, and that any number of layers may be included in flexible IC 214. One or more of layers 206-0, 206-2, 206-4 may comprise a dielectric material. For example, one or more of layers 206-0, 206-2, 206-4 may comprise a layer of dielectric material, or one or more of layers 206-0, 206-2, 206-4 may be a layer of dielectric material.

[0072] Flexible IC 214 may comprise contact members 21, 22 and one more vias 25 formed on the first surface 20-1 and / or second surface 20-2. Contacts 21,22 may be metal pads. In such an example of flexible IC 214, metal pads 21,22 may be formed by patterning metal pad areas directly onto the carrier (e.g. glass carrier), or onto an intervening release layer, before depositing one or more layers of thin-film over the metal pad area. One or more vias, such as a through substrate via (TSV) 25 may then be etched through the one or more layers of thin-film, for example, using oxygen plasma dry etch, after photo-resist patterning. The connections may be made with an upper metal layer that routes over positively sloped sidewalls around the etched vias to form connections, or by other methods suitable to fill the vias, such as for example, electro / electro-less plating techniques. In this method, the area of interface of the connection between the one or more vias 25 in the substrate 202 and the metal pad may extend over a limited area, such that the metal pad extends beyond the interface area.

[0073] The contacts 21, 22 may be metal pad areas defined by the width of the via at the first surface 20-1 and / or second surface 20-2. In such an example of flexible IC 214, the one more vias are formed by depositing a polymer film on a carrier (e.g. glass carrier), and subsequently etching one or more vias 25 through the polymer film, in this particular case, with positive sidewalls. A metal is then deposited over at least an area of the surface of the polymer film that includes the via, allowing for no or reduced breakages at the edges of via 25 and through the via such that the metal makes contact the carrier. Alternatively, through-film vias 25 of flexible IC 214 may be formed using mechanical processes.

[0074] In the conventional flexible IC manufacturing process and resulting flexible IC architecture described with reference to Figures 1 to 3, the polymer layer 202 (i.e. polymer substrate or polymer substrate layer) has a number of architectural and processing uses. For example, the polymer layer provides robust structural support for the flexible ICs, which facilitates handling of, and provides protection for, the flexible ICs from mechanical, electrical and chemical damage, both during assembly and in use.

[0075] However, a number of disadvantages may result from the use, presence, and / or extent of a polymer substrate in a flexible IC, examples of which are set out below. • The polymer substrate is typically the thickest layer of a flexible IC (e.g. 10x thicker than the component layer(s)), and thus makes up the largest contribution to the mass and volume of the flexible IC. The polymer substrate also makes up the largest fraction of the equivalent CO2 (eCO2) emissions during the manufacture of flexible ICs. • Many polymers that form the polymer substrate in conventional flexible ICs are not biodegradable, biocompatible, and / or readily recyclable. • Typical processes or techniques used to form or manufacture the polymer substrate of a flexible IC can be wasteful and costly. • Some of the polymers that form the polymer substrate in conventional flexible ICs are not translucent, and therefore provide little or no protection against light induced photoconduction. • The closer the electronic circuitry / components of the flexible IC are to the neutral axis of the flexible IC as a whole, the less vulnerable they are to stress / strain-induced damage during bending. Since the thickest layer of conventional flexible ICs is the substrate layer, the electronic circuitry / components are distant from the neutral axis of the flexible IC and are thus more vulnerable to damage during bending. • Due to the thickness of the polymer substrate below the component layer in conventional flexible ICs, the scope for connecting and attaching flexible ICs to external circuits and items via the underside of the flexible IC is limited. Thus the versatility and efficiency of flexible IC technology cannot be fully exploited in conventional flexible ICs and their manufacturing routes.

[0076] In accordance with the present disclosure, new flexible IC architectures and methods for their manufacture, assembly and use that at least partially address one or more of the aforementioned disadvantages are provided. In particular, substrateless or reduced-substrate (i.e. thin-substrate) flexible IC architectures and methods for their manufacture are proposed, as well as approaches for assembly and use that are enabled by such flexible ICs and their methods of manufacture. As is explained in more detail below, the advantages of substrateless or reduced-substrate flexible ICs may be achieved with little or no adaptation of the component layer of existing flexible IC architectures or their fabrication processes, thus enabling existing layout designs and fabrication techniques to be easily used in the proposed methods and architectures.

[0077] Flexible ICs wafers and flexible ICs in accordance with present disclosure may be formed using known thin-film and lithographic processes. For example, materials may be deposited in layers using thin-film processes such as, for example: physical vapour deposition (e.g. sputter) chemical vapour deposition (e.g. plasma-enhanced chemical vapour deposition (PECVD)), vacuum deposition (e.g. thermal or electron-beam evaporation); coating (e.g. spin, dip, blade, bar, spray, or slot-die), printing (e.g. jet, gravure, offset, screen, or flexographic), pulsed-laser deposition (PLD), atomic layer deposition (ALD) and / or any other known processes. Patterning of deposited materials may be performed using lithographic processes such as, for example: photolithography, electron-beam lithography, X-ray lithography, or ion-beam lithography; printing and / or other known processes. Patterning may be combined with one or more of: wet etching, dry etching (e.g. plasma etching), ablation, milling, lift-off patterning, and any other known processes. Reduced Thickness Polymer Substrate

[0078] In accordance with the present disclosure, there is provided a flexible IC wafer and flexible ICs comprising a reduced thickness polymer substrate (“reduced-substrate flexible IC / lC wafer”), and a method for the manufacturing the same.

[0079] A reduced thickness polymer substrate may have a thickness of below 20pm, such as below 15pm, or below 10pm. In particular, the reduced thickness substrate may have a thickness of between 5pm and above a minimum required or practical thickness. For example, a reduced thickness polymer substrate may have a thickness of between 5pm and 0.01pm, such as, for example, between 5pm and 0.015pm, between 4.5pm and 0.02pm, between 4pm and 0.025pm, between 3.5pm and 0.03pm, between 3pm and 0.035pm, or between 2pm and 0.0.04pm. The reduced thickness substrate may have a thickness of between 0.1pm and 0.01pm such as, for example, between 0.95pm and 0.015pm, between 0.9pm and 0.02pm, between 0.85pm and 0.025pm, between 0.8pm and 0.03pm, between 0.75pm and 0.035pm, between 0.7pm and 0.04pm, between 0.65pm and 0.0045pm, or between 0.6pm and 0.05pm. The reduced thickness substrate may have a thickness of between 0.05pm and 0.001pm such as, for example, between 0.045pm and 0.0015pm, between 0.04pm and 0.002pm, between 0.035pm and 0.0025pm, between 0.03pm and 0.003pm, between 0.025pm and 0.0035pm, between 0.02pm and 0.004pm, between 0.015pm and 0.0045pm, or between 0.01pm and 0.005pm.

[0080] In a first example, the conventional polymer substrate 202 of Figure 2 may be composed of two separable / detachable (e.g. peelable) polymer layers. The polymer layer proximal to the component layer may be detached from the other polymer layer to separate the flexible IC or flexible IC wafer from the carrier, such that the resulting flexible IC wafer and flexible ICs comprise a reduced thickness polymer substrate.

[0081] In an example of the present disclosure, a method for manufacturing a flexible integrated circuit (IC) comprises depositing (S402) a first polymer layer (502) on a first carrier (500); depositing (S404) a second polymer layer (504) on the first polymer layer (502); forming (S408) a component layer (508) on the second polymer layer (504); and detaching (S410) the second polymer layer (504) from the first polymer layer (502) to separate the flexible IC from the first carrier (500).

[0082] In some examples, the method further comprises depositing (S406) a barrier layer (506) on the second polymer layer (504) and forming (S408) the component layer (508) on the barrier layer (506).

[0083] In some examples, the second polymer layer and the component layer form a plurality of flexible ICs, and the method further comprises singulating the plurality of flexible ICs.

[0084] Figure 4 provides a flow diagram for the manufacture of a flexible IC wafer according to the first example, and Figure 5 provides a schematic diagram of a flexible IC wafer, which may result from the manufacturing process of Figure 4. Figures 6 and 7 provide a schematic diagram of an individual flexible IC of the manufactured flexible IC wafer of Figure 5.

[0085] At step S402, a first polymer layer 502 is deposited on the carrier 500. The carrier may be of a similar form and material to a conventional flexible IC carrier. The carrier 500 may be a rigid carrier. The carrier 500 may be formed from glass, polycarbonate, quartz, silicon or any other suitable material. The first polymer layer 502 may be deposited using thin-film processes set out above, for example: physical vapour deposition (e.g. sputter) chemical vapour deposition (e.g. plasma-enhanced chemical vapour deposition (PECVD)), vacuum deposition (e.g. thermal or electron-beam evaporation); coating (e.g. spin, dip, blade, bar, spray, or slot-die), printing (e.g. jet, gravure, offset, screen, or flexographic), pulsed-laser deposition (PLD), atomic layer deposition (ALD) and / or any other known processes. Suitable materials and / or methods may be used to control the adhesion properties between the first polymer layer 502 and the carrier 500. For example, the first polymer layer 502 may be deposited in a manner such that it is permanently attached to the carrier 500, so that a separate deposition step is not required for each flexible IC wafer manufacturing instance.

[0086] At step S404, a second polymer layer 504 is deposited on the first polymer layer 502. The second polymer layer 504 may be deposited using any of the aforementioned thin film processes. As described in more detail below, in some examples an intermediate layer (such as an adhesive layer) may be deposited between the first and second polymer layers in order to control the material interactions (e.g. adhesion properties) between the first and second polymer layers. With or without the use of an intermediate layer, in an example the an adhesion strength of the first polymer layer to the carrier is greater than an adhesion strength of the second polymer layer to the first polymer layer.

[0087] The first polymer layer may be partially, substantially, or fully cured, prior to the deposition of the second polymer layer in order to control adhesion properties, or any other properties or interactions, between the first and second polymer layers 502, 504. Intermolecular forces or material intermixing between the deposited first and second polymer layers 502, 504 may be weaker than those within each layer, so that the first and second polymer layers 502, 504 may be separated without damage or without functional damage to one or more of the second polymer layer, a barrier layer 506 (if present) and the component layers 508 formed on the second polymer layer 504.

[0088] Although polymer layers are referred to, the layers 502 and 504 are not restricted to being formed from polymers and may be formed from any other materials that provide suitable electrical, chemical, and / or structural properties. The first and second polymer layers 502, 504 may be formed from the same material, different materials, or different types of a same material. The first and second polymer layers 502, 504 may comprise materials selected from one or more of: flexible glass, polymer materials, metal oxide materials, resin materials, resist materials, foil materials, paper, insulator coated metals, or any other suitable material, such as those described below.

[0089] Polymer materials may comprise polymers selected from one or more of: polyethylene naphthalates, polyethylene terephthalates; polymethyl methacrylates; polycarbonates, polyvinyl alcohols, polyvinyl acetates, polyvinyl pyrrolidones, polyvinyl phenols, polyvinyl chlorides, polystyrenes, polyimides, polyamides (e.g. Nylon); poly(hydroxy ethers), polyurethanes, polycarbonates, polysulfones, parylenes, polyarylates, polyether ether ketones (PEEKs); acrylonitrile butadiene styrene (ABS), Bisphenol A novolac epoxy (Su-8), Benzocyclobutenes (BCB), polylactic acid (PLA), polyhydroxyalkanoates (PHAs), polybutylene succinate (PBS), polybutylene adipate terephthalate (PBAT), cellulose polymers, or any other suitable polymer material.

[0090] Metal oxide materials comprise metal oxides selected from one or more of: AI2O3, SiOxNy, SiO2, S13N4, or any other suitable metal oxide. Resin materials comprise resins selected from one or more of: a UV-curable resin or any other suitable resin. Resist materials comprise resists selected from one or more of: nanoimprint resists, photoresists such as, for example, Bisphenol A novolac epoxy (SU-8) or polyhydroxybenzyl silsesquioxane, or any other suitable resist. Foil materials comprise foils selected from one or more of: polymeric foils or any other suitable foil. Insulator-coated metals comprise one or more of: insulator coated stainless-steel or any other suitable insulator-coated metal.

[0091] At step S406, a barrier layer 506 is deposited on the second polymer layer 504. Although the use of a barrier layer may allow for improved formation of the component layer, the use of a barrier layer is not essential and the component layer may be formed directly onto the second polymer layer 504. The barrier layer 506 may be deposited using any of the aforementioned thin film processes, and may comprise one or more layers of dielectric materials. The one or more layers of dielectric material may be formed from the same or different materials. The one or more layers of dielectric material may be formed using the same or different thin film processes and / or the same or different processing conditions. The barrier layer 506 may have any of the thicknesses described later.

[0092] Dielectric materials may be selected from one or more of: metal oxides, metal phosphates, metal sulphates, metal sulphites, metal nitrides, metal oxynitrides, inorganic insulators, spin-on glass, polymeric dielectric materials, UV-curable resins, nanoimprint resists, photoresists or any other suitable dielectric material. Dielectric materials may be selected from one or more of: metal oxides such as AI2O3, ZrO2, HfO2, Y2O3, S13N5, TiO2, Ta2Os or any other suitable metal oxide; metal phosphates such as AhPOx or any other suitable metal phosphate; metal sulphates such as HfSOx or any other suitable metal sulphate, metal sulphites such as HfSOx or any other suitable metal sulphite; metal nitrides such as AIN, TiN, ZrN, TaN, HfN or any other suitable metal nitride; metal oxynitrides such as AIOxNy or any other suitable metal oxynitride; inorganic insulators such as SiO2, Si3N4, SiNx or any other suitable inorganic insulator; spin on glass such as polyhydroxybenzyl silsesquioxane or any other suitable spin on glass; polymeric dielectric materials such as amorphous fluoropolymers (Cytop®), 1-Methoxy-2-propyl acetate, Bisphenol A novolac epoxy (SU-8), benzocyclobutenes (BCB), polyimides, polymethyl methacrylates, polybutyl methacrylates, polyethyl methacrylates, polyvinyl acetates, polyvinyl pyrrolidones, polyvinyl alcohols, polyvinyl phenols, polyvinyl chlorides, polystyrenes, polyethylenes, polycarbonates, parylenes, silicone, or any other suitable polymeric dielectric materials. The dielectric material may have a relatively low dielectric constant k (Iow-k) such as Cytop®, polyhydroxybenzyl silsesquioxane, parylenes) or a relatively high dielectric constant k (high- k) such as Ta2O5, HfO2, or any other insulating oxides, oxynitrides, silicates, etc. The barrier layer may be formed from one or more layers of metal such as, for example, titanium, steel, gold, or any other suitable metal.

[0093] At step S408, a component layer 508 is formed on the barrier layer 506 (or second polymer layer 504 if a barrier layer is not present), where the component layer includes the electronic components of the flexible IC, including active, passive, conducting, insulating, and contact components. The component layer may comprise one or more layers including conductive, semiconductive or insulating layers that are sequentially formed using any of the aforementioned thin film deposition and patterning processes, or any other suitable fabrication processes, where each layer may include one or more of or component parts of active, passive, conducting, insulating, and contact components. The component layer may also include a contact layer 510 that provides contacts for mechanically and / or electrically connecting the flexible ICs to external circuitry, such as, for example, an application item or any other external structure. The contact layer may be positioned at or towards the upper and / or lower surfaces of the component layer. The contacts may be connection pads or contact members. It will be appreciated that the number of contact members is variable, and, optionally, no contact members can be included in the flexible IC. Other surfaces of the flexible IC may also include one or more contact members, if desired. The contact members may be raised, recessed or substantially planar with the respective surface of the flexible IC.

[0094] The component layer 508 may include components of a plurality of flexible ICs such that the second polymer layer 504, the barrier layer 506 (if present), and component layer 508 form a flexible IC wafer that includes a plurality of flexible ICs. Lines 512 illustrate the division of the flexible IC wafer of Figure 5 into individual flexible ICs.

[0095] The component layer may comprise one or more layers of conductive materials. Conductive materials may be selected from one or more of: metals, metal alloys, transparent conductive oxides, metal nitrides, carbon materials, conducting polymers, semiconductor materials, or any other suitable conducting material. For example, conductive materials may be selected from one or more of: metals such as Au, Ti, Al, Mo, Pt, Pd, Ag, Cu, Ni, Cr, Ta, W or any other suitable metal; metal alloys such as MoNi, MoCr, AISI or any other suitable metal alloys; transparent conductive oxides such as ITO, IZO, AZO, or any other suitable transparent conductive oxide; metal nitrides such as TiN or any other suitable metal nitride; carbon materials such as carbon black, carbon nanotubes, graphene or any other suitable carbon material; conducting polymers such as polyaniline, poly(3,4-ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS) or any other suitable conducting polymer.

[0096] Semiconductor materials may be selected from one or more of: compound semiconductors, metal oxides, metal oxynitrides, inorganic semiconductors, organic semiconductors, polymer semiconductors, 2D semiconductor materials, chalcogenides, perovskites, or any other semiconductor material. For example, semiconductor materials may be selected from one or more of: GaAs, GaN, InP, CdSe, InGaAs, InGaAsSb, ZnO, SnO2, NiO, SnO, Cu2O, ln2O3, LiZnO, ZnSnO, InSnO (ITO), InZnO (IZO), HflnZnO (HIZO), InGaZnO (IGZO) ZnxOyNz amorphous, microcrystalline or nanocrystalline Si, Copper(ll) phthalocyanine (CuPc), pentacene, Perylenetetracarboxylic dianhydride (PTCDA), methylene blue, Orange G, rubrene; PEDOT:PSS, poly(3-octylthiophene) (POT), poly(3-octylthiophene-2,5-diyl) (P3OT), poly(3-hexylthiophene) (P3HT), polyaniline, polycarbazole, grapheneMoS2, GeSbTeSrTiOa, CHsNHsPbCh, H2NCHNH2PbCl3, CsSnfy or any other suitable semiconductor material. These semiconductor materials may also be doped or contain a doping gradient and may be n-type or p-type. Further treatments may be applied to the component layers to modify their semiconductor properties such as, for example, thermal or laser annealing, or any other known processes.

[0097] At step S410, the second polymer layer 504 is separated / detached from the first polymer layer 502. The separation of the second polymer layer 504 from the first polymer layer 502 and the picking and placement of the formed flexible ICs may take a variety of forms, a number of examples of which are described in more detailed below. In some examples, the separation may include laser ablation of an interface between the first polymer layer and the second polymer layer. Furthermore, any of the detachment processes described herein may also be performed whilst the wafer and / or carrier is at least partially submerged in a fluid.

[0098] Figures 6 and 7 provides a schematic diagram of an individual flexible IC 50 that is formed on the wafer of flexible ICs shown in Figure 5 via the process of Figure 4, but where the flexible IC has been removed from the carrier 500 and the first polymer layer 502. The flexible IC comprises the component layer 508, which may include an upper contact layer 510 or contacts 52; however, as described in more detail below, flexible ICs formed via the method of Figure 4 are not limited to have contacts on the upper surface of the flexible IC. The component layer is formed on the barrier layer 506 (if present), which in turn is formed on the second polymer layer 504.

[0099] The first and second polymer layers 502, 504 may be formed from the same material, different materials, or different types of a same material. The use of different materials or different types of a same material allows for increased control over the adhesion properties between the separable polymer layers and the manner of their separation.

[00100] For example, the first and second polymer layers 502, 504 may be formed from two different polyimides, where the polyimide of the first polymer layer 502 may have a higher co-efficient of thermal expansion (CTE) than that of the second polymer layer 504, or where the polyimide of the first polymer layer 502 may have a lower CTE than that of the second polymer layer 504. In this way, separation of the second polymer layer 504 from the first polymer layer 502 may be facilitated by using a thermal process, for example, by heating the underside of the carrier 500.

[00101] The first polymer layer 502 may be a UV transparent material and the second polymer layer 504 may be a UV absorptive material. In this way, separation of the polymer substrate layers may be facilitated by irradiating the underside of the rigid carrier 500 with a source of UV light (e.g. UV laser or UV lamp). However, a range of different optical absorption characteristics between the first and second polymer layers may be used to facilitate separation of the first and second polymer layers.

[00102] The first and second polymer layers 502, 504 may be formed from two materials that have different solubility properties. In this way, separation of the second polymer layer 504 from the first polymer layer 502 may be facilitated by exposing both layers to a solvent in which the first polymer layer 502 is soluble and the second polymer layer is not. By exposing both layers to such a solvent, the first polymer layer will dissolve, thus allowing the second polymer layer, and remaining architecture of the flexible IC wafer or flexible IC, to be separated from the carrier 500. For example, the first polymer layer 502 may be formed from a material that is soluble in halogenated solvents such as, for example, fluorinated solvents, whereas the second polymer layer may be formed of a material that is insoluble in halogenated solvents.

[00103] Although the first and second polymer layers 502, 504 have been referred to, this first example is not limited to the use of only two polymer layers, and two or more polymer layers may be used. For example, a third layer, formed from any of the aforementioned materials in relation to the first and second polymer, may be provided between the first and second polymer layers 502, 504 in order to provide particular adhesion and separation characteristics, where the third layer may be configured to separate from the first polymer layer 502 or the second polymer layer 504. Additionally or alternatively, an adhesive layer may be provided between the first and second polymer layers 502, 504. Additionally or alternatively, the first and second polymer layers 502, 504 may each be formed from one or more layers.

[00104] The first polymer layer 502 may be reused after the second polymer layer 504 has detached from the first polymer layer. For example, the first polymer layer 502 may be cleaned and, optionally, surface-treated and / or planarized so that it may act as a first polymer layer in a subsequent flexible IC wafer manufacturing process. Reusing the first polymer layer in this manner may reduce the quantity of polymer used in the manufacture of flexible ICs compared to conventional approaches (e.g. that of Figures 1 and 2), as well as reducing the environmental impact of flexible IC manufacture. Since the first polymer layer 502 is not included in the flexible IC wafer, the first polymer layer may alternatively be considered to form part of the carrier 500 upon which the flexible IC wafer is formed.

[00105] The second polymer layer 504 may have a thickness of below 20pm, such as below 15pm, or below 10pm. In particular, the second polymer layer 504 may have a thickness of between 5pm and above a minimum required or practical thickness. For example, the second polymer layer 504 may have a thickness of between 5pm and 0.01 pm, such as, for example, between 5pm and 0.015pm, between 4.5pm and 0.02pm, between 4pm and 0.025pm, between 3.5pm and 0.03pm, between 3pm and 0.035pm, or between 2pm and 0.0.04pm. The second polymer layer 504 may have a thickness of between 0.1pm and 0.01pm such as, for example, between 0.95pm and 0.015pm, between 0.9pm and 0.02pm, between 0.85pm and 0.025pm, between 0.8pm and 0.03pm, between 0.75pm and 0.035pm, between 0.7pm and 0.04pm, between 0.65pm and 0.045pm, or between 0.6pm and 0.05pm. The second polymer layer 504 may have a thickness of between 0.05pm and 0.001 pm such as, for example, between 0.045pm and 0.0015pm, between 0.04pm and 0.002pm, between 0.035pm and 0.0025pm, between 0.03pm and 0.003pm, between 0.025pm and 0.0035pm, between 0.02pm and 0.004pm, between 0.015pm and 0.0045pm, or between 0.01pm and 0.005pm.

[00106] Figure 7 shows a schematic of a reduced-substrate flexible IC 50. As shown in Figure 7, flexible IC 50 comprises a first horizontal surface 50-1 and a second horizontal surface 50-2 opposing the first surface 50-1. Flexible IC structure 50 further includes a barrier layer 506 and a reduced-thickness substrate 504 (i.e. second polymer layer of Figures 5 and 6), which comprises first surface 50-1 of flexible IC 50 on its lowermost surface, contact members 51. Through substrate vias 55 span across barrier layer 506 and reduced thickness substrate layer 504. Although the flexible IC 50 of Figure 7 is shown to comprise barrier layer 506, barrier layers are optional and may be omitted. The remaining architecture or component layer 508 of flexible IC 50, including one or more layers 508-0, 508-2, 508-4, is provided over the topmost surface of substrate 504. One or more layers 508-0, 508-2, 508-4 may comprise one or more layers of dielectric materials, or component layers. Topmost layer 508-0 of substrate architecture or component layer 508 comprises second surface 508-2 of flexible IC 50 on it topmost surface, which comprises contact members 52. One or more contact members 51 (herein, contact members may also be termed contacts, contact elements, contact portions, contact regions etc., as appropriate) may be included in or on flexible IC 50, being provided on the first surface 50-1. Additionally or alternatively, one or more contact members 52 may be included in or on flexible IC 50, being provided on the second surface 50-2.

[00107] In an example, the method described with reference to Figure 4 may further comprise forming one or more contact members on the first polymer layer prior to depositing the second polymer layer.

[00108] In another example, the method may further comprise forming one or more vias (55) from the component layer (508) through the second polymer layer (504) to electrically connect the component layer (508) to one or more of the contact members

[00109] In another example, the method may further comprise forming one or more contact members (52) on a topmost layer of the flexible IC.

[00110] One or more of contact members 51, 52 may be used for coupling flexible IC 50 with one or more of: an external IC, an external circuit such as an application circuit, or any other external structure(s). For example, one or more of the contact members 51, 52 may be for electrically coupling or mechanically coupling flexible IC 50 with an external or circuit. It will be appreciated that the number of contact members on the first surface 50-1 and on the second surface 50-2 is variable. Optionally, flexible IC 50 may not include contact members on the first and / or second surfaces 50-1, 50-2. Alternatively, flexible IC 50 may not include any contact members. Other surfaces of the IC 50, further to the first surface 50-1 and second surface 50-2, may include one or more contact members.

[00111] Conventional flexible ICs are approximately 20-30pm thick, with the polymer substrate accounting for approximately 90% of the overall thickness of a flexible IC. Substantially reducing the thickness of the polymer substrate results in flexible ICs having an overall thickness of less than 10pm, such as 3-9pm. Flexible ICs with a reduced-thickness polymer substrate may therefore be below the 5-10 pm threshold of human indentation stimuli and may therefore be imperceptible to human touch. Such thin flexible ICs could also be disposed within an adhesive layer of a product, structure, object, or anything else, rendering them substantially undetectable. The thinness of the polymer layer may also increase the transparency of a flexible IC and / or reduce any colouration compared to conventional flexible ICs.

[00112] Thinner flexible ICs may be more robust to stress-induced damage during bending, since there is a smaller difference in the radii of curvature between the layers. Considerations of a neutral axis may therefore become less relevant in the design and placement of flexible ICs.

[00113] Flexible ICs comprising a reduced thickness polymer substrate may have broad utility in applications where failure or damage of the flexible IC is required. For example, such flexible ICs may be placed across a designed failure feature, such as, for example, a seal on product packaging or a weak point in a structure. Damage to the flexible IC or the eventual inoperability of the flexible IC may then be used to indicate prior use or interference in applications where product integrity is desirable or required such as, for example, in tamper detection.

[00114] The manufacture of flexible ICs comprising a reduced thickness polymer substrate may be less material intensive, and thus reduce the environmental impact of flexible IC manufacture, since the amount of polymer required for substrate formation will be reduced, particularly if the first polymer layer may be reused.

[00115] Flexible ICs comprising a reduced thickness polymer substrate may provide for increased scope for the formation of contacts through the substrate layer due to the reduced thickness of the polymer substrate layer. This may result in more versatile flexible ICs having broader application than conventional flexible ICs. Substrateless

[00116] In accordance with the present disclosure, there is provided a substrateless flexible IC wafer and flexible ICs where the polymer substrate of conventional flexible ICs is completely omitted, and a method for the manufacturing the same.

[00117] In a second example, the polymer substrate of conventional flexible ICs is completely omitted, with a barrier layer being used to form a base layer upon which a flexible IC is formed, such that a substrateless flexible IC wafer and flexible IC is formed.

[00118] In an example, a method for manufacturing a flexible integrated circuit (IC) comprises depositing a barrier layer on a first carrier; forming a component layer on the barrier layer; and detaching the barrier layer from the first carrier or detaching the component layer from the barrier layer to separate the flexible IC from the first carrier.

[00119] In an example, the method may further comprise depositing an adhesive layer or a polymer layer on the carrier prior to deposition of the barrier layer.

[00120] Figure 8 provides a flow diagram for the manufacture of a flexible IC wafer according to the second example, and Figure 9 provides a schematic diagram of a substrateless flexible IC wafer, which may result from the manufacturing process of Figure 8. Figures 10a, 10b, 11 and 12 provide schematic diagrams of an individual flexible IC of the manufactured flexible IC wafer illustrated in Figure 9.

[00121] At step S702, a barrier layer 802 is deposited on the carrier 800. The carrier 800 may be of a similar form and material to a conventional flexible IC carrier. The carrier 800 may be a rigid carrier. The carrier 800 may be formed from glass, polycarbonate, quartz, silicon or any other suitable material. The barrier layer may be deposited using one or more of the aforementioned thin film processes and may comprise one or more layers of dielectric materials. The one or more layers of dielectric material may be formed from the same or different materials. The one or more layers of dielectric material may be formed using the same or different thin film processes and / or the same or different processing conditions. The barrier layer may provide control over the transport of chemical elements in and out of the component layer of the flexible ICs. Chemical elements may include, for example, one or more of: metals, hydrogen oxygen, or any other chemical element.

[00122] Dielectric materials may be selected from one or more of: metal oxides, metal phosphates, metal sulphates, metal sulphites, metal nitrides, metal oxynitrides, inorganic insulators, spin-on glass, polymeric dielectric materials, UV-curable resins, nanoimprint resists, photoresists or any other suitable dielectric material. Dielectric materials may be selected from one or more of: metal oxides such as AI2O3, ZrO2, HfO2, Y2O3, SiaNs, TiO2, Ta2Os or any other suitable metal oxide; metal phosphates such as AI2POX or any other suitable metal phosphate; metal sulphates such as HfSOx or any other suitable metal sulphate, metal sulphites such as HfSOxor any other suitable metal sulphite; metal nitrides such as AIN, TiN, ZrN, TaN, HfN or any other suitable metal nitride; metal oxynitrides such as AIOxNy or any other suitable metal oxynitride; inorganic insulators such as SiO2, Si3N4, SiNx or any other suitable inorganic insulator; spin on glass such as polyhydroxybenzyl silsesquioxane or any other suitable spin on glass; polymeric dielectric materials such as amorphous fluoropolymers (Cytop®), 1-Methoxy-2-propyl acetate (SU-8), benzocyclobutenes (BCB), polyimides, polymethyl methacrylates, polybutyl methacrylates, polyethyl methacrylates, polyvinyl acetates, polyvinyl pyrrolidones, polyvinyl alcohols, polyvinyl phenols, polyvinyl chlorides, polystyrenes, polyethylenes, polycarbonates, parylenes, silicone, or any other suitable polymeric dielectric materials. The dielectric material may have a relatively low dielectric constant k (Iow-k) such as Cytop®, polyhydroxybenzyl silsesquioxane, parylenes) or a relatively high dielectric constant k (high-k) such as Ta2Os, HfO2, or any other insulating oxides, oxynitrides, silicates, etc. The barrier layer may be formed from one or more layers of metal such as, for example, titanium, steel, gold, or any other suitable metal. The barrier layer may provide control over the transport of chemical elements in and out of the component layer of the flexible ICs. Chemical elements may include, for example, one or more of: metals, hydrogen oxygen, or any other chemical element.

[00123] The barrier layer 802 may be deposited directly onto the rigid carrier 800. Alternatively, a release layer may be provided on the rigid carrier 800 prior to the deposition of the barrier layer 802. Depositing the barrier layer 802 onto a release layer may facilitate improved control of the balance between robust attachment during manufacture, and facile detachment of the completed flexible IC wafer after manufacture. A release layer may be, for example, one or more of an adhesion layer or a polymer layer, such as any of the polymers set out above for the polymer substrates. The release layer may also be formed from thin-film materials comprising one more metals selected from: Hafnium (Hf), Vanadium (V), Niobium (Nb), Tantalum (Ta), Chromium (Cr), Molybdenum (Mo), Titanium (Ti), or Tungsten (W), oxides thereof, and alloys thereof. The release layer may be formed from thin-film compounds, such as benzocyclobutene , AZO compounds or any other suitable compound may be used to form a release layer. A polymer layer on the rigid carrier may provide a ‘bed’ arranged to receive the barrier layer. The strength of adhesion between the barrier layer 802 and the release layer may be weaker than the strength of adhesion between the release layer and the rigid carrier 802. This facilitates separation of the barrier layer 802 from the carrier 800. Alternatively, the strength of adhesion between the barrier layer 802 and the component layer 804 may be weaker than the strength of adhesion between the barrier layer 802 and the release layer. This facilitates separation of the component layer 804 from the barrier layer 802. The strength of adhesion between the release layer and the barrier layer (if present) may also be altered in order to facilitate separation by exposing the release layer to particular conditions. Such release layer materials may be termed switchable materials. For example, the release material may be activated (i.e. its adhesion altered) by thermal, light, electrical, shock effects, such as using azo compounds. With respect to light-based release, metals or other materials that absorb light of a suitable wavelength and convert the light to heat may be suitable, with example metals including titanium, tungsten, aluminium, copper, gold, silver, iron, tin, zinc, cobalt, chromium, germanium, palladium, platinum, rhodium, manganese, nickel, silicon, tellurium, and also oxides, alloys and compounds thereof. Mixtures comprising 50% or more by weight of these metals may also be suitable. The release layer may for example have a thickness of 5nm to 300nm but is not limited to this range. It some examples, the coefficient of thermal expansion of the release layer is chosen to be similar to that of the carrier in order to reduce delamination during heating from light absorption.

[00124] At step S704, a component layer 804 is formed on the barrier layer 802, where the component layer includes the electronic components of the flexible ICs, including active, conducting, insulating, and contact components. The component layer may include one or more layers The component layer may comprise one or more layers including conductive, semi conductive or insulating layers that are sequentially formed using any of the aforementioned thin film deposition and patterning processes or any other suitable fabrication process, where each layer may include elements of one or more active, conducting, insulating, and contact components. The component layer may also include a contact layer 806 that provides contacts for electrically and / or mechanically connecting the flexible ICs to external circuitry, such as, for example, an application item or any other external structure. The contact layer may be positioned at or towards the upper or lower surfaces of the component layer. The contacts may be connection pads or contact members. It will be appreciated that the number of contact members is variable, and, optionally, no contact members can be included in the flexible IC. Other surfaces of the flexible IC may also include one or more contact members, if desired. The contact members may be raised, recessed or substantially planar with the respective surface of the flexible IC.

[00125] The component layer 804 may include components of a plurality of flexible ICs such that the barrier layer 802 and component layer 804 forms a flexible IC wafer that includes a plurality of flexible ICs. Lines 808 illustrate the division of the flexible IC wafer of Figure 9 into individual flexible ICs.

[00126] The component layer may comprise one or more layers of conductive materials. Conductive materials may be selected from one or more of: metals, metal alloys, transparent conductive oxides, metal nitrides, carbon materials, conducting polymers, semiconductor materials, or any other suitable conducting material. For example, conductive materials may be selected from one or more of: metals such as Au, Ti, Al, Mo, Pt, Pd, Ag, Cu, Ni, Cr, Ta, W or any other suitable metal; metal alloys such as MoNi, MoCr, AlSi or any other suitable metal alloys; transparent conductive oxides such as ITO, IZO, AZO, or any other suitable transparent conductive oxide; metal nitrides such as TiN or any other suitable metal nitride; carbon materials such as carbon black, carbon nanotubes, graphene or any other suitable carbon material; conducting polymers such as polyaniline, poly(3,4-ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS) or any other suitable conducting polymer.

[00127] Semiconductor materials may be selected from one or more of: compound semiconductors, metal oxides, metal oxynitrides, inorganic semiconductors, organic semiconductors, polymer semiconductors, 2D semiconductor materials, chalcogenides, perovskites, or any other semiconductor material. For example, semiconductor materials may be selected from one or more of: GaAs, GaN, InP, CdSe, InGaAs, InGaAsSb, ZnO, SnO2, NiO, SnO, Cu2O, ln2O3, LiZnO, ZnSnO, InSnO (ITO), InZnO (IZO), HflnZnO (HIZO), InGaZnO (IGZO) ZnxOyNz amorphous, microcrystalline or nanocrystalline Si, Copper(ll) phthalocyanine (CuPc), pentacene, Perylenetetracarboxylic dianhydride (PTCDA), methylene blue, Orange G, rubrene; PEDOT:PSS, poly(3-octylthiophene) (POT), poly(3-octylthiophene-2,5-diyl) (P3OT), poly(3-hexylthiophene) (P3HT), polyaniline, polycarbazole, grapheneMoS2, GeSbTeSrTiOa, CHsNHsPbCh, H2NCHNH2PbCl3, CsSnh, or any other suitable semiconductor material. These semiconductor materials may also be doped or contain a doping gradient and may be n-type or p-type. Further treatments may be applied to the component layers to modify their semiconductor properties such as, for example, thermal or laser annealing, or any other known processes.

[00128] At step S706, the barrier layer 802 is separated from the carrier 800 with or without the use of a release layer. The separation of the barrier layer 802 from the carrier and the picking and placement of the formed flexible ICs may take a variety of forms, a number of examples of which are described in more detailed below. The resulting flexible IC structure is shown in Figures 10a and 11. In an example, an adhesion strength between the component layer and the barrier layer is greater than an adhesion strength between the carrier and the barrier layer to assist with separation.

[00129] Alternatively at step S706, the component layer 804 (i.e. the lowest layer of the one or more component layers) may be separated from the barrier layer 802 such that the barrier layer 802 remains attached to the carrier 800 and the resulting flexible IC wafer and flexible ICs do not include the barrier layer, as shown in Figures 10b and 12. The separation of the component layer 804 from the barrier layer 802 and the picking and placement of the formed flexible ICs is described in more detailed below. This alternative approach may require the relative adhesive strengths of the component layer 804 to the barrier layer 802 and the barrier layer 802 to the carrier 800 to be appropriately controlled, so that the component layer 804 detaches from the barrier layer 802 rather than the barrier layer 802 detaching from the carrier 800. The relative adhesive strengths may be controlled via one or more intermediate layers or release layers between one or more of the carrier 800, barrier layer 802, and component layer 804. An intermediate layer or a release layer may be, for example, one or more of an adhesion layer, a polymer layer, or any other layer of suitable material described above. Any of the other detachment / release techniques described above may also be used. For example, detaching the barrier layer from the first carrier may include laser ablation of the interface between the barrier layer and the first carrier or barrier layer and the component layer. In another example, detaching the barrier layer from the first carrier or detaching the component layer from the barrier layer is performed whilst the flexible IC is at least partially submerged in a fluid.

[00130] Figures 10a,10b, 11 and 12 provide schematic diagrams of flexible ICs that have been formed via the process of Figure 8. The flexible ICs in Figures 10a, 10b, 11 and 12 do not have a polymer substrate, with the barrier layer 802 acting as a form of support structure in Figure 10a and no form of additional support structure being provided for the component later in Figure 10b. The barrier layer may also be present whilst not acting as a support structure, for example, only limited to provide a surface that has properties required for or to assist with formation of the component layer.

[00131] The barrier layer 802 may have a thickness between 5pm and 0.001pm, such as, for example, between 5pm and 0.0015pm, between 4.5pm and 0.002pm, between 4pm and 0.0025pm, between 3.5pm and 0.003pm, between 3pm and 0.0035pm, or between 2pm and 0.004pm. The barrier layer 802 may have a thickness of between 0.1pm and 0.001pm such as, for example, between 0.95pm and 0.0015pm, between 0.9pm and 0.002pm, between 0.85pm and 0.0025pm, between 0.8pm and 0.003pm, between 0.75pm and 0.0035pm, between 0.7pm and 0.004pm, between 0.65pm and 0.0045pm, or between 0.6pm and 0.005pm. The barrier layer 802 may have a thickness of between 0.05pm and 0.001pm such as, for example, between 0.045pm and 0.0015pm, between 0.04pm and 0.002pm, between 0.035pm and 0.0025pm, between 0.03pm and 0.003pm, between 0.025pm and 0.0035pm, between 0.02pm and 0.004pm, between 0.015pm and 0.0045pm, or between 0.01pm and 0.005pm. However, the thickness of the barrier layer 802 is not limited to this, and may be chosen depending on the functional properties required for the barrier layer.

[00132] The barrier layer 802 may remain attached to the carrier or to the flexible IC wafer (i.e. component layer 804), once the flexible IC wafer has been separated from the carrier 800. For instance, in an example, an adhesion strength between the component layer and the barrier layer is less than an adhesion strength between the first carrier and the barrier layer to assist with the separation. In the case of a barrier layer formed from multiple depositions or multiple layers (e.g. a composite thin film), one or more constituent layers or depositions of the barrier layer, or barrier sub-layers, may remain attached to the carrier and / or to the flexible IC wafer when they are separated. Barrier layer constituents or barrier sub-layers that remain attached to the flexible IC wafer may serve as ‘backside encapsulation’ for the flexible ICs, thus providing an element of protection to the flexible ICs.

[00133] Figure 11 shows a schematic of a substrateless flexible IC 80 that includes a barrier layer. As shown in Figure 11, flexible IC 80 is comprises a first horizontal surface 80-1 and a second horizontal surface 80-2 opposing the first surface 80-1. Flexible IC structure 80 further includes a barrier layer 802, which comprises first surface 80-1 of IC 80 on its lowermost surface, and includes contact members 81 and vias 85. The remaining architecture 804 of flexible IC 80, including one or more layers 804-0, 804-2, 804-4, is provided over the topmost surface of barrier layer 802. One or more layers 804-0, 804-2, 804-4 may comprise one or more layers of dielectric materials, or component layers. Topmost layer 804-0 of flexible IC architecture or component layer 804 comprises second surface 80-2 of flexible IC 80 on its topmost surface, which comprises contact members 82. One or more contact members 81 (herein, contact members may also be termed contacts, contact elements, contact portions, contact regions etc., as appropriate) may be included in or on flexible IC 80, being provided on the first surface 80-1. Additionally or alternatively, one or more contact members 82 may be included in or on flexible IC 80, being provided on the second surface 80-2.

[00134] In an example, one or more contact members may be formed on the first carrier prior to depositing the barrier layer.

[00135] In another example, one or more vias from the component layer may be formed through the barrier layer to electrically connect the component layer to one or more of the contact members.

[00136] In another example, one or more contact members may be formed on a topmost layer of the flexible IC.

[00137] Figure 12 shows a schematic of a substrateless flexible IC 80’ that does not include a barrier layer. As shown in Figure 12, flexible IC 80’ is comprises a first horizontal surface 80’-1 and a second horizontal surface 8O’-2 opposing the first surface 8O’-1. IC structure 80’ does not include either a barrier layer or a substrate. The architecture 804’ of flexible IC 80’, including one or more layers 804’-0, 8O4’-2, 8O4’-4. One or more layers 804’-0, 8O4’-2, 8O4’-4 may comprise one or more layers of dielectric materials, or component layers. Lowermost layer 8O4’-4 of architecture 804 comprises first surface 8O’-1 of flexible IC 80’ on its lowermost surface, which comprises contact members 8T. Topmost layer 804’-0 of substrate architecture 804’ comprises second surface 8O’-2 of flexible IC 80’ on it topmost surface, which comprises contact members 82’. One or more contact members 81 (herein, contact members may also be termed contacts, contact elements, contact portions, contact regions etc., as appropriate) may be included in or on flexible IC 80’, being provided on the first surface 8O’-1. Additionally or alternatively, one or more contact members 82’ may be included in or on flexible IC 80’, being provided on the second surface 8O’-2.

[00138] One or more of contact members 81, 8T, 82, 82’ may be used for coupling flexible IC 80, 80’ with one or more of: an external IC, an external circuit such as an application circuit, or any other external structure(s). For example, one ormore of the contact members 81, 8T, 82, 82’ may be for electrically coupling or mechanically coupling flexible IC 80, 80’ with an external or circuit. It will be appreciated that the number of contact members on the first surface 80-1, 80’-1 and on the second surface 80-1, 8O’-1 is variable. Optionally, flexible IC 80, 80’ may not include contact members on the first and / or second surfaces 80-1, 8O’-1,80-2, 8O’-2. Alternatively, flexible IC 80, 80’ may not include any contact members. Other surfaces of the flexible IC 80, 80’, further to the first surface 80-1, 8O’-1 and second surface 80-2, 8O’-2, may include one or more contact members. Vias

[00139] Due to the thickness of the polymer substrate in conventional flexible ICs, the provision of contacts on the underside of a flexible IC is not practical, or at least complex, since long vias in the substrate layer are required to enable access the component layers. As such, the contacts are typically provided in the upper layers or on the upper surface of conventional flexible ICs. Advantageously, provision of contacts in the lower layers or the lower surface (i.e. the underside) of the flexible ICs of the present disclosure is simplified because they are formed without a substrate or are formed with a reduced thickness substrate. As such, long vias may not be required to link those contacts to the component layer(s) contacts.

[00140] Vias to specific component layers from the lower layers could be built into the flexible IC structure in the same way that they are built into the upper layers in conventional approaches. To do this, the layer structure of the flexible IC may be at least partially inverted, such that metal interconnection layers, for distributing signals and power within the flexible IC, are manufactured before the active layers. Alternatively, the layer structure may be unchanged, with contact members (e.g. connection pads) present in the lowest component layer (e.g. metal layer) and vias throughout the IC architecture.

[00141] For example, flexible IC 50 may comprise contact members 51, 52 formed on the first surface 50-1 and / or second surface 50-2. Contacts 51, 52 may be metal pads. In such an example of flexible IC 50, metal pads 51,52 may be formed by patterning metal pad areas directly onto the carrier (e.g. glass carrier), or onto an intervening release layer, before depositing one or more layers of thin-film over the metal pad area. One or more vias, such as a through substrate via (TSV) 55 may then be etched through the one or more layers of thin-film, for example, using oxygen plasma dry etch, after photolithographic patterning. The connections may be made with an upper metal layer that routes over positively sloped sidewalls around the etched vias to form connections, or by other methods suitable to fill the vias, such as for example, electro / electro-less plating techniques. In this method, the area of connection interface between the one or more vias 55 in the reduced-substrate 504 and the metal pad may extend over a limited area, such that the metal pad extends beyond the interface area. Although this approach has be described for the approaches described in relation to Figures 4 to 7, this approach is equally applicable to a flexible IC formed according to the approaches described in relation to Figures 8 to 12, such as those that do not have a polymer substrate (e.g. the barrier layer forms the bottommost layer) or those that have neither a barrier layer or a polymer substrate.

[00142] For example, flexible IC 50 may comprise contact members 51, 52 formed on the first surface 50-1 and / or second surface 50-2. Contacts 51, 52 may be metal pad area defined by the width of the via at the first surface 50-1 and / or second surface 50-2. In such an example of flexible IC 50, the one more vias are formed by depositing a polymer layer (e.g. first and second polymer layers 502, 504) on a carrier (e.g. glass carrier), and subsequently etching one or more TSVs 55 through the polymer film. The sidewalls of TSVs 55 may be positive sidewalls. A metal is then deposited over at least an area of the surface of the polymer film that includes the via aperture, allowing for no breakages at the edges of TSV 55 such that the metal makes contact with the carrier. Alternatively, TSVs 55 of flexible IC 50 may be formed using mechanical processes. Although this approach has be described for the approaches described in relation to Figures 4 to 7, this approach is equally applicable to a flexible IC formed according to the approaches described in relation to Figures 8 to 12.

[00143] In Figure 20, conductive vias 1705 are provided from one or more layers 1704-0, 1704-2, 1704-4, 1704-6 of the component layer 1704 to connect with a contact pad 1701 formed at the bottom of the component layer such that the contact pad 1701 lies above the barrier layer 1702. Alternatively, the contact pads may be formed directly on the carrier 1700 via material deposition, lithography, and etching. For example, contact pads may be formed directly on the carrier 1700 if no barrier or release layer is present, or gaps in the release layer or barrier layer have been formed for the contact pads. Although the contact pad 1701 in Figure 20 is shown to be below the component layer 1704-6, it may be formed in the component layer 1704-6 and / or its surface level with the lowermost (i.e. outer) surface of the component layer 1704-6 such that that the contact pad does not extend into the barrier layer 1702.

[00144] Although Figure 20 illustrates a flexible IC formed according to the approaches described in relation to Figure 8, 10b and 12 (i.e. without any polymer substrate), the approach illustrated by Figure 20 is equally applicable to a flexible IC formed according to the approaches described in relation to Figures 4 to 7 and 8, 10a, and 11. For example vias may extend through any of the component layers, second polymer layer, and / or barrier layer in order to form a connection with a contact pad.

[00145] In the approach illustrated in Figure 20, the barrier layer may be locally weakened (or made brittle, spongy or porous, etc.) so that it fractures, or it may be patterned and at least partially removed, beneath the contact pad(s). Such measures may improve the performance of external electrical connections or improve the ease with which vias may be formed. This approach may also be applied to the barrier layer and second polymer layer of flexible ICs that have been formed according to the approaches described in relation to Figure 4.

[00146] As an alternative to the approach illustrated by Figure 20, the contacts (e.g. contact pads, contact elements) may be deposited, patterned and etched before deposition of the barrier layer. For example, the contacts (e.g. contact pads, contact elements) may be deposited onto an adhesion or release layer provided on the carrier, where the adhesion or release layer may adhere more strongly to the barrier layer than to the (metal) contact pad layer.

[00147] As another alternative, once the contact pads and other metal features have been formed on the adhesion or release layer, an insulating layer (which may be the second polymer layer of the process of Figure 4 or a separate layer) could be deposited and planarised down to the level of the upper surface of those lowermost metal features. This approach is illustrated in Figure 21, where the contact pads 1800 have been formed on adhesion / releas layer 1802, an insulating layer 1804 is then deposited on the adhesion / release layer 1802 and planarised to the upper level of the contact pads 1800. However, the contact pads may be formed directly on the carrier 1810, for example, via material deposition, lithography, and etching. For example, contact pads may be formed directly on the carrier 1810 if no barrier or release layer is present, or gaps in the release layer or barrier layer have been formed for the contact pads. Following this, a barrier layer may then be formed on top of the planarised insulating layer and lowermost metal layer, with suitable vias formed above the contact pads. Following this, component layers of the flexible IC, such as active, insulating and further conducting layers, may then be formed on top of the barrier layer to form the component layer 1806. The flexible IC may then be detached from the carrier 1810 in accordance with any of the previously described methods. This approach may also be applied to flexible ICs that have been formed according to the approaches described in relation to Figures 8, 10b, and 11.

[00148] In another example, prior to deposition of the barrier layer, the method may include forming one or more contact members on the first carrier; depositing an insulating layer on the one or more contact members and the first carrier; and planarising the insulting layer to a level of the one or more contact members.

[00149] Alternatively, a dissolvable polymer (e.g. PMMA) may be deposited between the carrier and the bottom contacts, and protected (or encapsulated) throughout manufacture by a subsequent layer. The bottom contact pads may then be exposed, post-release, by dissolving the polymer in a suitable solvent, thereby exposing the contact pads.

[00150] In another alternative, vias may be formed through the lower flexible IC layers by laser drilling, then contact pads may be formed by screen printing after the flexible IC has been detached from the carrier.

[00151] By virtue of not providing electrical contacts on the upper surface of a flexible IC, the assembly of a flexible IC to an external circuit or item may be simplified. For example, a release foil (e.g. Lintec) could be applied to the upper (contactless) surface of the flexible IC wafer following manufacture and dicing, and the flexible ICs released by peeling the release tape. The flexible ICs could then be assembled by a direct attachment technique, e.g. by punching the flexible ICs through the release tape onto the application circuit, contacts-first. This would avoid the need for an intermediate ‘flip-chip’ step.

[00152] Conventional flexible ICs are approximately 20-30pm thick, with the polymer substrate accounting for 90% of the overall thickness of a flexible IC. Removing the polymer substrate altogether results in flexible ICs having an overall thickness of 2-3pm. Flexible ICs of this thickness do not meet the 5-10 pm threshold of human indentation stimuli and may therefore be imperceptible to human touch. Such thin flexible ICs could also be disposed within an adhesive layer of a product, structure, object, or anything else, rendering them substantially undetectable. The thinness of the polymer layer may also increase the transparency of a flexible IC and / or reduce any colouration compared to conventional flexible ICs.

[00153] Thinner flexible ICs that result from removal of the polymer substrate layer may be more robust to stress-induced damage during bending, since there is a smaller difference in the radii of curvature between the layers. Considerations of a neutral axis may therefore become less relevant in the design and placement of flexible ICs.

[00154] Substrateless flexible ICs may have broad utility in applications where failure or damage of the flexible IC is required. For example, such flexible ICs may be placed across a designed failure feature, such as, for example, a seal on product packaging or a weak point in a structure. Damage to the flexible IC or the eventual inoperability of a flexible IC may then be used to indicate prior use or interference in applications where product integrity is desirable or required such as, for example, in tamper detection. This may result in more versatile flexible ICs having broader application than conventional flexible ICs.

[00155] The omission of the polymer substrate eliminates the use of polymers required for substrate formation in flexible IC manufacture. The removal of the substrate may provide increased scope for the formation of contacts through the base of the flexible IC due to the absence of the polymer substrate layer and / or the barrier layer, enabling direct access to the component layer. Alternatively, this may be due to the relatively thin nature of the barrier layer, which allows for facile access to the component layer through the relatively thin barrier layer.

[00156] The new substrateless, and reduced thickness substrate (“reduced-substrate”) flexible IC wafers and flexible ICs described above with respect to Figures 5-12 may enable new and advantageous approaches for the assembly of flexible ICs into intermediate or final products. Furthermore, the properties of substrateless or reduced-substrate flexible ICs may also allow their application to new use scenarios. Method for detaching flexible IC and flexible IC wafers from the carrier

[00157] In order to reduce the likelihood of damage to the flexible ICs when being detached from the carrier and being picked and placed, an additional polymer layer or other structure / layer may be provided (e.g. laminated) on the upper face of the flexible IC wafer. Such an additional layer may provide additional tensile and / or mechanical strength during detachment, and protection from impact during assembly, where the additional layer may be applied to the new flexible IC wafers described with respect to Figures 5 and 9.

[00158] An additional polymer layer may be a permanent additional polymer layer. Additionally or alternatively, an additional polymer layer may be a temporary additional polymer layer, such as, for example, a release tape, temporary adhesive, or any other suitable materials. In the case of a temporary additional layer, the adhesive strength between the temporary additional layer and the upper surface of the flexible IC may be sufficient to enable the flexible IC or flexible IC wafer to be detached from the carrier without causing damage to the flexible ICs and / or flexible IC wafer. In the context of this example and throughout this disclosure, separation from the carrier refers to the detachment of the flexible IC wafer from a structure that remains on the carrier (“carrier-related structure”) and is not limited to the detachment of the flexible IC wafer from the carrier per se . For example, detachment of the flexible IC wafer from the carrier covers each of the various approaches described with respect to the methods shown in Figures 4 and 8, namely, the detachment of the second polymer layer 504 from the first polymer layer 502, the detachment of the barrier layer 806 from the carrier 800, the detachment of a barrier sub-layer from another barrier sub-layer on the carrier, and the detachment of the component layer 804 from the barrier layer 802.

[00159] The temporary additional polymer layer may be a temporary release tape. The temporary release tape may be a textured film (e.g. GelPak), which may be masked or cut to match the pitch and dimensions of an external application circuit or any other external structure (e.g. antenna) to which the flexible IC is to be coupled. In this way, a predetermined subset of flexible ICs on the wafer may therefore be detached using the release tape such as, for example, with each peeling off of the release tape. The flexible ICs attached to the release tape may then be attached to the external application circuits or structures using conductive or non-conductive adhesive for example. Method A

[00160] The temporary additional polymer layer may be a temporary polymer layer. The temporary polymer layer may be used for temporary attachment of the flexible IC wafer to a second carrier (as opposed to the first carriers 500 and 800 shown in Figures 5 and 9). The second carrier may be used for placement of the flexible ICs. A process for such placement of flexible ICs is described below with reference to Figure 13.

[00161] In an example, the detaching the second polymer layer from the first polymer layer includes: depositing a temporary auxiliary layer on an upper (i.e. exposed) surface of the flexible IC; adhering the temporary auxiliary layer to a second carrier; and detaching the second polymer layer from the first polymer layer by withdrawing the second carrier from the first carrier. In some examples, the temporary auxiliary layer is one of a polymer, a release tape, or an adhesive.

[00162] In an example, the detaching may further comprise attaching the detached second polymer layer to a third carrier and detaching the flexible IC from the second carrier by removing the temporary auxiliary layer.

[00163] In an example, detaching the barrier layer from the first carrier or detaching the component layer from the barrier layer includes: depositing a temporary auxiliary layer on an upper surface of the flexible IC; adhering the temporary auxiliary layer to a second carrier; and detaching the barrier layer from the first carrier or detaching the component layer from the barrier layer by withdrawing the second carrier from the first carrier. In some examples, the temporary auxiliary layer is one of a polymer, a release tape, or an adhesive.

[00164] In an example, the detaching may further comprise attaching the underside (i.e. the barrier layer or the component layer) of the flexible IC to a third carrier and removing the temporary auxiliary layer to detach the flexible IC from the second carrier.

[00165] The method of Figure 13 may be used with any of the various flexible IC structures described with respect to Figures 5 and 9, and any component layer structure. The method of Figure 13 may be used with flexible IC structures where the component layer comprises one or more electrical contacts provided on the surface that is opposite to the surface in contact with the first carrier (i.e. the contact surface of the component layer).

[00166] At step S1002, a temporary auxiliary layer is deposited on the upper surface (i.e. the second surface of the flexible ICs or “the contact surface” of the component layer) of the flexible IC wafer. The temporary auxiliary layer may be a temporary polymer layer such as, for example, a dissolvable polymer layer (PMMA). The temporary auxiliary layer may be deposited using any of the aforementioned thin layer deposition processes such as, for example, spin coating or slot die coating.

[00167] At step S1004, a second carrier (i.e. a carrier different to the first carrier upon which the flexible IC wafers have been formed) is temporarily attached to the contact surface of the flexible IC via the temporary auxiliary layer. For example, the second carrier may be attached to the contact surface of the flexible IC using a pressure-sensitive adhesive (PSA) or by placing the secondary carrier onto a temporary polymer layer during cure of the temporary polymer. The second carrier may be a substantially flat, rigid structure formed from, for example, silicon, glass or metal (e.g. stainless steel). Use of a second carrier that is a substantially flat, rigid structure may protect the flexible IC wafer from distortions during subsequent steps. Example transfer processes, including those making use of PMMA, may be found in graphene technology, such as those detailed by “PMMA-Etching-Free Transfer of Wafer-scale Chemical Vapor Deposition Two-dimensional Atomic Crystal by a Water Soluble Polyvinyl Alcohol Polymer Method” Van Ngoc et al, Scientific Reports September 2016.

[00168] At step S1006, the flexible IC wafer is detached from the first carrier using, for example, laser lift-off techniques, laser ablation, and / or any other suitable technique. The second carrier may be used to apply a detachment force.

[00169] Following detachment of the first carrier, the underside of the flexible IC wafer (i.e. the first surface of the flexible IC that was in contact with the first carrier) is exposed, which may allow additional steps in flexible IC manufacture to be performed. For example, vias may be formed through the thin polymer substrate or barrier layer, and / or contact pads may be formed on the exposed surface.

[00170] At step S1008, the flexible IC wafer is laminated to a third carrier, such as a release tape (e.g. Lintec mechanical tape or any other suitable multi-layer material), whereby the exposed underside (first surface 50-1, 80-1, 8O’-1) of the flexible IC wafer interfaces with the third carrier. Suitable materials may add mechanical robustness to the flexible IC wafer, so that it may better withstand subsequent steps in the assembly process.

[00171] At step S1010, the second carrier is detached from the flexible IC wafer by removing / separating the flexible IC wafer from the temporary auxiliary layer. For example, if the temporary polymer is a layer of PMMA, then the flexible IC may be detached from the second carrier by using acetone to dissolve the layer of PMMA polymer. However, subject to the nature of the temporary auxiliary layer and the mechanism by which it bonds the second carrier to the flexible IC wafer, alternative approaches may be used to detach the second carrier. In an example where the contact layer is formed on the upper surface of the flexible IC wafer as shown in Figures 5 and 9 (i.e. the second surface of the flexible ICs 50-2, 80-2, 8O’-2 or “the contact layer” of the flexible IC wafer), following detachment from the second carrier, the contact layer may be exposed.

[00172] At step S1012, the flexible IC wafer is diced in order to singulate the individual flexible IC dies using, for example, laser ablation, mechanical sawing, and / or any other suitable method. Thereafter, the flexible IC dies are provided on the third carrier with their electrical contacts facing away from the third carrier. The third carrier may be, for example, a release tape or any other suitable carrier.

[00173] Although singulation of flexible IC dies at step S1012 is performed after their transfer to a third carrier, the singulation may be performed at an earlier stage, such as during formation of the component layer. In this case, during step S1002 the temporary auxiliary layer may fill the dice lanes resulting from the singulation.

[00174] Lastly, at step S1014, the singulated flexible IC dies are picked and placed on an application item such as an external application circuit. Further details on step S1014 are set out below.

[00175] The method described with respect to Figure 13 requires the use of second and third carriers in addition to the first carrier. However, an adaptation of steps S1004 to S1012 may allow for the use of the third carrier to be omitted. Figure 14 provides such an alternative approach to that of Figure 13. Method B

[00176] At step S1102 of Figure 14 a temporary polymer layer is applied to the upper surface of the flexible IC wafer, as set out for step S1002 in Figure 13.

[00177] At step S1104, the temporary polymer layer is low-tack bonded to a second carrier, such as a release tape for example, where the contact layer of the component layer faces towards the second carrier beneath the temporary polymer layer. The strength of the bonding may be chosen in relation to the bonding strength between the flexible IC wafer and the first carrier in order to enable the flexible IC wafer to be removed from the first carrier without removal from the second carrier.

[00178] At step S1106, the flexible IC wafer is detached from the first carrier, by peeling for example which may follow one or more optional processes for assisting with the detachment of the polymer layer 202 from the carrier 200.

[00179] At step S1108, the flexible IC wafer is diced, while still attached to the second carrier (e.g. release tape). However, as described with reference to Figure 13, the singulation of the flexible ICs may additionally or alternatively be performed during the formation of the component layer.

[00180] At step S1110, the singulated flexible ICs are picked and placed on an application item. To do this, the flexible ICs may be picked from the second carrier (e.g. release tape), their temporary polymer layer removed (e.g. by acetone washing) if required, and the flexible ICs dried and placed onto the application circuit. Picking, washing and drying may be performed on an IC-by-IC basis or in groups (e.g. a row at a time).

[00181] By following the approach of Figure 14, assembly of the flexible ICs to an application item may be performed without a ‘flip-chip’ step that is commonly required for assembling flexible ICs, thus simplifying and shortening the picking and placing process and reduces the risk of damage to the flexible IC wafer and / or the contact surface of the flexible IC wafer thereby improving overall manufacturing yield.

[00182] Following either of the processes described with reference to Figures 13 and 14, the singulated and detached flexible IC dies may be attached to an application circuit with a non-conductive adhesive, and electrical contact may be made by an ‘edge over-printing’ technique. In ‘edge over-printing’, a conductive adhesive is applied to make contact both with the application circuit contacts and the flexible IC contacts. The conductive adhesive may be a liquid, for example a conductive ink, and may be solidified in order to form an electrically conductive connection between the application circuit contacts and the flexible IC die contacts. Solidification may be induced by, for example, curing, annealing or sintering. Figure 15 provides a schematic diagram of this attachment technique where the conductive liquid 1200 overlaps both the contacts 1202 of the flexible IC 1204 and selected contacts 1206 of the application circuit. The non-conductive adhesive is not shown in Figure 15.

[00183] In some examples of flexible IC or flexible IC wafer manufacture, a permanent additional polymer layer may be applied. For example, a spin-on PMMA passivation layer may be applied to the upper surface of the component layer. If the contacts of the flexible IC are formed on the upper surface of the component layer, electrical connections to the contacts may be achieved by providing vias through the additional polymer layer, for example, via drilling, such as laser drilling. External contact pads may then be formed (e.g. by screen printing) into and over those vias. Electrical contact may then be made with an application circuit, e.g. by using a conductive adhesive or edge over-printing as described with respect to Figure 15 for example.

[00184] Figure 16 provides a schematic diagram of a flexible IC wafer that has been formed in accordance with the approaches of Figure 8 but where a permanent additional polymer layer 1306 (e.g. a passivation layer) has been applied to the flexible IC wafer and vias 1308 formed through the additional polymer layer 1306. Following deposition of the barrier layer 1302 on the carrier 1300, and the formation of the component layer 1304 on the barrier layer, the additional permanent polymer layer 1306 is applied to the upper surface of the component layer in which contacts 1310 have been formed. Subsequently, vias 1308 are formed in the additional polymer layer 1306 through to the contacts 1310, and then a conductive material 1312 deposited to fill the vias and form contact pads on the upper surface of the additional polymer layer 1306. This process is equally applicable to a flexible IC wafer formed in accordance with the approaches provided for Figure 4. For example, the method of Figure 4 or Figure 8 may further comprise depositing a passivation layer on the component layer; forming one or more vias through the passivation layer to electrically connect to the component layer; and forming one or more contact members on the passivation layer and electrically connected to the vias through the passivation layer.

[00185] For some flexible ICs, such as processes for example, a contacts-up assembly (i.e. with contacts facing away from the application circuit) may be used. For example, once positioned on the application circuit the flexible IC die could be over-moulded with a polymer, which could then be etched or drilled so that a subsequent screen-printed redistribution layer (RDL) forms vias down to the contact members of the contact layer on the upper component layer of the flexible IC in a similar manner to that described with respect to Figure 16. The over-moulding polymer could also be used to adhere and / or underfill the flexible IC to the application circuit, and assist with protecting the underside from damage. This overmoulding approach may also be applied prior to detachment of the wafer from the first carrier; however, this may require contacts for a ‘fan-out’ structure (also referred to as fanout wafer-level packaging), connected to the upper side contacts by the RDL layer, to be set out on the wafer. Method C

[00186] Figure 17 provides an alternative approach to the previously described approaches for the picking and placement of flexible IC dies on an application item, which uses a direct-die attach approach that avoids the use of second and / or third carriers.

[00187] In an example, detaching the second polymer layer from the first polymer layer includes: bonding an application item to the flexible IC; and withdrawing the application item from the first carrier to detach the second polymer layer from the first polymer layer.

[00188] In another example, detaching the barrier barrier layer from the first carrier or detaching the component layer from the barrier layer includes: bonding an application item to the flexible IC; and withdrawing the application item from the first carrier to perform the detaching.

[00189] At step S1402, following the formation of the flexible IC wafer according to the approaches described with respect to Figures 4 and 8, the flexible IC wafer is diced whilst still attached to the carrier in order to singulate the flexible IC dies. This dicing may be performed via laser ablation or mechanical sawing for example.

[00190] A step S1404, the application item is brought into contact with the intended singulated flexible IC die and the intended flexible IC die is attached to the external circuit. The attachment of the flexible IC die to the external circuit may be performed, for example, by using one or more of: a conductive adhesive applied to the respective contacts on the flexible IC die and / or the application circuit, applying a non-conductive adhesive, and / or applying a polymer layer to other areas of the flexible IC die.

[00191] At step S1406, detachment of the flexible IC die from the carrier is performed. The detachment may comprise peel release achieved by withdrawing the application item from the carrier, such that the second polymer layer peels from the first polymer layer, the barrier layer peels from the carrier, or the component layer peels from the barrier layer. The detachment may be assisted by laser ablation. Alternatively, a laser may be used to impart momentum to the flexible IC die towards the application item, using a LIFT (light-induced forward transfer) methodology. Laser assisted release may be used for flexible IC dies on a glass, or an otherwise transparent or translucent carrier.

[00192] The detachment step of S1406, for example peel release, may be performed under fluid, for example a fluoropolymer, which may provide protection during peeling without adhering to the underside of the flexible IC or flexible IC wafer. Any of the other detachment processes described above may also be performed whilst the wafer and / or carrier is at least partially submerged in a fluid.

[00193] With respect to reducing the likelihood of damage to the flexible ICs during manufacture, the approaches set out above provide a number of techniques for reducing the likelihood of such damage. With respect to reducing the likelihood of damage during use of the flexible ICs, the application items to which the flexible ICs are attached may impart structural and mechanical support, which may reduce the likelihood of such damage.

[00194] In particular, flexible ICs may be assembled in the reduced-substrate or substrateless form to intermediate or final products, such as, for example, RFID tags, product packaging, documents, currency bills, greetings cards, tokens, etc. The structure of these products, which are typically much thicker than the flexible IC, may be such that they provide support and protection for the flexible IC during distribution and use, thus compensating for the partial or total absence of the conventional polymer substrate.

[00195] Alternatively or additionally, further protection may be provided by a form of encapsulation of the flexible IC die once it has been assembled to the application items, for example once they have been electrically connected to an application circuit.

[00196] Figure 18 provides a schematic diagram of a flexible IC 1502 that has been attached to an application item 1500 via an adhesive 1506, where electrical contact is made between the application item and the flexible IC via their respective contact pads 1504 and 1510. The electrical contact may be made using the adhesive 1506 or an alternative electrical connection means. Following the placement on, and connection to, the application item, the flexible IC is encapsulated using an encapsulant, such as a polymer for example. Although the encapsulation of Figure 18 is shown with respect to an implementation where the contacts of the flexible IC are facing towards the product, it is equally applicable to flexible ICs where the contacts face away from the product, for example, such as the arrangement illustrated by Figure 15. In Figure 18, the flexible IC may also include a barrier layer 1512.

[00197] Additional structural strength may also be provided by an application circuit, which may be in the form of an antenna, a rigid IC, or another flexible IC. For example, substrateless or reduced-substrate flexible IC dies may be stacked and interconnected together using one or more of the approaches set out for providing electrical contacts (i.e. contact members).

[00198] Following the detachment of the flexible IC wafer from the first carrier using any of the above-described approaches, additional protection or structural strength may be provided via attachment to an alternative substrate that is distinct from the eventual application circuit. The alternative substrate or substrate material may be laminated to the flexible IC wafer, e.g. using an adhesive, by any suitable known method, and may remain bonded to the flexible IC in use. Suitable products might include, for example, a backside coating tape such as Adwill LC Tape.

[00199] In conventional flexible ICs, the choice of flexible substrate material is limited because the substrate material must withstand the conditions of flexible IC manufacture. As described above in relation to the present disclosure, the alternative substrate material may be provided, at least, after detachment of the flexible wafer from the first carrier. Since the alternative substrate material does not need to withstand the conditions of flexible IC manufacture, a wider choice of suitable alternative substrate materials is available for use in the flexible ICs according to the present disclosure. For example, paper, which provides improved biodegradability, recyclability and flexibility may be used. Additionally, paper is already incorporated in application items regularly associated with flexible ICs, such as labels. A recyclable polymer may be used, where examples such as PET and HDPE provide improved recyclability, for example in domestic waste recycling processes, compared to common manufacturing substrate polymers. A biodegradable polymer may be used such as, for example, polylactic acid (PLA), polyhydroxyalkanoates (PHAs), polybutylene succinate (PBS), polybutylene adipate terephthalate (PBAT) or cellulose polymers.

[00200] Figure 19 provides a schematic diagram of an example flexible IC or flexible IC wafer that has been attached to an alternative substrate, where the flexible IC wafer has been formed according to the process of Figure 8 such that the barrier layer forms the lower surface of the flexible IC or flexible IC wafer. The barrier layer 1602 of flexible IC or IC wafer 1600 is attached to the alternative substrate 1606 via an adhesive layer 1604. However, if the flexible IC or flexible IC wafer has been formed according to Figure 4, the second polymer layer will be adhered to the alternative substrate 1606 via the adhesive layer 1604.

[00201] Advantageously, due to the increased range of materials and dimensions that may be used for the alternative substrate, the alternative substrate and / or its dimensions may be chosen to provide particular properties to the flexible IC. For example, the thickness of the alternative substrate may be chosen so that the flexible IC’s component layers (such as an active layer) lie close to the neutral axis of the completed product (e.g. label) so that strain-related damage during use can be avoided. This means that the active layers can be placed close to the neutral axis both when the flexible IC is attached to a product and during release from the carrier.

[00202] Throughout the specification, the term “connected” is understood to mean a direct connection such as electrical, mechanical or magnetic connection between the things that are connected. The term “coupled” is understood to mean a direct or indirect connection (i.e. through one or more passive or active intermediary devices). The term “scaling” may be understood to generally refer to converting one layout pitch to another layout pitch. Further, unless otherwise specified, the use of ordinal adjectives, such as, “first”, “second”, “third” etc. merely indicate that different instances of like objects are being referred to and are not intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking or in any other manner. Orientation terminology, such as, “horizontal” is understood with respect to a plane parallel to the conventional plane or surface of a wafer or substrate, regardless of the orientation of the wafer or substrate. The term “vertical” may refer to a direction perpendicular to the horizontal as defined previously. Prepositions, such as, “on”, “side”, “higher”, “upper”, “lower”, “over”, “bottom” and “under” may be understood with respect to the conventional plane or surface being on the top surface of the wafer or substrate, regardless of the orientation the electrical interconnects or the electronic package.

[00203] The figures of this specification are not limited to the elements illustrated therein but may include further elements or elements may be omitted. The figures are also not to scales and the size of certain elements are exaggerated for illustrative purposes.

[00204] Throughout the description and claims of this specification, the words “comprise” and “contain” and variations of them mean “including but not limited to”, and they are not intended to (and do not) exclude other components, integers or steps. Throughout the description and claims of this specification, the singular encompasses the plural unless the context otherwise requires. In particular, where the indefinite article is used, the specification is to be understood as contemplating plurality as well as singularity, unless the context requires otherwise.

[00205] As used herein, the terms "A, B or C" or "at least one of A, B and / or C", or the like, may include all possible combinations of A, B and C. It will be understood that when an element (e.g., a first element) is referred to as being (operatively or communicatively) "coupled with / to” or "connected with / to” another element (e.g., a second element), it can be coupled or connected with / to the other element directly or via one or more other elements.

[00206] Features, integers, characteristics, or groups described in conjunction with a particular aspect, embodiment or example of the invention are to be understood to be applicable to any other aspect, embodiment or example described herein unless incompatible therewith. All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and / or all of the steps of any method or process so disclosed, may be combined in any combination, except combinations where at least some of such features and / or steps are mutually exclusive. The invention is not restricted to the details of any foregoing embodiments. The invention extends to any novel one, or any novel combination, of the features disclosed in this specification (including any accompanying claims, abstract and drawings), or to any novel one, or any novel combination, of the steps of any method or process so disclosed.

[00207] The reader's attention is directed to all papers and documents which are filed concurrently with or previous to this specification in connection with this application and which are open to public inspection with this specification, and the contents of all such papers and documents are incorporated herein by reference.

Claims

1. A method for manufacturing a flexible integrated circuit (IC), the method comprising:depositing (S402) a first polymer layer (502) on a first carrier (500);depositing (S404) a second polymer layer (504) on the first polymer layer (502);forming (S408) a component layer (508) on the second polymer layer (504); and detaching (S410) the second polymer layer (504) from the first polymer layer (502) to separate the flexible IC from the first carrier (500).

2. The method of claim 1, further comprising depositing (S406) a barrier layer (506) on the second polymer layer (504) and forming (S408) the component layer (508) on the barrier layer (506).

3. The method of any preceding claim, wherein the second polymer layer (504) has a thickness of between 5pm and 0.01pm.

4. The method of any preceding claim, wherein the first polymer layer (502) and the second polymer (504) are formed from different materials.

5. The method of any preceding claim, wherein the first polymer layer (502) and the second polymer layer (504) have one or more of different coefficients of thermal expansion, different solubilities, and different optical absorption properties.

6. The method of any preceding claim, wherein the first polymer layer (502) is at least partially cured before deposition of the second polymer layer (504).

7. The method of any preceding claim, wherein an adhesion strength of the first polymer layer (502) to the first carrier (500) is greater than an adhesion strength of the second polymer layer (504) to the first polymer layer (502).

8. The method of any preceding claim, further comprising depositing an intermediate layer on the first polymer layer (502) prior to depositing the second polymer layer (504).

9. The method of claim 7, wherein the intermediate layer is an adhesive layer.

10. The method of any preceding claim, further comprising forming one or more contact members (51) on the first polymer layer (502) prior to depositing the second polymer layer (504).

11. The method of claim 10, further comprising forming one or more vias (55) from the component layer (508) through the second polymer layer (504) to electrically connect the component layer (508) to one or more of the contact members (51).

12. The method of any preceding claim, further comprising forming one or more contact members (52) on a topmost layer of the flexible IC.

13. The method of any preceding claim, wherein the component layer (506) includes one or more conductive, semiconductive, or insulating layers.

14. The method of any preceding claim, wherein detaching the second polymer layer (504) from the first polymer layer (502) includes laser ablation of an interface between the first polymer layer (502) and the second polymer layer (504).

15. The method of any preceding claim, wherein detaching the second polymer layer (504) from the first polymer layer (502) is performed whilst at least one of the first polymer layer (502) and the flexible IC are at least partially submerged in a fluid.

16. The method of any preceding claim, further comprising adhering a substrate layer to the second polymer layer (504) after detachment of the second polymer layer (504) from the first polymer layer (502).

17. The method of claim 16, wherein the substrate layer is formed from one or more of paper, recyclable polymer, and biodegradable polymer.

18. The method of any preceding claim, wherein detaching the second polymer layer (504) from the first polymer layer (502) includes:depositing (S1002, S1102) a temporary auxiliary layer on an upper (i.e. exposed) surface of the flexible IC;adhering (S1004, S1104) the temporary auxiliary layer to a second carrier; and detaching (S1006, S1106) the second polymer (504) layer from the first polymer layer (502) by withdrawing the second carrier from the first carrier (500).

19. The method of claim 18, wherein the temporary auxiliary layer is one of a polymer layer, a release tape, or an adhesive.

20. The method of claims 18 or 19, further comprising attaching (S1008) the detached second polymer layer (504) to a third carrier and detaching (S1010) the flexible IC from the second carrier by removing the temporary auxiliary layer.

21. The method of any of claims 1 to 18, wherein detaching the second polymer layer (504) from the first polymer layer (502) includes:bonding an application item to the flexible IC; andwithdrawing the application item from the first carrier to detach the second polymer layer (504) from the first polymer layer (502).

22. The method any preceding claim, wherein the second polymer layer (504) and the component layer (508) form a plurality of flexible ICs, and the method further comprises singulating the plurality of flexible ICs.

23. The method of any preceding claim, further comprising:depositing a passivation layer (1306) on the component layer (506, 1304);forming one or more vias (1308) through the passivation layer (1306) to electrically connect to the component layer (506, 1304); andforming one or more contact members (1312) on the passivation layer (1306) and electrically connected to the vias (1312) through the passivation layer (1306).

24. A flexible IC comprising a component layer and polymer substrate layer, wherein the polymer substrate layer has a thickness of between 5pm and 0.01 pm.

25. A method for manufacturing a flexible integrated circuit (IC), the method comprising:depositing (S702) a barrier layer (802) on a first carrier (800);forming (S704) a component layer (S804) on the barrier layer (802); anddetaching (S706) the barrier layer (802) from the first carrier (800) or detaching the component layer (804) from the barrier layer (802) to separate the flexible IC from the first carrier (800).

26. The method of claim 24, further comprising depositing an adhesive layer or a polymer layer on the carrier (800) prior to deposition of the barrier layer (802).

27. The method of claims 25 or 26, wherein the barrier layer (802) has a thickness between 5|jm and 0.001 pm.

28. The method of any of claims 25 to 27, wherein an adhesion strength between the component layer (804) and the barrier layer (802) is greater than an adhesion strength between the first carrier (800) and the barrier layer (802).

29. The method of any of claims 25 to 27, wherein an adhesion strength between the component layer (804) and the barrier layer (802) is less than an adhesion strength between the first carrier (800) and the barrier layer (802).

30. The method of any of claims 25 to 29, further comprising, prior to deposition of the barrier layer (802):forming one or more contact members (1800) on the first carrier (1810);depositing an insulating layer (1804) on the one or more contact members (1800) and the first carrier (1810); andplanarising the insulting layer (1804) to a level of the one or more contact members (1800).

31. The method of any of claims 25 to 30, wherein detaching the barrier layer from the first carrier or detaching the component layer from the barrier layer includes:depositing (S1002, S1102) a temporary auxiliary layer on an upper surface of the flexible IC;adhering (S1004, S1104) the temporary auxiliary layer to a second carrier; anddetaching (S1006, S1106) the barrier layer (802) from the first carrier (800) or detaching the component layer (804) from the barrier layer (802) by withdrawing the second carrier from the first carrier (500).

32. The method of claim 31, wherein the temporary auxiliary layer is one of a polymer layer, a release tape, and an adhesive.

33. The method of claim 31 or 32, further comprising attaching (S1008) the underside (i.e. the barrier layer or the component layer) of the flexible IC to a third carrier and removing the temporary auxiliary layer to detach (S1010) the flexible IC from the second carrier.

34. The method of any of claims 25 to 30, wherein detaching the barrier layer (802) from the first carrier (800) or detaching the component layer (804) from the barrier layer (802) includes:bonding an application item to the flexible IC; andwithdrawing the application item from the first carrier (800) to perform the detaching.

35. The method of any of claims 25 to 33, wherein detaching the barrier layer (802) from the first carrier (800) includes laser ablation of the interface between the barrier layer (802) and the first carrier (800).

36. The method of any of claims 25 to 35, wherein detaching the barrier layer (802) from the first carrier (800) or detaching the component layer (804) from the barrier layer (802) is performed whilst the flexible IC is at least partially submerged in a fluid.

37. The method of any of claims 25 to 36, further comprising adhering a substrate layer to the detached surface of the flexible IC after detachment from the first carrier (800).

38. The method of claim 37, wherein the substrate layer is formed from one or more of paper, recyclable polymer, and biodegradable polymer.

39. The method of any of claims 25 to 37, wherein the component layer (804) forms a plurality of flexible ICs, and the method further comprises singulating the plurality of flexible ICs.

40. The method of any of claims 25 to 39, further comprising forming one or more contact members (81) on the first carrier (800) prior to depositing the barrier layer (802).

41. The method of claim 40, further comprising forming one or more vias (85) from the component layer (804) through the barrier layer (802) to electrically connect the component layer (804) to one or more of the contact members (85).

42. The method of any preceding claim, further comprising forming one or more contact members (82) on a topmost layer of the flexible IC.

43. The method of any of claims 25 to 42, further comprising:depositing a passivation layer (1306) on the component layer (1304);forming one or more vias (1308) through the passivation layer (1306) to electrically connect to the component layer (1304); andforming one or more contact members (1312) on the passivation layer (1306) and electrically connected to the vias (1312) through the passivation layer (1306).

44. A flexible integrated circuit (IC), wherein the flexible IC does not include a polymer substrate.

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