Power conversion device and driving device
The power conversion device stabilizes open failure diagnosis in switching elements by adjusting addition and subtraction amounts in a failure detection counter and using a debounce counter, effectively addressing misdiagnosis at low frequencies and ensuring rapid fault detection.
Patent Information
- Application Number
- JP2023095520
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-06-09
- Publication Date
- 2024-12-19
AI Technical Summary
Existing power conversion devices struggle with stable failure diagnosis of switching elements due to misdiagnosis at low current frequencies and limited diagnostic ranges, leading to unstable torque fluctuations in motors.
A power conversion device with a current detection unit that diagnoses open failures in switching elements based on output current phases, using adjustable addition and subtraction amounts for a failure detection counter, and incorporating a debounce counter to stabilize diagnosis across varying current frequencies.
Stable open failure diagnosis is achieved regardless of current frequency, preventing misdiagnosis and ensuring quick detection of switching element failures.
Smart Images

Figure 2024176743000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a power conversion device and a drive device. [Background technology]
[0002] A power conversion device provided in a drive device of an electric vehicle or the like converts DC power supplied from a DC power source into AC power to drive a motor or the like. If an open fault or a stuck-off fault occurs in a switching element for power conversion provided in the power conversion device, correct current control cannot be performed and the output torque of the motor fluctuates. For this reason, a technique for diagnosing an open fault in the switching element is known.
[0003] For example, the fault diagnosis device described in Patent Document 1 determines that a switching element has a fault when the absolute value of the smoothed AC current is equal to or greater than a predetermined value. Also, the fault diagnosis device described in Patent Document 2 diagnoses that the switching element has an open fault when the sum of the current phase difference and the magnetic pole position is within a predetermined range and the absolute value of the current is smaller than a fault diagnosis value. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] JP 2010-246328 A [Patent Document 2] JP 2010-246327 A Summary of the Invention [Problem to be solved by the invention]
[0005] In the technology of Patent Document 1, since a fault is judged based on the current after smoothing, when the current frequency is low, the current after smoothing becomes large even in normal operation, and there is a possibility that the switching element may be erroneously diagnosed as faulty. Therefore, there is a problem that a stable diagnosis cannot be performed when the current frequency is low. Furthermore, in the technology of Patent Document 2, since a diagnosis is performed when the sum of the current phase and the magnetic pole position is within a predetermined range, the range in which an abnormality can be counted by the diagnosis is limited to a part of one current cycle, and a time equivalent to several current cycles is required to perform a stable diagnosis. [Means for solving the problem]
[0006] A power conversion device according to an embodiment of the present invention includes a current detection unit that detects the output current of each phase of a three-phase inverter circuit having switching elements, and a fault diagnosis unit that diagnoses an open fault of the switching elements based on the output current of each phase, wherein the fault diagnosis unit calculates a fault detection counter for each phase by adding a predetermined addition amount when the value of the output current is within a predetermined range, and subtracting a predetermined subtraction amount when the value of the output current is not within the predetermined range, and diagnoses the open fault when the fault detection counter exceeds a first counter threshold, and the lower the frequency of the output current, the smaller the predetermined addition amount and the predetermined subtraction amount are set, or the first counter threshold is set to a larger value. Effect of the Invention
[0007] According to the present invention, an open circuit failure in a switching element can be diagnosed stably regardless of the frequency of the current. [Brief description of the drawings]
[0008] [Figure 1] FIG. 1 is a schematic diagram of a vehicle. [Diagram 2] FIG. 2 is a diagram showing a schematic configuration of the drive device. [Diagram 3] FIG. 3 is a diagram illustrating an example of a configuration of a power conversion circuit. [Figure 4] FIG. 4 is a control block diagram showing the details of the function of the control circuit. [Diagram 5] FIG. 5 is a flowchart illustrating an example of an open fault diagnosis process. [Figure 6] FIG. 6 is an example of a timing chart in the open failure diagnosis process. [Figure 7] FIG. 7 is a flowchart illustrating an example of an open fault diagnosis process in the second embodiment. [Figure 8] FIG. 8 is a flowchart illustrating an example of an open fault diagnosis process in the second embodiment. [Figure 9] FIG. 9 is an example of a timing chart of the open failure diagnosis process in the second embodiment. [Figure 10] FIG. 10 is a flowchart illustrating an example of an open fault diagnosis process in the third embodiment. [Figure 11] FIG. 11 is a diagram showing a current waveform when an open circuit failure occurs. [Figure 12] FIG. 12 is a flowchart showing an example of an open fault diagnosis process in the fourth embodiment. [Figure 13] FIG. 13 is a diagram showing a current waveform when an open circuit failure occurs. [Figure 14] FIG. 14 is a flowchart showing an example of an open fault diagnosis process in the fourth embodiment. [Figure 15] FIG. 15 is an example of a timing chart of the open failure diagnosis process in the fourth embodiment. [Figure 16] FIG. 16 shows signal waveforms for comparing the first and fifth embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0009] Hereinafter, the embodiment of the present invention will be described with reference to the drawings. The following description and drawings are examples for explaining the present invention, and are omitted and simplified as appropriate for clarity of explanation. In addition, in the following description, the same or similar elements and processes are given the same reference numerals, and duplicate explanations may be omitted. Note that the contents described below are merely examples of the embodiment of the present invention, and the present invention is not limited to the following embodiment, and can be implemented in various other forms.
[0010] (First embodiment) A first embodiment of a drive device according to the present invention will be described with reference to Figures 1 to 6. Figure 1 is a schematic diagram of a vehicle that runs on a motor (not shown). The vehicle 1 is equipped with a drive device 2 to which power is supplied from a DC power source 5. Although not shown, the drive device 2 has a power conversion device, a motor, and a reducer. The driving force of the motor is transmitted via the reducer to an axle 4 on which wheels 3a are provided.
[0011] In the example shown in Fig. 1, the drive unit 2 is installed on the axle 4 of the front wheels (wheels 3a), but it may also be installed on the axle of the rear wheels (wheels 3b). Also, the drive units 2 may be installed on the axles 4 of the front and rear wheels, respectively, or independent drive units 2 may be installed on each of the left and right wheels 3a, 3b instead of on the axles. Also, a drive unit using an internal combustion engine may be installed in parallel with the drive unit 2 on the axle 4, separate from the drive unit 2 described in Fig. 1.
[0012] FIG. 2 is a diagram showing a schematic configuration of the drive device 2. A DC power supply 5, a control device 6, and a fault notification device 7 are provided around the drive device 2. The control device 6 transmits a target torque τs, an operation mode Sm, and the like to the drive device 2. The control device 6 also receives a fault notification signal Sf output from the drive device 2. In this embodiment, only one control device 6 is described, but a plurality of control devices may transmit and receive information. The control device 6 also has a control function for the drive device using the internal combustion engine described above, for example.
[0013] The DC power supply 5 is a power supply for driving the motor 9 in the drive device 2, and may be, for example, a battery. The fault notification device 7 receives a fault notification signal Sf from the drive device 2 and notifies the passenger of the occurrence of a fault. Examples of the fault notification method include turning on a lamp, emitting a warning sound, or notifying by voice.
[0014] The drive device 2 includes a power conversion device 8, a motor 9, and a reducer (not shown). The reducer amplifies the driving force of the motor 9 and transmits it to the axle 4 (or wheels 3a, 3b). The motor 9 is a three-phase motor with three internal windings, and may be, for example, a synchronous motor using a permanent magnet or an induction motor without a permanent magnet. The motor 9 includes a motor angle sensor 91. The motor angle sensor 91 measures the rotation angle of the motor rotor and outputs the measured angle to the power conversion device 8 as a motor angle sensor value θm.
[0015] The power conversion device 8 converts the DC power supplied from the DC power supply 5 into AC power based on the target torque τs input from the control device 6, and supplies the AC power to the motor 9. The power conversion device 8 also has a function of converting the motive power of the motor 9 into DC power to charge the DC power supply 5. The power conversion device 8 includes a control circuit 80, a driver circuit 81, a power conversion circuit 82, a DC voltage sensor 83, and an AC current sensor 84.
[0016] The control circuit 80 generates a PWM (Pulse Width Modulation) signal pwm for controlling the current of each of the U, V, and W phases output from the power conversion device 8 to a predetermined value based on the target torque τs and the operation mode Sm from the control device 6. The control circuit 80 will be described in detail later. The driver circuit 81 outputs a drive signal for switching on / off a plurality of power semiconductors provided in the power conversion circuit 82 based on the PWM signal pwm output by the control circuit 80.
[0017] The DC voltage sensor 83 is a sensor that measures the output voltage of the DC power supply 5, and outputs the measured voltage value as a DC voltage sensor value Vdc to the control circuit 80. The AC current sensor 84 is a sensor that measures the AC current flowing through each phase (U phase, V phase, W phase) of the motor 9. The AC current values of each phase measured by the AC current sensor 84 are input to the control circuit 80 as AC current sensor values Iu, Iv, Iw (hereinafter simply referred to as currents Iu, Iv, Iw). In the example shown in FIG. 2, the AC current sensor 84 is provided with one sensor for each phase, but it may be provided for only two phases. Since the relationship "U phase current + V phase current + W phase current = 0" holds, in the case of a configuration in which sensors are provided for two phases, the control circuit 80 calculates the AC current sensor value for the remaining phase by calculation.
[0018] The power conversion circuit 82 receives a drive signal from the driver circuit 81 to drive an internal power semiconductor and control the current flowing through the motor 9. FIG. 3 is a diagram showing an example of the configuration of the power conversion circuit 82. The power conversion circuit 82 has a smoothing capacitor 821 and six power semiconductors 822 therein. Two power semiconductors 822 constituting an upper arm and a lower arm are provided for each phase (U phase, V phase, W phase). The output terminals of the upper and lower arms of each phase are connected to the windings of the corresponding phase of the motor 9.
[0019] The power semiconductor 822 switches on / off in response to a drive signal input from the driver circuit 81, and converts between DC power and AC power. Examples of the power semiconductor 822 include a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and an IGBT (Insulated Gate Bipolar Transistor). In the example shown in Fig. 3, an IGBT is used as the power semiconductor 822.
[0020] The smoothing capacitor 821 is a capacitor for smoothing a current generated by turning on / off the power semiconductor 822, and suppressing ripples in the DC current supplied from the DC power supply 5 to the power conversion circuit 82. For example, an electrolytic capacitor or a film capacitor is used as the smoothing capacitor 821.
[0021] In this embodiment, the motor neutral point is in a floating state, but may be connected to the ground (not shown). Methods for connecting the motor neutral point to the ground include a direct grounding method, a resistive grounding method, a compensation reactor grounding method, and an arc suppression reactor grounding method.
[0022] 4 is a control block diagram showing the details of the functions of the control circuit 80. The control circuit 80 includes a CPU, RAM, ROM, communication circuits, etc. (not shown). The CPU loads a program stored in the ROM into the RAM and executes it to realize the functions of each unit (to be described later). The ROM may be an electrically erasable programmable ROM (EEPROM) or a flash ROM.
[0023] The control circuit 80 includes a state control unit 801, a target current calculation unit 802, a current control unit 803, a PWM signal generation unit 804, a motor speed calculation unit 805, and a diagnosis unit 806. The control circuit 80 communicates with the external control device 6, and receives the above-mentioned operation mode Sm and target torque τs from the control device 6. The control circuit 80 also controls the PWM signal pwm based on the operation mode Sm and the target torque τs, and drives the power conversion circuit 82 via the driver circuit 81 shown in FIG. 2. When the control circuit 80 determines that a fault has occurred inside, it outputs a fault notification signal Sf to the external control device 6 and fault notification device 7 shown in FIG. 2.
[0024] The motor speed calculation unit 805 calculates the motor angular speed ω0 based on the motor angle sensor value θm. The calculated motor angular speed ω0 is input to the target current calculation unit 802 and the diagnosis unit 806.
[0025] The state control unit 801 transitions the operation state of the power conversion device 8 using the operation mode Sm and a fault notification signal Sf output by the diagnosis unit 806, and outputs the current operation state to the PWM signal generation unit 804. Examples of the operation state include a PWM state, a three-phase short-circuit state, and a three-phase open state.
[0026] A target current calculation unit 802 uses the target torque τs, the DC voltage sensor value Vdc, and the motor angular velocity ω0 to calculate a target current value required for the motor 9 to output a torque equal to the target torque τs. The target current value is output to a current control unit 803. The target current value is expressed, for example, in the form of a d-axis target current value and a q-axis target current value.
[0027] A current control unit 803 performs feedback control using the target current value, currents Iu, Iv, Iw, motor angle sensor value θm, and DC voltage sensor value Vdc so that the AC current flowing through the motor 9 follows the target current value, and calculates duty values Du, Dv, Dw for three phases in PWM control. The duty values Du, Dv, Dw are then input to a PWM signal generation unit 804.
[0028] The PWM signal generating unit 804 switches the signal to be output to the driver circuit 81 depending on the operating state output from the state control unit 801. The PWM signal generating unit 804 has an internal timer (not shown), and when the operating state is the PWM state, generates a PWM signal pwm using this timer value and the duty values Du, Dv, and Dw of each phase output from the current control unit 803. Then, the PWM signal generating unit 804 outputs the generated PWM signal pwm to the driver circuit 81 shown in FIG.
[0029] On the other hand, when the operating state is a three-phase open state, a PWM signal pwm is generated that turns off all six power semiconductors 822 (see FIG. 3) in the power conversion circuit 82. When the operating state is a three-phase short-circuit state, a PWM signal pwm is generated that turns off all the power semiconductors 822 in the upper arm and turns on all the power semiconductors 822 in the lower arm of the six power semiconductors 822 in the power conversion circuit 82, or a PWM signal pwm that turns on all the power semiconductors 822 in the upper arm and turns off all the power semiconductors 822 in the lower arm. The generated PWM signal pwm is output to the driver circuit 81.
[0030] A diagnosing unit 806 diagnoses a fault inside the power conversion device 8 based on the currents Iu, Iv, and Iw, the motor angular velocity ω0 calculated by the motor speed calculation unit 805, and the target current value calculated by the target current calculation unit 802. If a fault is detected as a result of the diagnosis, the diagnosing unit 806 outputs the details of the fault location as a fault notification signal Sf to the state control unit 801, the external control device 6, and the fault notification device 7.
[0031] (Open fault diagnosis processing) Fig. 5 is a flowchart showing an example of an open fault diagnosis process executed by the diagnosis unit 806. The diagnosis unit 806 repeatedly executes a series of processes shown in Fig. 5 at a fixed time interval.
[0032] In step S100, the diagnosis unit 806 determines whether or not the target current value input from the target current calculation unit 802 is greater than a threshold value Th1. If it is determined in step S100 that the target current value is greater than the threshold value Th1, the process proceeds to step S101, and if it is determined that the target current value is equal to or less than the threshold value Th1, the diagnosis process in FIG. 5 is terminated.
[0033] In step S101, loop processing for each phase is started. In the flowchart of Fig. 5, the loop processing from step S101 to step S113 is performed for each of the U phase, V phase, and W phase. In the following, the U phase will be described, and descriptions of the V phase and W phase will be omitted.
[0034] In step S102, the diagnostic unit 806 determines whether the absolute value of the current Iu in the U phase (represented as |current| in FIG. 5) is less than the threshold Th2. If it is determined in step S102 that the absolute value of the current Iu is less than the threshold Th2, the process proceeds to step S104. On the other hand, if it is determined that the absolute value of the current Iu is greater than or equal to the threshold Th2, the process proceeds to step S106.
[0035] When the current Iu satisfies |Iu| < Th2 and the process proceeds to step S104, the diagnostic unit 806 adds a predetermined addition amount corresponding to the frequency of the current to the U-phase fault detection counter C in step S104. On the other hand, when the current Iu satisfies |Iu| ≧ Th2 and the process proceeds to step S106, the diagnostic unit 806 subtracts a predetermined subtraction amount corresponding to the frequency of the current from the U-phase fault detection counter C in step S106.
[0036] Here, the predetermined addition amount in step S104 and the predetermined subtraction amount in step S106 are values proportional to the frequency of the current. That is, the higher the frequency of the current, the larger the predetermined addition amount and the predetermined subtraction amount are set. Since the frequency of the current is proportional to the motor speed, the predetermined addition amount and the predetermined subtraction amount are set based on the motor angular velocity ω0 calculated by the motor speed calculation unit 805. In that case, the current frequency may be calculated from the motor angular velocity ω0, or the predetermined addition amount and the predetermined subtraction amount may be values proportional to the motor angular velocity ω0 itself. Of course, the current frequency may be calculated from the input currents Iu, Iv, and Iw.
[0037] When the processes in steps S104 and S106 are completed, the process proceeds to step S108. In step S108, the diagnostic unit 806 determines whether the U-phase fault detection counter C exceeds the threshold Th3. If the fault detection counter exceeds the threshold Th3, the process proceeds to step S110, and it is diagnosed that the U-phase power semiconductor 822 has an open fault. On the other hand, if the fault detection counter C does not exceed the threshold Th3, the process proceeds to step S112, and it is diagnosed that the U-phase power semiconductor 822 is normal.
[0038] When the processes of steps S110 and S112 are completed, the process proceeds to step S113. In step S113, the loop process for the U phase is completed, and then the process returns to step S101 to execute the loop process for the V phase. Then, when the loop process for the V phase is completed, the process returns to step S101 again to execute the loop process for the W phase. Although not described, the same processes as in the case of the U phase are executed in steps S102 to S112 for the V and W phases.
[0039] FIG. 6 is an example of a timing chart for open fault diagnosis processing, showing the U phase as an example. Signal waveforms (a) and (b) show an example when the frequency of current Iu is low. The solid line in signal waveform (a) shows the change in current Iu. The solid line in signal waveform (b) shows the change in fault detection counter C. Meanwhile, signal waveforms (c) and (d) show an example when the frequency of current Iu is high. The solid line in signal waveform (c) shows the change in current Iu. The solid line in signal waveform (d) shows the change in fault detection counter C. In all signal waveforms, the horizontal axis is time t.
[0040] In the example shown in Fig. 6, an open circuit fault occurs at time t1. Before time t1, in a normal state, a sinusoidal current flows through the motor 9. However, when an open circuit fault occurs in the U-phase power semiconductor 822 at time t1, no current flows in either the positive or negative direction in the U-phase. Fig. 6 shows a case where an open circuit fault occurs in the power semiconductor 822 of the upper arm of the U-phase, and no current flows in the positive direction.
[0041] Even in a normal state, as shown in the signal waveforms (a) and (c), there is a time period during which the absolute value of the current Iu is less than the threshold value Th2. However, the time period during which the current Iu is less than the threshold value Th2 is shorter than one cycle of the current Iu, so the fault detection counter C does not exceed the threshold value Th3. On the other hand, when an open fault occurs in the power semiconductor 822, the current Iu stops flowing in the positive direction, and the value of the current Iu becomes almost 0 [A] during the approximately 1 / 2 cycle during which this state continues. In a state in which the value of the current Iu becomes almost 0 [A], the absolute value of the current Iu is less than the threshold value Th2, so the process always proceeds from step S102 to step S104, and the increment of the fault detection counter C is repeated. Then, at the point (time t2) when the fault detection counter C exceeds the threshold value Th3 (C>Th3), the diagnostic unit 806 diagnoses that the power semiconductor 822 has an open fault.
[0042] In this embodiment, as explained in steps S104 and S106 in Fig. 5, the higher the current frequency, the larger the increment / decrement amount of the fault detection counter C is set. Here, as a comparative example, consider a case where the increment / decrement amount of the fault detection counter C is constant regardless of the current frequency. The dashed lines L1 and L2 shown in the signal waveforms (b) and (d) in Fig. 6 show the comparative example.
[0043] As shown in the signal waveforms (a) and (c), the time period during which the current Iu is below the threshold value Th2 during normal operation is longer as the frequency of the current Iu is lower. The diagnostic process is performed at a constant cycle regardless of the frequency of the current Iu. Therefore, even when the frequency of the current Iu is high as in the signal waveform (c), it is necessary to set the amount of addition / subtraction of the fault detection counter C so that the fault detection counter C exceeds the threshold value Th3 by the time approximately 1 / 2 cycle has elapsed since the fault occurred at time t1. When the amount of addition / subtraction is set in this manner, since the amount of addition / subtraction in the comparative example is constant regardless of the frequency, when the frequency of the current Iu is low as in the signal waveform (a), the fault detection counter C during normal operation is indicated by the line L1. As a result, in the case of the method of setting the amount of addition / subtraction in the comparative example, the power semiconductor 822 is erroneously diagnosed as having an open circuit fault even during normal operation.
[0044] Conversely, consider a case where the increment / decrement of the fault detection counter C is set so that when the frequency of the current Iu is low, the fault is detected within 1 / 2 period when an open fault occurs, and a false diagnosis of an open fault does not occur during normal operation. That is, the increment / decrement of the fault detection counter C is set as shown by the solid line in the signal waveform (b) of FIG. 6, regardless of the frequency of the current Iu. With this setting, when the frequency of the current Iu is high as in the signal waveform (c), the fault detection counter C after the occurrence of an open fault is shown by the line L2 in the signal waveform (d). As a result, the fault detection counter C may not reach the threshold value Th3, and the open fault of the power semiconductor 822 may not be detected.
[0045] On the other hand, in the first embodiment, the higher the current frequency is, the larger the increment / decrement of the fault detection counter C is set. Therefore, as shown by the solid lines in the signal waveforms (b) and (d) in Fig. 6, it is possible to set the increment / decrement of the fault detection counter C so that the fault detection counter C reaches the threshold value Th3 within 1 / 2 period of the current change when an open fault occurs, and the fault detection counter C does not reach the threshold value Th3 during normal operation. As a result, it is possible to perform stable open fault diagnosis regardless of the high or low frequency of the current.
[0046] Furthermore, by performing the process of step S100, when the target current value is equal to or less than the threshold value Th1, the process of open circuit fault diagnosis is not performed. For example, if the process of step S100 is not provided, even if an open circuit fault does not occur, when the absolute value of the current flowing through the motor 9 is smaller than the threshold value Th2, the fault detection counter C may exceed the threshold value Th3, resulting in a false diagnosis of an open circuit fault. Therefore, in this embodiment, by performing the process of step S100, such a false diagnosis can be avoided.
[0047] The amount of current to be passed through the motor 9 is determined by the target torque τs and the motor speed (i.e., the motor angular speed ω0). Therefore, in the determination process of step S100, the determination may be made using the target torque τs and the motor angular speed ω0 instead of using the target current value.
[0048] As described above, in the first embodiment, by setting the increment / decrement amount of the failure detection counter C to be larger as the current frequency is higher, it is possible to detect an open failure in the power semiconductor 822 regardless of the motor rotation speed (i.e., the current frequency). Furthermore, in the first embodiment, an open failure is detected within a period of approximately 1 / 2 the cycle of the current Iu regardless of the motor rotation speed, so that rapid failure detection can be performed.
[0049] Second embodiment A second embodiment of a drive device of the present invention will be described with reference to Figures 7 to 9. In the second embodiment, the drive device 2 mounted on the vehicle 1 shown in Figure 1 will also be described as an example. Note that the schematic configuration of the drive device 2, the configuration of the power conversion circuit 82 provided in the power conversion device 8 of the drive device 2, and the configuration of the control circuit 80 provided in the power conversion device 8 are similar to the configurations shown in Figures 2, 3, and 4 of the first embodiment described above.
[0050] 7 and 8 are flowcharts showing an example of an open circuit fault diagnosis process executed by the diagnosis unit 806 (see FIG. 4) of the control circuit 80. The diagnosis unit 806 repeatedly executes the process shown in FIG. 7 and the process shown in FIG. 8 at a constant time interval. The execution intervals of the processes in FIG. 7 and FIG. 8 may be the same or different.
[0051] First, the flowchart of FIG. 7 will be described. In the flowchart of FIG. 7, the processes of steps S100, S101, S102, S104, S106, and S113 perform the same processes as the steps with the same reference numerals in the flowchart shown in FIG. 5. Hereinafter, mainly the parts different from the above-described first embodiment will be described, and the description of the parts the same as those in the first embodiment will be omitted. Also, among the loop processes for each phase started at step S101, the process related to the U phase will be described.
[0052] When the process of step S104 or step S106 in FIG. 7 ends, the process proceeds to step S200. In step S200, the diagnosis unit 806 determines whether the U-phase fault detection counter C exceeds the threshold Th3A. When it is determined in step S200 that C > Th3A, the process proceeds to step S202 to set the U-phase abnormality flag. On the other hand, when it is determined in step S200 that C ≤ Th3A, the process proceeds to step S204 to determine whether the U-phase fault detection counter C is below the threshold Th3B. When it is determined in step S204 that C < Th3B, the process proceeds to step S206 to reset the U-phase abnormality flag. On the other hand, when it is determined in step S204 that C ≥ Th3B, the process proceeds to step S113. Note that the threshold Th3B is set such that Th3B < Th3A.
[0053] In step S113, the loop process for the U phase is completed, and then the process returns to step S101 to execute the loop process related to the V phase. And when the loop process related to the V phase is completed, the process returns to step S101 again to execute the loop process related to the W phase. Although the description is omitted, for the V phase and the W phase as well, the same processes as those in the case of the U phase described above are executed.
[0054] Next, the flowchart of Fig. 8 will be described. In step S300, the diagnosis unit 806 judges whether or not the abnormality flag of any of the phases is set. If it is judged in step S300 that the abnormality flag is set (yes), the process proceeds to step S302, where the debounce counter Cd is incremented. On the other hand, if the abnormality flags of all phases are reset, the process proceeds to step S304, where the debounce counter Cd is decremented.
[0055] In step S306, the diagnosis unit 806 determines whether the debounce counter Cd exceeds the threshold value Th4. If it is determined in step S306 that Cd>Th4, the process proceeds to step S308, where the power semiconductor 822 is diagnosed as having an open circuit failure. On the other hand, if it is determined in step S306 that Cd≦Th4, the power semiconductor 822 is diagnosed as being normal.
[0056] 9 shows an example of a timing chart of the open circuit fault diagnosis process in the second embodiment, taking the U phase as an example. The solid line in signal waveform (a) indicates the change in current Iu, the solid line in signal waveform (b) indicates the change in fault detection counter C, the solid line in signal waveform (c) indicates the change in abnormality flag, and the solid line in signal waveform (d) indicates the change in debounce counter Cd. In each signal waveform, the horizontal axis is time t.
[0057] In the case of FIG. 9, an open circuit fault occurs at time t1, as in the case of FIG. 6. At time t1, an open circuit fault occurs in the power semiconductor 822 of the upper arm of the U-phase, and thereafter, no current flows in the positive direction. Since the current Iu remains at zero for a while after time t1, the fault detection counter C is incremented and increased. Then, when the fault detection counter C exceeds the threshold value Th3A at time t2, an abnormality flag is set. Thereafter, when the current Iu becomes Iu≦-Th2, the fault detection counter C is decremented, and when Th2>Iu>-Th2, the fault detection counter C is incremented. As a result, the fault detection counter C repeatedly increases and decreases, as shown in the signal waveform (b).
[0058] 9, the amount added in step S104 and the amount subtracted in step S106 are set so that the amount of increase in the fault detection counter C in the section (Th2>Iu>-Th2) is greater than the amount of decrease in the section (Iu≦-Th2). As a result, the turning point of increase→decrease and decrease→increase in the fault detection counter C gradually moves upward in the figure, and the fault detection counter C is maintained in the state of C≧Th3, and the abnormality flag is maintained in the set state.
[0059] When step S300 in Fig. 8 is executed at time t3 after the abnormality flag is set (time t2), the process of step S302 is performed and the debounce counter Cd is incremented as shown in the signal waveform (d). After that, the debounce counter Cd is incremented every time the process of Fig. 8 is repeated at a fixed time period. Then, when the debounce counter Cd exceeds the threshold value Th4 at time t4, step 308 in Fig. 8 is executed and an open fault is diagnosed.
[0060] As described above, in the second embodiment, when the failure detection counter C exceeds the threshold value Th3A, the abnormality flag is set, and the set state of the abnormality flag continues until the failure detection counter C falls below the threshold value Th3B. Then, by performing increment and decrement of the debounce counter Cd based on the state of the abnormality flag, it is possible to stably diagnose whether the device is malfunctioning or normal, regardless of the processing timing of the debounce counter Cd.
[0061] In the case of the first embodiment described above, when a state occurs in which the current Iu does not flow for about 1 / 2 cycle, the fault detection counter C exceeds the threshold value Th3 and an open fault is detected, so that the open fault can be detected quickly. On the other hand, in the second embodiment, the debounce counter Cd based on the abnormality flag as described above is introduced to avoid false detection due to accidental effects such as noise, thereby improving the stability of the open fault diagnosis. In the example shown in FIG. 9, when the state in which the current Iu does not flow continues for about three cycles, Cd>Th4 and an open fault is diagnosed. The time until this open fault is determined depends on the execution cycle of the process in FIG. 8, so the diagnostic process time can be shortened by shortening the execution cycle.
[0062] As can be seen from the signal waveform (b), when an open circuit failure occurs in the power semiconductor 822, no current flows for approximately 1 / 2 of one cycle of the current Iu, and current flows for approximately 1 / 2 of the cycle. Therefore, the value of the failure detection counter C (i.e., the integrated value of the addition amount and the subtraction amount) may become close to 0 due to the subtraction after the addition. Therefore, depending on the setting of the threshold value Th3B, even if an open circuit failure occurs in the power semiconductor 822, the failure detection counter C may fall below the threshold value Th3B, and the abnormality flag may be reset.
[0063] Therefore, when the fault detection counter C exceeds the threshold value Th3A and the abnormality flag is set (time t2 in FIG. 9), the fault detection counter C is further incremented by a fixed number ΔC. By doing so, the line of the fault detection counter C after time t2 is shifted upward in the figure by the fixed number ΔC. As a result, the reset of the abnormality flag when an open fault occurs is prevented, and the possibility of overlooking an open fault can be reduced.
[0064] (Third embodiment) A third embodiment of the drive device of the present invention will be described with reference to Figures 10 and 11. In the third embodiment, the drive device 2 mounted on the vehicle 1 shown in Figure 1 will also be described as an example. Note that the schematic configuration of the drive device 2, the configuration of the power conversion circuit 82 provided in the power conversion device 8 of the drive device 2, and the configuration of the control circuit 80 provided in the power conversion device 8 are similar to the configurations shown in Figures 2, 3, and 4 described above.
[0065] Fig. 10 is a flowchart showing an example of an open circuit fault diagnosis process executed by the diagnosis unit 806. The diagnosis unit 806 repeatedly executes a series of processes shown in Fig. 10 at a fixed time period. The flowchart in Fig. 10 is obtained by adding step S400 to the flowchart shown in Fig. 5. In the following, differences from the above-mentioned first embodiment will be mainly described, and descriptions of the same parts as in the first embodiment will be omitted. In addition, the process related to the U phase of the loop process for each phase started in step S101 will be described.
[0066] In step S400 of FIG. 10, the diagnosis unit 806 sets the threshold value Th2 to a value according to the frequency of the current Iu. Specifically, the higher the frequency of the current Iu, the larger the threshold value Th2 is set. Since the current frequency is proportional to the motor speed, the threshold value Th2 is set based on the motor angular speed ω0 calculated by the motor speed calculation unit 805. In this case, the current frequency may be calculated from the motor angular speed ω0, or the threshold value Th2 may be set to a value proportional to the motor angular speed ω0 itself. Of course, the current frequency may be calculated from the input currents Iu, Iv, and Iw.
[0067] In step S102, it is determined whether the absolute value of the current Iu exceeds the threshold value Th2, using the threshold value Th2 set in step S400. The process from step S102 onwards is the same as that in the flowchart shown in Fig. 5, and therefore the description will be omitted. The process for the V phase and the W phase is also performed in the same manner as that for the U phase.
[0068] 11 shows current waveforms when an open circuit failure occurs in the power semiconductor 822, where current waveform (a) shows the waveform when the motor speed is low, and current waveform (b) shows the waveform when the motor speed is high. In both cases, the horizontal axis represents time. When an open circuit failure occurs in the power semiconductor 822, no current flows through the failed phase for a period of approximately 1 / 2 the current cycle.
[0069] However, when the motor speed is high, a current (ripple current) may flow due to the influence of the back electromotive force generated by the motor 9. Therefore, if the threshold value Th2 for determining the magnitude of the current in the open circuit fault diagnosis is always constant, there is a risk that the open circuit fault cannot be correctly diagnosed when the motor speed is high. In the third embodiment, as shown in the current waveforms (a) and (b) in Fig. 11, the threshold value Th2 is set to be larger as the motor speed increases, thereby avoiding erroneous diagnosis and enabling stable open circuit fault diagnosis regardless of the motor speed.
[0070] (Fourth embodiment) A fourth embodiment of the drive device of the present invention will be described with reference to Figures 12 and 13. In the fourth embodiment, the drive device 2 mounted on the vehicle 1 shown in Figure 1 will also be described as an example. Note that the schematic configuration of the drive device 2, the configuration of the power conversion circuit 82 provided in the power conversion device 8 of the drive device 2, and the configuration of the control circuit 80 provided in the power conversion device 8 are similar to the configurations shown in Figures 2, 3, and 4 described above.
[0071] Fig. 12 is a flowchart showing an example of an open circuit fault diagnosis process executed by the diagnosis unit 806. The diagnosis unit 806 repeatedly executes a series of processes shown in Fig. 12 at a fixed time period. The flowchart in Fig. 12 is obtained by adding steps S500 and S502 instead of step S102 in the flowchart shown in Fig. 5 of the first embodiment. In the following, the parts different from the first embodiment described above will be mainly described, and the parts that are the same as those in the first embodiment will not be described. In addition, the process related to the U phase of the loop process for each phase started in step S101 will be described.
[0072] In step S500, the diagnosis unit 806 sets an upper limit threshold Th2A and a lower limit threshold Th2B as shown in Fig. 13 depending on the direction of current flow under normal conditions, i.e., whether the current direction is positive or negative. Fig. 13 is a diagram showing the waveform of the current Iu when an open circuit failure occurs, with the dashed line indicating the threshold Th2A and the dashed line indicating the threshold Th2B. Note that Fig. 13 shows the current waveform when the motor speed is high, as shown in the current waveform (b) of Fig. 11. During a period R1 when a positive current flows under normal conditions, a current near 0 [A] or a negative current flows.
[0073] The solid lines shown on the right side of Fig. 13 are the thresholds Th2 and -Th2 in the first embodiment. During a period R1 in which a positive current flows normally, the threshold Th2A is set to Th2A=Th2, and the threshold Th2B is set to a value larger in the negative direction than -Th2 (Th2B<-Th2<0). On the other hand, during a period R2 in which a negative current flows normally, the threshold Th2A is set to a value larger in the positive direction than Th2 (Th2A>Th2>0), and the threshold Th2B is set to Th2A=-Th2.
[0074] The current value (Iu, Iv, Iw) of each phase under normal conditions can be calculated from the current target value (Id, Iq) and electrical angle (θ) using formula (1). In formula (1), Id is the d-axis target current value, Iq is the q-axis target current value, θ is the electrical angle, Iu is the U-phase current, Iv is the V-phase current, and Iw is the W-phase current. The electrical angle θ can be calculated by multiplying the motor angle sensor value θm by the number of pole pairs of the motor 9. The direction of the current in each phase is determined from the positive or negative value of the current value (Iu, Iv, Iw) of each phase calculated here.
number
[0075] In step S502, the diagnosis unit 806 judges whether or not the current Iu satisfies "threshold Th2A>current Iu>threshold Th2B". If it is judged in step S502 that "threshold Th2A>current Iu>threshold Th2B" holds, the process proceeds to step S104, where the fault detection counter C for the U phase is incremented by a predetermined addition amount. On the other hand, if it is judged in step S502 that "threshold Th2A>current Iu>threshold Th2B" does not hold, the process proceeds to step S106, where a predetermined subtraction amount is subtracted from the fault detection counter C. Note that the process from step S108 onwards is the same as in the flowchart shown in FIG. 5, and therefore the description will be omitted. The process for the V phase and the W phase is also performed in the same manner as in the case of the U phase.
[0076] In the third embodiment described above, as shown in the current waveforms (a) and (b) in Fig. 11, the higher the motor speed, the larger the threshold value Th2 is set to avoid misdiagnosis. On the other hand, in the fourth embodiment, as shown in Fig. 13, even if a negative ripple current occurs in period R1 (period in which a positive current flows under normal conditions), the threshold value Th2B is set to a large negative value in this period R1, so that misdiagnosis can be avoided. As a result, a stable open fault diagnosis can be performed regardless of the motor speed.
[0077] Fifth embodiment A fifth embodiment of the drive device of the present invention will be described with reference to Figures 14 and 15. In the fifth embodiment, the drive device 2 mounted on the vehicle 1 shown in Figure 1 will also be described as an example. Note that the schematic configuration of the drive device 2, the configuration of the power conversion circuit 82 provided in the power conversion device 8 of the drive device 2, and the configuration of the control circuit 80 provided in the power conversion device 8 are similar to the configurations shown in Figures 2, 3, and 4 described above.
[0078] FIG. 14 is a flowchart showing an example of an open circuit fault diagnosis process executed by the diagnosis unit 806. The diagnosis unit 806 repeatedly executes a series of processes shown in FIG. 14 at a fixed time period. The flowchart in FIG. 14 is obtained by adding steps S600 and S602 instead of steps S104 and S106 in the flowchart shown in FIG. 5 of the first embodiment, and further adding step S604. In the following, the parts different from the first embodiment described above will be mainly described, and the parts that are the same as those in the first embodiment will not be described. In addition, the process related to the U phase will be described in the phase-by-phase loop process started in step S101.
[0079] If it is determined in step S102 that the absolute value of the current Iu is smaller than the threshold value Th2, the process proceeds to step S600, where a fixed additional amount is added to the U-phase fault detection counter C. On the other hand, if it is determined in step S102 that the absolute value of the current Iu is equal to or greater than the threshold value Th2, the process proceeds to step S602, where a fixed subtraction amount is subtracted from the U-phase fault detection counter C.
[0080] In step S604, a threshold value Th3 is set according to the frequency of the current. Although details will be described later, the higher the frequency of the current, the smaller the threshold value Th3 is set. As described in the first embodiment, the frequency of the current is proportional to the motor speed, so the threshold value Th3 is set based on the motor angular speed ω0 calculated by the motor speed calculation unit 805. In this case, the current frequency may be calculated from the motor angular speed ω0, or the threshold value Th3 may be set to a value proportional to the motor angular speed ω0 itself. Of course, the current frequency may be calculated from the input currents Iu, Iv, and Iw.
[0081] The process from step S108 onwards is the same as that in the flowchart shown in Fig. 5, and therefore the description will be omitted. The process for the V phase and W phase is also performed in the same manner as that for the U phase.
[0082] Fig. 15 is a timing chart corresponding to Fig. 6 of the first embodiment. Signal waveforms (a), (b), and (c) are the same as signal waveforms (a), (b), and (c) shown in Fig. 6, and signal waveform (d) is different from signal waveform (d) in Fig. 6. Signal waveforms (a) and (b) show an example in which the frequency of current Iu is low, and the solid line of signal waveform (a) shows the change in current Iu, and the solid line of signal waveform (b) shows the change in fault detection counter C. On the other hand, signal waveforms (c) and (d) show an example in which the frequency of current Iu is high, and the solid line of signal waveform (c) shows the change in current Iu, and the solid line of signal waveform (d) shows the change in fault detection counter C.
[0083] In the fifth embodiment, the increment and decrement amounts of the fault detection counter C are set to constant values, so the slope of the line of the fault detection counter C in the signal waveform (b) is the same as the slope of the line of the fault detection counter C in the signal waveform (d). On the other hand, when comparing the signal waveform (a) with the signal waveform (c), the increment and decrement periods of the fault detection counter C per period are shorter in the signal waveform (c) which has a higher current frequency, so the increment and decrement amounts of the fault detection counter C during that time are also smaller.
[0084] Therefore, when the current frequency is low, the absolute value of the current Iu is within the range of the threshold Th2 for a long period even during normal operation, so the value of the threshold Th3 is set large to prevent erroneous diagnosis. On the other hand, when the current frequency is high, the period during which the current Iu does not flow during an open fault is short. To enable fault detection even in this case, the value of the threshold Th3 is set smaller than when the frequency of the current Iu is high. In this case, the magnitude of the threshold Th3 is set so that the fault detection counter C reaches the threshold Th3 within a period of about 1 / 2 a period, taking into consideration the amount of addition and the number of additions during an open fault.
[0085] In this way, in the fifth embodiment in which the addition amount and the subtraction amount are set to constant values, the magnitude of the threshold value Th3 is changed according to the current frequency, making it possible to detect an open failure in the power semiconductor 822 regardless of the motor speed (high or low current frequency) and to prevent erroneous detection during normal operation.
[0086] In the first embodiment described above, it is possible to detect an open circuit fault regardless of whether the current frequency is high or low by changing the increment / decrement of the fault detection counter C according to the current frequency. On the other hand, in the fifth embodiment, it is possible to detect an open circuit fault regardless of whether the current frequency is high or low by changing the magnitude of the threshold value Th3 according to the current frequency.
[0087] FIG. 16 shows signal waveforms for comparing the first embodiment and the fifth embodiment. In FIG. 16, signal waveform (a) shows the change in motor speed, signal waveform (b) shows the current waveform in normal operation, signal waveform (c) shows the change in the fault detection counter C in the fifth embodiment, and signal waveform (d) shows the change in the fault detection counter C in the first embodiment. Signal waveforms (c) and (d) also show the threshold value Th3 in each embodiment. Note that the example shown in FIG. 16 shows a case where the absolute value of the current is less than the threshold value Th2 for a long period of time while the motor speed is low, and then the motor speed increases and the current value becomes equal to or greater than the threshold value Th2.
[0088] In the first embodiment, even if the current value continues to be less than the threshold value Th2 while the motor speed is low, the fault detection counter C is incremented only little by little, as shown in signal waveform (d). On the other hand, when the motor speed increases, the period during which the current value is equal to or greater than the threshold value Th2 becomes longer than the period during which the current value is less than the threshold value Th2, and the fault detection counter C is decremented by a large amount. As a result, the fault detection counter does not reach the threshold value Th3, and an open fault is not erroneously diagnosed.
[0089] In the fifth embodiment, when the motor speed is low (when the current frequency is low), the threshold value Th3 is set high and decreases rapidly as the motor speed increases. Also, when the current value is below the threshold value Th2, the increase in the fault detection counter C is greater than in the first embodiment, in which the addition amount is set high at low frequencies. When the current amplitude exceeds the threshold value Th2, the subtraction period of the fault detection counter C is longer than the addition period, so that the fault detection counter C generally tends to decrease.
[0090] In this case, as shown in the signal waveform (c), the decrease in the fault detection counter C is greater than the decrease in the threshold Th3. Therefore, when the motor speed increases, the fault detection counter C becomes greater than the threshold Th3, and an open fault is erroneously diagnosed. Thus, the diagnosis method of the first embodiment can reduce the occurrence of erroneous diagnosis when the motor speed changes, compared to the diagnosis method of the fifth embodiment.
[0091] According to the embodiment of the present invention described above, the following advantageous effects are achieved.
[0092] (C1) As shown in Figs. 2 to 6, 14, 15, etc., a current detection unit (AC current sensor 84) detects the output current of each phase of a three-phase inverter circuit (power conversion circuit 82) having a switching element (power semiconductor 822), and a fault diagnosis unit (diagnosis unit 806) diagnoses an open fault of the power semiconductor 822 based on the output current of each phase. The diagnosis unit 806 adds a predetermined addition amount when the value of the output current is within a predetermined range (|current|<threshold Th2), and subtracts a predetermined subtraction amount when the value of the output current is not within the predetermined range, thereby calculating a fault detection counter C for each phase, and diagnoses an open fault when the fault detection counter C exceeds a first counter threshold (threshold Th3). The diagnosis unit 806 sets the predetermined addition amount and the predetermined subtraction amount to smaller values as the frequency of the output current is lower, or sets the first counter threshold (threshold Th3) to a larger value as the frequency of the output current is lower.
[0093] As in the first embodiment described above, the lower the frequency of the output current, the smaller the predetermined addition amount and the predetermined subtraction amount are set to, so that an open circuit failure can be detected regardless of the frequency. Also, as in the fifth embodiment, the lower the frequency of the output current, the larger the first counter threshold (threshold Th3) is set to, so that an open circuit failure can be detected regardless of the frequency. Furthermore, since an open circuit failure can be detected within a period of about 1 / 2 the current cycle regardless of the frequency (motor rotation speed) of the output current, rapid failure detection can be performed.
[0094] (C2) In the above (C1), as shown in Figures 7 to 9, the diagnostic unit 806 sets the predetermined addition amount and the predetermined subtraction amount to smaller values as the frequency of the output current is lower, sets a fault flag when the fault detection counter C exceeds a predetermined set threshold (threshold Th3A), and resets the fault flag when the fault detection counter falls below a predetermined reset threshold (threshold Th3B).The diagnostic unit 806 then increments the debounce counter Cd when the fault flag is set, and decrements the debounce counter Cd when the fault flag is reset, and diagnoses an open fault when the debounce counter Cd exceeds a second counter threshold (threshold Th4).
[0095] By introducing the debounce counter Cd based on the abnormality flag as described above, it is possible to avoid false detections due to accidental influences such as noise, and to improve the stability of open fault diagnosis.
[0096] (C3) In the above (C1), as shown in Figures 10, 11, etc., the diagnostic unit 806 sets the specified addition amount and the specified subtraction amount to smaller values as the frequency of the output current is lower, and sets the specified range, i.e., the width from Th2 to -Th2 in Figure 11, to a wider value as the frequency of the output current is higher.
[0097] When the frequency of the output current (i.e., the motor speed) is high, a ripple current is likely to occur due to the influence of the back electromotive force generated by the motor 9. Therefore, by setting the threshold Th2 larger as the motor speed increases, misdiagnosis can be avoided, and stable open fault diagnosis can be performed regardless of the motor speed.
[0098] (C4) In addition, in the above (C1), a rotational speed detection unit (motor angle sensor 91) for detecting the rotational speed (motor speed) of the rotating electrical machine (motor 9) to which the output current is input is further provided. As the rotational speed is lower, the predetermined addition amount and the predetermined subtraction amount are set to smaller values, and as the rotational speed is higher, the width of the predetermined range is set wider. The same operational effects as those in the case of (C3) described above can be achieved.
[0099] (5) In the above (C1), as shown in FIGS. 12, 13, etc., the diagnosis unit 806 sets the predetermined addition amount and the predetermined subtraction amount to smaller values as the frequency of the output current is lower, and based on the output current detected by the AC current sensor 84, estimates the positive and negative of the current in the normal case where no open fault has occurred. When the estimation result of the diagnosis unit 806 is positive, the negative side range (Th2A to 0) within the predetermined range (Th2B < predetermined range < Th2A) is set larger than the positive side range (0 to Th2B), and when the estimation result of the diagnosis unit 806 is negative, the positive side range (0 to Th2B) within the predetermined range (Th2B < predetermined range < Th2A) is set larger than the negative side range (Th2A to 0).
[0100] As a result, as shown in FIG. 13, even if a negative-direction ripple current occurs during the period R1, misdiagnosis can be avoided because the threshold Th2B is set large in the negative direction during this period R1. As a result, stable open fault diagnosis can be performed regardless of the motor speed (i.e., the frequency of the output current).
[0101] The present invention is not limited to the above-described embodiment, and various modifications are included. For example, the above-described embodiment has been described in detail to clearly explain the present invention, and is not necessarily limited to those having all of the configurations described. In addition, it is possible to replace a part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. In addition, it is possible to add, delete, or replace a part of the configuration of each embodiment with another configuration.
[0102] In addition, the above-mentioned configurations, functions, processing units, processing means, etc. may be realized in part or in whole by hardware, for example, by designing them as integrated circuits. In addition, the above-mentioned configurations, functions, etc. may be realized in software by a processor interpreting and executing a program that realizes each function. Information such as the program, table, file, etc. that realizes each function can be stored in a memory, a recording device such as a hard disk or SSD (Solid State Drive), or a recording medium such as an IC card or DVD. [Explanation of symbols]
[0103] 1...vehicle, 2...drive device, 5...DC power supply, 6...control device, 7...fault notification device, 8...power conversion device, 9...motor, 80...control circuit, 81...driver circuit, 82...power conversion circuit, 83...DC voltage sensor, 84...AC current sensor, 91...motor angle sensor, 801...state control unit, 802...target current calculation unit, 803...current control unit, 804...PWM signal generation unit, 805...motor speed calculation unit, 806...diagnosis unit, 822...power semiconductor, Sf...fault notification signal, Sm...operation mode, θm...motor angle sensor value, τs...target torque, ω0...motor angular speed
Claims
1. a current detection unit that detects an output current of each phase of a three-phase inverter circuit having a switching element; a fault diagnosis unit that diagnoses an open fault in the switching element based on the output current of each phase, The fault diagnosis unit is a predetermined addition amount is added when the value of the output current is within a predetermined range, and a predetermined subtraction amount is subtracted when the value of the output current is not within the predetermined range, thereby calculating a fault detection counter for each phase, and diagnosing the open fault when the fault detection counter exceeds a first counter threshold value; the lower the frequency of the output current, the smaller the predetermined addition amount and the predetermined subtraction amount are set, or the first counter threshold value is set to a larger value. Power conversion equipment.
2. 2. The power conversion device according to claim 1, The fault diagnosis unit is the lower the frequency of the output current, the smaller the predetermined addition amount and the predetermined subtraction amount are set to; setting a fault flag when the fault detection counter exceeds a predetermined set threshold, and resetting the fault flag when the fault detection counter falls below a predetermined reset threshold; Incrementing a debounce counter when the fault flag is set, and decrementing a debounce counter when the fault flag is reset; Instead of determining that an open fault has occurred when the fault detection counter has exceeded the first counter threshold, diagnosing that an open fault has occurred when the debounce counter has exceeded a second counter threshold. Power conversion equipment.
3. 2. The power conversion device according to claim 1, The fault diagnosis unit is the lower the frequency of the output current, the smaller the predetermined addition amount and the predetermined subtraction amount are set to; The higher the frequency of the output current, the wider the width of the predetermined range is set. Power conversion equipment.
4. 2. The power conversion device according to claim 1, a rotation speed detection unit that detects the rotation speed of a rotating electric machine to which the output current is input, The fault diagnosis unit is the lower the rotation speed, the smaller the predetermined addition amount and the predetermined subtraction amount are set to; The higher the rotation speed, the wider the width of the predetermined range is set. Power conversion equipment.
5. 2. The power conversion device according to claim 1, The fault diagnosis unit is the lower the frequency of the output current, the smaller the predetermined addition amount and the predetermined subtraction amount are set to; estimating whether a current is positive or negative in a normal case in which no open circuit fault occurs, based on the output current detected by the current detection unit; When the estimation result of the fault diagnosis unit is positive, a range on the negative value side of the predetermined range is set to be larger than a range on the positive value side, When the estimation result of the fault diagnosis unit is negative, the range on the positive value side of the predetermined range is set to be larger than the range on the negative value side. Power conversion equipment.
6. The power conversion device according to claim 1 ; a rotating electric machine to which the output current of the three-phase inverter circuit of the power conversion device is input.
Citation Information
Patent Citations
Fault diagnostic device for inverter
JP2010246327A
Fault diagnostic device for inverter
JP2010246328A
