Plasma processing device

Abstract

To provide a plasma processing device which forms an electrode of a multizone heater layer (heater wire) safely, at low cost and easily.SOLUTION: A plasma processing device comprises: a processing chamber; a cylindrical sample table where a wafer is mounted on a top face thereof; a first heater layer disposed inside of a dielectric film, which covers the top face of a substrate having a disc shape of the sample table, and including a plurality of film-like heaters 801 disposed in a plurality of regions CH1-CH4 each having a rectangular shape; and a plurality of temperature sensors disposed inside of the substrate at a lower side of the regions. The plurality of regions are disposed corresponding to a semiconductor circuit pattern and includes four regions disposed while making one side of the rectangular shape oppose the adjacent region. The plasma processing device comprises: four feeding paths 601 which are electrically connected to one location and supply power from a DC power source while defining the film-like heaters as one aggregate; and one returning path 701 which is electrically connected to the other location of each film-like heater and in which power is fed back to the DC power source.SELECTED DRAWING: Figure 7

Description

[Technical field]

[0001] The present disclosure relates to a plasma processing apparatus in which a substrate-like sample, such as a semiconductor wafer, is placed on the upper surface of a sample stage in a processing chamber inside a vacuum vessel, and the sample is processed using plasma formed by supplying a processing gas into the processing chamber, and in particular to a plasma processing apparatus which includes a plurality of film-like heaters in a dielectric film covering the upper surface of the sample stage, and which uses these heaters to adjust the temperature of the sample while processing it. [Background technology]

[0002] In plasma processing equipment, in order to shorten the time required for etching a so-called multilayer film, which is a film formed on the surface of a plate-shaped sample such as a semiconductor wafer (hereinafter simply referred to as a wafer), adjacent films are processed vertically in the same processing chamber, without removing the wafer from the processing chamber between the processing of each of these films.

[0003] In such a process, it is important to adjust the temperature of the sample stage placed in the processing chamber to an appropriate temperature for processing the wafer. For this reason, a heater is built into the sample stage of the plasma processing device, and when processing the wafer, the temperature is adjusted to an appropriate temperature for processing, thereby improving the processing accuracy.

[0004] One example of such a plasma processing apparatus has been known in the past, as disclosed in Japanese Patent Laid-Open No. 2007-67036 (Patent Document 1). This prior art discloses a plasma processing apparatus in which a coolant flows through multiple concentric coolant flow paths arranged inside a metal disk or cylindrical base material constituting a sample stage arranged in a processing chamber inside a vacuum vessel, and a ring-shaped heater film is formed by thermal spraying on the top of the metal disk or cylindrical base material, and the temperature distribution within the wafer surface can be changed for each etching condition.

[0005] Furthermore, as another example of such a conventional plasma processing apparatus, one disclosed in JP 2017-157855 A (Patent Document 2) is known. This conventional technology discloses a plasma processing apparatus in which a coolant flow passage is arranged concentrically in multiple inside a metal disk or cylindrical base material constituting a sample stage arranged in a processing chamber inside a vacuum vessel, a first heater element having a concentric shape on the top of the metal disk or cylindrical base material, and a second heater element having a larger number of divisions than the first heater element and a smaller heat generation amount are arranged. With this conventional technology, a semiconductor wafer can be processed while controlling the temperature of the semiconductor wafer arranged on the sample stage. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2007-67036 A [Patent Document 2] JP 2017-157855 A Summary of the Invention [Problem to be solved by the invention]

[0007] In the conventional technology, when considering arranging multiple heaters to control the temperature of the electrodes, the following problem occurs. A total of two holes are required for each zone, one for power supply and one for current return, and arranging the holes becomes difficult as the number of zones increases. Even if it were possible to arrange them, drilling a large number of holes would be expensive and difficult to process.

[0008] The present disclosure provides a technique for safely, easily and at low cost fabricating electrodes for a multi-zone heater layer (heater wire). [Means for solving the problem]

[0009] According to one aspect of the present disclosure, there is provided a plasma processing apparatus comprising: a processing chamber disposed within the vacuum vessel and in which a wafer to be processed is disposed to generate plasma; a cylindrical sample stage disposed within the processing chamber and on whose upper surface the wafer is placed; a first heater layer disposed inside a dielectric film covering an upper surface of the disk-shaped substrate of the sample stage, the first heater layer including a plurality of film-shaped heaters disposed in each of a plurality of rectangular regions; a plurality of temperature sensors disposed within the substrate below the rectangular shaped area of ​​the first heater layer; the plurality of regions are arranged corresponding to circuit patterns of a plurality of semiconductor devices formed on the upper surface of the wafer, and each of the plurality of regions includes four regions arranged such that one side of the rectangular shape faces an adjacent region; The film heaters arranged in each of the four regions are grouped together, and the system is provided with four power supply paths that are electrically connected to one point of each of the film heaters in the group and supply power from a DC power source, and one return path that is electrically connected to another point of each of the film heaters and returns the power to the DC power source.

[0010] In other words, a method is used to collect the return current in the substrate. Specifically, by processing vias in the substrate and connecting the heater layer and the substrate with tungsten via wiring, it becomes possible to collect the heater return current in the substrate. Effect of the Invention

[0011] According to a plasma processing apparatus according to an embodiment of the present disclosure, electrodes for a multi-zone heater layer (heater wire) can be safely, easily and at low cost. [Brief description of the drawings]

[0012] [Figure 1] 1 is a vertical cross-sectional view showing an outline of a configuration of a plasma processing apparatus according to an embodiment; [Diagram 2] 2 is a cross-sectional view showing a schematic view of a part of the configuration of a sample stage of the plasma processing apparatus shown in FIG. [Diagram 3]3 is a partially enlarged cross-sectional view showing a schematic view of a part of the configuration of the sample stage of the plasma processing apparatus shown in FIG. 2. [Figure 4] FIG. 13 is a diagram showing an example of a second heater in the sample stage. [Diagram 5] FIG. 2 is a diagram showing an example of a first heater in a sample stage. [Figure 6] FIG. 2 is a layout diagram of the power supply section and return section of the grid heater. [Figure 7] A close-up view of a set of four grid heaters. [Figure 8] FIG. 13 is a diagram of an example of polarity reversal in four grid heaters and their power supplies. [Figure 9] This is a schematic diagram showing the relationship between the four corners (first corner cna, second corner cnb, third corner cnc, fourth corner cnd) and four sides (first side SL1, second side SL2, third side SL3, fourth side SL4) of the rectangular region 501 described in Figure 5 and the four regions (first region CH1, second region CH2, third region CH3, fourth region CH4) of Figure 7. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] An embodiment of the present disclosure will be described with reference to the drawings. Hereinafter, an embodiment of the present disclosure will be described with reference to Fig. 1 to Fig. 8. Fig. 1 is a cross-sectional view that typically illustrates an outline of the configuration of a plasma processing apparatus according to an embodiment. In particular, Fig. 1 illustrates a plasma etching apparatus that uses a microwave electric field as an electric field for forming plasma, generates ECR (Electron Cyclotron Resonance) between the electric field and magnetic field of the microwave to form plasma, and uses the plasma to etch a substrate-like sample such as a semiconductor wafer. A plasma etching apparatus (plasma processing apparatus) 100 shown in Fig. 1 will be described. The plasma etching apparatus 100 has a vacuum vessel 101 equipped with a processing chamber 104 inside in which plasma is generated. The vacuum vessel 101 has an open cylindrical upper portion, and a dielectric window 103 (made of quartz, for example) for introducing microwaves is arranged on the upper portion as a lid member, forming the processing chamber 104 in which the inside and outside are airtightly separated. Furthermore, a vacuum exhaust port 110 is disposed at the bottom of the vacuum vessel 101, and is connected to a vacuum exhaust device (not shown) disposed below and connected to the vacuum vessel 101. Furthermore, a shower plate 102 forming the ceiling surface of a processing chamber 104 is provided below the lower surface of a dielectric window 103 forming a cover member at the top of the vacuum vessel 101. The shower plate 102 has a plurality of gas introduction holes 102a disposed in the center, and etching gas is introduced into the processing chamber 104 through the plurality of gas introduction holes 102a. The shower plate 102 is a circular plate made of a dielectric material such as quartz.

[0014] An electric field and magnetic field generating unit 160 for generating an electric field and a magnetic field for generating plasma 116 is disposed at an upper portion outside vacuum vessel 101. Electric field and magnetic field generating unit 160 is provided in plasma etching apparatus 100 and includes the following configuration. That is, electric field and magnetic field generating unit 160 includes a waveguide 105 disposed above dielectric window 103 and through which an electric field is transmitted to supply a high frequency electric field of a predetermined frequency for generating plasma 116 to processing chamber 104. Furthermore, the electric field transmitted through the inside of waveguide 105 is generated by oscillation in electric field generating power supply 106. The frequency of the electric field is not particularly limited, but in this embodiment, a microwave of 2.45 GHz is used. In addition, magnetic field generating coils 107 for forming a magnetic field are arranged above the dielectric window 103 of the processing chamber 104, on the side wall of the vacuum vessel 101 constituting the cylindrical part of the processing chamber 104, and on the outer periphery of the lower end of the waveguide 105, in a state surrounding these. Then, the electric field of the microwave generated by the electric field generating power supply 106 propagates inside the waveguide 105, passes through the dielectric window 103 and the shower plate 102, and is supplied to the processing chamber 104 from above. Furthermore, the magnetic field generating coil 107 generates ECR (Electron Cyclotron Resonance) by interaction with the magnetic field supplied into the processing chamber 104. Then, atoms or molecules of the processing gas introduced into the processing chamber 104 through the gas introduction hole 102a of the shower plate 102 are excited and dissociated, thereby generating high-density plasma 116 in the processing chamber 104.

[0015] Further, a wafer mounting electrode (first electrode) 120 constituting a sample stage is provided at the bottom of the processing chamber 104 and below the space in which the plasma 116 is formed. The wafer mounting electrode 120 has a mounting surface 120a on which a semiconductor wafer (hereinafter, also simply referred to as a wafer) 109, which is a sample (processing target), is mounted. The wafer mounting electrode 120 is disposed so that the mounting surface 120a faces the shower plate 102 or the dielectric window 103. The wafer mounting electrode 120 has an upper surface 120b covered with a dielectric film 140 constituting the mounting surface 120a. A plurality of conductive films (electrostatic attraction electrodes) 111 for electrostatic attraction are disposed inside the dielectric film 140 and are connected to a DC power source 126 via a high-frequency filter 125 shown in FIG. 1. Here, the conductive film 111 constitutes the mounting surface 120a of the sample stage, and is a film-like electrode for electrostatic attraction to which DC power for attracting a semiconductor wafer by static electricity is supplied. In this case, the conductive film 111 may be a bipolar film in which one and the other of the multiple film-like electrodes are given different polarities, or a monopolar film in which the same polarity is given, but in this embodiment, it is shown as a monopolar film.

[0016] Further, a high frequency power supply (first high frequency power supply) 124 and a matcher 129 are disposed at a position closer to the electrostatic attraction electrode (conductive film 111) than the high frequency filter 125, and the high frequency power supply 124 and the matcher 129 are connected to an electrode substrate 108 having a circular or cylindrical shape made of a conductive material disposed inside the wafer mounting electrode 120. The high frequency power supply 124 is connected to the ground 112. A high frequency power (first high frequency power) of a predetermined frequency is supplied from the high frequency power supply 124 to the electrode substrate 108, and a bias potential is formed above the wafer 109 attracted and held on the upper surface of the wafer mounting electrode 120 during processing of the wafer 109. In other words, the sample stage has the wafer mounting electrode (first electrode) 120 to which high frequency power (first high frequency power) is supplied from the high frequency power supply 124 while the plasma 116 is being generated.

[0017] Inside the electrode base material 108, in order to remove the transferred heat and cool the wafer mounting electrode 120, multiple coolant flow paths 152 are arranged in a spiral or concentric manner around the central axis in the vertical direction of the electrode base material 108 or the wafer mounting electrode 120. A cooling coolant for cooling the electrode base material 108 flows through the coolant flow paths 152.

[0018] Furthermore, a recess 120d is disposed on the outer periphery of the upper part of the wafer mounting electrode 120, surrounding the upper part on the outer periphery of the mounting surface 120a. A susceptor ring 113, which is a ring-shaped member made of a dielectric material such as quartz or ceramics such as alumina, is placed on the ring-shaped upper surface of the recess 120d, which is formed lower than the mounting surface 120a of the sample stage. When the upper surface of the susceptor ring 113 is placed on the recess 120d, the upper surface of the susceptor ring 113 has a dimension that is higher than the mounting surface 120a of the wafer mounting electrode 120. The susceptor ring 113 is disposed on the outer periphery of the mounting surface 120a of the wafer mounting electrode (sample stage) 120, and covers the surface of the wafer mounting electrode 120. Specifically, the susceptor ring 113 is configured to cover the upper surface and cylindrical side wall surface of the recess 120d, as well as the cylindrical side wall surface of the wafer mounting electrode (sample stage) 120 below the recess 120d.

[0019] In such a plasma etching apparatus 100, in a vacuum transfer chamber that is a separate vacuum container connected to the side wall of the vacuum container 101 and that is depressurized to the same pressure as that of the processing chamber 104 inside a vacuum transfer container, an unprocessed wafer 109 is placed on the arm tip of a robot for wafer transfer arranged in the vacuum transfer chamber. Then, a gate that is a passage that communicates between the vacuum transfer chamber and the processing chamber 104 is opened by the operation of a valve arranged in the vacuum transfer chamber, and the unprocessed wafer 109 placed on the arm tip of the robot is transferred into the processing chamber 104. Furthermore, the wafer 109 transferred to above the mounting surface 120a of the wafer mounting electrode 120 in the processing chamber 104 is transferred onto the lift pins by the vertical movement of the lift pins, and then placed on the mounting surface, and is attracted to and held on the mounting surface 120a of the wafer mounting electrode 120 by the electrostatic force generated by the DC power applied from the DC power source 126.

[0020] In this state, the etching gas has its flow rate or speed adjusted by a mass flow controller (not shown) and is introduced into the space between the dielectric window 103 and the quartz shower plate 102, and after diffusing in this space, is introduced into the processing chamber 104 through the gas inlet holes 102a of the shower plate 102. Thereafter, the gas and particles in the processing chamber 104 are exhausted through the vacuum exhaust port 110 by the operation of the vacuum exhaust device. Depending on the balance between the amount of gas supplied from the gas inlet holes 102a of the shower plate 102 and the amount of gas exhausted from the vacuum exhaust port 110, the inside of the processing chamber 104 is adjusted to a predetermined value within a range suitable for processing the wafer 109.

[0021] While the wafer 109 is being held by suction, a thermally conductive gas such as He (helium) is supplied from an opening (not shown) on the top surface of the dielectric film 140 to the gap between the wafer 109 and the top surface of the dielectric film 140, which is the mounting surface 120a of the wafer mounting electrode 120, thereby promoting heat transfer between the wafer 109 and the wafer mounting electrode 120. The temperature of the wafer mounting electrode 120 or the electrode base material 108 is adjusted in advance before the wafer 109 is mounted by circulating a coolant adjusted to a temperature within a predetermined range through a coolant flow path 152 arranged in the electrode base material 108 of the wafer mounting electrode 120. Therefore, by transferring heat between the wafer mounting electrode 120 or the electrode base material 108, which have a large heat capacity, the temperature of the wafer 109 is adjusted to be close to these temperatures before processing, and even after processing begins, heat is transferred from the wafer 109 to adjust the temperature of the wafer 109.

[0022] In this state, an electric field and a magnetic field of microwaves are supplied into the processing chamber 104, and plasma 116 is generated using the gas. When plasma 116 is formed, radio frequency (RF) bias power is supplied from a radio frequency power supply 124 to the electrode substrate 108, a bias potential is formed above the upper surface of the wafer 109, and charged particles such as ions in the plasma 116 are attracted to the upper surface of the wafer 109 according to the potential difference with the potential of the plasma 116. Furthermore, the charged particles collide with a mask previously placed on the upper surface of the wafer 109 and the surface of the film layer to be processed of the film structure including the film layer to be processed, thereby performing an etching process. During the etching process, the processing gas introduced into the processing chamber 104 and particles of reaction products generated during the process are exhausted from a vacuum exhaust port 110. In the plasma etching apparatus 100 of the present embodiment, during plasma processing, a second high frequency power is supplied from a high frequency power source (second high frequency power source) 127 to a conductor ring (second electrode) 131 arranged on the upper part of the outer periphery of the sample stage through a power supply connector 161 (described later) that is provided on the sample stage and has an elastic conductive member.

[0023] In the wafer mounting electrode 120 of this embodiment, the AC high voltage generated from the high frequency power source (second high frequency power source) 127 is introduced to a conductor ring (second electrode) 131 made of a conductor arranged in the susceptor ring 113 via a load matching unit 128 and a load impedance variable box 130. With this configuration, the impedance value for the high frequency power from the high frequency power source 127 through the electrode base material 108 to the outer periphery of the wafer 109 is relatively low by a combination of the load impedance variable box 130 adjusted to a suitable impedance value and a relatively high impedance portion arranged on the upper part of the susceptor ring 113. This makes it possible to effectively supply high frequency power to the outer periphery and outer periphery of the wafer 109, to reduce the concentration of the electric field at the outer periphery or outer periphery, and to attract charged particles such as ions in the plasma to the upper surface of the wafer 109 in a desired direction. The high frequency power source 127 is connected to the ground 112. The frequency of the high frequency power source 127 in this embodiment is preferably set to the same value as that of the high frequency power source 124 or a constant multiple value.

[0024] Next, the configuration of the sample stage 120 according to this embodiment will be described in detail with reference to Figures 1, 2 and 3. Figure 2 is a cross-sectional view that typically shows a part of the configuration of the sample stage of the plasma processing apparatus shown in Figure 1. FIG. 3 is a partially enlarged cross-sectional view showing a schematic view of a part of the configuration of the sample stage of the plasma processing apparatus shown in FIG.

[0025] In this embodiment, the disk-shaped or cylindrical substrate 108 is arranged inside the sample stage 120 shown in FIG. 2 and is made of a metallic material such as titanium, aluminum, or a compound thereof. It is electrically connected to the ground electrode S and is conductively connected to the wall surface of the vacuum vessel 100 shown in FIG. 1, and is fixed to the ground potential. The substrate 108 has a convex portion on which the wafer 109 is placed in the center, and a concave portion that is arranged in a ring shape on the outer periphery of the convex portion, surrounds the convex portion, and has a lowered upper surface. A step portion that forms the side wall of the outer periphery of the convex portion is provided between the convex portion and the concave portion. As described above, the susceptor ring 113 made of a ceramic material is placed on the ring-shaped concave portion.

[0026] A dielectric film 201, which is a film made of a dielectric material such as ceramics, is disposed on the flat upper surface of the convex portion of the substrate 108. Furthermore, on the upper layer of the dielectric film 201, a plurality of first heater films (also called first heater layers) 202, which are film-like electrodes made of a conductive material and generate heat when supplied with DC power, are disposed so as to cover a plurality of regions on the upper surface of the substrate 108. In other words, the dielectric film 201 is disposed on the upper surface of the substrate 108, and further, on the upper layer of this dielectric film 201, a heater film 202, which is a film-like heater, is formed.

[0027] The heater film 202 is further covered with an upper dielectric film 203, and the heater film 202 is surrounded by a dielectric member (dielectric film 203). In the sample stage 120 of this embodiment, a plurality of second heater films (also called second heater layers) 204, which are film-like electrodes made of a conductive material having the same structure as above and generate heat when DC power is supplied, are arranged on the upper layer of the dielectric film 203 covering the heater film 202 arranged on the top of the dielectric film 201, covering a plurality of regions on the upper surface of the base material 108. Furthermore, a dielectric film 205 is arranged so as to cover the heater film. In other words, a first heater film 202 surrounded by dielectric films 201 and 203 is arranged on the upper surface of the base material 108, and a second heater film 204 surrounded by dielectric films 203 and 205 as described above is arranged on the upper surface of the first heater film 202.

[0028] Each of the heater films 202, 204 is connected to a DC power source 314, 315, the operation of which is adjusted according to a command signal from a controller, via a power supply cable (power supply line, power supply path) 316, 317, so that the DC power source 314, 315 can supply DC power. That is, the power supply cable 316, 317 is a cable that electrically connects the heater films 202, 204 to the DC power source 314, 315 that supplies DC power to the heater films 202, 204. However, the power supply cable 316, 317 does not include a filter for high frequency power. As described above, the inside of the dielectric film 201 arranged on the upper surface of the sample stage 120 in this embodiment is configured to have a plurality of first heater films 202 (called multi-zone heaters) that can adjust the amount of heat generated and thus the temperature of the upper surface of the dielectric film 201 for each region (zone) and a plurality of second heater films 204 that can adjust the temperature of the upper surface of the dielectric film 201 on the upper layer.

[0029] In the sample stage 120 of this embodiment, a first heater film 202 surrounded by dielectric films 201 and 203 is disposed on the upper surface of a substrate 108, and a second heater film 204 surrounded by dielectric films 203 and 205 is disposed on the upper surface of the first heater film 202 as described above. A shield film 206, which is a film-like conductive member disposed on the upper surface of the dielectric film 205 so as to surround the outer periphery of the upper and peripheral parts, is further provided, and the heater films 202 and 204 are surrounded (covered) by the shield film 206. In other words, the structure in which the heater films 202 and 204 are surrounded by the shield film (conductor film) 206 is encapsulated by the dielectric material constituting a part of the dielectric films 201, 203, and 205. The shield film 206 is electrically connected to the substrate 108, and thus the shield film 206 is fixed to the ground potential like the substrate 108, and as a result, the inflow of high frequency waves into the heater films 202 and 205 can be suppressed.

[0030] Furthermore, a dielectric film 207 is disposed on the upper surface of the shielding film 206, and an electrode film 208, which is an electrode for electrostatic attraction and an electrode to which high frequency power for forming a high frequency bias is supplied, is disposed on the upper portion of this dielectric material member. In other words, the electrode film 208 is a film made of a conductive material, and is electrically connected to a high frequency bias power supply 313 that supplies high frequency power of a predetermined frequency. In addition, a DC power supply 312 is also electrically connected to the electrode film 204, and by applying a DC voltage, the wafer 109 placed on the mounting surface of the sample stage 120 can be attracted by static electricity.

[0031] Moreover, above the upper surface of the electrode film 208, a dielectric film (electrostatic adsorption member) 209 made of a ceramic material constituting the uppermost surface of the sample stage 120 and the mounting surface on which the wafer 108 is placed is disposed so as to cover the upper surface of the convex portion, the concave portion around it, and the step portion which is the side wall of the convex portion. That is, on the uppermost surface of the sample stage 120, a dielectric film 209 is disposed on the shielding film 206, the dielectric film 209 including an electrode film (electrode) 208 which is disposed on the upper part of the shielding film 206 and adsorbs the wafer 109 by electrostatic force.

[0032] The sample stage 120 also has a plurality of through holes penetrating between the top surface of the dielectric film 209 on the convex portion and the bottom surface of the substrate 108. These through holes include a plurality of lift pin through holes 302 that house lift pins (pins) 311 that move up and down inside to support the wafer 109 from below and move it above the top surface of the sample stage 120, and a heat transfer gas supply hole 301 through which a heat transfer gas such as He flows to be supplied to the gap between the top surface of the dielectric film 209 and the back surface of the wafer 109 placed thereon. The lift pins 3011 arranged in the lift pin through holes 302 raise or lower the wafer 109 above the top surface of the dielectric film 209. Here, the plurality of lift pin through holes 302 open to the top surface of the dielectric film 209 and penetrate the dielectric film 201, the dielectric film 203, the dielectric film 205, and the dielectric film 206. Inside the sample stage 120, there are arranged an electrostatic adsorption power supply hole 303 having a power supply cable and connector arranged therein for applying power to the electrode film 208, a heater power supply hole 305 having a power supply cable and connector arranged therein for supplying power to the first grid-shaped heater film 202, and a heater power supply hole 304 having a power supply cable and connector arranged therein for supplying power to the second ring-shaped heater film 204.

[0033] The inner peripheral wall surface of the portion of the holes penetrating the inside of the base material 108 is provided with insulating bosses 306, 307, 308, 309, 310, which are cylindrical members made of a dielectric material or an insulating material. That is, the base material 108 of the sample stage 120 is provided with insulating bosses 306, 307, 308, 309, 310, which are cylindrical members made of an insulating material and which are arranged inside each of the multiple through holes and form the inner peripheral wall surface of the base material 108 inside the base material 108. These insulating bosses 306, 307, 308, 309, 310 can suppress the occurrence of discharge in the space inside the hole exposed to the electric field due to high frequency power during the processing of the wafer 109. The insulating bosses 306, 307, 308, 309, 310 can be made of ceramic materials such as alumina and yttria, or resin materials.

[0034] In this embodiment, the devices for adjusting the operation of the plasma etching apparatus 100, including the electric field / magnetic field adjusting system such as the electric field generating power supply 106, the magnetic field generating coil 117, the high frequency power supply 124, the high frequency filter 125, the DC power supply 126, the high frequency power supply 127, the matching boxes 128, 129, and the load impedance variable box 130, as well as the DC power supplies 314, 315 for supplying power to the first heater film 202 and the second heater film 204 inside the dielectric film 201, and devices constituting a pressure adjusting system such as a vacuum exhaust device and a mass flow controller for adjusting the amount of gas supplied, which will be described later, each include a detector for detecting the operating state such as output, flow rate, pressure, etc., or a plurality of temperature sensors disposed inside the substrate 108 of the wafer mounting electrode 120, and are connected to the control unit 170 for communication via wire or wirelessly.

[0035] When a signal indicating the state of the operation output from the detector provided in each of these devices is transmitted to the control unit 170, the computing unit of the control unit 170 reads out software stored in the internal storage device of the control unit 170, detects the amount of the state from the signal received from the detector based on the algorithm, calculates and transmits a command signal for adjusting it to an appropriate value. The devices included in the electric field / magnetic field adjustment system or pressure adjustment system that receive the command signal adjust their operation in response to the command signal.

[0036] 4 is a diagram showing an example of the second heater film in the sample stage. The heater arrangement 401 is an example of the configuration of multiple ring-shaped second heater films 204 inside the sample stage 120. Each heater film 204 has a heater wire inside, and its purpose is to perform temperature control according to the distribution of reaction products and the plasma density distribution during plasma processing of the wafer 109.

[0037] The second heater layer 204 includes a plurality of film-shaped heater parts 401H (401H0, 401H1, 401H2, 401H3). The film-shaped heater parts 401H (401H0, 401H1, 401H2, 401H3) are disposed inside the dielectric film (dielectric films 203, 205) above the first heater layer 202, on a plurality of radii in the radial direction from the center (108C) of the upper surface of the base material 108 of the sample stage 120 toward the outer periphery (108P), in three or more radial regions (4R0, 4R1, 4R2, 4R3) including circular regions concentrically disposed around the center and ring-shaped regions surrounding the outer periphery of the circular regions.

[0038] 5 is a diagram showing an example of the arrangement of the first heater film provided on the sample stage of the plasma processing apparatus according to the present embodiment. The film-like first heater film 202 of this embodiment is a metal film-like heater arranged inside the dielectric film 140 that covers the circular upper surface of the substrate 108 in a plurality of layers, and is arranged in a plurality of regions 501 corresponding to each of the circuit patterns of a plurality of semiconductor devices formed in advance on the upper surface of the wafer 109 placed on the upper surface of the dielectric film 209 when viewed from above. In the substrate 108 of the sample stage 120 having a circular shape, the region 501 is not a perfect rectangular shape at the outer periphery of the upper surface of the dielectric film 201, but has a partially arc-shaped ARC.

[0039] The first heater film 202 is provided to adjust the temperature of each circuit pattern (also called a die or chip area) of a semiconductor device formed on the wafer 109 during plasma processing.

[0040] 5, the first heater film 202 has, in the rectangular region 501, a rectangular outer frame wiring portion 501CL and an internal wiring portion 801 formed inside the outer frame wiring portion 501CL. The internal wiring portion 801 is connected, for example, between a pair of opposing corners (cna, cnc) at the four corners (first corner cna, second corner cnb, third corner cnc, fourth corner cnd) of the outer frame wiring portion 501CL. The pair of corners (cna, cnc) are diagonal corners. The internal wiring portion 801 is a film-like heater wire, and is configured, for example, by a meandering heater wiring (also called a meander wiring) between a pair of opposing corners (RLC1, RLC2) of the outer frame wiring portion 501CL so as to be able to heat the entire region inside the outer frame wiring portion 501CL. The outer frame wiring portion 501CL has a first side SL1 provided between the first corner portion cna and the second corner portion cnb, a second side SL2 provided between the second corner portion cnb and the third corner portion cnc, a third side SL3 provided between the third corner portion cnc and the fourth corner portion cnd, and a fourth side SL4 provided between the fourth corner portion cnd and the first corner portion cna. The first side SL1 and the third side SL3 are provided opposite each other, a second side SL2 is provided between the first side SL1 and the third side SL3, and a fourth side SL4 is provided opposite the second side SL2.

[0041] The outer frame wiring portion 501CL of the first heater film 202 has a rectangular shape inside each of a plurality of rectangular regions 501 partitioned into a grid shape by a plurality of first line segments (RL) extending in the front-rear direction at equal intervals in parallel on the upper surface of the dielectric film 201 in correspondence with the shape of the die of the semiconductor device, and a plurality of second line segments (CL) perpendicular to the plurality of first line segments (RL) and extending in the front-rear direction at equal intervals. Note that, at the outer periphery of the upper surface of the dielectric film 201, the region 501 is not a perfect rectangular shape but has a part with an arc-shaped ARC, so that the outer frame wiring portion 501CL is shaped to match the outer shape of the region 501 with the arc-shaped ARC in order to correspond thereto (see FIG. 6 for this).

[0042] The number of regions 501 of the first heater film 202 in this embodiment is greater than the number of regions 401 of the multiple ring-shaped second heater film 204 shown in Fig. 4. The number of regions 401 is 3 to 40, while the number of regions 501 can be 10 to 200. Inside each region 501, a rectangular film-like heater wire (801) is arranged by folding back a narrow metal thin film constituting the first heater layer 202 multiple times in the horizontal direction along the sides of the rectangular outer shape.

[0043] In this embodiment, by adjusting the power supplied to each of the multiple film heaters (801) formed along the shape of the region 501 corresponding to the die of the semiconductor device during plasma processing, the temperature of the wafer 109 can be accurately adjusted at each location on the upper surface of the wafer 109 corresponding to each die of the semiconductor device of the wafer 109. In particular, by adjusting the temperature according to each die of the semiconductor device to be manufactured, it is possible to reduce the variation in the results of the etching process for the wafer 109. Here, the thickness of the film of the multiple film heaters formed by the second heater layer 204 is configured to be larger (thicker) than the thickness of the film of the multiple film heaters 801 formed by the first heater layer 202.

[0044] 5, a plurality of temperature sensors TS are disposed inside the substrate 108 below each heater zone (501) of the first heater film 202 corresponding to the die of the semiconductor device of the wafer 109. The plurality of temperature sensors TS are electrically connected to the control unit 170 by, for example, metal wiring, and the temperature values ​​measured and detected by the plurality of temperature sensors TS are transmitted to the control unit 170 via the metal wiring.

[0045] The control unit 170, which receives the output from the temperature sensor TS, detects the temperature of the upper surface of the substrate 108 or the surface of the dielectric film 201 corresponding to each zone (501) according to a software algorithm stored in an internal storage device. The control unit 170 further adjusts the amount of DC power supplied to the heater wire (801) of each zone (501) according to the software algorithm read out similarly based on the detected temperature, thereby adjusting the heat generation amount of the heater wire (801) of each zone (501) or the heat generation amount on the substrate 108. In other words, the control unit 170 is configured to perform feedback control based on the detected temperatures corresponding to the outputs from the multiple temperature sensors TS so that the heat generation amount of the film-like heater wire (801) constituting the first heater layer (202) of each zone (region 501) or the heat generation amount on the substrate 108 becomes the desired heat generation amount or the desired heat generation amount.

[0046] In this embodiment, the heater wire (801) that is feedback controlled is the first heater film 202. The second heater film 204 maintains a predetermined amount of power supply to the heater of each of the ring-shaped zones (4R0, 4R1, 4R2, 4R3) in which circular or arc-shaped regions are connected as shown in FIG. 4 for each wafer 109 or for each type of film structure on the upper surface of the wafer 109, or for each batch (lot) of a predetermined number of wafers 109. That is, in the plasma processing of any wafer 109, the heat generation amount of the second heater film 204 is fixed, and the temperature of the first heater film 202 (heater wire 801) is adjusted according to the temperature obtained as an output from the temperature sensor TS. In other words, the control unit 170 adjusts the output of the film-shaped heater 801 arranged within one of the rectangular regions (region 501, CH1-CH4 in Figures 7 and 8) of the first heater layer 202 while maintaining the output of the heater of the second heater layer 204 located above one of the rectangular regions (region 501, CH1-CH4 in Figures 7 and 8) corresponding to the die of the semiconductor device, in accordance with the outputs from the multiple temperature sensors TS.

[0047] Next, the arrangement of the current supply section (601, hereinafter also referred to as the power supply section) and return section (701, hereinafter also referred to as the current return section) of the first grid-shaped heater (first heater film 202) of this embodiment will be described with reference to Fig. 6. Fig. 6 is a top view showing the arrangement of the second heaters arranged in the regions on the grids on the sample stage according to this embodiment shown in Fig. 5, and the power supply sections (601) and current return sections (701) to each heater. Fig. 6 shows an example of the arrangement of the power supply sections (601) and current return sections (701) together with the arrangement of the grid heater (first heater film 202).

[0048] The features of this arrangement method are as follows:

[0049] 1) The connector parts of either the supply section (601) or the feedback point (701) are arranged at the two diagonal corners of each rectangular grid (white circle ○: connection area of ​​the feedback point (701), black circle ●: connection area of ​​the supply section (601)).

[0050] 2) A set of four grid-like regions 501, each of which is adjacent to two other regions belonging to the set with one side of a rectangle facing each other in the front-rear direction (up-down direction in the figure) and the left-right direction (left-right direction in the same direction), is one set (SET1), and each set (SET1) is provided with one current return section 701 and four power supply sections (also called power supply paths) 601. That is, the four grid-like regions 501 are formed by connecting two regions 501 in the front-rear and left-right directions to form a region having a rectangular shape as a whole, and the current return section (also called return path) 701 is arranged at the corner of each of the four grid-like regions 501, which is the center of the entire region, and the power supply section 601 of each region 501 is arranged at the corner diagonally opposite the corner where the current return section 701 is arranged. That is, in one set (SET1) including four grids (one grid corresponds to the region 501), a current return section (701) is arranged in the center, and power supply sections (601) are arranged at the four corners. In other words, four film heaters 801 arranged in each of the four regions (CH1-CH4) are treated as one group, and four power supply paths (power supply sections 601) electrically connected to one point (A, B, C, D) of each of the film heaters 801 in the group for supplying power from a DC power source, and one return path (701) electrically connected to another point (G) of each film heater for returning the power to the DC power source are provided.

[0051] 3) For this reason, in the first heater 202 in each region 501 of this embodiment, a current flows from a point connected to the connector of the power supply unit 601 arranged at the corner of each of the four regions 501 toward the center or center of the entire region (SET1) of the set of four regions 501. In other words, as shown by the arrows in Fig. 6, the current flows from the four corners (corners where the power supply units 601 are arranged) toward the center (portion where the current return unit 701 is arranged), or from the corners (power supply units 601) toward the center (current return unit 701), or from the center (current return unit 701) toward the corners (power supply units 601).

[0052] 4) The connector portions of the power supply section 601 and the current return section 701 are alternately arranged at the boundaries (corners) of two areas 501 on the boundaries of the grid in the front-back and left-right directions that divide the areas 501 arranged in a lattice pattern.

[0053] 5) In this embodiment, each of the boundaries that divide the grid-shaped regions 501 in the front-rear and left-right directions is arranged through the center of the circular substrate 108 or the top surface of the dielectric film 203. However, in the outer peripheral portion of the circular dielectric film 203, four adjacent rectangular regions 501 cannot be configured as one set, so three grid-shaped regions 501 are arranged as one set. Such a set of regions 501 or second heater film 202 in the outer peripheral portion may be composed of two or three. In other words, in the outer peripheral portion of the heater where a set (SET1) cannot be formed with four grids, the connector portion of the supply portion 601 and the connector portion of the current return portion 701 are arranged in a set (SET2) of three grids.

[0054] 6) The connector part of the current return part (701) is made of a conductive material and is connected to the substrate 108, which is grounded and electrically set to the ground potential, by tungsten via wiring. With this configuration, the current supplied to the first heater film 202 flows through the current return part 701 to the substrate 108, which is set to a constant voltage (ground potential). By reducing the number of through holes (holes) that accommodate cables constituting a return path for returning the current supplied to the first heater film 202 to the power source, the number of steps and costs for manufacturing the sample stage 120 or the plasma processing apparatus can be reduced. In other words, since the return current flows to the substrate 108, the number of holes required for the return current to be processed in the substrate 108 can be reduced. By performing via processing on the substrate 108 and connecting the first heater layer 202 and the substrate 108 with tungsten via wiring, it becomes possible to collect the return current of the heater wire 801 in the substrate 108.

[0055] Next, a configuration for inverting the polarity of the power supply section 601 of the film-like heater wire 801 constituting the first heater film 202 inside the set (SET1) of four regions 501 will be described with reference to Figs. 7 and 8. Fig. 7 is a top view showing a schematic outline of the configuration of the first heater film 202 of the set (SET1) of four regions in the sample stage 120 shown in Fig. 6. The heater wire (801) of the first heater 202 in each region 501 is shown enlarged. Fig. 8 is a diagram showing a schematic current flowing through the first heater film 202 between the power supply section 601 and the current return section 701 in the set (SET1) of four regions shown in Fig. 7. Fig. 8 is an equivalent circuit diagram in which the four heater wires 801 shown in Fig. 7 are rewritten as four resistance elements (R1, R2, R3, R4). 8 also shows the relative magnitude of the potential of the power supply part 601 with respect to the potential of the current return part 701 (ground potential in this embodiment) as positive and negative polarities. The positive and negative signs (+,-) and arrangement in Fig. 8 indicate the potential of the power supply part (601) higher than the potential of the return part 701 with "+" and lower with "-".

[0056] As shown in FIG. 7 and FIG. 8, one set (SET1) is composed of four grids, and the four grids are composed of four regions (CH1, CH2, CH3, CH4) corresponding to four dies of a semiconductor device. One set (SET1) is rectangular in plan view and has four corners (A, B, C, D) and a center point (G). The four corners (A, B, C, D) are arranged in the order of a first corner A, a second corner B, a third corner C, and a fourth corner D in a clockwise direction in plan view. Here, the first corner A and the third corner C correspond to a pair of opposing corners. Also, the second corner B and the fourth corner D correspond to another pair of opposing corners.

[0057] The first region CH1 is disposed in a rectangular portion between a first corner A and a center point (G). A power supply unit 601 is disposed in the first corner A, and a current return unit 701 is disposed in the center point (G). A heater wire (801) is connected between the power supply unit 601 in the first corner A and the current return unit 701 in the center point (G).

[0058] The second region CH2 is disposed in a rectangular portion between the second corner B and the center point (G). A power supply unit 601 is disposed in the second corner B. A heater wire (801) is connected between the power supply unit 601 at the second corner B and the current return unit 701 at the center point (G).

[0059] The third region CH3 is disposed in a rectangular portion between a third corner C and the center point (G). A power supply unit 601 is disposed in the third corner C. A heater wire (801) is connected between the power supply unit 601 in the third corner C and the current return unit 701 in the center point (G).

[0060] The fourth region CH4 is disposed in a rectangular portion between the fourth corner A and the center point (G). The power supply unit 601 is disposed in the fourth corner D. A heater wire (801) is connected between the power supply unit 601 in the fourth corner D and the current return unit 701 in the center point (G).

[0061] The first region CH1 and the second region CH2 are arranged rotationally symmetrically with respect to the center point (G). Similarly, the first region CH1 and the third region CH3, and the first region CH1 and the fourth region CH4 are also arranged rotationally symmetrically with respect to the center point (G). In other words, the four first to fourth regions (CH1-CH4) are arranged with one side of each rectangle facing the adjacent region.

[0062] In other words, when viewed from above, the current return section 701, which is a return path, is disposed at a location (G) where the four corners of each of the four mutually adjacent rectangular regions (CH1-CH4) are adjacent to each other. Then, in each of the four rectangular regions (CH1-CH4), the power supply section (601), which is a power supply path, is connected to the corners (A, B, C, D) diagonally opposite the corner to which the return path (701) is connected.

[0063] FIG. 9 is a schematic diagram showing the relationship between the four corners (first corner cna, second corner cnb, third corner cnc, fourth corner cnd) and four sides (first side SL1, second side SL2, third side SL3, fourth side SL4) of the rectangular region 501 described in FIG. 5 and the four regions (first region CH1, second region CH2, third region CH3, fourth region CH4) of FIG. 7.

[0064] The second region CH2 is disposed by rotating the first region CH1 90 degrees to the right with respect to the center point (G) or the third corner cnc, so that the second side SL2 of the first region CH1 and the third side SL3 of the second region CH1 overlap. Similarly, the third region CH3 is disposed by rotating the second region CH2 90 degrees to the right with respect to the center point (G), so that the second side SL2 of the second region CH1 and the third side SL3 of the third region CH3 overlap. The fourth region CH4 is disposed by rotating the third region CH3 90 degrees to the right with respect to the center point (G), so that the second side SL2 of the third region CH1 and the third side SL3 of the fourth region CH3 overlap. And the second side SL2 of the fourth region CH1 and the third side SL3 of the first region CH3 overlap.

[0065] That is, the four first to fourth regions (CH1-CH4) are arranged with one side of the rectangle (the second side SL2 and the third side SL3) facing the adjacent region (the first region CH1 and the second region CH2, the second region CH2 and the third region CH3, the third region CH3 and the fourth region CH4, and the fourth region CH4 and the first region CH1). The center point (G) is adjacent to the third corners cnc of the four regions (the first region CH1, the second region CH2, the third region CH3, and the fourth region CH4).

[0066] As shown in Fig. 8, the potential of at least one of the connector parts of the power supply unit 601 located at the diagonal corners (B, D) of the corners (A, B, C, D) of each of the four areas 501 in which the current return unit 701 is arranged is set to a negative potential (-) with respect to the connector part of the current return unit 701 set to the ground potential (0V). In this embodiment, the polarity of the potential of the connector parts set to a positive potential (+) value in two power supply units 601 is set to a negative potential (-) value obtained by inverting the polarity of the potential of the connector parts in the other two power supply units 601. In other words, the potential of at least one point (A, B, C, or D) where each film heater (801) is connected to each of the four power supply units (601) that are the power supply paths is made lower (negative potential (-)) than the potential (0V: ground potential) of the point (G) where each film heater (801) is connected to one return path (701).

[0067] As a result, in the set (SET1) of four grids, the current (I1, I3) flowing from the power supply unit 601 set to a positive potential (+) through the first heater film 202 (heater wire 801: resistive elements R1, R3) to the current return unit 701 and the current (I2, I4) flowing from the current return unit 701 through the first heater film 202 (heater wire 801: resistive elements R2, R4) to the power supply unit 601 set to a negative potential (-) are at least partially offset. This makes it possible to reduce the current flowing through the return path from the current return unit 701 to the power source. This reduces the size of the return path, and suppresses an increase in the volume of the sample stage 120.

[0068] Next, a case where the number of power supply sections (601) whose polarity is to be reversed (the number of power supply sections (601) whose polarity is to be reversed (the number of power supply sections (601) whose polarity is to be reversed) in a set (SET1) of four grid regions 501 (the number of power supply sections (601) whose polarity is to be reversed (the number of power supply sections (601) whose polarity is to be reversed)) is equal (the number of power supply sections (601) whose polarity is to be reversed) (the number of power supply sections (601) whose polarity is to be reversed) is equal (the number of power supply sections (601) whose polarity is to be reversed)). In FIGS. 6 and 8, the direction of the arrow ARM in the drawings indicates the direction of current flow, and the symbols of electrical resistance are omitted as appropriate in FIG. 6. In the example of FIGS. 7 and 8, in the set (SET1) of four regions 501, the number (2) of power supply sections 601 whose polarity is to be reversed (the number of power supply sections (601) whose polarity is to be reversed) in a set (SET1) of four grid regions 501 is set to 2, the same as the number (2) of power supply sections 601 whose polarity is to be reversed (the number of power supply sections (601) whose polarity is to be reversed).

[0069] In such a configuration, it is possible to reduce the return current of the current return section (701) under processing conditions in which the distribution of temperature values ​​during processing of the areas of the die of the semiconductor device on the wafer 109 corresponding to each grid-like area 501 shown in Figures 5 and 6 has rotational symmetry with respect to the center point 108C of the substrate 108.

[0070] This is because, when the temperature conditions during processing of the wafer 109 have rotational symmetry, the amount of heat generated by the first heater film 202, which is adjusted for each region 501, also needs to have rotational symmetry in order to realize the temperature distribution by heating the wafer 109. Also, when the thermal resistivity of the heater wire 801 of the first heater film 202 is equal between the regions 501 or is close enough to be considered equal, the current flowing through the first heater 202 in each region 501 also needs to have similar rotational symmetry.

[0071] That is, a set (SET1) of four grid-like regions 501 is arranged with rotational symmetry with respect to the center (G). In this configuration, if the number of power supply units 601 (the number of positive potentials (+)) is equal to the number of power supply units 601 that are not inverted (the number of negative potentials (-)), the magnitudes of the currents (I1, I2, I3, I4) flowing through the heater wires 801 located at positions that are line-symmetric or point-symmetric with respect to the center point G (current return unit 701) are equal, and it is guaranteed that the current apparently flowing through the electrode base material 108 is half that in the case where the polarity is not inverted.

[0072] Furthermore, under conditions where the surface temperature of electrode fang 108 is uniform over the entire surface (hereinafter referred to as flat temperature conditions), the currents flowing within the set of four grids (SET1) are uniform, and no current flows through current return portion 701.

[0073] In addition, in the outer peripheral portion 108P, even in the heater wires 801 at the ends of the electrode where three current return portions 701 are common, the temperatures of the heater wires 801 become almost equal under flat temperature conditions or temperature conditions where the temperature near the center of the electrode is high. In this case, it is expected that the return current of the current return portion 701 can be suppressed to about one third compared to the case where the polarity is not reversed.

[0074] If polarity reversal is not performed, the current flowing through the electrode substrate 108 increases with an increase in the number of heater wires 801. Joule heat is generated in the substrate 108 in proportion to the square of the magnitude of the current flowing through the substrate 108, affecting the temperature control of the wafer 109. Alternatively, a risk of electric shock may be expected due to a large amount of current flowing through the substrate 108. [Explanation of symbols]

[0075] 101: Vacuum container 104: Processing room 108: Base material 109: Wafer (sample) 120: Sample stage 140: Dielectric film 202: First heater layer 202 501, CH1, CH2, CH3, CH4: Area 601: Power supply section (power supply path) 701: Current return section (return path) 801: Film heater TS: Temperature sensor SET1: A set of regions A, B, C, D: corner G: Center point

Claims

1. a processing chamber disposed within the vacuum vessel and in which a wafer to be processed is disposed to generate plasma; a cylindrical sample stage disposed within the processing chamber and on whose upper surface the wafer is placed; a first heater layer disposed inside a dielectric film covering an upper surface of the disk-shaped substrate of the sample stage, the first heater layer including a plurality of film-shaped heaters disposed in each of a plurality of rectangular regions; a plurality of temperature sensors disposed within the substrate below the rectangular shaped area of ​​the first heater layer; the plurality of regions are arranged corresponding to circuit patterns of a plurality of semiconductor devices formed on the upper surface of the wafer, and each of the plurality of regions includes four regions arranged such that one side of the rectangular shape faces an adjacent region; A plasma processing apparatus comprising: four power supply paths electrically connected to one point of each of the film-shaped heaters in each of the four regions as a group, for supplying power from a DC power source; and one return path electrically connected to another point of each of the film-shaped heaters, for returning the power to the DC power source.

2. 2. The plasma processing apparatus according to claim 1, a second heater layer; The plasma processing apparatus includes a second heater layer inside the dielectric film, above the first heater layer, and including a circular region concentrically arranged around the center on a plurality of radii in a radial direction from the center to the outer periphery of the top surface of the substrate of the sample stage, and a ring-shaped region surrounding the outer periphery of the circular region.

3. 3. The plasma processing apparatus according to claim 1, The plasma processing apparatus, wherein the return path is made of a conductive material and is connected to the substrate, which is at ground potential.

4. 4. The plasma processing apparatus according to claim 3, The return path is disposed at a position where four corners of each of the four adjacent regions are adjacent to each other when viewed from above, In each of the four regions, the power supply path is connected to a corner diagonally opposite to the corner to which the return path is connected.

5. 3. The plasma processing apparatus according to claim 1, a control unit for adjusting an output of the film-like heater constituting the first heater layer in response to outputs from the plurality of temperature sensors;

6. 3. The plasma processing apparatus according to claim 1, a control unit that adjusts outputs of the film-like heaters that constitute the first heater layer in response to outputs from the temperature sensors; A plasma processing apparatus in which the potential at at least one point where each of the film heaters is connected to each of four power supply paths is made lower than the potential at a point where each of the film heaters is connected to one return path.

7. 3. The plasma processing apparatus according to claim 2, A plasma processing apparatus comprising: a control unit that adjusts the output of the film heater located within one of the rectangular regions of the first heater layer while maintaining the output of the heater of the second heater layer located above one of the rectangular regions in response to the output from the plurality of temperature sensors.

8. 3. The plasma processing apparatus according to claim 2, A plasma processing apparatus, wherein the thickness of the plurality of film-shaped heaters of the second heater layer is greater than the thickness of the plurality of film-shaped heaters of the first heater layer.

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