Switching power supply device and semiconductor device for power supply control

Abstract

To provide an IC for a power supply control, for changing a switching frequency control characteristic without adding an external terminal.SOLUTION: An IC for a power supply control that outputs a signal for performing an ON / OFF control of a switching element in accordance with an output detection signal from a secondary side of a transformer, comprises: a first external terminal into which a voltage in accordance with an output detection signal is input; a second external terminal into which a voltage that is proportion with a current flowing in a primary side winding is input; a period signal generation circuit that generates a period signal for periodically turning on the switching element; a current detection circuit that generates an off timing signal on the basis of a voltage of the first and the second external terminals; and a correction current circuit that generates a correction current that is output to the second external terminal to which an external correction resistance is connected. The correction current circuit outputs the correction current in the case that it is in a light load state, and the period signal generation circuit is constructed so as to generate the period signal or to stop the output of the period signal with a border of a predetermined reference value set to the voltage of the first external terminal.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to an isolated switching power supply device equipped with a voltage conversion transformer and a power supply control semiconductor device used therein. [Background technology]

[0002] DC power supplies include switching control type AC-DC converters (switching power supplies) that control the current flowing through the primary winding by turning on and off a switching element connected in series with the primary winding of a voltage conversion transformer, thereby controlling the voltage induced in the secondary winding. In addition, in switching control type AC-DC converters, a current detection resistor is provided in series with the primary switching element for the primary side control operation, and a terminal (current detection terminal) is provided in a power supply control circuit (IC) to input a voltage converted from current to voltage by the resistor. Some converters then control the peak current of the primary winding based on the detected current value and a feedback voltage from the secondary side to keep the secondary side output voltage or output current constant.

[0003] Furthermore, in an AC-DC converter configured to control the output using a voltage converted from current to voltage by a current detection resistor and a feedback voltage from the secondary side, in order to reduce switching loss and increase power efficiency during light loads, some converters are configured to perform PWM control in the medium to heavy load range, while in the light load range, they perform burst operation to output power in response to the light load by temporarily stopping switching.

[0004] The applicant has also invented and previously filed an invention in which a power supply control semiconductor device (power supply control IC) constituting a switching power supply unit is provided with a new external terminal for connecting an external resistor, and by changing the resistance value of the external resistor connected to the external terminal, the user can easily change the switching frequency control characteristics from the outside to reduce noise, or change the reference value of the feedback terminal for stopping and restarting switching (see Patent Document 1). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent No. 6424644 [Patent Document 2] Patent No. 7032648 Summary of the Invention [Problem to be solved by the invention]

[0006] However, the invention of Patent Document 1 requires the addition of an external terminal (ADJ) for connecting an external resistor that changes the frequency control characteristics and settings, so when applied to a power supply control semiconductor device with limited terminal count, the package needs to be changed, which causes a problem of increased costs. Also, the switching power supply device of Patent Document 1 has a problem that there is a trade-off between power efficiency and output ripple, and improving power efficiency increases output ripple, and reducing output ripple decreases power efficiency.

[0007] Similar to the invention of the present application, Patent Document 2 discloses an invention relating to a switching power supply device configured to pass a correction current through a correction resistor connected to a detection terminal provided in a power supply controlling semiconductor device. However, the invention of Patent Document 2 aims to enable an overcurrent limit value to be appropriately set according to the output voltage by an external correction resistor in a power supply controlling semiconductor device that includes an overcurrent detection circuit and is configured to be able to switch the output voltage, and the problem is different from that of the invention of the present application. Since the problems are different, the characteristics of the correction current passed through the correction resistor also differ between the invention of Patent Document 2 and the invention of the present application.

[0008] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a switching power supply device and a primary-side power supply control semiconductor device constituting the same, in which the switching frequency control characteristics, particularly in the light load region, can be changed by external settings without providing a new external terminal for connecting an external resistor. Another object of the present invention is to provide a switching power supply and a semiconductor device for power supply control that can easily adjust the trade-off between power efficiency and output ripple by changing the resistance value of an external resistor. [Means for solving the problem]

[0009] In order to achieve the above object, the present invention provides a voltage conversion transformer having a DC voltage applied to a primary winding; A switching element connected in series with the primary winding; a power supply control semiconductor device that generates and outputs a control signal for controlling the switching element to be turned on and off; a current-voltage conversion element connected in series with the switching element to convert a current flowing through the primary winding into a voltage; a switching power supply device which controls on and off of the switching element to intermittently pass a current through the primary winding, rectifies and smoothes a current induced in a secondary winding of the transformer, and outputs a DC voltage, The power supply control semiconductor device includes: a first external terminal to which a voltage or a current corresponding to an output detection signal from the secondary side of the transformer is input; a second external terminal to which the voltage converted by the current-voltage conversion element is input; a periodic signal generating circuit that generates a periodic signal that provides timing for periodically turning on the switching element; a current detection circuit that generates a signal indicating a timing to turn off the switching element based on a voltage or a current at the first external terminal and a voltage at the second external terminal; a correction current circuit for generating a correction current to be output to the second external terminal; Equipped with A compensation resistor is provided between the second external terminal and the current-voltage conversion element.

[0010] According to the above configuration, since the correction current circuit outputs a correction current to an external terminal (current detection terminal CS) to which a voltage proportional to the current flowing through the switching element is input, the voltage of the external terminal (CS) is shifted higher by a voltage corresponding to the product of the current value of the correction current output and the resistance value of an external resistor (correction resistor) connected to the current detection terminal, and the change in the off timing signal output from the current detection circuit becomes faster, changing the switching period. Therefore, unlike the invention of Patent Document 1, there is no need to provide an external terminal (ADJ) to which an external resistor is connected. Therefore, the switching frequency control characteristics can be changed by external settings (resistance value of the external correction resistor) without increasing the number of external terminals. Furthermore, by changing the resistance value of the external resistor connected to the external terminal, it is possible to easily adjust the power efficiency and output ripple, which are in a trade-off relationship, allowing the power supply designer to freely decide which characteristic to prioritize in the switching power supply. Effect of the Invention

[0011] According to the present invention, in an isolated switching power supply device that has a transformer for voltage conversion and controls output by turning on and off a current flowing through a primary winding, and in a semiconductor device for controlling a primary side current that constitutes the isolated switching power supply device, it is possible to change the switching frequency control characteristics, particularly in a light load region, by setting from the outside, without providing a new external terminal for connecting an external resistor. Also, by changing the resistance value of an external resistor connected to an external terminal to which a voltage proportional to the current flowing through a switching element is input, it is possible to easily adjust power efficiency and output ripple, which are in a trade-off relationship. [Brief description of the drawings]

[0012] [Figure 1] 1 is a circuit configuration diagram showing an embodiment of a DC-DC converter as a DC power supply device to which the semiconductor device for switching power supply according to the present invention is effectively applied; [Diagram 2] 2 is a functional block diagram showing an embodiment of a semiconductor device for a switching power supply according to the present invention, which is provided on the primary side of a transformer in the DC-DC converter of FIG. 1. FIG. [Diagram 3] 1 is a circuit diagram showing a specific example of a light load determination circuit constituting a switching power supply semiconductor device according to an embodiment of the present invention; [Figure 4] 1 is a circuit diagram showing a specific example of a period timer circuit constituting a switching power supply semiconductor device according to an embodiment of the present invention; [Diagram 5] 2 is a circuit diagram showing a specific example of a turn-off circuit (current detection circuit) constituting the switching power supply semiconductor device of the embodiment; FIG. [Figure 6] 1 is a circuit diagram showing a configuration example of a correction current circuit constituting a switching power supply semiconductor device according to an embodiment of the present invention; [Figure 7] 1A is a graph showing the relationship between a feedback voltage and a period of a periodic signal in a power supply controlling semiconductor device according to an embodiment, and FIG. 1B is a graph showing the relationship between the feedback voltage and a switching frequency and a correction current. [Figure 8] 4 is a graph showing the relationship between the output current and the average switching frequency in the power supply controlling semiconductor device of the embodiment; [Figure 9] 11 is a timing chart of PWM operation during medium to heavy load in the power supply controlling semiconductor device of the embodiment when an element with a small resistance value is used as a correction resistor. [Figure 10] 13 is a timing chart of PWM operation during medium to heavy load when an element with a large resistance value is used as a compensation resistor. [Figure 11] 11 is a timing chart showing a burst operation (under a light load) when an element with a small resistance value is used as a compensation resistor in the power supply controlling semiconductor device of the embodiment. [Figure 12] 13 is a timing chart showing a burst operation (under a light load) when an element with a large resistance value is used as a compensation resistor. [Figure 13] 11 is a graph showing the relationship between the output current and the magnitude of the output ripple when the resistance value of the compensation resistor in the power supply controlling semiconductor device of the embodiment is large and when it is small. [Figure 14] 11 is a graph showing the relationship between the output current and the efficiency when the resistance value of the compensation resistor in the power supply controlling semiconductor device of the embodiment is large and when it is small. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing an embodiment of an isolated DC-DC converter as a DC power supply device to which a power supply control semiconductor device according to the present invention is applied. The isolated DC-DC converter of this embodiment has a pair of voltage input terminals 11 to which a DC voltage is input, a voltage conversion transformer 12 having a primary winding Np, a secondary winding Ns and an auxiliary winding Nb, a switching transistor SW1 connected in series with the primary winding Np of the transformer 12, and a switching power supply semiconductor device (hereinafter referred to as a power supply control IC) 13 that drives the switching transistor SW1 on and off. When configuring a switching power supply device (AC-DC converter), a diode bridge circuit that rectifies the AC voltage from an AC power supply and a smoothing capacitor are connected in front of the input terminals 11.

[0014] In this embodiment, the switching transistor SW1 is configured as a discrete component using an N-channel MOSFET (insulated gate field effect transistor). The power supply control IC 13 is provided with an output terminal GATE for a gate drive signal that drives the gate of the transistor SW1. Furthermore, in the DC-DC converter of this embodiment, a rectifying and smoothing circuit is provided on the primary side of the transformer 12, and is composed of a rectifying diode D1 connected in series with the auxiliary winding Nb, and a smoothing capacitor C1 connected between the cathode terminal of this diode D1 and the ground point GND, and the voltage rectified and smoothed by the rectifying and smoothing circuit is applied to the power supply voltage terminal VDD of the power supply control IC 13.

[0015] The power supply control IC 13 is also provided with an external terminal FB to which a phototransistor (light receiving element) PT constituting a photocoupler for transmitting an output detection signal on the secondary side to the primary side as a feedback voltage VFB is connected. Furthermore, the power supply control IC 13 is provided with an external terminal CS as a current detection terminal to which a voltage Vcs converted from current to voltage by a current detection resistor Rs connected between the source terminal of the switching transistor SW1 and the ground point GND is input. A compensation resistor Rc, which will be described in detail later, is connected between the external terminal CS and the connection node between the switching element SW1 and the current detection resistor Rs.

[0016] On the other hand, a rectifier diode D2 connected in series with the secondary winding Ns and a smoothing capacitor C2 connected between the cathode terminal of this diode D2 and the other terminal of the secondary winding Ns are provided on the secondary side of the transformer 12, and a DC voltage Vout is generated and output by rectifying and smoothing the AC voltage induced in the secondary winding Ns by intermittently passing a current through the primary winding Np. The primary winding Np and secondary winding Ns of the transformer 12 have opposite polarities, and this is a flyback type converter.

[0017] Furthermore, on the secondary side of the transformer 12, there are provided a constant voltage control circuit (shunt regulator) 14 constituting an output voltage detection circuit that detects the output voltage Vout, and a light emitting diode (light emitting element) PD constituting a photocoupler for transmitting an output voltage detection signal corresponding to the detection voltage of the constant voltage control circuit 14 to the primary side. A current corresponding to the detection voltage is passed through the light-emitting diode PD by the constant voltage control circuit 14, and this is transmitted to the primary side as an optical signal having an intensity corresponding to the detection voltage, so that a current corresponding to the optical intensity flows through the phototransistor PT and is converted to a feedback voltage VFB by a pull-up resistor (Rp in FIG. 2) or the like inside the power supply control IC 13 and input.

[0018] The constant voltage control circuit 14 includes a bipolar transistor TR1 connected in series with the light emitting diode PD, resistors R3 and R4 for dividing the secondary side output voltage Vout, an error amplifier AMP0 for comparing the divided voltage with a reference voltage Vref0 and outputting a voltage according to the potential difference, and a phase compensation circuit 14a, and is configured so that the output voltage of the error amplifier AMP0 is applied to the base terminal of the transistor TR1, and a current according to the output voltage Vout flows. In this embodiment, the higher the secondary side output voltage Vout, the more the current flows through the light emitting diode PD, which in turn increases the current flowing through the phototransistor PT, and the voltage VFB at the external terminal FB of the power supply control IC 13 decreases. In this embodiment, the rectifier diode D2 is used in the secondary circuit, but a synchronous rectification method may be used in which the rectifier diode D2 is replaced with a switch.

[0019] Next, a functional block configuration of one embodiment of the power supply control IC 13 on the primary side in the power supply device of FIG. 1 and the function of each block will be described with reference to FIGS. The power supply control IC 13 of this embodiment is configured to be able to execute PWM controlled operation (hereinafter referred to as PWM operation) and burst operation depending on the load. To make this possible, as shown in Fig. 2, the power supply control IC 13 of this embodiment includes a light load determination circuit 31 for determining the load, a periodic timer circuit 32 for generating a periodic signal PS that gives a switching period, and a turn-off circuit 33 consisting of a current detection circuit that receives the voltage VFB of the external terminal FB and the voltage Vcs of the current detection terminal CS as inputs and generates a timing signal for turning off the switching element SW1,

[0020] Of these functional circuits, the periodic timer circuit 32 is configured to generate a periodic signal PS having a period corresponding to the voltage VFB of the external terminal FB to which a feedback signal from the secondary side is input. The power supply control IC 13 of this embodiment also includes a correction current circuit 34 that flows a correction current Ics to the correction resistor Rc connected to the current detection terminal CS. The correction current Ics output from the correction current circuit 34 flows to the current detection resistor Rs via the correction resistor Rc. This causes the voltage Vcs of the current detection terminal CS to be shifted higher (raised) by an amount according to the magnitude of the correction current Ics and the correction resistor Rc.

[0021] Furthermore, the power supply control IC 13 includes a latch circuit 35 including an RS flip-flop or the like which receives as input the periodic signal PS output from the timer circuit 32 and the output signal TOFF from the turn-off circuit 33, and a driver circuit 36 ​​which generates a gate drive signal (drive pulse) for turning on and off the switching element SW1 in response to the gate control signal GCS output from the latch circuit 35 and outputs the gate drive signal (drive pulse) from an external terminal GATE. The gate control signal GCS is supplied to the periodic timer circuit 32 as a signal for operating the periodic timer circuit 32. Further, the power supply control IC 13 is provided with an internal power supply circuit 37 composed of a voltage regulator such as a series regulator that supplies an operating voltage to each of the above functional circuits.

[0022] Among the functional blocks 31 to 36 that make up the power supply control IC 13, the light load determination circuit 31 includes a comparator (voltage comparison circuit) CMP1 that compares the voltage VFB of the external terminal FB with a predetermined reference voltage VREF1 or VREF2 (VREF1 < VREF2), and switches S1 and S2 for selectively supplying the reference voltage VREF1 or VREF2 to the non-inverting input terminal of the comparator CMP1. The output of the comparator CMP1 is configured to be supplied to the subsequent periodic timer circuit 32 as an oscillation stop signal OSS. Note that the switch S1 is turned on and off by a signal obtained by inverting the output of the comparator CMP1 with an inverter INV1, and the switch S2 is turned on and off by the output signal of the comparator CMP1. As a result, hysteresis is imparted to the determination process of whether it is a light load, and it is possible to prevent the output of the comparator CMP1 from repeatedly switching between high level and low level in a short time when the voltage VFB is in the vicinity of the reference voltage VREF1. However, hysteresis is not essential.

[0023] As shown in FIG. 4, the periodic timer circuit 32 includes an AND gate G1 that takes as inputs the gate control signal GCS output from the latch circuit 35 and a signal obtained by delaying and inverting the control signal GCS with a delay circuit DLY composed of a series inverter, and an OR gate G2 that takes as inputs the output of the AND gate G1 and the oscillation stop signal OSS output from the light load determination circuit 31. The period timer circuit 32 also includes a variable current source VCS1 that supplies a current corresponding to the voltage VFB of the external terminal FB, a capacitor C3 that is charged by the current from the current source VCS1, and a discharging switch transistor S3 that discharges the charge of the capacitor C3, and the output of the OR gate G2 is applied to the gate terminal of the switch transistor S3.

[0024] Furthermore, the periodic timer circuit 32 includes a comparator CMP2 that compares the charging voltage of the capacitor C3 with a predetermined reference voltage Vref1, and an AND gate G3 that receives the output of the comparator CMP2 and the oscillation stop signal OSS output from the light load determination circuit 31. When the oscillation stop signal OSS is set to low level, the AND gate G3 is opened by the output of the inverter INV2, and the output of the comparator CMP2 is output as the periodic signal PS. On the other hand, when the oscillation stop signal OSS is set to high level, the AND gate G3 is closed by the output of the inverter INV2, and the output of the periodic signal PS is blocked. When the oscillation stop signal OSS is set to high level, the output of the OR gate G2 is fixed to high level, and the oscillation operation of the periodic timer circuit 32 is stopped. Then, under light load conditions, the period timer circuit 32 is stopped by the oscillation stop signal OSS, and when the oscillation stop signal OSS subsequently changes and the period timer circuit 32 is operated, a burst operation is performed in which the switching element SW1 is repeatedly turned on and off until the period timer circuit 32 is stopped again (see FIGS. 11 and 12).

[0025] 4, when the gate control signal GCS changes from low level to high level, the output of the AND gate G1 changes to high level for a predetermined time (the delay time of the delay circuit DLY), the switch transistor S3 turns on, and the charge of the capacitor C3 is discharged. When the gate control signal GCS changes to low level and the switch transistor S3 turns off, charging of the capacitor C3 begins, and when a predetermined time determined by the capacitance value of the capacitor C3 and the current value of the variable current source VCS1 has elapsed, the charging voltage of the capacitor C3 reaches Vref1, and the output of the comparator CMP2 changes from low level to high level. As a result, the comparator CMP2 outputs a periodic signal PS having a period corresponding to the voltage VFB. Therefore, it can be said that the periodic timer circuit 32 is equipped with a variable frequency oscillator circuit. Figure 7(A) shows an example of the relationship between the voltage VFB at the external terminal FB and the period Tps of the periodic signal PS.

[0026] Fig. 5 shows a specific circuit configuration example of the turn-off circuit 33 consisting of a current detection circuit. As shown in Fig. 5, the turn-off circuit 33 includes an operational amplifier AMP1, the voltage Vcs of the external terminal CS being input to a non-inverting input terminal, and a comparator CMP3, the output of the operational amplifier AMP1 being input to a non-inverting input terminal and the voltage VFB of the external terminal FB being input to an inverting input terminal. Resistors R5 and R6 are connected in series between the output terminal of the operational amplifier AMP1 and the ground point, and the voltage divided by the resistors R5 and R6 is input to the inverting input terminal of the operational amplifier AMP1.

[0027] As a result, the operational amplifier AMP1 operates as a non-inverting amplifier circuit having an amplification factor (K1) according to the resistance ratio of resistors R5 and R6, and outputs a signal amplified to K1×Vcs. When the voltage (K1×Vcs) output from the operational amplifier AMP1 exceeds the voltage VFB of the external terminal FB, the output of the comparator CMP3 changes from low level to high level. This output is supplied to the latch circuit 35 as a turn-off signal TOFF, and the switching element SW1 is turned off.

[0028] FIG. 6 shows a specific example of the circuit configuration of the correction current circuit . The correction current circuit 34 shown in Fig. 6 includes an inverting amplifier circuit 41 having an input resistor R7, an operational amplifier AMP3, and a feedback resistor R8, which amplifies the voltage VFB of the external terminal FB, and a clamp circuit 42 having a diode D3 and a constant voltage source CVS, which clamps the output of the inverting amplifier circuit 41 input via a resistor R9. The correction current circuit 34 of this embodiment also includes an operational amplifier AMP3, the voltage of which passed through the clamp circuit 42 is input to a non-inverting input terminal, and a voltage-current conversion circuit 43 having MOS transistors M1 and M2 and a resistor R10 connected in series between the power supply voltage terminal and the ground point. The clamp circuit 42 can regulate the correction current Ics1 in a light load region where the voltage VFB of the external terminal FB is low.

[0029] Furthermore, the correction current circuit 34 of this embodiment includes a current output circuit 44 having a MOS transistor M3 connected in a current mirror with the MOS transistor M1 of the voltage-current conversion circuit 43 and a MOS transistor M4 whose drain is commonly connected to the transistor M3, and a bias circuit 45 that applies a predetermined voltage to the gate terminal of the transistor M4. The bias circuit 45 has a diode-connected MOS transistor M5 and a resistor R11 that are connected in series between the power supply voltage terminal and the ground point, and the gate terminal of the MOS transistor M5 is connected to the gate terminal of the transistor M4 of the current output circuit 44. As a result, the current output circuit 44 outputs, as the correction current Ics, a current corresponding to the potential difference between the voltage applied to the gate terminal of the transistor M3 by the voltage-current conversion circuit 43 and the voltage applied to the gate terminal of the transistor M4 by the bias circuit 45.

[0030] The correction current circuit 34 having the above configuration generates a correction current Ics having characteristics that are large in a region where the voltage VFB is low, small in a region where the voltage VFB is high, and change relatively rapidly in the intermediate region, as shown by the solid line in FIG. 7(B), and the correction current Ics is flowed to a correction resistor Rc outside the IC that is connected to the current detection terminal CS. As can be seen from the solid line in Figure 7(B), when the voltage VFB of the external terminal FB is the reference voltage VREF2, a relatively large current (first reference current Ics1) flows through the correction resistor Rc outside the IC. On the other hand, when the voltage VFB of the external terminal FB is the reference voltage VREF3, a relatively small current (second reference current Ics2) flows through the correction resistor Rc outside the IC. In other words, Ics1>Ics2.

[0031] 6, in a light load state where the voltage VFB of the external terminal FB is lower than the reference voltage VREF2, the voltage Vcs of the current detection terminal CS increases by (correction current Ics×correction resistor Rc). Therefore, the output (K1×Vcs) of the operational amplifier AMP1 reaches the voltage VFB of the external terminal FB earlier than when there is no correction current Ics, and the rising timing of the turn-off signal TOFF output from the current detection circuit 33 becomes earlier. As a result, the energy injected into the transformer by one turning on of the switching element SW1 is reduced, and the average switching frequency is higher than when the correction current Ics does not flow. However, the ripple of the output voltage Vout is reduced. On the other hand, in the medium to heavy load region where the voltage VFB of the external terminal FB is higher than the reference voltage VREF3, the correction current Ics is reduced, so the effect of the correction current Ics on the operation of the IC is small.

[0032] Hereinafter, the operation of the power supply control IC 13 according to this embodiment using the correction current Ics and the correction resistor Rc will be specifically described. 7B also shows the relationship between the voltage VFB at the external terminal FB and the switching frequency Fsw in the power supply control IC 13 of this embodiment. In FIG 7B, the dashed line shows the relationship between the voltage VFB and the switching frequency Fsw. The compensation resistor Rc is selected in the range of 0 to 5 kΩ, and the switching frequency Fsw (the inverse of the switching period) is set to be small when VFB is low and large when VFB is high.

[0033] The correction voltage VCOMP due to the correction current Ics and the correction resistor Rc is expressed as VCOMP=Rc×Ics. If the current flowing through the current detection resistor Rs connected in series with the switching element SW1 is expressed as Ip, the input VLIM of the current detection circuit 33 at the peak of the on-current is VLIM=Rs×Ip+VCOMP=Rs×Ip+Rc×Ics. Assuming that VREF1=VREF2, the reference voltage of the current detection circuit 33 at the time of the burst is expressed as VREF1 / K1 (K1 is the amplification factor of the current detection circuit 33).

[0034] From the above, the current Ip flowing through the current detection resistor Rs during burst operation is Ip=(VLIM-VCOMP) / Rs≒(VREF1 / K1-Rc×Ics) / Rs It can be seen that the larger Rc is, the smaller Ip is. In addition, in Figure 8, the relationship between the output current Iout and the average switching frequency Fsw when the compensation resistance Rc is large and when it is small is shown by the dashed line and the solid line, respectively. From Figure 8, we can see that in the burst operation region where the output current Iout is small, the larger the compensation resistance Rc, the higher the average switching frequency becomes. Therefore, when the compensation resistance Rc is large, the average switching frequency becomes higher, so the efficiency decreases, but the output ripple can be reduced.

[0035] On the other hand, during heavy load (= high VFB) without burst operation, the correction current Ics is not necessary, so if the correction current Ics is reduced as in this embodiment, the loss of the power supply control IC13 is reduced by the amount of the correction current Ics reduced, and the efficiency is increased. For example, when the correction current Ics2 is set to 1 / 50 of Ics1, the correction voltage VCOMP during heavy load is 1 / 50 of that during burst, and the dependency of the load-frequency characteristic on the correction resistor during heavy load is suppressed. In other words, the effect of the correction resistor Rc on the operation during heavy load is small, and the correction resistor Rc can be used to adjust almost only the burst operation.

[0036] In addition, since the power supply control IC 13 of this embodiment includes the correction current circuit 34, in a normal state, the correction current Ics is output to the current detection terminal CS according to the load, but when an open abnormality occurs in which the connection to the current detection terminal CS is cut off, the correction current Ics does not flow. Therefore, by providing a circuit (for example, a voltage comparison circuit) that detects whether or not the correction current flows based on the potential of the current detection terminal CS, the open abnormality of the terminal CS can be detected, and when an abnormality is detected, for example, the latch circuit 35 is reset to turn off the switching element SW1 or the period timer circuit 32 is stopped, thereby preventing abnormal heat generation of the power supply device. In addition, an external terminal may be provided that outputs a signal to notify the outside when an open abnormality of the current detection terminal CS is detected.

[0037] Incidentally, even if an open circuit abnormality detection circuit as described above is not provided, for example, a power supply control IC constituting a switching power supply may have an overcurrent protection function that detects an overcurrent state when the voltage Vcs of the current detection terminal CS becomes equal to or higher than a predetermined potential, and stops the switching operation or switches the switching element to the off state (for example, Patent Document 2). In a power supply control IC having an overcurrent protection function as described above, when an open abnormality occurs at the terminal CS, the correction current circuit 34 pulls up the voltage Vcs at the current detection terminal CS to a potential higher than the overcurrent detection level, and the overcurrent protection function works to stop the switching operation or turn off the switching element SW1. Therefore, a power supply control IC having an overcurrent protection function can be considered as a modification of this embodiment. Moreover, by utilizing an overvoltage protection function of the power supply control IC, when an open circuit abnormality occurs at the terminal CS, the switching operation may be stopped or the switching element SW1 may be turned off.

[0038] Next, in a switching power supply device (FIG. 1) using the power supply control IC 13 of this embodiment, the differences in operation and characteristics when an element with a small resistance value is used as the correction resistor Rc and when an element with a large resistance value is used will be explained using FIGS. 9 to 14. Fig. 9 shows a timing chart of PWM operation under medium to heavy load when an element with a small resistance value is used as the compensation resistor Rc, and Fig. 10 shows a timing chart of PWM operation under medium to heavy load when an element with a large resistance value is used as the compensation resistor Rc. In the figure, ID is the waveform of the drain current flowing through the switching element SW1. Comparing the waveforms of the drain current ID in Figures 9 and 10, it can be seen that the peak value of ID (drain current peak) is higher in Figure 9, which uses an element with a small resistance value for the correction resistor Rc, than in Figure 10, which uses an element with a large resistance value. Furthermore, since the higher the drain current peak, the more energy is injected into the primary winding of the transformer each time the switching element SW1 is turned on, and therefore the lower the average switching frequency, the less the so-called switching loss that accompanies the on / off operation of the switching element SW1 is, and the higher the efficiency.

[0039] Also, Fig. 11 shows a timing chart of burst operation at light load when an element with a small resistance value is used as the compensation resistor Rc, and Fig. 12 shows a timing chart of burst operation at light load when an element with a large resistance value is used as the compensation resistor Rc. Comparing the waveforms of the output voltage Vout in Fig. 11 and Fig. 12, it can be seen that the period during which switching is stopped (period during which the oscillation stop signal OSS is at high level) is shorter in Fig. 12, where an element with a large resistance value is used as the compensation resistor Rc, than in Fig. 11, where an element with a small resistance value is used, and ΔVout, which indicates the magnitude of the output ripple, is smaller.

[0040] Fig. 13 shows the relationship between the output current Iout and the magnitude of the output ripple ΔVout when the resistance value of the compensation resistor Rc is small and large, calculated by simulation, for a switching power supply using the power supply control IC 13 of this embodiment. Also, Fig. 14 shows the relationship between the output current Iout and the power efficiency when the resistance value of the compensation resistor Rc is large and small. In Figures 13 and 14, the solid lines represent the characteristics when the resistance value of the compensation resistor Rc is small, and the dashed lines represent the characteristics when the resistance value of the compensation resistor Rc is large. Figure 13 shows that in the region where the output current Iout is small, the larger the compensation resistor Rc is, the smaller the output ripple is. Figure 14 also shows that in the region where the output current Iout is small, the smaller the compensation resistor Rc is, the higher the power efficiency is.

[0041] From the above, when designing a switching power supply device that prioritizes suppression of output voltage ripple over power efficiency, an element with a large resistance value is used as the compensation resistor Rc connected to the current detection terminal CS. Conversely, when designing a switching power supply device that prioritizes power efficiency over suppression of output voltage ripple, it is understood that an element with a small resistance value should be used as the compensation resistor Rc. Therefore, with the power supply control IC of the above embodiment, the relationship between power efficiency and output ripple, which is in a trade-off relationship, can be easily adjusted by the external compensation resistor Rc without changing the IC used.

[0042] Next, we will explain the difference between the phenomenon that occurs when switching the adjustment resistor (Rt) connected to the external terminal (ADJ) in the power supply control IC described in the above-mentioned Patent Document 1, and the phenomenon that occurs when switching the adjustment resistor (Rc) connected to the external terminal (CS) in the power supply control IC of this embodiment. The differences between the two are shown in table 1. In Table 1, "Prior Art" refers to the power supply control IC in Patent Document 1. In Table 1, the phenomena enclosed in a bold frame indicate undesirable phenomena.

[0043] [Table 1] As shown in Table 1, when the resistor (Rt) in a power supply control IC of the prior art is changed from a high resistance value to a low resistance value element, the reference voltage VREF1 changes from a high potential to a low voltage, whereas when the resistor (Rc) in the power supply control IC of this embodiment is changed from a high resistance value to a low resistance value element, the reference voltage VREF1 does not change and remains fixed.

[0044] In addition, when the resistor (Rt) in a power supply control IC of the conventional technology is changed from a high resistance value to a low resistance value element, the on-current peak changes from high to low, the average switching frequency changes from low to high, the efficiency during burst operation changes from high to low, and the output ripple changes from large to small. In contrast, if the resistor (Rc) in the power supply control IC of this embodiment is changed from a high resistance value to a low resistance value element, the on-current peak changes from low to high, the average switching frequency changes from high to low, the efficiency during burst operation changes from low to high, and the output ripple changes from small to large, resulting in the opposite phenomena. In addition, the undesirable phenomena enclosed in a thick frame are also different between the conventional technology and this embodiment. Therefore, the invention of Patent Document 1 and the invention of this application are clearly different, and it can be said that they are inventions born from different technical ideas.

[0045] Although the invention made by the present inventor has been specifically described based on the embodiment, the present invention is not limited to the above embodiment. For example, in the above embodiment, the correction current circuit 34 is configured to output a current Ics2 smaller than the correction current Ics1 from the correction current circuit 34 when the voltage VFB of the external terminal FB becomes higher than the reference voltage VREF3, but the correction current circuit 34 may be configured to output zero current (Ics2=0) instead of flowing Ics2 when VFB>VREF3. In addition, in the above embodiment, the turn-off circuit (current detection circuit) 33 generates the turn-off signal TOFF by comparing the amplified voltage of the voltage Vcs of the current detection terminal CS with the voltage VFB of the feedback terminal FB. However, the turn-off signal TOFF may be generated by comparing the voltage Vcs of the terminal CS with a voltage obtained by dividing the voltage VFB of the feedback terminal FB. Furthermore, in the above embodiment, the periodic timer circuit 32 is configured to generate a periodic signal PS with a variable frequency, but the frequency of the periodic signal may be fixed.

[0046] In addition, in the above embodiment, the switching transistor SW1 that intermittently passes current through the primary winding of the transformer is an element separate from the power supply control IC 13, but this switching transistor SW1 may be incorporated into the power supply control IC 13 to configure them as a single semiconductor integrated circuit. Furthermore, in the above embodiment, the present invention has been described as being applied to a power supply control IC that constitutes a flyback type AC-DC converter, but the present invention can also be applied to a power supply control IC that constitutes a forward type or quasi-resonant type AC-DC converter. [Explanation of symbols]

[0047] 12... transformer, 13... semiconductor device for switching power supply (power supply control IC), 14... constant voltage control circuit, 31... light load determination circuit, 32... periodic timer circuit (periodic signal generation circuit), 33... turn-off circuit (current detection circuit), 34... correction current circuit, 35... latch circuit (control signal generation circuit), 36... driver circuit, 37... internal power supply circuit, 41... inverting amplifier circuit, 42... clamp circuit, 43... voltage-current conversion circuit, 44... current output circuit, 45... bias circuit, SW1... switching element, Rs... current detection resistor (current-voltage conversion element)

Claims

1. a voltage conversion transformer having a DC voltage applied to a primary winding; A switching element connected in series with the primary winding; a power supply control semiconductor device that generates and outputs a control signal for controlling the switching element to be turned on and off; a current-voltage conversion element connected in series with the switching element to convert a current flowing through the primary winding into a voltage; a switching power supply device which controls on and off of the switching element to intermittently pass a current through the primary winding, rectifies and smoothes a current induced in a secondary winding of the transformer, and outputs a DC voltage, The power supply control semiconductor device includes: a first external terminal to which a voltage or a current corresponding to an output detection signal from a secondary side of the transformer is input; a second external terminal to which the voltage converted by the current-voltage conversion element is input; a periodic signal generating circuit that generates a periodic signal that provides timing for periodically turning on the switching element; a current detection circuit that generates a signal indicating a timing for turning off the switching element based on a voltage or a current at the first external terminal and a voltage at the second external terminal; a correction current circuit for generating a correction current to be output to the second external terminal; Equipped with a compensation resistor provided between the second external terminal and the current-voltage conversion element;

2. the correction current circuit outputs the correction current at least when in a light load state; 2. The switching power supply device according to claim 1, wherein the periodic signal generating circuit is configured to generate the periodic signal or stop outputting the periodic signal depending on whether the voltage or current of the first external terminal is higher or lower than a predetermined reference value that is set in a light load region.

3. 3. The switching power supply device according to claim 2, wherein the correction current circuit is configured to output a correction current of a first current value in a light load region based on the voltage of the first external terminal, and to output a correction current of a second current value smaller than the first current value in a heavy load region.

4. 4. The switching power supply device according to claim 3, wherein the periodic signal generating circuit includes a variable frequency oscillator circuit and is configured to generate a periodic signal having a long period in a light load region and a short period in a heavy load region in response to a voltage at the first external terminal.

5. a light load determination circuit that determines whether or not a light load state is present based on a voltage of the first external terminal; The light load determination circuit includes: determining that the load is light when the voltage of the first external terminal is lower than a first voltage value set corresponding to the reference value, and determining that the load is not light when the voltage of the first external terminal is higher than a second voltage value higher than the first voltage value; 5. The switching power supply device according to claim 2, wherein the periodic signal generating circuit is configured to generate and output the periodic signal when the light load determination circuit determines that the load is not light, and to stop outputting the periodic signal when the light load determination circuit determines that the load is light.

6. A power supply control semiconductor device constituting a switching power supply device which controls on and off a switching element connected in series with a primary winding of a voltage conversion transformer to cause a current to flow intermittently through the primary winding, and rectifies and smoothes a current induced in a secondary winding of the transformer to output a DC voltage, a first external terminal to which a voltage or a current corresponding to an output detection signal from a secondary side of the transformer is input; a second external terminal to which a voltage corresponding to a current flowing through the switching element is input; a periodic signal generating circuit that generates a periodic signal that provides timing for periodically turning on the switching element; a current detection circuit that generates a signal indicating a timing for turning off the switching element based on a voltage or a current at the first external terminal and a voltage at the second external terminal; a control signal generating circuit that generates a control signal for turning on and off the switching element; a light load determination circuit that determines whether or not the load is light based on a voltage or a current at the first external terminal; a correction current circuit for generating a correction current to be output to the second external terminal; Equipped with the periodic signal generating circuit generates and outputs the periodic signal when the light load determination circuit determines that the load is not light, and stops outputting the periodic signal when the light load determination circuit determines that the load is light; the correction current circuit is configured to output a correction current of a first current value in a light load region based on the voltage or current of the first external terminal, and to output a correction current of a second current value smaller than the first current value in a heavy load region.

Images