Semiconductor device, method for controlling semiconductor device, and external device

Abstract

To allow for the lean use of a plurality of functional blocks mounted on a semiconductor device.SOLUTION: A semiconductor device including a plurality of functional blocks comprises: an operation information holding unit which holds operation information indicating that a functional block is a normally operating functional block or a faulty functional block, relating to the plurality of functional blocks; and a validity setting unit which validates a functional block on the basis of validity information indicating whether to validate the functional block, relating to the plurality of functional blocks.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device, a control method for a semiconductor device, and an external device. [Background technology]

[0002] In order to improve the yield, which is the rate of non-defective products, a semiconductor device may have a redundant circuit block that relieves a defective circuit block. When a defective circuit block is detected by an operation test performed in the manufacturing process of the semiconductor device, the defective circuit block is disabled and a redundant circuit block is enabled in place of the defective circuit block. In addition, the number of redundant circuit blocks mounted on a semiconductor device tends to increase in order to suppress a decrease in yield caused by miniaturization of transistor structures and an increase in circuit size. Summary of the Invention [Problem to be solved by the invention]

[0003] If no defective circuit blocks are detected in the operation test, the redundant circuit blocks are disabled. Since the disabled redundant circuit blocks are not used, a wasted area that does not contribute to operation occurs in the semiconductor device. The amount of wasted area increases as the number of redundant circuit blocks mounted on the semiconductor device increases. In addition, when normal circuit blocks that operate normally are disabled, a wasted area that does not contribute to operation occurs in the semiconductor device, similar to the case of disabling redundant circuit blocks. [Means for solving the problem]

[0004] A semiconductor device according to an embodiment of the present invention is a semiconductor device having a plurality of functional blocks, and includes an operation information holding unit that holds operation information indicating whether the plurality of functional blocks are functional blocks that operate normally or are defective, and an enable setting unit that enables the functional blocks based on enablement information indicating whether the plurality of functional blocks are to be enabled or disabled. [Brief description of the drawings]

[0005] [Figure 1] 1 is a block diagram showing an example of a semiconductor device according to an embodiment of the present invention; [Diagram 2] 2 is a circuit diagram showing an example of a control circuit that controls enabling / disabling of the functional blocks in FIG. 1. [Diagram 3] FIG. 13 is a block diagram showing an example of another semiconductor device having a redundant functional block. [Figure 4] FIG. 11 is a block diagram showing an example of a semiconductor device according to another embodiment of the present invention. [Diagram 5] FIG. 11 is a block diagram showing an example of a semiconductor device according to another embodiment of the present invention. [Figure 6] 6 is a block diagram showing an example of a hardware configuration of an information processing device such as a host that causes the semiconductor device of FIG. 1, FIG. 4, or FIG. 5 to execute operations. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0006] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. In the following, the same reference numerals as the signal names, data names, clock names and power names are used for signal lines, data lines, clock lines and power lines, respectively.

[0007] FIG. 1 is a block diagram showing an example of a semiconductor device according to an embodiment of the present invention. The semiconductor device 10 shown in FIG. 1 has a plurality of functional blocks 11-0, 11-1, and 11-2, a processing unit 12, an operation information holding unit 13, a valid setting unit 14, and a selector SEL0. Hereinafter, when the functional blocks 11-0, 11-1, and 11-2 are described without distinction, they are also referred to as functional blocks 11. The number of functional blocks 11 mounted on the semiconductor device 10 is not limited to three. For example, the semiconductor device 10 shown in FIG. 1 may function as an accelerator that executes deep learning.

[0008] The functional block 11 is a processor or an arithmetic unit that executes an operation. The functional block 11 is enabled and put into an operable state upon receiving an enable signal En (En0, En1, En2) at an active level. The operable functional block 11 executes an operation using data Din (any of Din0, Din1, or Din2) received from the external device 30, for example, and outputs the operation result as data Dout (any of Dout0, Dout1, or Dout2) to the processing unit 12. The processing unit 12 is an example of a block subsequent to the functional block 11.

[0009] The functional block 11-2 may be operated as a redundant functional block that relieves a defect in either of the functional blocks 11-0 and 11-2. Hereinafter, the functional block 11-2 is also referred to as a redundant functional block 11-2. However, in this embodiment, the redundant functional block 11-2 can be operated even when the functional blocks 11-0 and 11-2 operate normally. The functional blocks 11-0 and 11-2 are examples of normal functional blocks.

[0010] Each functional block 11 is disabled upon receiving an enable signal En at an inactive level, and for example, stops the execution of calculations as it is in a stopped state. The stopped functional block 11 outputs data Dout of a logical value that does not affect the processing of the processing unit 12. For example, when the processing unit 12 receives the data Dout at an OR circuit, the stopped functional block 11 outputs a low level (logical value 0). When the processing unit 12 receives the data Dout at an AND circuit, the stopped functional block 11 outputs a high level (logical value 1). This allows the processing unit 12 to operate without malfunctioning even when it receives invalid data Dout from the stopped functional block 11.

[0011] The processing unit 12 executes an operation using the data Dout output from each functional block 11, and outputs the operation result as data Do. For example, the processing unit 12 contracts a plurality of pieces of data Dout received from a plurality of functional blocks 11, and outputs the contracted result as data Do. For example, the contraction is an operation such as OR, AND, exclusive OR (XOR), SUM, minimum value (MIN), or maximum value (MAX).

[0012] The operation information holding unit 13 holds operation information Eninf indicating whether each functional block 11 is normal or defective so as to be outputtable to the outside of the semiconductor device 10. For example, the operation information Eninf is transmitted to an external device 30 connected to the outside of the semiconductor device 10. The operation information holding unit 13 may have an electrically programmable non-volatile storage unit and hold the operation information Eninf in the storage unit. For example, the operation information Eninf has bits corresponding to the functional blocks 11. In the example of FIG. 1, the bits corresponding to the functional blocks 11 that operate normally and have passed the operation test after the manufacture of the semiconductor device 10 are set to a logical value of 1. The bits corresponding to the defective functional blocks 11 that have failed the operation test are set to a logical value of 0.

[0013] In this way, the external device 30 connected to the outside of the semiconductor device 10 can determine the number and positions of normally operating functional blocks 11 by the operation information Eninf held by the operation information holding unit 13. In other words, the external device 30 connected to the outside of the semiconductor device 10 can determine the number and positions of defective functional blocks 11 by the operation information Eninf. The operation information holding unit 13 may hold the operation information Eninf, which is encoded information indicating normally operating functional blocks 11 or information indicating defective functional blocks 11, so as to be outputtable to the outside of the semiconductor device 10.

[0014] The validity setting unit 14 has a holding unit such as a register that holds validity information Enu, which is received from outside the semiconductor device 10 and indicates whether the multiple functional blocks 11 are to be valid or invalid. For example, the validity information Enu is transmitted from an external device 30, which is an information processing device (user) such as a host. The external device 30 has an operation information receiving unit 31 and a validity information transmitting unit 32. The operation information receiving unit 31 receives operation information Eninf from the semiconductor device 10 (operation information holding unit 13). The validity information transmitting unit 32 generates validity information Enu based on the operation information Eninf received by the operation information receiving unit 31, and transmits the generated validity information Enu to the semiconductor device 10 (validity setting unit 14). The external device 30 also has a function of outputting at least one of the data Din0-Din2 to the semiconductor device 10 based on the validity information Enu.

[0015] For example, the validity information Enu and the holding unit have bits each corresponding to a functional block 11. A logical value of 1 of a bit of the validity information Enu held in the validity setting unit 14 indicates that the corresponding functional block 11 is valid. A logical value of 0 of a bit of the validity information Enu held in the validity setting unit 14 indicates that the corresponding functional block 11 is invalid.

[0016] The validity setting unit 14 outputs the bit of the validity information Enu held in the holding unit as an enable signal En to the corresponding functional block 11. The functional block 11 that receives the enable signal En at a high level becomes operable. The functional block 11 that receives the enable signal En at a low level becomes inoperative and outputs data Dout of a logical value that does not affect the processing of the processing unit 12. The data Dout of a logical value that does not affect the processing of the processing unit 12 is an example of non-affecting information. Here, a logical value that does not affect the operation of the processing unit 12 is a logical value that the processing unit 12 may ignore or a logical value that the processing unit 12 can tolerate.

[0017] In this way, the semiconductor device 10 can set each of all the functional blocks 11 to an operable state or an inoperative state based on the validity information Enu received from the outside. In other words, the semiconductor device 10 can enable normal functional blocks or functional blocks to be enabled, and disable abnormal functional blocks or functional blocks to be disabled, based on the validity information Enub generated by the external device 30 that has received the operation information Eninf.

[0018] Also, even when the output of the functional block 11 is fixedly connected to the input of the processing unit 12 regardless of whether the functional block 11 is in use or not, it is possible to reduce malfunction of the processing unit 12 due to an inoperative functional block 11. Furthermore, it is not necessary to switch the connection between the functional block 11 and the processing unit 12 depending on whether the functional block 11 is in use or not. Therefore, it is possible to simplify the control of the semiconductor device 10 and reduce the circuit scale of the semiconductor device 10 compared to the case where a switching circuit for switching the connection between the functional block 11 and the processing unit 12 is provided.

[0019] The selector SEL0 selects one of the data Din0-Din2 according to the bit value of the enable signal En2-En0, and outputs the selected data Din to the functional block 11-2. The selector SEL0 selects the data Din0 when the enable signal En2-En0 is "110", selects the data Din1 when the enable signal En2-En0 is "101", and selects the data Din2 when the enable signal En2-En0 is "111".

[0020] In Fig. 1, the position of each bit of the operation information Eninf held by the operation information holding unit 13 corresponds to the position of each bit of the validity information Enu held by the validity setting unit 14. For example, in the operation information holding unit 13, the bit on the output side of the operation information Eninf in Fig. 1 corresponds to the functional block 11-2, and the bit in the center of Fig. 1 corresponds to the functional block 11-1. The example shown in Fig. 1 indicates that the functional blocks 11-0 and 11-2 are operating normally, and the functional block 11-1 is not operating due to a defect.

[0021] In this case, the selector SEL0 selects the data Din1 supplied to the defective functional block 11-1 and outputs it to the functional block 11-2, thereby allowing the functional block 11-2 to function as a redundant functional block that operates in place of the defective functional block 11-1.

[0022] When the enable signal En2-En0 is "111", the selector SEL0 selects the data Din2 and outputs it to the functional block 11-2. This allows the data Dout0, Dout1, and Dout2 corresponding to the data Din0, Din1, and Din2 to be output from the three functional blocks 11-0, 11-1, and 11-2 to the processing unit 12. That is, the semiconductor device 10 can cause the functional block 11-2 to function as a redundant functional block or a normal functional block depending on whether or not there is a defective functional block 11.

[0023] For example, the external device 30 that causes the semiconductor device 10 to execute an operation recognizes whether each functional block 11 is operable or not based on the operation information Eninf output from the operation information storage unit 13. The semiconductor device 10 may output the operation information Eninf stored in the operation information storage unit 13 to the information processing device based on a request to acquire the operation information Eninf from the information processing device. The information processing device determines, based on the operation information Eninf received from the semiconductor device 10, a functional block 11 to be used for an operation from among the functional blocks 11 that are operating normally. Then, the information processing device outputs validity information Enu corresponding to the functional block 11 to be used to the semiconductor device 10.

[0024] For example, the information processing device sets the bit of the validity information Enu corresponding to the functional block 11 to be used to a high level, and sets the bit of the validity information Enu corresponding to the functional block 11 not to be used to a low level. As a result, in the validity setting unit 14, the bit corresponding to the functional block 11 to be used is set to a logical value of 1, and the bit corresponding to the functional block 11 not to be used is set to a logical value of 0.

[0025] 1, the information processing device determines to use the functional blocks 11-0 and 11-2 and stops using the defective functional block 11-1. In this manner, the semiconductor device 10 outputs to the outside the operation information Eninf indicating whether each functional block 11 is normal or defective. Therefore, the external device 30 can output any number of functional blocks 11 to be used in the calculation as validity information Enu to the semiconductor device 10 based on the operation information Eninf.

[0026] In addition, in this embodiment, since the validity information Enu is set from outside the semiconductor device 10 based on the operation information Eninf, for example, when all the functional blocks 11 pass the operation test, the information processing device can specify all the functional blocks 11 by the validity information Enu and execute the operation. This makes it possible to prevent the redundant functional block 11-2 that is not used for relieving a defect from being set as unused, and to prevent the occurrence of a useless functional block 11 that does not contribute to the operation.

[0027] Fig. 2 is a circuit diagram showing an example of a control circuit that controls enabling / disabling of the functional block 11 in Fig. 1. For example, the functional block 11 is enabled or disabled using a power gating technique or a clock gating technique.

[0028] In the power gating technique, the power supply line VDD and the power supply line VVDD of the functional block 11 are connected via, for example, a p-channel MOS (Metal Oxide Semiconductor) transistor PM. The gate of the p-channel MOS transistor PM receives an enable signal En via an inverter IV.

[0029] As a result, the functional block 11 that receives the high-level enable signal En receives the power supply voltage VDD and becomes operable. Note that in power gating, the ground line VSS and the ground line of the functional block 11 may be connected via, for example, an n-channel MOS transistor. In this case, the gate of the n-channel MOS transistor may directly receive the enable signal En.

[0030] In the clock gating technique, a clock signal CLK is supplied to a clock synchronous circuit such as a flip-flop FF via an AND circuit AND. Each flip-flop FF receives an input signal Sin (Sin0, Sin1) in synchronization with the clock signal CLK and outputs it as an output signal Sout (Sout0, Sout1).

[0031] The AND circuit AND receives the clock signal CLK and the enable signal En. The AND circuit AND of the functional block 11 that receives the enable signal En at a high level outputs the clock signal CLK to the flip-flop FF, so that the functional block 11 is in an operable state. The AND circuit AND that receives the enable signal En at a low level stops outputting the clock signal CLK, so that the functional block 11 is in an inoperable state.

[0032] As described above, in this embodiment, by outputting the operation information Eninf to the outside and receiving the validity information Enu from the outside, the multiple functional blocks 11 mounted on the semiconductor device 10 can be used without waste. Even if there is no defective functional block 11, the redundant functional block 11-2 not used to relieve a defect can be set to be operable by the validity information Enu and can be made to execute an operation. The functional blocks 11 not used to execute an operation output logical value data Dout that does not affect the processing of the processing unit 12, so that malfunction of the processing unit 12 can be suppressed.

[0033] Fig. 3 is a block diagram showing an example of another semiconductor device having a redundant functional block. Detailed description of elements similar to those in Fig. 1 will be omitted. The semiconductor device 20 shown in Fig. 3 has a plurality of functional blocks 21-0, 21-1, a redundant functional block 21-2, a processing unit 22, an operation information holding unit 23, a valid setting unit 24, selectors SEL1, SEL2, SEL3, and a logic circuit.

[0034] The functional blocks 21-0, 21-1, and 21-2 have the same functions as the functional block 11 in Fig. 1. In the following, when the functional blocks 21-0, 21-1 and the redundant functional block 21-2 are not distinguished from each other, they are also referred to as functional blocks 21. The processing unit 22 has the same functions as the processing unit 12 in Fig. 1.

[0035] 3, the redundant functional block 21-2 is used only to relieve the defective functional blocks 21-0 and 21-1. Therefore, when the functional blocks 21-0 and 21-1 are normal, the operation of the redundant functional block 21-2 is prohibited.

[0036] The operation information holding unit 23 holds operation information indicating whether the functional blocks 21-0, 21-1 are normal or defective. For the sake of simplicity, it is assumed that the redundant functional block 21-2 operates normally. Therefore, the operation information holding unit 23 does not hold operation information corresponding to the redundant functional block 21-2. Moreover, the operation information holding unit 23 does not output the operation information to the outside of the semiconductor device 20.

[0037] 3, the operation information storage unit 23 stores operation information indicating a normally operating functional block 21-0 and a defective functional block 21-1. Each bit of the operation information stored in the operation information storage unit 23 is connected to a selector SEL1, a selector SEL2 (or SEL3), an AND circuit AND3 (or AND4), and an inverter IV1 (or IV2). As will be described later, the defective functional block 21-1 is rescued by a redundant functional block 21-2.

[0038] The validity setting unit 24 holds validity information Enu received from outside the semiconductor device 20. The validity information Enu includes information on whether the functional blocks 21-0 and 21-1 are valid / invalid, but does not include information on whether the functional block 21-2 is valid / invalid.

[0039] Note that an information processing device such as a host that outputs the validity information Enu to the semiconductor device 20 does not recognize the correspondence between the bits of the validity information and the functional blocks 21-0, 21-1 to be used. For this reason, the information processing device outputs the number of functional blocks 21 to be used as validity information Enu to the semiconductor device 20. In the example of FIG. 3, the number of functional blocks 21 to be used is two. Each bit of the validity information Enu held by the validity setting unit 24 is connected to AND circuits AND1, AND3 (or AND2, AND4).

[0040] The selector SEL1 outputs one of the data Din0 and Din1 to the data input terminal DinR of the redundant functional block 21-2 according to the operation information held by the operation information holding unit 23. In the example of Fig. 3, since the functional block 21-1 is defective, the selector SEL1 selects the data Din1 supplied to the functional block 21-1.

[0041] The selector SEL2 selects the data Dout0 from the functional block 21-0 or the data DoutR from the redundant functional block 21-2 according to the operation information stored in the operation information storage unit 23 corresponding to the functional block 21-0, and outputs it to the processing unit 22. In the example of FIG. 3, the operation information stored in the operation information storage unit 23 corresponding to the functional block 21-0 is a logical value 1 indicating that the functional block 21-0 is normal. Therefore, the selector SEL2 selects the data Dout0 from the functional block 21-0 and outputs it to the processing unit 22.

[0042] The selector SEL3 selects the data Dout1 from the functional block 21-1 or the data DoutR from the redundant functional block 21-2 according to the operation information held by the operation information holding unit 23 corresponding to the functional block 21-1, and outputs it to the processing unit 22. In the example of Fig. 3, the operation information held by the operation information holding unit 23 corresponding to the functional block 21-1 is a logical value 0 indicating that the functional block 21-1 is defective. Therefore, the selector SEL3 selects the data DoutR from the redundant functional block 21-2 and outputs it to the processing unit 22.

[0043] The AND circuit AND1 outputs a high level to the OR circuit OR1 when the operation information corresponding to the functional block 21-0 is a logical value 0 (failed) and the validity information corresponding to the functional block 21-0 is a logical value 1. The AND circuit AND2 outputs a high level to the OR circuit OR1 when the operation information corresponding to the functional block 21-1 is a logical value 0 (failed) and the validity information corresponding to the functional block 21-1 is a logical value 1. The output of the OR circuit OR1 is connected to the enable terminal EnR of the redundant functional block 21-2.

[0044] By the above operation, the redundant functional block 21-2 operates in place of the defective functional block 21-0 (21-1), and the defect can be relieved. However, since the redundant functional block 21-2 is used in place of the unnecessary functional block 21-0 (21-1), the redundant functional block 21-2 cannot be operated when the functional blocks 21-0 and 21-1 are normal.

[0045] FIG. 4 is a block diagram showing an example of a semiconductor device according to another embodiment of the present invention. Detailed description of elements similar to those in FIG. 1 will be omitted. The semiconductor device 10A shown in FIG. 4 has a plurality of functional blocks 11A-0, 11A-1, 11A-2, 11A-3, and 11A-4, a processing unit 12A, a program circuit 13A, a register 14A, and a selector SEL0-A. In the following, when the functional blocks 11A-0, 11A-1, 11A-2, 11A-3, and 11A-4 are described without distinction, they are also referred to as functional blocks 11A. The number of functional blocks 11A mounted on the semiconductor device 10A is not limited to five. For example, the semiconductor device 10A shown in FIG. 4 may function as an accelerator that executes deep learning.

[0046] The functional block 11A-4 may be operated as a redundant functional block that relieves a defect in any of the functional blocks 11A-0, 11A-1, 11A-2, and 11A-3. Hereinafter, the functional block 11A-4 is also referred to as a redundant functional block 11A-4. However, in this embodiment, similar to the above-mentioned embodiment, the redundant functional block 11A-4 can be operated even when the functional blocks 11A-0, 11A-1, 11A-2, and 11A-3 operate normally. The functional blocks 11A-0, 11A-1, 11A-2, and 11A-3 are examples of normal functional blocks.

[0047] The program circuit 13A holds operation information Eninf indicating whether each functional block 11A is normal or defective so as to be outputtable to an external device (such as the external device 30 in FIG. 1) connected to the outside of the semiconductor device 10A. For example, in the operation information holding unit 13, a bit of the operation information Eninf corresponding to a functional block 11A that operates normally and has passed an operation test after the manufacture of the semiconductor device 10A is set to a logical value of 1 based on the program information Enp. In the operation information holding unit 13, a bit of the operation information Eninf corresponding to a defective functional block 11A that has failed the operation test is set to a logical value of 0 based on the program information Enp. The program information Enp is supplied to the semiconductor device 10A from a test device or the like based on the operation test result.

[0048] 1, the register 14A holds validity information Enu indicating the validity / invalidity of the multiple functional blocks 11A received from an external device connected to the outside of the semiconductor device 10A. When the functional block 11A is made operable, the corresponding bit of the register 14A is set to a logical value of 1. When the functional block 11A is made inoperable, the corresponding bit of the register 14A is set to a logical value of 0.

[0049] 1, the selector SEL0-A selects one of the data Din0-Din4 according to the bit value of the enable signal En4-En0, and outputs the selected data Din to the functional block 11A-4. The selector SEL0-A selects the data Din0 when the enable signal En4-En0 is "11110", and selects the data Din1 when the enable signal En4-En0 is "11101". The selector SEL0-A selects the data Din2 when the enable signal En4-En0 is "11011", and selects the data Din3 when the enable signal En4-En0 is "10111". The selector SEL0-A selects the data Din4 when the enable signal En4-En0 is "11111".

[0050] 4 indicates that the functional blocks 11A-0, 11A-2, 11A-3, and 11A-4 are operating normally, and the functional block 11A-1 is not operating due to a defect. In this case, the selector SEL0-A selects the data Din1 and supplies the selected data Din1 to the functional block 11A-4. This causes the functional block 11A-4 to function as a redundant functional block.

[0051] As in the above-described embodiment, for example, an information processing device (such as the external device 30 in FIG. 1) that causes the semiconductor device 10A to execute an operation determines, based on the operation information Eninf output from the program circuit 13A, a functional block 11A to be used for the operation among the functional blocks 11A that operate normally. Then, the information processing device outputs validity information Enu corresponding to the functional block 11A to be used to the semiconductor device 10A.

[0052] Note that the operation information Eninf held by the program circuit 13A may be set in the register 14A first. In this case, the bit holding the logical value 1 in the register 14A is rewritten to the logical value 0 according to the validity information Enu. That is, among the functional blocks 11A that have passed the operation test, the bit in the register 14A corresponding to the unused functional blocks 11A is rewritten to the logical value 0. This makes it possible to set only the functional blocks 11A to be used for calculation to an operable state.

[0053] For example, the bit of the register 14A that has been set to a logical value of 0 by the program circuit 13A may be prohibited from being rewritten to a logical value of 1 by the validity information Enu. This makes it possible to prevent the defective functional block 11A from being erroneously set to an operable state, thereby making it possible to prevent malfunction of the semiconductor device 10A.

[0054] The configuration and functions of the functional block 11A are similar to those of the functional block 11 in Fig. 1, except that the functional block 11A receives a Reduce opcode ROpc (any of ROpc0-ROpc4). Each functional block 11A is enabled by a high-level enable signal En to enter an operable state, and executes an operation using the received data Din (any of Din0-Din4). Then, each functional block 11A outputs the operation result as data Dout (any of Dout0-Dout4) to the processing unit 12A.

[0055] The configuration and functions of the processing unit 12A are similar to those of the processing unit 12 in Fig. 1. However, the processing unit 12A executes one of a plurality of types of arithmetic processing in response to, for example, an opcode Opc supplied from outside the semiconductor device 10A. The opcode Opc is an example of an instruction from the outside. For example, the arithmetic operation executed by the processing unit 12A is a contraction of the data Dout0-Dout4, such as OR, AND, exclusive OR (XOR), SUM, minimum value (MIN), or maximum value (MAX). The processing unit 12A outputs the contraction result as data Do.

[0056] For example, an information processing device that causes the semiconductor device 10A to execute an operation outputs an operation code Opc to the processing unit 12A, and outputs a reduce operation code ROpc corresponding to the operation code Opc to each functional block 11A. The reduce operation code ROpc is identification information that identifies the operation process executed by the processing unit 12A in response to the operation code Opc. The reduce operation code ROpc may be supplied to at least the functional block 11A that is in an operation stopped state. Also, a common reduce operation code ROpc may be supplied to each functional block 11A.

[0057] When each functional block 11A is in an operation stopped state due to a low level enable signal En, it outputs data Dout (any of Dout0-Dout4) of a logical value corresponding to the Reduce opcode ROpc (any of ROpc0-ROpc4). The data Dout of a logical value corresponding to the Reduce opcode ROpc is non-affecting information having a logic that does not affect the arithmetic processing executed by the processing unit 12A in response to the opcode Opc.

[0058] For example, when the contraction indicated by the opcode Opc supplied to the processing unit 12A is OR, the inactive functional block 11A receives the reduce opcode ROpc indicating OR and outputs a low level (logical value 0) as data Dout to the processing unit 12A. When the contraction indicated by the opcode Opc supplied to the processing unit 12A is AND, the inactive functional block 11A receives the reduce opcode ROpc indicating AND and outputs a high level (logical value 1) as data Dout to the processing unit 12A. When the contraction indicated by the opcode Opc supplied to the processing unit 12A is SUM, the inactive functional block 11A receives the reduce opcode ROpc indicating sum and outputs "0" as data Dout to the processing unit 12A.

[0059] In this way, each functional block 11A can output unaffected information according to the Reduce opcode ROpc corresponding to the opcode Opc as data Dout to the processing unit 12A. As a result, each functional block 11A in the operation stopped state can output appropriate unaffected information to the processing unit 12A according to the type of calculation executed by the processing unit 12A according to the opcode Opc. As a result, malfunction of the processing unit 12A can be suppressed.

[0060] As described above, in this embodiment, similarly to the above-mentioned embodiment, the operation information Eninf is output to the outside and the validity information Enu is received from the outside, so that the multiple functional blocks 11A mounted on the semiconductor device 10A can be used without waste. Even if there is no defective functional block 11A, the redundant functional block 11A-4 that is not used to relieve the defect can be specified by the validity information Enu to execute an operation. The functional block 11A that is not used for the operation outputs logical value data Dout that does not affect the processing of the processing unit 12A, so that the malfunction of the processing unit 12A can be suppressed.

[0061] Furthermore, in this embodiment, each functional block 11A can output unaffected information corresponding to the Reduce opcode ROpc corresponding to the opcode Opc as data Dout to the processing unit 12A. As a result, each functional block 11A can output unaffected information that does not affect the arithmetic processing as data Dout to the processing unit 12A in accordance with the arithmetic processing executed by the processing unit 12A. As a result, it is possible to prevent malfunction of the processing unit 12A.

[0062] Fig. 5 is a block diagram showing an example of a semiconductor device according to another embodiment of the present invention. The same elements as those in Fig. 4 are given the same reference numerals, and detailed description thereof will be omitted. The semiconductor device 10B shown in Fig. 5 has a plurality of circuit configurations shown in Fig. 4. For example, in Fig. 5, the semiconductor device 10B has a plurality of arithmetic blocks 15B each having four circuit groups including the function blocks 11A-0, 11A-1, 11A-2, 11A-3, and 11A-4, the processing unit 12A, the program circuit 13A, and the register 14A shown in Fig. 4, and a memory MEM.

[0063] Furthermore, the semiconductor device 10B may have a plurality of upper processing blocks each having a plurality of processing blocks 15B and a memory. The more blocks including the circuit configuration shown in FIG. 4, the more the number of redundant functional blocks 11A-4 increases. In this case, too, it is possible to suppress an increase in the number of useless functional blocks 11A-4 that cannot be used. As described above, this embodiment can also provide the same effects as the above-mentioned embodiment.

[0064] FIG. 6 is a block diagram showing an example of a hardware configuration of an information processing device such as a host (eg, the external device 30 in FIG. 1) that causes the semiconductor device in FIG. 1, FIG. 4, or FIG. 5 to execute operations.

[0065] The information processing device 100 shown in Fig. 6 may be realized as a computer including, for example, a processor 110, a main storage device 120 (memory), an auxiliary storage device 130 (memory), a network interface 140, and a device interface 150, which are connected via a bus 160. For example, the processor 110 receives operation information Eninf from the semiconductor device 10A etc. shown in Fig. 4, and transmits validity information Enu to the semiconductor device 10A etc. The processor 110 also transmits an opcode Opc and a reduce opcode ROpc to the semiconductor device 10A.

[0066] The information processing device 100 includes one of each component, but may include multiple of the same components. Although FIG. 6 shows one information processing device 100, the software may be installed in multiple information processing devices 100, and each of the multiple information processing devices 100 may execute the same or different parts of the software. In this case, the information processing device 100 may be in the form of distributed computing in which each of the information processing devices 100 communicates via a network interface 140 or the like to execute processing. That is, the information processing device 100 in the above-mentioned embodiment may be configured as a system in which one or multiple information processing devices 100 execute instructions stored in one or multiple storage devices to realize a function. Also, the information transmitted from a terminal may be processed by one or multiple information processing devices 100 provided on a cloud, and the processing result may be transmitted to the terminal.

[0067] The operation of receiving the operation information Eninf and the operation of transmitting the validity information Enu to the semiconductor device 10A or the like may be executed in parallel using one or more processors 110, or using multiple computers via a network. Also, various calculations may be distributed to multiple calculation cores in the processor 110 and executed in parallel. Also, a part or all of the processes, means, etc. disclosed herein may be realized by at least one of a processor and a storage device provided on a cloud that can communicate with the information processing device 100 via a network. In this way, the information processing device 100 in the above-mentioned embodiment may be in the form of parallel computing using one or more computers.

[0068] The processor 110 may be an electronic circuit (processing circuit, processing circuitry, CPU, GPU, FPGA, ASIC, etc.) that at least controls a computer or performs calculations. The processor 110 may be a general-purpose processor, a dedicated processing circuit designed to perform a specific calculation, or a semiconductor device that includes both a general-purpose processor and a dedicated processing circuit. The processor 110 may include an optical circuit or may include a calculation function based on quantum computing.

[0069] The processor 110 may perform arithmetic processing based on data or software input from each device or the like in the internal configuration of the information processing device 100, and may output arithmetic results or control signals to each device or the like. The processor 110 may control each component constituting the information processing device 100 by executing an OS (Operating System) of the information processing device 100, applications, or the like.

[0070] The information processing device 100 in the above-described embodiment may be realized by one or more processors 110. Here, the processor 110 may refer to one or more electronic circuits arranged on one chip, or may refer to one or more electronic circuits arranged on two or more chips or two or more devices. When multiple electronic circuits are used, the electronic circuits may communicate with each other by wire or wirelessly.

[0071] The main memory device 120 may store instructions executed by the processor 110 and various data, and information stored in the main memory device 120 may be read by the processor 110. The auxiliary memory device 130 is a memory device other than the main memory device 120. Note that these memory devices refer to any electronic components capable of storing electronic information, and may be semiconductor memories. The semiconductor memories may be either volatile memories or non-volatile memories. The memory device for saving various data, etc. in the information processing device 100 in the above-mentioned embodiment may be realized by the main memory device 120 or the auxiliary memory device 130, or may be realized by an internal memory built into the processor 110.

[0072] When the information processing device 100 in the above-described embodiment is configured with at least one storage device (memory) and at least one processor 110 connected (coupled) to the at least one storage device, at least one processor 110 may be connected to one storage device. At least one storage device may be connected to one of the processors 110. A configuration may also be included in which at least one processor 110 of the multiple processors 110 is connected to at least one storage device of the multiple storage devices. This configuration may also be realized by the storage devices and processors 110 included in multiple information processing devices 100. Furthermore, a configuration in which a storage device is integrated with the processor 110 (for example, a cache memory including an L1 cache and an L2 cache) may also be included.

[0073] The network interface 140 is an interface for connecting to the communication network 200 wirelessly or by wire. The network interface 140 may be an appropriate interface such as one conforming to an existing communication standard. The network interface 140 may exchange information with an external device 310 connected via the communication network 200. The communication network 200 may be any one of a wide area network (WAN), a local area network (LAN), a personal area network (PAN), etc., or a combination thereof, as long as information is exchanged between the information processing device 100 and the external device 310. An example of a WAN is the Internet, an example of a LAN is IEEE802.11 or Ethernet (registered trademark), and an example of a PAN is Bluetooth (registered trademark) or Near Field Communication (NFC).

[0074] The device interface 150 is an interface such as a USB that directly connects to an external device 320 .

[0075] The external device 310 is a device connected to the information processing device 100 via a network. The external device 320 is a device directly connected to the information processing device 100.

[0076] The external device 310 or the external device 320 may be, for example, an input device. The input device is, for example, a device such as a camera, a microphone, a motion capture device, various sensors, a keyboard, a mouse, a touch panel, or the like, and provides acquired information to the information processing device 100. Alternatively, the input device may be a device equipped with an input unit, a memory, and a processor, such as a personal computer, a tablet terminal, or a smartphone.

[0077] Moreover, the external device 310 or the external device 320 may be, for example, an output device. The output device may be, for example, a display device such as an LCD (Liquid Crystal Display) or an organic EL (Electro Luminescence) panel, or a speaker that outputs sound or the like. Alternatively, the output device may be a device including an output unit, a memory, and a processor, such as a personal computer, a tablet terminal, or a smartphone.

[0078] Furthermore, the external device 310 or the external device 320 may be a storage device (memory). For example, the external device 310 may be a network storage or the like, and the external device 320 may be a storage device such as a HDD.

[0079] Furthermore, the external device 310 or the external device 320 may be a device having some of the functions of the components of the information processing device 100 in the above-described embodiment. That is, the information processing device 100 may transmit some or all of the processing results to the external device 310 or the external device 320, or may receive some or all of the processing results from the external device 310 or the external device 320.

[0080] In this specification (including the claims), when the expression "at least one of a, b, and c" or "at least one of a, b, or c" (including similar expressions) is used, it includes any of a, b, c, ab, ac, bc, or abc. It may also include multiple instances of any element, such as aa, abb, aabbcc, etc. Furthermore, it also includes the addition of elements other than the enumerated elements (a, b, and c), such as having d, as in abcd.

[0081] In this specification (including claims), when expressions such as "using data as input / based on / according to / in response to data" (including similar expressions) are used, unless otherwise specified, this includes the use of data itself or data that has been processed in some way (e.g., data with noise added, normalized, feature values ​​extracted from data, intermediate representations of data, etc.). In addition, when it is stated that a result is obtained "using data as input / based on / according to / in response to data" (including similar expressions), unless otherwise specified, this includes the use of the result based only on the data, or the use of the result influenced by other data, factors, conditions, and / or states other than the data. In addition, when it is stated that "data is output" (including similar expressions), unless otherwise specified, this includes the use of data itself as output, or data that has been processed in some way (e.g., data with noise added, normalized, feature values ​​extracted from data, intermediate representations of various data, etc.) as output.

[0082] In this specification (including the claims), the terms "connected" and "coupled" are intended as open-ended terms including any of direct connection / coupling, indirect connection / coupling, electrically connection / coupling, communicatively connection / coupling, functionally connection / coupling, physically connection / coupling, etc. The terms should be interpreted appropriately depending on the context in which the terms are used, but any connection / coupling form that is not intentionally or naturally excluded should be interpreted as being included in the terms without any restriction.

[0083] In this specification (including the claims), when the expression "A configured to B" is used, it may include that the physical structure of element A has a configuration capable of performing operation B, and that the permanent or temporary setting / configuration of element A is configured / set to actually perform operation B. For example, when element A is a general-purpose processor, it is sufficient that the processor has a hardware configuration capable of performing operation B, and is configured to actually perform operation B by setting a permanent or temporary program (instruction). Also, when element A is a dedicated processor, dedicated arithmetic circuit, etc., it is sufficient that the circuit structure, etc. of the processor is implemented to actually perform operation B, regardless of whether control instructions and data are actually attached.

[0084] In this specification (including the claims), when terms implying containing or possessing (e.g., "comprising / including," "having," etc.) are used, they are intended to be open-ended terms that include cases in which the term contains or possesses things other than the object indicated by the object of the term. When the object of such terms implying containing or possessing does not specify a quantity or suggests a singular number (such as an expression using the article "a" or "an"), the expression should be construed as not being limited to a specific number.

[0085] In this specification (including the claims), even if expressions such as "one or more" and "at least one" are used in some places and expressions that do not specify a quantity or suggest a singular number (expressions using the articles "a" or "an") are used in other places, the latter expressions are not intended to mean "one." In general, expressions that do not specify a quantity or suggest a singular number (expressions using the articles "a" or "an") should be interpreted as not necessarily being limited to a specific number.

[0086] In this specification, when a particular advantage / result is described as being obtained from a particular configuration of an embodiment, it should be understood that the same effect can also be obtained from one or more other embodiments having the same configuration, unless there is a reason to the contrary. However, it should be understood that the presence or absence of the effect generally depends on various factors, conditions, and / or states, and that the effect is not necessarily obtained by the configuration. The effect is merely obtained by the configuration described in the embodiment when various factors, conditions, and / or states are satisfied, and the effect is not necessarily obtained in the invention according to the claim that specifies the configuration or a similar configuration.

[0087] In this specification (including the claims), when a term such as "maximize" is used, it includes finding a global maximum, finding an approximation of a global maximum, finding a local maximum, and finding an approximation of a local maximum, and should be interpreted appropriately according to the context in which the term is used. It also includes finding approximations of these maxima probabilistically or heuristically. Similarly, when a term such as "minimize" is used, it includes finding a global minimum, finding an approximation of a global minimum, finding a local minimum, and finding an approximation of a local minimum, and should be interpreted appropriately according to the context in which the term is used. It also includes finding approximations of these minima probabilistically or heuristically. Similarly, when a term such as "optimize" is used, it includes finding a global optimum, finding an approximation of a global optimum, finding a local optimum, and finding an approximation of a local optimum, and should be interpreted appropriately according to the context in which the term is used. It also includes finding approximations of these optimum values ​​probabilistically or heuristically.

[0088] In this specification (including claims), when a plurality of pieces of hardware perform a predetermined process, each piece of hardware may cooperate to perform the predetermined process, or a portion of the hardware may perform all of the predetermined process. Also, a portion of the hardware may perform a portion of the predetermined process, and another piece of hardware may perform the remainder of the predetermined process. In this specification (including claims), when an expression such as "one or more pieces of hardware perform a first process, and the one or more pieces of hardware perform a second process" (including similar expressions) is used, the hardware performing the first process and the hardware performing the second process may be the same or different. In other words, it is sufficient that the hardware performing the first process and the hardware performing the second process are included in the one or more pieces of hardware. The hardware may include an electronic circuit, a device including an electronic circuit, and the like.

[0089] In this specification (including the claims), when multiple storage devices (memories) store data, each of the multiple storage devices may store only a portion of the data, or may store the entire data. Also, a configuration in which only some of the multiple storage devices store data may be included.

[0090] Although the embodiments of the present disclosure have been described in detail above, the present disclosure is not limited to the above-mentioned individual embodiments. Various additions, modifications, replacements, partial deletions, etc. are possible within the scope of the conceptual idea and intent of the present invention derived from the contents defined in the claims and their equivalents. For example, in the above-mentioned embodiments, when numerical values ​​or formulas are used for explanation, these are shown for illustrative purposes and do not limit the scope of the present disclosure. In addition, the order of each operation shown in the embodiment is also illustrative and does not limit the scope of the present disclosure. [Explanation of symbols]

[0091] 10, 10A, 10B Semiconductor device 11(11-0, 11-1, 11-2) Function block 11A (11A-0, 11A-1, 11A-2, 11A-3, 11A-4) Function block 12, 12A Processing section 13 Operation information holding unit 13A Program Circuit 14 Validity setting section 14A Resistor 15B Calculation block 20 Semiconductor Devices 21(21-0, 21-1, 21-2) Function block 22 Processing section 23 Operation information holding unit 24 Effective setting section 30 External device 31 Operation information receiving unit 32 Effective Information Transmission Unit 100 Information processing device 110 Processor 120 Main storage 130 Auxiliary storage device 140 Network Interface 150 Device Interface 160 Bus 200 Communication Network 310, 320 External device Data Din, Dout En Enable signal Eninf operation information EMP Program Information Enu Validity Information Opc Opcode ROpc Reduce Opcode SEL1, SEL2, SEL3 selectors

Claims

1. A semiconductor device having a plurality of functional blocks, an operation information storage unit that stores operation information indicating whether the functional blocks are function blocks that operate normally or function blocks that are defective, regarding the plurality of functional blocks; a validity setting unit that validates a functional block based on validity information indicating whether the functional blocks are to be validated or invalidated; A semiconductor device having the above structure.

2. The semiconductor device according to claim 1 , wherein said validity information is set based on the operation information held in said operation information holding unit.

3. 3. The semiconductor device according to claim 2, wherein the validity information is set to be valid for a function block that operates normally and set to be invalid for a function block that is defective.

4. the operation information storage unit stores the operation information in a manner that allows the operation information to be output to an outside of the semiconductor device; The validity setting unit enables a functional block corresponding to the validity information indicating validity received from the outside. The semiconductor device according to claim 1 .

5. the plurality of functional blocks include a plurality of normal functional blocks and a redundant functional block used to relieve a defective normal functional block; The validity setting unit enables the redundant functional block based on reception of validity information indicating validity corresponding to the redundant functional block even when the operation information storage unit indicates that all of the plurality of normal functional blocks are normal. The semiconductor device according to claim 1 .

6. a processing unit that executes processing based on information output from the plurality of functional blocks; The functional block that is set to be invalid based on validity information indicating invalidity outputs non-effect information that does not affect the operation of the processing unit to the processing unit. The semiconductor device according to claim 1 .

7. The processing unit executes one of a plurality of types of processing in response to an external instruction, The functional block to be set to be disabled outputs the unaffected information corresponding to the process executed by the processing unit to the processing unit based on the reception from the outside of identification information for identifying the process executed by the processing unit. The semiconductor device according to claim 6.

8. The operation information stored in the operation information storage unit includes the number and positions of the function blocks that are operating normally. The semiconductor device according to claim 1 .

9. A method for controlling a semiconductor device including a plurality of functional blocks, comprising: an operation information storage unit included in the semiconductor device stores operation information indicating whether the plurality of functional blocks are function blocks that operate normally or function blocks that are defective; A validity setting unit of the semiconductor device enables the functional blocks based on validity information indicating whether the functional blocks are to be enabled or disabled. A method for controlling a semiconductor device.

10. A method for controlling a semiconductor device including a plurality of functional blocks that are enabled or disabled, comprising the steps of: Among the plurality of functional blocks, a disabled functional block outputs a value that does not affect processing of a subsequent block of the plurality of functional blocks. A method for controlling a semiconductor device.

11. An external device for controlling a semiconductor device having a plurality of functional blocks, an operation information receiving unit that receives operation information indicating that the functional blocks are properly operating or defective, regarding the plurality of functional blocks; a validity information transmitting unit configured to transmit validity information indicating whether the plurality of functional blocks are to be enabled or disabled to the semiconductor device; An external device having

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