Measuring apparatus for capacitance of semiconductor device and measuring jig

Abstract

To improve measurement accuracy for feedback capacitance of a semiconductor device.SOLUTION: A semiconductor device (100) as a measuring object is provided with, between a gate terminal and an Lc terminal (32) of an LCR meter (30): first wiring (6A) inserted through a core of a transformer (10) one time and connected between the gate terminal and a source terminal of the semiconductor device (100); and second wiring (6B) wound N turns around the core of the transformer (10), with one end connected to the Lc terminal (32) and the other end connected to the ground. When an angular frequency of an AC signal applied to a drain terminal of the semiconductor device (100) is denoted by ω, inductance of the first wiring (6A) is denoted by LS_6A, inductance of the second wiring (6B) is denoted by LS_6B, gate-source parasitic capacitance of the semiconductor device (100) is denoted by CGS, a relation ωLS_6A<1 / (ωCGS) and ωLS_6B / N2<1 / (ωCGS) are satisfied.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to an apparatus for measuring the parasitic capacitance of a semiconductor device. [Background technology]

[0002] The parasitic capacitance of three-terminal semiconductor devices such as transistors (FET, MOSFET, IGBT, etc.) can be measured using an LCR meter, which is an impedance measuring instrument. Hereinafter, the semiconductor device whose parasitic capacitance is to be measured is referred to as the DUT (Device Under Test).

[0003] The LCR meter is a high-frequency device that outputs an AC (Alternating Current) signal. cur terminal (hereinafter referred to as "Hc terminal") and L cur terminal (hereinafter referred to as "Lc terminal") and H pot Terminal (hereinafter referred to as "Hp terminal") and L pot The Lp terminal is connected to a ground potential (GND) and a ground terminal is connected to the ground potential (GND).

[0004] When a high DC voltage VCC is applied between the drain and source terminals of the DUT, and an AC signal is input from the Hc terminal of the LCR meter to the drain terminal, a current corresponding to the AC signal flows into the drain terminal of the DUT. The current that flows into the drain terminal is split into the gate and source within the DUT. The current that flows into the gate of the DUT is input to the Lc terminal of the LCR meter and measured. Since the source terminal of the DUT is connected to the GND terminal and the Lc terminal is set to the same potential as the GND terminal (imaginary GND), no current flows between the gate and source terminals. Therefore, the current input to the Lc terminal, i.e., the current that flows through the gate terminal, is proportional to the parasitic capacitance (C GD ) only passes through the current (I CGD The drain and source terminals of the DUT are connected to the Hp and Lp terminals of the LCR meter, respectively, and the gate-drain voltage (V CD) is measured.

[0005] Current I measured by the LCR meter CGD and voltage V CD From the amplitude and phase of each of these, the parasitic capacitance C between the gate and drain of the DUT is calculated. GD , i.e., feedback capacitance (C RSS ) is calculated.

[0006] current I CGD and voltage V CD There are two methods for measuring the current and voltage of the DUT: the two-terminal measurement method, in which the wiring for the current monitor and the wiring for the voltage monitor connected to the DUT are common, and the four-terminal measurement method, in which they are separate.

[0007] The two-terminal measurement method has the advantage of simplifying the measurement circuit by reducing the number of components such as wiring and connectors that make up the measurement circuit, but has the disadvantage of reducing measurement accuracy due to the influence of connector contact resistance and wiring inductance, etc. The four-terminal measurement method is the opposite, being able to eliminate the influence of connector contact resistance and wiring inductance, but making the measurement circuit more complex.

[0008] For example, Patent Document 1 listed below proposes a technique for canceling the influence of connector contact resistance and wiring inductance in a two-terminal measurement method. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] JP 2015-210120 A Summary of the Invention [Problem to be solved by the invention]

[0010] In both the two-terminal and four-terminal measurement methods, when the wiring of the measurement circuit is long or when high-frequency measurements are performed, the phenomenon of measurement error becoming large occurs. As a result of the investigation, it was found that the cause is the wiring inductance (L S ) and the wiring inductance (L S ) was found to be the cause.

[0011] The feedback capacitance C mentioned above RSS The measurement method is based on the premise that the gate terminal and source terminal of the DUT are at the same potential (GND potential). In other words, it is based on the premise that the voltage (wiring drop) generated in the wiring inductance between the gate terminal and Lc terminal, and the voltage (wiring drop) generated in the wiring inductance between the source terminal and GND terminal are small enough to be ignored. Therefore, if these wiring drops become large enough to be ignored, correct measurement cannot be performed.

[0012] Therefore, the current C RSS In the measurement technology, the wiring between the gate terminal and the Lc terminal, and the wiring between the source terminal and the GND terminal cannot be made long. For example, when the DUT is attached to a hot plate or cold plate for temperature setting and measurement is performed, when the DUT is connected to another measuring instrument (e.g., a DC measuring instrument) and measurement is performed, or when the distance between the LCR meter and the DUT needs to be increased to secure working space, it becomes necessary to make the wiring of the measurement circuit long, but the above-mentioned problem of wiring drop becomes a bottleneck. In addition, when the frequency of the AC signal applied to the DUT is increased, the displacement current due to the parasitic capacitance of the DUT increases and the wiring impedance also increases, so the problem of wiring drop becomes more pronounced.

[0013] The present disclosure has been made to solve the above problems, and aims to improve the measurement accuracy of the feedback capacitance of a semiconductor device (DUT). [Means for solving the problem]

[0014] A semiconductor device capacitance measuring apparatus according to the present disclosure is a measuring apparatus comprising an LCR meter having an Hc terminal for outputting an AC signal, an Lc terminal for monitoring current, an Hp terminal and an Lp terminal for monitoring voltage, and measuring the capacitance of a three-terminal semiconductor device, wherein a drain terminal of the semiconductor device to be measured is connected to the Hc terminal and the Hp terminal, a gate terminal of the semiconductor device is connected to the Lp terminal, and a source terminal of the semiconductor device is connected to the GND terminal, and the measuring apparatus further comprises a first transformer, a first wiring that is passed through a core of the first transformer only once and connected between the gate terminal and the source terminal of the semiconductor device, and a second wiring that is wound N times around the core of the first transformer, one end of which is connected to the Lc terminal and the other end of which is grounded during measurement, and wherein ω is an angular frequency of the AC signal, L is an inductance of the first wiring, and S_6A , the inductance of the second wiring is L S_6B , the gate-source parasitic capacitance of the semiconductor device is C GS Then, ωL S_6A <1 / (ωC GS ), and ωL S_6B / N 2 <1 / (ωC GS ) relationship is satisfied. Effect of the Invention

[0015] According to the present disclosure, it is possible to improve the measurement accuracy of the feedback capacitance of a semiconductor device (DUT). [Brief description of the drawings]

[0016] [Figure 1] 1 is a diagram showing a circuit configuration of a capacitance measuring device according to a first embodiment. [Diagram 2] FIG. 2 is an enlarged view of the DUT and the first transformer. [Diagram 3] FIG. 11 is a diagram showing a circuit configuration of a capacitance measuring device according to a second embodiment. [Figure 4] FIG. 1 is a diagram showing the measurement terminals of a typical LCR meter. [Diagram 5]An enlarged view of the female side of the BNC connector. [Figure 6] FIG. 11 is a diagram showing a circuit configuration of a capacitance measuring device according to a third embodiment. [Figure 7] FIG. 13 is a diagram showing a circuit configuration of a capacitance measuring device according to a fourth embodiment. [Figure 8] FIG. 13 is a diagram showing a circuit configuration of a capacitance measuring device according to a fourth embodiment. [Figure 9] FIG. 13 is an external view of a measuring jig according to embodiment 5. [Figure 10] FIG. 13 is a perspective view of a measuring jig according to the fifth embodiment. [Figure 11] FIG. 13 is an external view of a measuring jig according to the fifth embodiment. [Figure 12] FIG. 13 is a perspective view of a measuring jig according to the fifth embodiment. [Figure 13] FIG. 13 is an equivalent circuit diagram of a measuring jig according to the fifth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0017] <Embodiment 1> FIG. 1 is a diagram showing a circuit configuration of an apparatus for measuring the capacitance of a semiconductor device (hereinafter referred to as a "capacitance measuring apparatus") according to a first embodiment.

[0018] As shown in Fig. 1, the capacitance measuring device according to the first embodiment includes a first transformer 10 which is a current transformer, two choke coils 1 and 2 which block AC signals, two block capacitors 3 and 4, an LCR meter 30, and a plurality of wirings 5, 6A, 6B, 7, 8, and 9 which connect these components. An enlarged view of a DUT 100 which is a semiconductor device to be measured and the first transformer 10 is shown in Fig. 2.

[0019] The drain terminal of the DUT 100 is connected to the Vcc power supply via the choke coil 1, is connected to the Hc terminal 31 of the LCR meter 30 via a block capacitor 3, and is connected to the Hp terminal 33 of the LCR meter 30 via a block capacitor 4. The source terminal of the DUT 100 is connected to the GND terminal via the choke coil 2, and is connected to the GND terminal 35 of the LCR meter 30 through a wiring 7. Hereinafter, in order to distinguish between the GND terminal to which the choke coil 2 is connected and the GND terminal 35 of the LCR meter 30, the GND terminal to which the choke coil 2 is connected will be referred to as the "power GND terminal."

[0020] The gate terminal and source terminal of the DUT 100 are shorted by a wiring 6A. The wiring 6A is passed through a hole in the core of the first transformer 10 and serves as the primary wiring of the first transformer 10. At this time, the impedance of the wiring 6A is the parasitic capacitance (C GS The length of the wiring 6A is shortened so that the impedance is sufficiently smaller than the impedance of the first junction, that is, so that the following equation (1) is satisfied. ωL S_6A <1 / (ωC GS ) ···(1) In equation (1), ω is the angular frequency of the AC signal, L S_6A is the inductance of wire 6A, C GS is the gate-source parasitic capacitance of the DUT 100.

[0021] Moreover, a wire 6B is wound N times as a secondary side wire around the core of the first transformer 10. One end of the wire 6B is connected to the Guard, and the other end is connected to the Lc terminal 32 of the LCR meter 30. At this time, the number of turns N of the wire 6A is increased so that the following formula (2) is satisfied. ωL S_6B / N 2 <1 / (ωC GS ) ···(2) In equation (2), ω is the angular frequency of the AC signal, L S_6B is the inductance of wire 6B, C GS is the gate-source parasitic capacitance.

[0022] When an AC signal is applied to the drain terminal of the DUT 100 from the Hc terminal 31 of the LCR meter 30, a current corresponding to the AC signal flows into the drain terminal, passes through the gate terminal, and flows to the source terminal through the primary side wiring 6A, and flows from the source terminal through the wiring 7 to the GND terminal 35. A magnetic flux is generated inside the core of the first transformer 10 due to the current flowing through the primary side wiring 6A (primary side current), but a current (secondary side current) that is 1 / N of the primary side current is generated in the secondary side wiring 6B to cancel this. The current flowing through the wiring 6B (secondary side current) flows into the Lc terminal 32 of the LCR meter 30.

[0023] Since the current flowing into the Lc terminal 32 is 1 / N of the current flowing between the drain and gate of the DUT 100, i.e., the current flowing through the wiring 6A, the value of the parasitic capacitance between the gate and drain of the LCR meter 30 measured by the LCR meter 30 (the display value of the LCR meter 30) is 1 / N of the actual value. Therefore, by multiplying the measurement value (display value) of the LCR meter 30 by N, the actual gate-drain parasitic capacitance C GD , i.e., feedback capacitance C RSS is required.

[0024] The secondary wiring 6B also has an inductance L S_6B Parasitic impedance occurs due to the above, but the inductance L of the secondary wiring 6B seen from the primary wiring 6A S_6B is reduced to 1 / N of the actual value due to the effect of the first transformer 10. 2 That is, if the number of turns N of the secondary wiring 6B is 10, the reduction is 1 / 100, if it is 20, the reduction is 1 / 400, and if it is 30, the reduction is 1 / 900.

[0025] Therefore, in the capacitance measuring device of embodiment 1, for example, if the number of turns N of the secondary side wiring 6B is 10 or more, even if the length of the wiring 6B is 100 times that of the conventional wiring (the wiring between the gate terminal and the Lc terminal in the conventional measurement method), precision and accuracy equivalent to or greater than that of the conventional measurement method can be obtained.

[0026] In addition, for example, when a relay is connected to the wiring 6B to realize an automatic circuit switching function, the increase in wiring impedance due to the contact resistance of the relay can be reduced to a negligible level due to the effect of the first transformer 10. Furthermore, when the measurement frequency (frequency of the AC signal) is increased, the impedance (ωL S_6B ) becomes larger, but this effect can be made negligible.

[0027] Here, the current flowing between the gate and source of the DUT 100 is caused not only by the wiring 6A but also by the parasitic capacitance C GS However, the impedance of the secondary wiring 6B seen from the gate terminal and the source terminal (ωL S_6B / N 2 ) and the impedance of the primary wiring 6A (ωL S_6A ) is the gate-source parasitic capacitance C GS Impedance due to (1 / (ωC GS )) is so small that it can be ignored, so the parasitic capacitance C GS In other words, if the above formulas (1) and (2) are satisfied, the current flowing from the drain to the gate of the DUT 100 is negligible due to the parasitic capacitance C GS It can be considered that the current does not flow through the primary wiring 6A, but only through the primary wiring 6A.

[0028] Specifically, "ωL S_6A +ωL S_6B / N 2 " is "1 / (ωC GS If the difference is less than 5% of the capacitance of the semiconductor device, the measurement error will be less than 5%, and the required accuracy for measuring the capacitance of the semiconductor device will be obtained. If the difference is less than 3%, the measurement error will be less than 3%, which is more preferable. If the difference is less than 1% or less than 0.1%, the measurement error will be less than 1% and an accuracy of less than 0.1% will be obtained.

[0029] In addition, with conventional measurement methods, when the wiring is long or measurements are performed at high frequencies, the measurement error can exceed 100% due to the potential difference that occurs between the gate and source terminals.

[0030] <Embodiment 2> Fig. 3 is a diagram showing a circuit configuration of a capacitance measuring device according to embodiment 2. The configuration of the capacitance measuring device in Fig. 3 is obtained by adding one current transformer to the configuration in Fig. 1. Specifically, it is as follows.

[0031] 1 is disconnected from the Lc terminal 32, and is wound N times around the core of the second transformer 11, which is an added current transformer, and connected to Guard (or GND). This makes the wiring 6B the primary wiring of the second transformer 11. In other words, one end of the wiring 6B is the secondary wiring of the first transformer 10, and the other end of the wiring 6B is the primary wiring of the second transformer 11.

[0032] The Lc terminal 32 of the LCR meter 30 is shorted to the Guard (or GND) using a wire 6C, which is passed through the core of the second transformer 11 to form the secondary side wire of the second transformer 11. At this time, the impedance of the wire 6C is the parasitic capacitance (C GS The length of the wiring 6C is shortened so that the impedance is sufficiently smaller than the impedance of the first wiring 6C, that is, so that the following equation (3) is satisfied. ωL S_6C <1 / (ωC GS ) ···(3) In equation (3), ω is the angular frequency of the AC signal, L S_6C is the inductance of the wiring 6C, C GS is the gate-source parasitic capacitance.

[0033] In the capacitance measuring device according to the second embodiment, the current attenuated to 1 / N by the first transformer 10 is multiplied by N (i.e., restored to the original magnification) by the second transformer 11 and flows into the Lc terminal 32 of the LCR meter 30. Therefore, it is not necessary to interpret the measured value (multiply the displayed value by N) as required in the capacitance measuring device according to the first embodiment.

[0034] Here, the Lc terminal 32 of the LCR meter 30 and the Guard (or GND) can be shorted with a short wire, and the inductance L S_6C In other words, the above formula (3) can be satisfied.

[0035] For example, FIG. 4 is a diagram showing the measurement terminals of a general LCR meter 30. All four terminals, Hc terminal 31, Lc terminal 32, Hp terminal 33, and Lp terminal 34, are female (jack) BNC (Bayonet Neill-Concelman) connectors. An enlarged view of the female BNC connector (enlarged view of Lc terminal 32) is shown in FIG. 5. The distance between center contact 16, which is an internal conductor, and body 17 connected to Guard (or GND) is about 5 mm to 7 mm. The center contact 16 and body 17 of the BNC connector of Lc terminal 32 are shorted with wire 6C, and the wire 6C can be passed through the core of the second transformer 11 to serve as the secondary wiring of the second transformer 11.

[0036] In the capacitance measuring device according to the second embodiment, "ωL S_6A +ωL S_6B / N 2 +ωL S_6C " is "1 / (ωC GS If the difference is less than 5% of the capacitance of the semiconductor device, the measurement error will be less than 5%, and the required accuracy for measuring the capacitance of the semiconductor device will be obtained. If the difference is less than 3%, the measurement error will be less than 3%, which is more preferable. If the difference is less than 1% or less than 0.1%, the measurement error will be less than 1% and an accuracy of less than 0.1% will be obtained.

[0037] <Embodiment 3> Fig. 6 is a diagram showing a circuit configuration of a capacitance measuring device according to embodiment 3. The configuration of the capacitance measuring device in Fig. 6 is obtained by adding one more current transformer to the configuration in Fig. 3. Specifically, it is as follows.

[0038] As shown in FIG. 6, in the capacitance measuring device according to the third embodiment, a third transformer 12 is connected between a first transformer 10 and a second transformer 11. The core of the first transformer 10 is smaller than those in the first and second embodiments. A wiring 6B on the secondary side of the first transformer 10 is passed through the core of the first transformer 10 only once. The wiring 6B is also passed through the core of the third transformer 12 only once, and serves as the primary side wiring of the third transformer 12. Specifically, the wiring 6B is a circular wiring that is passed through each of the cores of the first transformer 10 and the third transformer 12 once. In this case, the impedance of the wiring 6B is calculated as a parasitic capacitance (C GS The length of the wiring 6B is shortened so that the impedance is sufficiently smaller than the impedance of the first junction 6B, that is, so that the following equation (4) is satisfied. ωL S_6B <<1 / (ωC GS ) ···(4) In equation (4), ω is the angular frequency of the AC signal, L S_6B is the inductance of wire 6B, C GS is the gate-source parasitic capacitance of the DUT 100.

[0039] A wire 6D is wound N times around the core of the third transformer 12 and connected to Guard (or GND). As a result, one end of the wire 6D becomes the secondary side wire of the third transformer 12. The other end of the wire 6D is wound N times around the core of the second transformer 11 and connected to Guard (or GND) to become the primary side wire of the second transformer 11.

[0040] The number of turns of the wiring 6D around the core of the third transformer 12 and the number of turns N of the wiring 6D around the core of the second transformer 11 are set large so as to satisfy the following formula (5). ωL S_6D / N 2 <1 / (ωC GS ) ···(5) In equation (5), ω is the angular frequency of the AC signal, L S_6D is the inductance of wiring 6D, C GS is the gate-source parasitic capacitance.

[0041] When an AC signal is applied to the drain terminal of the DUT 100, a current corresponding to the AC signal flows into the drain terminal, passes through the gate terminal, and flows to the source terminal through the wiring 6A on the primary side of the first transformer 10, and flows from the source terminal through the wiring 7 to the GND terminal 35. A magnetic flux is generated inside the core of the first transformer 10 due to the current (primary current) flowing through the wiring 6A on the primary side of the first transformer 10, but a current (secondary current) of the same magnitude as the primary current is generated in the wiring 6B on the secondary side to cancel this, and this current becomes the primary current of the third transformer 12. Furthermore, a magnetic flux is generated inside the core of the third transformer 12 due to the primary current flowing through the wiring 6B on the primary side of the third transformer 12, but a secondary current of 1 / N of the primary current is generated in the wiring 6D on the secondary side to cancel this, and this current becomes the primary current of the second transformer 11.

[0042] Then, the current attenuated to 1 / N by the third transformer 12 is multiplied by N by the second transformer 11 (i.e., restored to the original magnification) and flows into the Lc terminal 32 of the LCR meter 30. Therefore, even in the third embodiment, it is not necessary to interpret the measured value (multiplying the displayed value by N) as was necessary in the capacitance measuring device of the first embodiment.

[0043] In the first and second embodiments, the greater the number of turns N of the wiring 6B on the secondary side of the first transformer 10, the greater the inductance L S_6B However, in order to increase the number of turns of the secondary side wiring of the first transformer 10, it is necessary to increase the dimensions of the core of the first transformer 10. On the other hand, the inductance L of the wiring 6A connecting the gate terminal and the source terminal of the DUT 100 is S_6A In order to suppress this, it is preferable that the wiring 6A is as short as possible. In order to shorten the wiring 6A, it is necessary to suppress the dimensions of the core of the first transformer 10 to a certain degree. That is, in the first and second embodiments, the number of turns N of the first transformer 10 is increased in order to extend the wiring 6B, and the inductance L of the wiring 6A between the gate terminal and the source terminal of the DUT 100 is reduced.S_6A Reducing is a trade-off.

[0044] In contrast, in the third embodiment, the wiring 6B on the secondary side of the first transformer 10 is passed only once through the core of the first transformer 10. Therefore, the dimensions of the core of the first transformer 10 can be small, and the effects of the above-mentioned trade-off can be reduced.

[0045] In the capacitance measuring device according to the third embodiment, "ωL S_6A +ωL S_6B +ωL S_6D / N 2 +ωL S_6C " is "1 / (ωC GS If the difference is less than 5% of the capacitance of the semiconductor device, the measurement error will be less than 5%, and the required accuracy for measuring the capacitance of the semiconductor device will be obtained. If the difference is less than 3%, the measurement error will be less than 3%, which is more preferable. If the difference is less than 1% or less than 0.1%, the measurement error will be less than 1% and an accuracy of less than 0.1% will be obtained.

[0046] <Fourth embodiment> FIG. 7 is a diagram showing a circuit configuration of a capacitance measuring device according to the fourth embodiment.

[0047] As shown in FIG. 7, the capacitance measuring device of embodiment 4 includes two choke coils 1 and 2 that block AC signals, two block capacitors 3 and 4, an LCR meter 30, an operational amplifier 18, and a plurality of wirings 5-9, 19-21 that connect these together.

[0048] The drain terminal of the DUT 100 is connected to the Vcc power supply via the choke coil 1, is connected to the Hc terminal 31 of the LCR meter 30 via the block capacitor 3, and is connected to the Hp terminal 33 of the LCR meter 30 via the block capacitor 4. The gate terminal of the DUT 100 is connected to the Lc terminal 32 of the LCR meter 30 via the wiring 6, and is connected to the negative input terminal (inverting input terminal) of the operational amplifier 18 via the wiring 19. The source terminal of the DUT 100 is connected to the power GND terminal via the choke coil 2, and is connected to the GND terminal 35 of the LCR meter 30 through the wiring 7. The source terminal of the DUT 100 is connected to the positive input terminal (non-inverting input terminal) of the operational amplifier 18 via the wiring 20, and the output terminal of the operational amplifier 18 is connected to the negative input terminal via the wiring 21.

[0049] 8, the gate terminal of DUT 100 may be connected to the positive input terminal of operational amplifier 18 via wiring 20, the source terminal of DUT 100 may be connected to the negative input terminal of operational amplifier 18 via wiring 19, and the output terminal of operational amplifier 18 may be connected to the negative input terminal via wiring 21. That is, the positive input terminal of operational amplifier 18 may be connected to one of the source terminal or gate terminal of DUT 100, the negative input terminal of operational amplifier 18 may be connected to the other of the source terminal or gate terminal of DUT 100, and the output terminal of operational amplifier 18 may be connected to the negative input terminal.

[0050] When an AC signal is applied from the Hc terminal 31 of the LCR meter 30 to the drain terminal of the DUT 100, a current corresponding to the AC signal flows into the drain terminal and is divided into the gate and source within the DUT 100. The current that flows into the gate of the DUT flows through the wiring 6 to the Lc terminal 32, and the current that flows into the source flows through the wiring 7 to the GND terminal 35.

[0051] Wire 6 has inductance L S_6 A voltage is generated by this, and the inductance L S_7These voltages create a potential difference between the gate and source terminals of the DUT 100, but the positive and negative input terminals of the operational amplifier 18 are at the same potential (imaginary short), so the gate and source terminals of the DUT 100 are at the same potential. As a result, no current flows between the gate and source terminals, and the Lc terminal 32 of the LCR meter 30 detects the parasitic capacitance (C GD ) only passes through the current (I CGD ) flows in.

[0052] Therefore, the inductance L of wire 6 S_6 and the inductance L of wiring 7 S_7 Regardless of the magnitude of the voltage developed at Lc, the LCR meter 30 accurately measures the current I CGD The gate-drain parasitic capacitance C GD , i.e., feedback capacitance C RSS can be accurately measured.

[0053] It is desirable for the operational amplifier 18 to have an open loop gain that does not attenuate even at 10 MHz so that it can handle high frequencies.

[0054] Here, the potential difference between the positive and negative input terminals of the operational amplifier 18, that is, the potential difference between the source and gate terminals of the DUT 100, is the feedback capacitance C RSS The ratio of the positive input voltage (voltage between the positive input terminal and signal GND) to the negative input voltage (voltage between the negative input terminal and signal GND) of the operational amplifier 18 is expressed by the following equation (6). V + / V - =(1+1 / A V ) ···(6) In equation (6), V + is the positive input voltage of op-amp 18, V - is the negative input voltage of the operational amplifier 18, A V is the open loop gain of the op amp 18.

[0055] In the capacitance measuring device according to the fourth embodiment, the open loop gain A V If the potential difference between the positive and negative input terminals is 20 times or more, the measurement accuracy is 5% or less, which is the accuracy required to measure the capacitance of semiconductor devices. If it is 100 times, the accuracy is 1%, if it is 1000 times, it is 0.1%, and if it is 10000 times, it is 0.01%.

[0056] Opamp 18 is A even at 10MHz. V It is desirable to have 100 times as much.

[0057] <Fifth Preferred Embodiment> In the fifth embodiment, there is shown a measurement jig for configuring the measurement circuit of the capacitance measuring device in the fifth embodiment and the third embodiment. Fig. 9 is an external view of the measurement jig 50 according to the fifth embodiment, and Fig. 10 is a perspective view thereof.

[0058] As shown in FIG. 10, a measuring jig 50 according to the fifth embodiment includes a BNC connector jack 51, a BNC connector plug 52, a transformer 53 having a core, and wires 54 and 55.

[0059] Wire 54 is wound N times around the core of transformer 53, with one end connected to center contact 51a which is a signal terminal of jack 51, and the other end connected to body 51b which is a guard of jack 51. Wire 55 is passed through the core of transformer 53 once, with one end connected to center contact 52a which is a signal terminal of plug 52, and the other end connected to body 52b which is a guard of plug 52.

[0060] When current (primary current) flows into center contact 51a of jack 51, a magnetic flux is generated inside the core of transformer 53, but N times the magnetic flux flows through wiring 55 into center contact 16 on the plug 52 side, as if to cancel out this magnetic flux.

[0061] The measuring jig 50 according to the fifth embodiment can be used as the core of the second transformer 11 and the secondary wiring (wiring 6C) of the second transformer 11 in the second embodiment (FIG. 3) and the third embodiment (FIG. 6). Specifically, the plug 52 is connected to the Lp terminal 34 of the LCR meter 30, and the body 51b on the jack 51 side is connected to the Guard or GND. In the second embodiment, the center contact 51a on the jack 51 side is connected to the wiring 6B, and in the third embodiment, the center contact 51a on the jack 51 side is connected to the wiring 6D. By using this measuring jig 50, the wiring work is simplified.

[0062] <Sixth embodiment> In embodiment 6, a measurement jig for configuring the measurement circuit of the capacitance measuring device of embodiment 2 is shown. Fig. 11 is an external view of measurement jig 60 according to embodiment 6, and Fig. 12 is a perspective view thereof. Fig. 13 is an equivalent circuit diagram of measurement jig 60 according to embodiment 6.

[0063] The measuring jig 60 according to the sixth embodiment is obtained by electrically connecting the jacks 51 of two measuring jigs 50 according to the fifth embodiment with a coaxial cable 56. When this is expressed as an equivalent circuit, it becomes a circuit in which a transformer is connected to both ends of the cable, as shown in FIG. 13. The influence of the impedance of the coaxial cable 56 between the two measuring jigs 50 is reduced to 1 / N due to the effect of the transformer. 2 is reduced to

[0064] The measurement jig 60 according to the sixth embodiment can be used as the first transformer 10, the second transformer 11, and the wiring 6B therebetween in the second embodiment. Specifically, the plug 52 of one of the two measurement jig 50 constituting the measurement jig 60 according to the sixth embodiment is connected to the Lc terminal 32 of the LCR meter 30, and the center contact and the body of the plug 52 of the other measurement jig 50 are electrically connected to the gate terminal and the source terminal of the DUT 100, respectively.

[0065] <Embodiment 7> In the seventh embodiment, at least one of the primary wiring of the first transformer 10 in the first embodiment (wire 6A in FIG. 1), the primary wiring of the first transformer 10 and the secondary wiring of the second transformer 11 in the second embodiment (wire 6A and wire 6C in FIG. 3), the primary wiring and secondary wiring of the first transformer 10, the primary wiring of the second transformer 11, and the secondary wiring of the third transformer 12 in the third embodiment (wire 6A, wire 6B, wire 6C in FIG. 6) is a litz wire. Since all of these wires are passed through the transformer cores only once, there is almost no effect even if the wires become thicker by using litz wire.

[0066] Litz wire can suppress the increase in resistance caused by the skin effect and proximity effect that occurs during high-frequency measurements. With normal wiring, there is a concern that the increase in resistance of the wiring due to the skin effect and proximity effect during high-frequency measurements will increase the impedance of the wiring and increase measurement errors. By using Litz wire for the above wiring, the increase in resistance can be suppressed, and stable measurement accuracy can be obtained even at high frequencies.

[0067] Regarding the secondary wiring of the first transformer 10 in the first embodiment (wire 6B in FIG. 1), the secondary wiring of the first transformer 10 and the primary wiring of the second transformer 11 in the second embodiment (wire 6B in FIG. 3), and the secondary wiring of the second transformer 11 and the primary wiring of the third transformer 12 in the third embodiment (wire 6D in FIG. 6), even if the resistance value of the wiring increases due to the skin effect and the proximity effect caused by high frequency, the resistance value is reduced to 1 / N due to the effect of the transformer. 2 Therefore, normal wiring does not affect the measurement.

[0068] It should be noted that the embodiments can be freely combined, and each embodiment can be modified or omitted as appropriate.

[0069] <Additional Notes> Various aspects of the present disclosure are summarized below as appendices.

[0070] (Appendix 1) A measuring device for measuring the capacitance of a three-terminal semiconductor device, comprising an LCR meter having an Hc terminal for outputting an AC signal, an Lc terminal for monitoring a current, an Hp terminal for monitoring a voltage, an Lp terminal, and a GND terminal, a drain terminal of a semiconductor device to be measured is connected to the Hc terminal and the Hp terminal; a gate terminal of the semiconductor device is connected to the Lp terminal; a source terminal of the semiconductor device is connected to the GND terminal; The measuring device further comprises: The first transformer, a first wiring that is passed through a core of the first transformer only once and is connected between the gate terminal and the source terminal of the semiconductor device; a second wire that is wound N times around a core of the first transformer, one end of which is connected to the Lc terminal and the other end of which is grounded during measurement; Equipped with The angular frequency of the AC signal is ω, and the inductance of the first wiring is L S_6A , the inductance of the second wiring is L S_6B , the gate-source parasitic capacitance of the semiconductor device is C GS Then, ωL S_6A <1 / (ωC GS ), and ωL S_6B / N 2 <1 / (ωC GS ) The relationship is satisfied, A device for measuring the capacitance of semiconductor devices.

[0071] (Appendix 2) ωL S_6A +ωL S_6B / N 2 But, 1 / (ωC GS ) is less than 5% of 2. An apparatus for measuring the capacitance of a semiconductor device according to claim 1.

[0072] (Appendix 3) A measuring device for measuring the capacitance of a three-terminal semiconductor device, comprising an LCR meter having an Hc terminal for outputting an AC signal, an Lc terminal for monitoring a current, an Hp terminal for monitoring a voltage, an Lp terminal, and a GND terminal, a drain terminal of a semiconductor device to be measured is connected to the Hc terminal and the Hp terminal; a gate terminal of the semiconductor device is connected to the Lp terminal; a source terminal of the semiconductor device is connected to the GND terminal; The measuring device further comprises: The first transformer, A second transformer; a first wiring that is passed through a core of the first transformer only once and is connected between the gate terminal and the source terminal of the semiconductor device; a second wiring that is wound N times around each of the cores of the first transformer and the second transformer, and both ends of which are grounded during measurement; a third wire that is passed through a core of the second transformer once, one end of which is connected to the Lc terminal and the other end of which is grounded during measurement; Equipped with The angular frequency of the AC signal is ω, and the inductance of the third wiring is L. S_6C , the gate-source parasitic capacitance of the semiconductor device is C GS Then, ωL S_6C <1 / (ωC GS ) The relationship is satisfied, A device for measuring the capacitance of semiconductor devices.

[0073] (Appendix 4) The inductance of the first wiring is L S_6A , the inductance of the second wiring is L S_6B Then, ωL S_6A +ωL S_6B / N 2 +ωL S_6C But, 1 / (ωC GS ) is less than 5% of 4. An apparatus for measuring the capacitance of a semiconductor device according to claim 3.

[0074] (Appendix 5) A measuring device for measuring the capacitance of a three-terminal semiconductor device, comprising an LCR meter having an Hc terminal for outputting an AC signal, an Lc terminal for monitoring a current, an Hp terminal for monitoring a voltage, an Lp terminal, and a GND terminal, a drain terminal of a semiconductor device to be measured is connected to the Hc terminal and the Hp terminal; a gate terminal of the semiconductor device is connected to the Lp terminal; a source terminal of the semiconductor device is connected to the GND terminal; The measuring device further comprises: The first transformer, A second transformer; The third transformer, a first wiring that is passed through a core of the first transformer only once and is connected between the gate terminal and the source terminal of the semiconductor device; a second looped wiring that is passed once through each of the core of the first transformer and the core of the second transformer; a third wire wound N times around each of the second transformer core and the third transformer core, both ends of which are grounded during measurement; a fourth wire that is passed through a core of the third transformer once, has one end connected to the Lc terminal, and has the other end grounded during measurement; Equipped with The angular frequency of the AC signal is ω, and the inductance of the second wiring is L. S_6B , the inductance of the third wiring is L S_6D , the gate-source parasitic capacitance of the semiconductor device is C GS Then, ωL S_6B <<1 / (ωC GS ) ···(4) ωL S_6D / N 2 <1 / (ωC GS ) ···(5) The relationship is satisfied, A device for measuring the capacitance of semiconductor devices.

[0075] (Appendix 6) The inductance of the first wiring is L S_6A , the inductance of the fourth wiring is L S_6C Then, ωL S_6A +ωL S_6B +ωL S_6D / N 2 +ωL S_6C But, 1 / (ωC GS ) is less than 5% of 6. An apparatus for measuring the capacitance of a semiconductor device according to claim 5.

[0076] (Appendix 7) At least one of the wires that is passed only once through the transformer core is Litz wire. 7. An apparatus for measuring the capacitance of a semiconductor device according to any one of claims 1 to 6.

[0077] (Appendix 8) A measuring device for measuring the capacitance of a three-terminal semiconductor device, comprising an LCR meter having an Hc terminal for outputting an AC signal, an Lc terminal for monitoring a current, an Hp terminal for monitoring a voltage, an Lp terminal, and a GND terminal, a drain terminal of a semiconductor device to be measured is connected to the Hc terminal and the Hp terminal; a gate terminal of the semiconductor device is connected to the Lc terminal and the Lp terminal; a source terminal of the semiconductor device is connected to the GND terminal; The measuring device further comprises: an operational amplifier having a non-inverting input terminal connected to one of the source terminal or the gate terminal of the semiconductor device, an inverting input terminal connected to the other of the source terminal or the gate terminal of the semiconductor device, and an output terminal connected to the inverting input terminal; A device for measuring the capacitance of semiconductor devices.

[0078] (Appendix 9) The open loop gain of the operational amplifier is 20 times or more the potential difference between the non-inverting input terminal and the inverting input terminal. 9. An apparatus for measuring the capacitance of a semiconductor device according to claim 8.

[0079] (Appendix 10) the drain terminal of the semiconductor device is connected to a power supply via a first choke coil, to the Hc terminal via a first block capacitor, and to the Hp terminal via a second block capacitor; The source terminal of the semiconductor device is grounded via a second choke coil. An apparatus for measuring the capacitance of a semiconductor device according to any one of Supplementary Note 1 to Supplementary Note 9.

[0080] (Appendix 11) BNC plugs and jacks, Transformer and a first wire wound N times around a core of the transformer, one end of which is connected to a first center contact that is a signal terminal of the jack, and the other end of which is connected to a first body that is a guard of the jack; a second wire that is passed through the core of the transformer only once, has one end connected to a second center contact that is a signal terminal of the plug, and has the other end connected to a second body that is a guard of the plug; A measuring tool comprising:

[0081] (Appendix 12) Two measuring jigs as described in Appendix 11, a coaxial cable connecting the jacks of the two measurement jigs; A measuring tool comprising: [Explanation of symbols]

[0082] 1,2 choke coil, 3,4 block capacitor, 5-9 wiring, 10 first transformer, 11 second transformer, 12 third transformer, 16 center contact, 17 body, 18 operational amplifier, 19-21 wiring, 30 LCR meter, 31 Hc terminal, 32 Lc terminal, 33 Hp terminal, 34 Lp terminal, 35 GND terminal, 50 measurement jig, 51 jack, 51a, 52a center contact, 51b, 52b body, 52 plug, 53 transformer, 54, 55 wiring, 56 coaxial cable, 60 measurement jig, 100 semiconductor device (DUT).

Claims

1. 1. A measuring apparatus for measuring a capacitance of a three-terminal semiconductor device, comprising an LCR meter having an Hc terminal for outputting an AC signal, an Lc terminal for monitoring a current, an Hp terminal, an Lp terminal for monitoring a voltage, and a GND terminal, a drain terminal of a semiconductor device to be measured is connected to the Hc terminal and the Hp terminal; a gate terminal of the semiconductor device is connected to the Lp terminal; a source terminal of the semiconductor device is connected to the GND terminal; The measuring device further comprises: A first transformer; a first wiring that is passed through a core of the first transformer only once and is connected between the gate terminal and the source terminal of the semiconductor device; a second wire that is wound N times around a core of the first transformer, one end of which is connected to the Lc terminal and the other end of which is grounded during measurement; Equipped with The angular frequency of the AC signal is ω, and the inductance of the first wiring is L Ｓ＿６Ａ , the inductance of the second wiring is L Ｓ＿６Ｂ , the gate-source parasitic capacitance of the semiconductor device is C ＧＳ Then, ωL Ｓ＿６Ａ <1 / (ωC ＧＳ ), and ωL Ｓ＿６Ｂ / N ２ <1 / (ωC ＧＳ ) The relationship is satisfied, A device for measuring the capacitance of semiconductor devices.

2. ωL Ｓ＿６Ａ +ωL Ｓ＿６Ｂ / N ２ But, 1 / (ωC ＧＳ ) is less than 5% of 2. The apparatus for measuring the capacitance of a semiconductor device according to claim 1.

3. 1. A measuring apparatus for measuring a capacitance of a three-terminal semiconductor device, comprising an LCR meter having an Hc terminal for outputting an AC signal, an Lc terminal for monitoring a current, an Hp terminal, an Lp terminal for monitoring a voltage, and a GND terminal, a drain terminal of a semiconductor device to be measured is connected to the Hc terminal and the Hp terminal; a gate terminal of the semiconductor device is connected to the Lp terminal; a source terminal of the semiconductor device is connected to the GND terminal; The measuring device further comprises: A first transformer; A second transformer; a first wiring that is passed through a core of the first transformer only once and is connected between the gate terminal and the source terminal of the semiconductor device; a second wiring that is wound N times around each of the cores of the first transformer and the second transformer, and both ends of which are grounded during measurement; a third wire that is passed through a core of the second transformer once, has one end connected to the Lc terminal, and has the other end grounded during measurement; Equipped with The angular frequency of the AC signal is ω, and the inductance of the third wiring is L Ｓ＿６Ｃ , the gate-source parasitic capacitance of the semiconductor device is C ＧＳ Then, ωL Ｓ＿６Ｃ <1 / (ωC ＧＳ ) The relationship is satisfied, A device for measuring the capacitance of semiconductor devices.

4. The inductance of the first wiring is L Ｓ＿６Ａ , the inductance of the second wiring is L Ｓ＿６Ｂ Then, ωL Ｓ＿６Ａ +ωL Ｓ＿６Ｂ / N ２ +ωL Ｓ＿６Ｃ But, 1 / (ωC ＧＳ ) is less than 5% of 4. The apparatus for measuring the capacitance of a semiconductor device according to claim 3.

5. 1. A measuring apparatus for measuring a capacitance of a three-terminal semiconductor device, comprising an LCR meter having an Hc terminal for outputting an AC signal, an Lc terminal for monitoring a current, an Hp terminal, an Lp terminal for monitoring a voltage, and a GND terminal, a drain terminal of a semiconductor device to be measured is connected to the Hc terminal and the Hp terminal; a gate terminal of the semiconductor device is connected to the Lp terminal; a source terminal of the semiconductor device is connected to the GND terminal; The measuring device further comprises: A first transformer; A second transformer; A third transformer; a first wiring that is passed through a core of the first transformer only once and is connected between the gate terminal and the source terminal of the semiconductor device; a second looped wiring that is passed once through each of the core of the first transformer and the core of the second transformer; a third wire wound N times around each of the second transformer core and the third transformer core, both ends of which are grounded during measurement; a fourth wire that is passed through a core of the third transformer once, has one end connected to the Lc terminal, and has the other end grounded during measurement; Equipped with The angular frequency of the AC signal is ω, and the inductance of the second wiring is L Ｓ＿６Ｂ , the inductance of the third wiring is L Ｓ＿６Ｄ , the gate-source parasitic capacitance of the semiconductor device is C ＧＳ Then, ωL Ｓ＿６Ｂ <<1 / (ωC ＧＳ ) ・・・(4) ωL Ｓ＿６Ｄ / N ２ <1 / (ωC ＧＳ ) ・・・(5) The relationship is satisfied, A device for measuring the capacitance of semiconductor devices.

6. The inductance of the first wiring is L Ｓ＿６Ａ , the inductance of the fourth wiring is L Ｓ＿６Ｃ Then, ωL Ｓ＿６Ａ +ωL Ｓ＿６Ｂ +ωL Ｓ＿６Ｄ / N ２ +ωL Ｓ＿６Ｃ But, 1 / (ωC ＧＳ ) is less than 5% of 6. The apparatus for measuring the capacitance of a semiconductor device according to claim 5.

7. At least one of the wires that is passed through the transformer core only once is a Litz wire.

7. The apparatus for measuring the capacitance of a semiconductor device according to claim 1.

8. 1. A measuring apparatus for measuring a capacitance of a three-terminal semiconductor device, comprising an LCR meter having an Hc terminal for outputting an AC signal, an Lc terminal for monitoring a current, an Hp terminal, an Lp terminal for monitoring a voltage, and a GND terminal, a drain terminal of a semiconductor device to be measured is connected to the Hc terminal and the Hp terminal; a gate terminal of the semiconductor device is connected to the Lc terminal and the Lp terminal; a source terminal of the semiconductor device is connected to the GND terminal; The measuring device further comprises: an operational amplifier having a non-inverting input terminal connected to one of the source terminal or the gate terminal of the semiconductor device, an inverting input terminal connected to the other of the source terminal or the gate terminal of the semiconductor device, and an output terminal connected to the inverting input terminal; A device for measuring the capacitance of semiconductor devices.

9. The open loop gain of the operational amplifier is 20 times or more the potential difference between the non-inverting input terminal and the inverting input terminal.

9. The apparatus for measuring the capacitance of a semiconductor device according to claim 8.

10. the drain terminal of the semiconductor device is connected to a power supply via a first choke coil, to the Hc terminal via a first block capacitor, and to the Hp terminal via a second block capacitor; the source terminal of the semiconductor device is grounded via a second choke coil; The apparatus for measuring the capacitance of a semiconductor device according to any one of claims 1 to 6, 8 and 9.

11. BNC connector plugs and jacks, Transformer and a first wire wound N times around a core of the transformer, one end of which is connected to a first center contact that is a signal terminal of the jack, and the other end of which is connected to a first body that is a guard of the jack; a second wire that is passed through the core of the transformer only once, has one end connected to a second center contact that is a signal terminal of the plug, and has the other end connected to a second body that is a guard of the plug; A measuring tool comprising:

12. Two measuring jigs according to claim 11; a coaxial cable connecting the jacks of the two measurement jigs; A measuring tool comprising:

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