Nitride crystal and semiconductor laminate

Abstract

To improve a quality of a nitride crystal.SOLUTION: A nitride crystal has a composition formula of InxAlyGa1-x-yN (where 0≤x≤1, 0≤y≤1, 0≤x+y≤1). A carbon concentration in the crystal is less than 1×1015 cm-3. A concentration of an electron trap E3 existing in an energy range of 0.5 eV or more and 0.65 eV or less from a lower edge of a conduction band in the crystal is less than 1×1014 cm-3.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a nitride crystal, a semiconductor laminate, a nitride crystal manufacturing method, and a nitride crystal manufacturing apparatus. [Background technology]

[0002] 2. Description of the Related Art When semiconductor devices such as light-emitting elements and high-speed transistors are manufactured, crystals of Group III nitrides such as gallium nitride (GaN) are often used (see Patent Documents 1 to 4). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2016-104693 A [Patent Document 2] JP 2007-153664 A [Patent Document 3] JP 2005-39248 A [Patent Document 4] JP 2020-23427 A Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present invention is to improve the quality of nitride crystals. [Means for solving the problem]

[0005] According to one aspect of the present invention, In x Al y Ga 1-x-y A crystal represented by the formula N (wherein 0≦x≦1, 0≦y≦1, 0≦x+y≦1), The carbon concentration in the crystal is 1×10 15 cm -3 is less than The concentration of electron traps E3 present in the energy range of 0.5 eV to 0.65 eV from the bottom of the conduction band in the crystal is 1×10 14 cm -3

[0013] In accordance with the present invention, nitride crystals are provided that are less than

[0006] According to another aspect of the present invention, In x Al y Ga 1-x-y A crystal represented by the formula N (wherein 0≦x≦1, 0≦y≦1, 0≦x+y≦1), Satisfying formula (1-1) and formula (1-2), [E3]<1×10 14 (1-1) [E3] [C] 2 ≦1×10 43 (1-2) however, [C] is in cm -3 is the concentration of carbon in the crystal, [E3] is the concentration of electron traps E3 present in the energy range of 0.5 eV to 0.65 eV from the bottom of the conduction band in the crystal, and the unit of the concentration of E3 is cm -3 is A nitride crystal is provided.

[0007] According to yet another aspect of the present invention, A substrate; On the substrate, x Al y Ga 1-x-y a nitride crystal layer made of a crystal represented by a composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1); having The carbon concentration in the nitride crystal layer is 1×10 15 cm -3 is less than The concentration of electron traps E3 present in the energy range of 0.5 eV to 0.65 eV from the bottom of the conduction band in the crystal is 1×10 14 cm -3 is less than A semiconductor stack is provided.

[0008] According to yet another aspect of the present invention, A substrate; On the substrate, x Al y Ga 1-x-y a nitride crystal layer made of a crystal represented by a composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1); having The nitride crystal layer satisfies formula (1-1) and formula (1-2), [E3]<1×10 14 (1-1) [E3] [C] 2 ≦1×10 43 (1-2) however, [C] is in cm -3 is the concentration of carbon in the nitride crystal layer, [E3] is the concentration of electron traps E3 present in the energy range of 0.5 eV to 0.65 eV from the bottom of the conduction band in the crystal, and the unit of the concentration of E3 is cm -3 There is provided a semiconductor laminate in which

[0009] According to yet another aspect of the present invention, providing a reaction vessel for containing a substrate; A group III element source gas and a nitrogen source gas are supplied to the substrate heated to a predetermined growth temperature in the reaction vessel, and In x Al y Ga 1-x-y epitaxially growing a nitride crystal represented by a composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1) on the substrate; having The step of preparing a reaction vessel includes: preparing, as the reaction vessel, a vessel having a high-temperature reaction region which is a region heated to the growth temperature and comes into contact with a gas supplied to the substrate, at least a portion of a surface of a member constituting the high-temperature reaction region having a protective layer made of an iron cyano complex; a high-temperature baking process in which the temperature of the high-temperature reaction region is heated to a temperature of 1500° C. or higher, the supply of the nitrogen source gas into the reaction vessel is stopped, and hydrogen gas and a halogen-based gas are supplied into the reaction vessel, thereby cleaning and modifying the surfaces of the members constituting the high-temperature reaction region; have A method for producing nitride crystals is provided.

[0010] According to yet another aspect of the present invention, A reaction vessel for accommodating a substrate; a heating unit that heats at least the substrate in the reaction vessel; a gas supply system for supplying a Group III element source gas and a nitrogen source gas to the substrate in the reaction chamber; The Group III element source gas and the nitrogen source gas are supplied to the substrate heated to a predetermined growth temperature in the reaction vessel, and In x Al y Ga 1-x-y A control unit that controls the heating unit and the gas supply system so as to epitaxially grow a nitride crystal represented by a composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1) on the substrate; Equipped with the reaction vessel has a high-temperature reaction region which is heated to the growth temperature and comes into contact with a gas supplied to the substrate; At least a part of the surface of a member constituting the high-temperature reaction region has a protective layer made of an iron cyano complex, The control unit performs a high-temperature bake process for cleaning and modifying the surfaces of the members constituting the high-temperature reaction region, by heating the high-temperature reaction region to a temperature of 1500° C. or higher, stopping the supply of the nitrogen source gas into the reaction vessel, and supplying hydrogen gas and a halogen-based gas into the reaction vessel, prior to the process of epitaxially growing the nitride crystal. An apparatus for producing nitride crystals is provided. Effect of the Invention

[0011] According to the present invention, it is possible to improve the quality of nitride crystals. [Brief description of the drawings]

[0012] [Figure 1] 1A is a schematic plan view showing the nitride crystal substrate 10, and FIG. 1B is a schematic side view showing the nitride crystal substrate 10. FIG. [Diagram 2] FIG. 13 shows an example of isothermal capacitance transient spectroscopy measurements. [Diagram 3] FIG. 1 shows the results of measuring the electron trap concentration in the GaN crystal of the first embodiment of the present invention and the GaN crystal of Reference 4 by isothermal capacitance transient spectroscopy. [Figure 4] FIG. 2 is a schematic diagram of an HVPE apparatus 200, showing a crystal growth step being performed within a reaction vessel 203. [Diagram 5] FIG. 1 is a schematic diagram of an HVPE apparatus 200, showing a state in which a furnace port 221 of a reaction vessel 203 is open. [Figure 6] 1A is a diagram showing a state in which a crystal film 21 is grown thickly on a seed crystal substrate 20, and FIG. 1B is a diagram showing a state in which multiple substrates 10 are obtained by slicing the thickly grown crystal film 21. [Figure 7] FIG. 11 is a schematic cross-sectional view showing a semiconductor laminate according to a fourth embodiment of the present invention. [Figure 8] FIG. 13 is a graph showing the relationship between the concentration of electron traps E3 and the carbon concentration. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] <Insights gained by the inventor> If impurities other than shallow donors such as silicon (Si), germanium (Ge), and oxygen (O), which supply electrons, are present in nitride crystals, it is believed that the device characteristics will deteriorate. Specifically, this may result in a decrease in carrier mobility, an increase in diode resistance and a decrease in breakdown voltage, and a decrease in light emission efficiency. Therefore, it is desirable to have the concentration of unintended impurities in nitride crystals as low as possible.

[0014] As described in Reference 4, the inventors of the present invention have succeeded in reducing the concentrations of all impurities, such as boron (B), O, and carbon (C), in the nitride crystal to 1×10 15 cm -3 We succeeded in keeping it below that.

[0015] However, when the electron trap concentration in the nitride crystal described in Reference 4 was measured by isothermal capacitance transient spectroscopy (ICTS), it was found that an electron trap E3 remained at a position of about 0.6 eV from the conduction band, and the concentration of the E3 was 1×10 14 cm -3 It turned out to be super.

[0016] According to recent papers (Narita 2020 in Figure 8 below), the origin of E3 is reported to be iron (Fe) in nitride crystals. According to the contents of the paper, it is believed that if the E3 concentration in nitride crystals is measured by the ICTS method, it will be possible to indirectly estimate the Fe concentration in the nitride crystals.

[0017] As described in the above-mentioned Reference 4, the Fe concentration in the nitride crystal grown by the new production method was below the lower limit of secondary ion mass spectrometry (SIMS).

[0018] However, as mentioned above, the E3 concentration in the nitride crystals in Reference 4 measured by the ICTS method was 1 × 10 14 cm -3 Based on this, the Fe concentration in the nitride crystals was indirectly estimated. The Fe concentration in the nitride crystals of Reference 4 was found to be slightly below the lower limit of the SIMS mentioned above (2 × 10 14 cm -3 ~7×10 14 cm -3 It was revealed that Fe was mixed in at a level of about 100%.

[0019] According to a report on the E3 concentration in nitride crystals obtained by conventional metalorganic chemical vapor deposition (MOCVD) or hydride vapor phase epitaxy (HVPE) methods (Tanaka 2016 in Figure 8 below), there is a trade-off between the E3 concentration and the C concentration. As mentioned above, since the origin of E3 is Fe, this corresponds to a trade-off between the Fe concentration and the C concentration.

[0020] In other words, in conventional MOCVD or HVPE methods, a certain amount of Fe and C is present in the crystal growth environment. Selecting conditions that make it easy to incorporate C into the nitride crystal suppresses the incorporation of Fe. On the other hand, selecting conditions that make it difficult to incorporate C into the nitride crystal promotes the incorporation of Fe.

[0021] Specifically, for example, the C concentration is 5×10 16 cm -3 Assuming that the Fe concentration is about 1×10 11 cm -3 On the other hand, the C concentration can be reduced to approximately 1×10 15 cm -3 When the Fe concentration is reduced to about 1×10 15 cm -3 It is possible that the number of cases will increase to as much as 100.

[0022] Therefore, a nitride crystal having extremely low C and Fe concentrations has never been realized. 15 cm -3 and the Fe concentration is less than 1×10 14 cm -3 It was not possible to produce nitride crystals having a crystallinity of less than this even using the novel production method described in the above-mentioned document 4.

[0023] In view of the above new findings, the present inventors have conducted extensive research to further reduce the impurity concentration.

[0024] Here, a stainless steel member, for example, is considered as a source of Fe generation in the MOCVD method or the HVPE method. However, the stainless steel chamber in the MOCVD method is usually sufficiently water-cooled. Also, in the HVPE method, for example, a gas supply pipe made of opaque quartz is used in the middle of a gas supply pipe made of quartz. This makes it possible to suppress heating of the stainless steel flange portion caused by thermal radiation. By taking such measures, excessive heating of the stainless steel member can be suppressed, and the generation of Fe from the member can be suppressed.

[0025] On the other hand, carbon members are sometimes used in the high-temperature reaction zone of MOCVD or HVPE equipment. The carbon members are made of high-purity C, but contain about 0.06 ppm or less of Fe as an inevitable impurity. For this reason, the present inventors provided a heat-resistant protective layer (coat layer) made of, for example, silicon carbide (SiC) on the outer periphery of the carbon members, as described in Reference 4.

[0026] However, at the growth temperature of the nitride crystal and in the atmosphere of the raw material gas, SiC can become brittle, which can cause the protective layer to crack or become porous, which can lead to the leakage of Fe impurities from the carbon member into the growth atmosphere through the protective layer.

[0027] Therefore, the inventors investigated the possibility of covering the surfaces of carbon members and the like in the high-temperature reaction zone with a protective layer made of an iron cyano complex (chemical formula: Fe4[Fe(CN)6]3) instead of SiC. As a result, they found that it was possible to suppress the leakage of Fe from each member in the high-temperature reaction zone into the growth atmosphere, and to dramatically reduce the incorporation of Fe into the nitride crystals. Furthermore, they found that by combining this with a manufacturing method having a high-temperature bake step developed by the inventors, it was possible to obtain nitride crystals with both extremely low C and Fe concentrations.

[0028] The following embodiments are based on the above findings of the present inventors.

[0029] First embodiment of the present invention Hereinafter, a first embodiment of the present invention will be described with reference to the drawings.

[0030] (1) Nitride crystal substrate The nitride crystal substrate 10 according to this embodiment will be described with reference to Fig. 1. Fig. 1(a) is a schematic plan view showing the nitride crystal substrate 10, and Fig. 1(b) is a schematic side view showing the nitride crystal substrate 10.

[0031] 1(a) and (b), the nitride crystal substrate 10 of this embodiment (hereinafter also referred to as substrate 10) is configured as a disk-shaped substrate used when manufacturing the semiconductor laminate 1 described below or a semiconductor device. The substrate 10 is made of a single crystal of a Group III nitride semiconductor, and in this embodiment, it is made of, for example, a single crystal of gallium nitride (GaN).

[0032] The plane orientation of the primary surface (upper surface) of substrate 10 is, for example, the (0001) plane (+c plane, Ga polarity plane). The GaN crystal constituting substrate 10 may have a predetermined off angle with respect to the primary surface of substrate 10. The off angle refers to the angle between the normal direction of the primary surface of substrate 10 and the main axis (c axis) of the GaN crystal constituting substrate 10. Specifically, the off angle of substrate 10 is, for example, not less than 0° and not more than 1.2°.

[0033] The main surface of the substrate 10 is an epi-ready surface, and the root mean square roughness (RMS) of the main surface of the substrate 10 is, for example, 10 nm or less, and preferably 1 nm or less. Note that "RMS" here refers to the RMS measured over a 20 μm square area with an atomic force microscope (AFM).

[0034] Furthermore, the diameter D of the substrate 10 is not particularly limited, but is, for example, 25 mm or more. If the diameter D of the substrate 10 is less than 25 mm, the productivity of the semiconductor device is likely to decrease. For this reason, it is preferable that the diameter D of the substrate 10 is 25 mm or more. Furthermore, the thickness T of the substrate 10 is, for example, 150 μm or more and 2 mm or less. If the thickness T of the substrate 10 is less than 150 μm, the mechanical strength of the substrate 10 may decrease, making it difficult to maintain a self-supporting state. For this reason, it is preferable that the thickness T of the substrate 10 is 150 μm or more. Here, for example, the diameter D of the substrate 10 is 2 inches (50.8 mm) and the thickness T of the substrate 10 is 400 μm.

[0035] [Impurity concentration] In this embodiment, as described later, a vessel having a high-temperature reaction region with a protective layer made of an iron cyano complex is used as a reaction vessel, and a high-temperature bake step is performed to manufacture substrate 10, so that the concentration of each impurity in the GaN crystal constituting substrate 10 is below the measurement limit (lower detection limit) of SIMS.

[0036] Specifically, the carbon concentration in the crystal measured by SIMS using the raster change method, which is known for its high sensitivity, is, for example, 1×10 15 cm -3 is less than.

[0037] The "raster variation method" is a technique in which the area of ​​the raster scan is changed during SIMS depth profile analysis to distinguish between the elements contained in the sample and the background level from the SIMS device, thereby accurately determining the net concentration of elements contained in the sample.

[0038] The O concentration in the crystal measured by SIMS using the raster change method was, for example, 1 × 10 15 cm -3 is less than.

[0039] The B concentration in the crystal measured by SIMS depth profile analysis was, for example, 1×10 15 cm -3 is less than.

[0040] In this embodiment, since the crystal is not doped with Si as an n-type impurity, the Si concentration in the crystal measured by SIMS depth profile analysis is, for example, 1×10 15 cm -3 is less than.

[0041] In addition, in this embodiment, the Fe concentration in the crystal is less than the lower limit of the SIMS depth profile analysis, as in the above-mentioned Reference 4. However, in the crystal of this embodiment, the Fe concentration estimated from the concentration of the electron trap E3 is lower than that in the above-mentioned Reference 4. This point will be described in detail later.

[0042] In addition, the crystal of this embodiment is grown by the HVPE method as described below, and is not grown by a flux method using an alkali metal such as sodium (Na) or lithium (Li) as a flux, and therefore the crystal of this embodiment does not substantially contain alkali metal elements such as Na or Li.

[0043] Furthermore, none of the following elements are detected in the crystal of this embodiment: arsenic (As), chlorine (Cl), phosphorus (P), fluorine (F), Na, Li, potassium (K), tin (Sn), titanium (Ti), manganese (Mn), chromium (Cr), molybdenum (Mo), tungsten (W), or nickel (Ni).

[0044] In other words, the concentrations of these impurities in the crystal are below the lower limit of SIMS. The current detection limits of each element in SIMS are as follows:

[0045] As:5×10 12 cm -3 , Cl: 1×10 14 cm -3 , P:2×10 15 cm -3 , F:4×10 13 cm -3, Na: 5×10 11 cm -3 , Li:5×10 11 cm -3 , K:2×10 12 cm -3 , Sn: 1×10 13 cm -3 , Ti: 1×10 12 cm -3 , Mn: 5×10 12 cm -3 , Cr:7×10 13 cm -3 , Mo: 1×10 15 cm -3 , W:3×10 16 cm -3 , Ni: 1×10 14 cm -3

[0046] [Electron trap concentration] In this embodiment, as described later, a vessel having a high-temperature reaction region with a protective layer made of an iron cyano complex is used as a reaction vessel, and a high-temperature bake step is performed to manufacture the substrate 10, thereby reducing the electron trap concentration in the crystal.

[0047] Here, the ICTS method as one method for measuring electron traps will be described with reference to Fig. 2. Fig. 2 is a diagram showing a measurement example of isothermal capacitance transient spectroscopy.

[0048] In the measurement by the ICTS method, first, an ohmic electrode is provided on the back side of the sample, and a Schottky electrode is provided on the front side of the sample. Specifically, the ohmic electrode on the back side of the substrate 10 made of GaN crystal is, for example, titanium (Ti) / aluminum (Al), and the Schottky electrode on the front side is, for example, nickel (Ni) / gold (Au).

[0049] After the sample preparation is completed, a reverse bias (bias voltage V b ) is applied.

[0050] 2b, a forward pulse (filling pulse) is superimposed on the Schottky junction, at which time electrons are captured by electron traps in the GaN crystal that constitutes the substrate 10.

[0051] Next, the Schottky junction is again placed in a reverse bias state, as shown in Fig. 2c. The time t at which the reverse bias is restored is set to 0, and the change in the junction capacitance C(t) from t = 0 is measured using a high-speed transient capacitance meter.

[0052] When the bias is returned to reverse (t=0), the electrons trapped in the trap level above the Fermi level are released into the conduction band. As electrons are released after t=0, the depletion layer width gradually decreases and the junction capacitance C(t) increases.

[0053] The ICTS spectrum S(t) for the time change of the junction capacitance C(t) as described above is defined by the following equation (i).

[0054]

number

[0055] The ICTS spectrum S(t) is a function of the thermal emission time constant (τ e ) corresponding to time t=τ e It has a peak at

[0056] Here, if the crystal contains multiple electron trap levels and the thermal emission time constant of the i-th level is τ e i Then, S(t) is expressed by the following equation (ii).

[0057]

number

[0058] where q is the elementary charge of an electron and ε r is the relative permittivity of the crystal, ε0 is the permittivity of a vacuum, and V d is the built-in potential, and V b is the bias voltage, A is the junction cross-sectional area, and N T i is the concentration (density) of the i-th trap level.

[0059] Each τ e i If is sufficiently discrete, S(t) is e i Therefore, based on the position of each peak in the ICTS spectrum S(t), the thermal emission time constant τ e i The calculated t=τ e i By substituting into equation (ii), the concentration of electron traps N T i is required.

[0060] In addition, the thermal emission time constant τ e i From the above, the activation energy ΔE of the level is calculated based on the following formula (iii): i can be sought.

[0061]

number

[0062] However, N c is the effective density of states in the conduction band, σ n i is the capture cross section of the i-th electron trap, ν th is the thermal velocity of the electron, g is the degeneracy of the trap, k is the Boltzmann constant, and T is the absolute temperature.

[0063] Here, the electron traps in the GaN crystal of this embodiment will be described with reference to Fig. 3. Fig. 3 shows the results of measuring the electron trap concentration in the GaN crystal of this embodiment (Si-microdoped sample A4' described below) and the GaN crystal of Reference 4 (Si-microdoped sample B7' described below) by isothermal capacitance transient spectroscopy.

[0064] As shown in Figure 3, the ICTS spectrum S(t) of a GaN crystal measured by ICTS has multiple peaks corresponding to different energy levels. Of these, the electron traps that exist in the energy range of 0.5 eV to 0.65 eV from the conduction band bottom are called "E3", the electron traps that exist in the energy range of 0.15 eV to 0.3 eV from the conduction band bottom are called "E1", and the electron traps that exist in the energy range of 0.68 eV to 0.75 eV from the conduction band bottom are called "Ex".

[0065] The measurement temperature by the ICTS method is set, for example, within a range of 80 K to 350 K based on the energy position of each electron trap. In Fig. 3, the measurement temperature when measuring electron traps E3 and Ex is set to room temperature (300 K). On the other hand, the temperature when measuring electron trap E1 at an energy position close to the conduction band is set, for example, to 100 K to 150 K.

[0066] In the GaN crystal described in Reference 4, the concentration of electron traps E3 is 1×10 14 cm -3 or more (e.g., approximately 3×10 14 cm -3 As mentioned above, since the origin of E3 is considered to be Fe, the Fe concentration in the GaN crystal described in Reference 4 is about 1×10 14 cm -3 This is equivalent to the above.

[0067] In addition, in the GaN crystal described in Reference 4, the concentration of electron traps E1 is 3×10 12 cm -3 It was super.

[0068] In addition, in the GaN crystal described in Reference 4, the concentration of electron traps Ex is 3×10 13 cm -3 It was super.

[0069] In contrast, in the GaN crystal of this embodiment, the concentration of the electron traps E3 is, for example, 1×10 14 cm -3 When the Fe concentration in the GaN crystal is indirectly estimated in the same manner as described above, the Fe concentration in the GaN crystal of this embodiment is less than 1×10 14 cm -3 This is equivalent to being less than.

[0070] In the GaN crystal of this embodiment, the concentration of the electron trap E1 is, for example, 3×10 12 cm -3 The following is the result.

[0071] In the GaN crystal of this embodiment, the concentration of the electron traps Ex is, for example, 3×10 13 cm -3 The following is the result.

[0072] Furthermore, in the GaN crystal of this embodiment, no electron traps other than E1, E3, and Ex existed within the temperature range in which the ICTS measurement was performed, i.e., the temperature range of 80 K to 350 K, inclusive. Therefore, the total concentration of electron traps existing in the energy range of 0.1 eV to 1.0 eV from the conduction band bottom was 1×10 14 cm -3 It can be said that it is less than that.

[0073] [Relationship between C concentration and E3 concentration] In this embodiment, as described later, a vessel having a high-temperature reaction region with a protective layer made of an iron cyano complex is used as a reaction vessel, and a high-temperature bake step is performed to manufacture the substrate 10, thereby reducing both the C concentration and the E3 concentration in the crystal, which are in a trade-off relationship as described above. As a result, the GaN crystal of this embodiment also satisfies the following requirements.

[0074] That is, the GaN crystal of this embodiment satisfies, for example, the following formulas (1-1) and (1-2). [E3]<1×10 14 (1-1) [E3] [C] 2 ≦1×10 43 (1-2) however, [C] is in cm -3 is the concentration of carbon in the crystal. [E3] is the concentration of electron traps E3 in the crystal, and the unit of the concentration of E3 is cm -3 It is.

[0075] Furthermore, the GaN crystal of this embodiment preferably satisfies, for example, the following formula (2). [E3] [C] 2 ≦1×10 42 (2)

[0076] [Insulation] In this embodiment, as described above, the concentration of conductive impurities (n-type impurities) in the crystal is extremely low, so that the substrate 10 is configured as a semi-insulating substrate even if the concentrations of C and Fe, which form deep levels in the crystal, are low.

[0077] Specifically, the resistivity of the GaN crystal constituting the substrate 10 of this embodiment is, for example, 1×10 6 Ωcm or more, and at temperatures between 300°C and 400°C, it is 1×10 5 Ωcm or more.

[0078] The upper limit of the resistivity of the GaN crystal is not particularly limited, but is, for example, 1×10 10 It is about Ωcm.

[0079] (2) GaN substrate manufacturing method The method for manufacturing the substrate 10 in this embodiment will now be described in detail.

[0080] First, the configuration of the HVPE apparatus 200 used for growing GaN crystals will be described in detail with reference to FIG. 4. The HVPE apparatus 200 includes a reaction vessel 203 configured, for example, in a cylindrical shape. The reaction vessel 203 has a sealed structure so that the atmosphere outside the reaction vessel 203 and the gas in a glove box 220 described later do not enter the inside. A reaction chamber 201 in which crystal growth takes place is formed inside the reaction vessel 203. A susceptor 208 that holds a seed crystal substrate 20 made of a GaN single crystal is provided inside the reaction chamber 201. The susceptor 208 is connected to a rotating shaft 215 of a rotating mechanism 216 and is configured to be freely rotatable. The susceptor 208 also includes an internal heater 210 as a heating unit. The temperature of the internal heater 210 is configured to be controllable separately from a zone heater 207 described later. Furthermore, the upstream side and periphery of the susceptor 208 are covered by a heat insulating wall 211. By providing the heat insulating wall 211, gases other than those supplied from the nozzles 249a to 249c described below are not supplied to the seed crystal substrate 20.

[0081] The reaction vessel 203 is connected to the glove box 220 via a cylindrically formed metal flange 219 made of SUS or the like. The glove box 220 is also airtight so that air does not get into the glove box 220. The exchange chamber 202 provided inside the glove box 220 is continuously purged with high purity nitrogen (hereinafter also simply referred to as N2 gas) and the oxygen and moisture concentrations are maintained at low values. The glove box 220 includes a transparent acrylic wall, a plurality of rubber gloves connected to holes penetrating the wall, and a pass box for taking things in and out of the glove box 220. The pass box includes a vacuum mechanism and an N2 purge mechanism, and is configured to replace the air inside the pass box with N2 gas, thereby making it possible to take things in and out of the glove box 220 without drawing air containing oxygen into the glove box 220. When the crystal substrate is put in and taken out of the reaction vessel 203, the opening of the metal flange 219, i.e., the furnace port 221, is opened as shown in Fig. 5. This makes it possible to prevent the surfaces of the components in the reaction vessel 203 that have been cleaned and modified by the high-temperature bake step described below from being contaminated again, and to prevent the air and the gases containing the above-mentioned various impurities from adhering to the surfaces of these components. The impurities referred to here include at least one of O2, moisture (H2O), etc. derived from the air, organic matter containing C, O, and hydrogen (H) derived from the human body, Na, K, etc., As, Cl, P, F, etc. derived from gases used in the crystal growth process and device manufacturing process, etc., and Fe, Sn, Ti, Mn, Cr, Mo, W, Ni, etc. derived from metal components in the furnace.

[0082] A gas supply pipe 232a for supplying HCl gas into a gas generator 233a (described later), a gas supply pipe 232b for supplying ammonia (NH3) gas into the reaction chamber 201, a gas supply pipe 232c for supplying HCl gas for high-temperature baking and normal baking into the reaction chamber 201, and a gas supply pipe 232d for supplying nitrogen (N2) gas into the reaction chamber 201 are connected to one end of the reaction vessel 203. The gas supply pipes 232a to 232c are configured to be able to supply hydrogen (H2) gas and N2 gas as carrier gas in addition to HCl gas and NH3 gas. The gas supply pipes 232a to 232c are each provided with a flow rate controller and a valve (neither of which is shown) for each type of gas, and are configured to be able to control the flow rate and start / stop the supply of each type of gas individually. The gas supply pipe 232d is also provided with a flow rate controller and a valve (neither of which is shown). The N2 gas supplied from the gas supply pipe 232d is used to purge the upstream side of the heat insulating wall 211 and the surroundings in the reaction chamber 201, thereby maintaining the cleanliness of the atmosphere in these parts.

[0083] The HCl gas supplied from the gas supply pipe 232c and the H2 gas supplied from the gas supply pipes 232a-232c act as a cleaning gas for cleaning the surfaces of the members in the reaction chamber 201 (particularly the inside of the heat shielding wall 211) and as a modifying gas for modifying these surfaces to have a low probability of releasing impurities in a high-temperature bake step and a normal bake step described later. The N2 gas supplied from the gas supply pipes 232a-232c acts to appropriately adjust the blowing flow rate of the HCl gas and the H2 gas blown from the tips of the nozzles 249a-249c so that the desired places in the reaction chamber 201 (particularly the inside of the heat shielding wall 211) are properly cleaned in each bake step.

[0084] The HCl gas introduced from the gas supply pipe 232a acts as a reaction gas that generates GaCl gas, a halide of Ga, that is, Ga raw material gas, by reacting with the Ga raw material in the crystal growth step described later. The Ga raw material gas is also called "III element raw material gas". The NH3 gas supplied from the gas supply pipe 232b acts as a nitriding agent that grows GaN, a nitride of Ga, on the seed crystal substrate 20 by reacting with GaCl gas, that is, N raw material gas, in the crystal growth step described later. Hereinafter, GaCl gas and NH3 gas may be collectively referred to as raw material gas. The H2 gas and N2 gas supplied from the gas supply pipes 232a to 232c act to appropriately adjust the blowing flow rate of the raw material gas blown out from the tip of the nozzles 249a to 249c in the crystal growth step described later, and to direct the raw material gas toward the seed crystal substrate 20.

[0085] As described above, the gas generator 233a is provided downstream of the gas supply pipe 232a, which contains the Ga melt as the Ga raw material. The gas generator 233a is provided with a nozzle 249a that supplies GaCl gas generated by the reaction between HCl gas and the Ga melt toward the main surface of the seed crystal substrate 20 held on the susceptor 208. The gas supply pipes 232b and 232c are provided downstream with nozzles 249b and 249c that supply various gases supplied from these gas supply pipes toward the main surface of the seed crystal substrate 20 held on the susceptor 208. The nozzles 249a to 249c are each configured to penetrate the upstream side of the heat insulating wall 211.

[0086] In addition, the gas supply pipe 232c is configured to be able to supply, in addition to HCl gas, H2 gas, and N2 gas, dopant gases such as Fe-containing gases, such as ferrocene (Fe(C5H5)2, abbreviated as Cp2Fe) gas and iron trichloride (FeCl3), Si-containing gases, such as silane (SiH4) gas and dichlorosilane (SiH2Cl2), and Mg-containing gases, such as bis(cyclopentadienyl)magnesium (Mg(C5H5)2, abbreviated as Cp2Mg) gas.

[0087] The gas supply system is configured by the above-mentioned gas supply pipes 232a to 232d, the flow rate controllers, the valves, and the nozzles 249a to 249c.

[0088] An exhaust pipe 230 for exhausting the inside of the reaction chamber 201 is provided on a metal flange 219 provided on the other end of the reaction vessel 203. An APC valve 244 as a pressure regulator and a pump 231 are provided in this order from the upstream side on the exhaust pipe 230. Note that instead of the APC valve 244 and the pump 231, a blower including a pressure regulation mechanism can also be used.

[0089] A zone heater 207 that heats the inside of the reaction chamber 201 to a desired temperature is provided as a heating unit on the outer periphery of the reaction vessel 203. The zone heater 207 is composed of at least two heaters, one including the upstream gas generator 233a and the other including the downstream susceptor 208, and each heater has a temperature sensor and a temperature regulator (neither shown) so that the temperature can be individually adjusted in the range from room temperature to 1200°C.

[0090] As described above, the susceptor 208 that holds the seed crystal substrate 20 includes an internal heater 210, a temperature sensor 209, and a temperature regulator (not shown) in addition to the zone heater 207 so that the temperature can be adjusted at least in the range of room temperature to 1600°C. The upstream side and periphery of the susceptor 208 are surrounded by the heat insulating wall 211 as described above. At least the surface (inner peripheral surface) of the heat insulating wall 211 facing the susceptor 208 needs to be made of a limited material that does not generate impurities, as described later, but there is no limitation on the material to be used for the other surfaces (outer peripheral surfaces) as long as the material can withstand temperatures of 1600°C or higher. At least the portion of the heat insulating wall 211 excluding the inner peripheral surface can be made of a nonmetallic material with high heat resistance, such as carbon, silicon carbide (SiC), or tantalum carbide (TaC), or a metallic material with high heat resistance, such as Mo or W, and can have a structure in which plate-shaped reflectors are stacked. By using such a configuration, even when the temperature of the susceptor 208 is set to 1600° C., the temperature outside the heat shield wall 211 can be suppressed to 1200° C. or less. Since this temperature is below the softening point of quartz, in this configuration, quartz can be used for each of the members constituting the reaction vessel 203, the gas generator 233a, and the upstream portions of the gas supply pipes 232a to 232d.

[0091] The reaction chamber 201 includes a region (high-temperature reaction region) 201a which is heated to 900°C or higher when performing the crystal growth step described below and which may come into contact with the gas supplied to the seed crystal substrate 20.

[0092] In this embodiment, at least a part of the surface of the member constituting the high temperature reaction region 201a has a protective layer (not shown) made of, for example, an iron cyano complex (chemical formula: Fe4[Fe(CN)6]3).

[0093] Iron cyano complexes are also known as Prussian blue or Prussian blue, and are used as a raw material for blue paints. However, in iron cyano complexes, the Fe atom and the cyanide ion are bonded very strongly, making the iron cyano complex extremely difficult to decompose. Although cyanide is generally feared to be toxic, the bond between Fe and the cyanide ion in the iron cyano complex is very stable, so the iron cyano complex itself is not toxic. In this way, the Fe atom is strongly bonded to the cyanide ion, which suppresses the isolation of Fe from the iron cyano complex and the incorporation of Fe into GaN crystals caused by the iron cyano complex itself.

[0094] As described above, based on the stable characteristics of the iron cyano complex, the surface of the member constituting the high-temperature reaction region 201a is covered with a protective layer made of the iron cyano complex, and the protective layer made of the iron cyano complex can be stably maintained even under the conditions of the GaN crystal growth temperature and the temperature in the high-temperature bake step, and in the atmosphere of the source gas. That is, the occurrence of cracks in the protective layer can be suppressed, and the protective layer can be suppressed from becoming porous.

[0095] However, if the members made of carbon or the like that constitute the high-temperature reaction region 201a are directly covered with a protective layer made of an iron-cyano complex, there is a risk that the protective layer will crack due to physical impact.

[0096] Therefore, in this embodiment, it is preferable to provide an underlayer (buffer layer, adhesion-strengthening layer) between the main body of the member constituting the high-temperature reaction region 201a and the protective layer. Examples of materials for the underlayer include SiC. By interposing such an underlayer between the main body and the protective layer, the protective layer can be firmly adhered to the main body of the member constituting the high-temperature reaction region 201a via the underlayer. As a result, the strength of the protective layer can be ensured.

[0097] Examples of portions of the components constituting the high-temperature reaction region 201a on which the above-mentioned protective layer is provided include the inner wall of the heat shielding wall 211 upstream of the susceptor 208, the portions of the nozzles 249a-249c penetrating into the inside of the heat shielding wall 211, and the portions of the outside of the heat shielding wall 211 which are heated to 900°C or higher in the crystal growth step, the surface of the susceptor 208, etc.

[0098] The thickness of the protective layer is not limited, but is, for example, 30 μm or more and 300 μm or less. By making the thickness of the protective layer 30 μm or more, the resistance of the protective layer can be ensured. By making the thickness of the protective layer 300 μm or less, cracking of the protective layer caused by the difference in thermal expansion coefficient between the base material and the protective layer during temperature rise and fall can be suppressed. In addition, the thickness of the underlayer is not limited, but is, for example, 30 μm or more and 200 μm or less. By making the thickness of the underlayer 30 μm or more, the adhesion of the underlayer can be ensured. By making the thickness of the underlayer 200 μm or less, cracking of the underlayer caused by the difference in thermal expansion coefficient between the base material and the underlayer during temperature rise and fall can be suppressed.

[0099] Each component of the HVPE apparatus 200 described above, such as various valves and flow rate controllers provided in the gas supply pipes 232a to 232d, the pump 231, the APC valve 244, the zone heater 207, the internal heater 210, the temperature sensor 209, etc., are each connected to a controller 280 configured as a computer.

[0100] Next, an example of a process for epitaxially growing a GaN single crystal on a seed crystal substrate 20 using the above-mentioned HVPE apparatus 200 will be described in detail with reference to Fig. 4. In the following description, the operation of each part constituting the HVPE apparatus 200 is controlled by a controller 280.

[0101] (High temperature bake step) This step is performed when the reaction chamber 201 and the exchange chamber 202 are exposed to the atmosphere due to maintenance of the HVPE apparatus 200, introduction of Ga raw material into the gas generator 233a, etc. Before performing this step, it is confirmed that the reaction chamber 201 and the exchange chamber 202 are airtight. After airtightness is confirmed, the reaction chamber 201 and the exchange chamber 202 are replaced with N2 gas, and then the surfaces of the various members constituting the reaction chamber 201 are heat-treated with the reaction vessel 203 in a predetermined atmosphere. This treatment is performed in a state where the seed crystal substrate 20 has not been carried into the reaction vessel 203 and in a state where the Ga raw material has been introduced into the gas generator 233a.

[0102] In this step, the temperature of the zone heater 207 is adjusted to a temperature similar to that in the crystal growth step. Specifically, the temperature of the upstream heater including the gas generator 233a is set to a temperature of 700 to 900°C, and the temperature of the downstream heater including the susceptor 208 is set to a temperature of 1000 to 1200°C. Furthermore, the temperature of the internal heater 210 is set to a predetermined temperature of 1500°C or higher. As will be described later, in the crystal growth process, the internal heater 210 is off or set to a temperature of 1200°C or lower, so that the temperature of the high temperature reaction region 201a is 900°C or higher but lower than 1200°C. On the other hand, in the high-temperature bake step, the temperature of the internal heater 210 is set to 1500°C or higher, so that the temperature of the high-temperature reaction region 201a becomes 1000 to 1500°C or higher, and the vicinity of the susceptor 208 on which the seed crystal substrate 20 is placed becomes 1500°C or higher, and the temperature of each of the other positions also becomes at least 100°C higher than that during the crystal growth step. In the high-temperature reaction region 201a, the portion with the lowest temperature of 900°C during the crystal growth step, specifically, the portion upstream of the nozzles 249a to 249c inside the thermal barrier 211, is the portion where the adhering impurity gas is least likely to be removed. By setting the temperature of the internal heater 210 to 1500°C or higher so that the temperature of this portion becomes at least 1000°C or higher, the effect of the cleaning and modification process described later, that is, the effect of reducing impurities in the GaN crystal to be grown, can be sufficiently obtained. If the temperature of the internal heater 210 is set to a temperature less than 1500°C, the temperature at any point in the high-temperature reaction region 201a cannot be sufficiently increased, and the effect of the cleaning and modification treatment described below, i.e., the effect of reducing impurities in the GaN crystal, cannot be easily obtained.

[0103] The upper limit of the temperature of the internal heater 210 in this step depends on the capacity of the heat insulating wall 211. As long as the temperature of the quartz parts and the like outside the heat insulating wall 211 can be controlled within a range not exceeding their heat resistance, the higher the temperature of the internal heater 210, the easier it is to obtain the effect of cleaning and modifying the inside of the reaction chamber 201. If the temperature of the quartz parts and the like outside the heat insulating wall 211 exceeds their heat resistance, the frequency and cost of maintenance of the HVPE apparatus 200 may increase.

[0104] In this step, after the temperatures of the zone heater 207 and the internal heater 210 reach the above-mentioned predetermined temperatures, H2 gas is supplied from each of the gas supply pipes 232a and 232b at a flow rate of, for example, about 3 slm. Also, HCl gas is supplied from the gas supply pipe 232c at a flow rate of, for example, about 2 slm, and H2 gas is supplied at a flow rate of, for example, about 1 slm. Also, N2 gas is supplied from the gas supply pipe 232d at a flow rate of, for example, about 10 slm. Then, by maintaining this state for a predetermined time, baking is performed inside the reaction chamber 201. By starting the supply of H2 gas and HCl gas at the above-mentioned timing, that is, after the temperature inside the reaction chamber 201 is raised, the amount of gas that flows uselessly without contributing to the cleaning and modification processes described later can be reduced, and the processing cost of crystal growth can be reduced.

[0105] In the high-temperature base step in this embodiment, it is preferable not to supply O2 gas. That is, it is preferable not to perform the "oxidation sequence" of supplying O2 gas described in Reference 4. If O2 gas is supplied, the iron cyano complex may be oxidized, which may weaken the protective layer. In contrast, by performing the high-temperature bake step without supplying O2 gas, that is, in a gas atmosphere that does not intentionally contain O2 gas, it is possible to suppress the oxidation of the iron cyano complex and the weakening of the protective film.

[0106] This step is performed with the pump 231 in operation, and the pressure in the reaction vessel 203 is maintained at, for example, 0.5 atm or more and 2 atm or less by adjusting the opening of the APC valve 244. By performing this step while the reaction vessel 203 is being evacuated, it becomes possible to efficiently remove impurities from the reaction vessel 203, that is, to efficiently clean the reaction vessel 203. If the pressure in the reaction vessel 203 is less than 0.5 atm, it becomes difficult to obtain the effects of the cleaning and modification treatment described below. If the pressure in the reaction vessel 203 exceeds 2 atm, the etching damage to the members in the reaction chamber 201 becomes excessive.

[0107] In this step, the partial pressure ratio of HCl gas to H2 gas in the reaction vessel 203 (HCl partial pressure / H2 partial pressure) is set to, for example, 1 / 50 to 1 / 2. If the partial pressure ratio is smaller than 1 / 50, it becomes difficult to obtain the cleaning and modification effects in the reaction vessel 203. If the partial pressure ratio is larger than 1 / 2, the etching damage to the members in the reaction chamber 201 becomes excessive.

[0108] The partial pressures can be controlled by adjusting the flow rates of the flow rate controllers provided in the gas supply pipes 232a to 232c.

[0109] By carrying out this step for, for example, 30 minutes or more and 300 minutes or less, the surfaces of various members constituting at least the high-temperature reaction region 201a in the reaction chamber 201 can be cleaned and foreign matter adhering to these surfaces can be removed. By keeping the surfaces of these members at a temperature 100° C. or more higher than the temperature in the crystal growth step described below, it is possible to promote the release of impurity gases from these surfaces and modify the surfaces to surfaces that are less likely to release impurities such as Si, B, Fe, O, and C (surfaces that are less likely to generate outgassing) under the temperature and pressure conditions in the crystal growth step. If the time for carrying out this step is less than 30 minutes, the effects of the cleaning and modification treatment described here may be insufficient. If the time for carrying out this step is more than 300 minutes, the damage to the members constituting the high-temperature reaction region 201a will be excessive.

[0110] When H2 gas and HCl gas are supplied into the reaction vessel 203, NH3 gas is not supplied into the reaction vessel 203. If NH3 gas is supplied into the reaction vessel 203 in this step, it becomes difficult to obtain the effects of the above-mentioned cleaning and reforming treatment, especially the effect of the reforming treatment.

[0111] Furthermore, when H2 gas and HCl gas are supplied into the reaction vessel 203, a halogen-based gas such as chlorine (Cl2) gas may be supplied instead of HCl gas. In this case, the effects of the above-mentioned cleaning and reforming processes can be obtained in the same manner.

[0112] In addition, when H2 gas and HCl gas are supplied into the reaction vessel 203, N2 gas may be added as a carrier gas from the gas supply pipes 232a to 232c. By adjusting the flow rate of the gas blown out from the nozzles 249a to 249c by adding N2 gas, it is possible to prevent the above-mentioned cleaning and modification processes from being incomplete. Note that a rare gas such as Ar gas or He gas may be supplied instead of N2 gas.

[0113] After the above-mentioned cleaning and modification processes are completed, the output of the zone heater 207 is reduced to lower the temperature inside the reaction vessel 203 to, for example, 200° C. or lower, that is, to a temperature at which the seed crystal substrate 20 can be loaded into the reaction vessel 203. The supply of H2 gas and HCl gas into the reaction vessel 203 is stopped, and the reaction vessel 203 is purged with N2 gas. After the purging of the reaction vessel 203 is completed, the supply of N2 gas into the reaction vessel 203 is maintained, and the opening of the APC valve 244 is adjusted so that the pressure inside the reaction vessel 203 becomes atmospheric pressure or a pressure slightly higher than atmospheric pressure.

[0114] (normal bake step) The above-mentioned high-temperature bake step is performed when the inside of the reaction chamber 201 or the exchange chamber 202 is exposed to the atmosphere. However, when the crystal growth step is performed, the inside of the reaction chamber 201 or the exchange chamber 202 is not usually exposed to the atmosphere, including before and after the crystal growth step, so the high-temperature bake step is not necessary. However, by performing the crystal growth step, GaN polycrystals are attached to the surfaces of the nozzles 249a to 249c, the surface of the susceptor 208, the inner wall of the heat shield wall 211, and the like. If the next crystal growth step is performed with the GaN polycrystals remaining, GaN polycrystal powder, Ga droplets, and the like that are separated from the polycrystals and scattered will adhere to the seed crystal substrate 20, causing an obstruction to good crystal growth. For this reason, after the crystal growth step, a normal bake step is performed in order to remove the above-mentioned GaN polycrystals. The procedure and conditions of the normal bake step can be the same as those of the high-temperature bake step, except that the internal heater 210 is turned off and the temperature around the susceptor 208 is set to 1000 to 1200° C. By performing the normal bake step, the GaN polycrystal can be removed from inside the reaction chamber 201.

[0115] (Crystal growth step) After the high-temperature bake step or the normal bake step is performed, when the temperature drop and purging in the reaction vessel 203 are completed, the furnace port 221 of the reaction vessel 203 is opened and the seed crystal substrate 20 is placed on the susceptor 208 as shown in FIG. 5. The furnace port 221 is isolated from the atmosphere and is connected to the glove box 220 which is continuously purged with N2 gas. As described above, the glove box 220 includes a transparent acrylic wall, a plurality of rubber gloves connected to holes penetrating the wall, and a pass box for taking things in and out of the glove box 220. By replacing the atmosphere inside the pass box with N2 gas, it is possible to take things in and out of the glove box 220 without drawing air into the glove box 220. By using such a mechanism to perform the work of placing the seed crystal substrate 20, it is possible to prevent recontamination of each member in the reaction vessel 203 which has been cleaned and modified by performing the high-temperature bake step, and reattachment of impurity gas to these members. The surface of the seed crystal substrate 20 placed on the susceptor 208, that is, the main surface (crystal growth surface, base surface) facing the nozzles 249a to 249c, is set to be, for example, the (0001) surface of a GaN crystal, that is, the +c surface (Ga polarity surface).

[0116] After the seed crystal substrate 20 has been carried into the reaction chamber 201, the furnace port 221 is closed, and while the reaction chamber 201 is heated and evacuated, the supply of H2 gas or H2 gas and N2 gas into the reaction chamber 201 is started. Then, when the reaction chamber 201 reaches the desired processing temperature and processing pressure and the atmosphere in the reaction chamber 201 becomes the desired atmosphere, the supply of HCl gas and NH3 gas from the gas supply pipes 232a and 232b is started, and GaCl gas and NH3 gas are respectively supplied to the surface of the seed crystal substrate 20. As a result, as shown in the cross-sectional view of FIG. 6(a), GaN crystals are epitaxially grown on the surface of the seed crystal substrate 20, and a GaN crystal film 21 is formed.

[0117] In this step, in order to prevent thermal decomposition of the GaN crystal constituting the seed crystal substrate 20, it is preferable to start supplying NH3 gas into the reaction chamber 201 when the temperature of the seed crystal substrate 20 reaches 500° C. or before that. In order to improve the in-plane thickness uniformity of the GaN crystal film 21, it is preferable to perform this step while rotating the susceptor 208.

[0118] In this step, the temperature of the zone heater 207 is preferably set to, for example, 700 to 900° C. in the upstream heater including the gas generator 233a, and set to, for example, 1000 to 1200° C. in the downstream heater including the susceptor 208. This adjusts the temperature of the susceptor 208 to a predetermined crystal growth temperature of 1000 to 1200° C. In this step, the internal heater 210 may be used in an off state, but as long as the temperature of the susceptor 208 is within the above-mentioned range of 1000 to 1200° C., temperature control using the internal heater 210 may be performed.

[0119] Other processing conditions for this step include the following: Processing pressure: 0.5 to 2 atmospheres GaCl gas partial pressure: 0.1 to 20 kPa Partial pressure of NH3 gas / partial pressure of GaCl gas: 1 to 100 Partial pressure of H2 gas / partial pressure of GaCl gas: 0 to 100

[0120] When GaCl gas and NH3 gas are supplied to the surface of the seed crystal substrate 20, N2 gas may be added as a carrier gas from each of the gas supply pipes 232a to 232c. By adding N2 gas and adjusting the blowing flow rate of the gas supplied from the nozzles 249a to 249c, it is possible to appropriately control the distribution of the supply amount of the source gas on the surface of the seed crystal substrate 20, and to realize a uniform growth rate distribution over the entire surface. Note that a rare gas such as Ar gas or He gas may be supplied instead of N2 gas.

[0121] (Exit step) After the GaN crystal film 21 of a desired thickness is grown on the seed crystal substrate 20, while NH3 gas and N2 gas are supplied into the reaction chamber 201 and the reaction chamber 201 is evacuated, the supply of HCl gas and H2 gas into the reaction chamber 201 and the heating by the zone heater 207 are stopped. When the temperature in the reaction chamber 201 drops to 500°C or less, the supply of NH3 gas is stopped and the atmosphere in the reaction chamber 201 is replaced with N2 gas to return to atmospheric pressure. The temperature in the reaction chamber 201 is then lowered to, for example, 200°C or less, that is, to a temperature at which the GaN crystal ingot (the seed crystal substrate 20 having the GaN crystal film 21 formed on its surface) can be carried out from the reaction vessel 203. The crystal ingot is then carried out from the reaction chamber 201 via the glove box 220 and the pass box.

[0122] (Slice Step) The carried-out crystal ingot is then sliced, for example, parallel to the growth plane, to obtain one or more substrates 10, as shown in FIG. 6(b). This slicing process can be performed, for example, using a wire saw or an electric discharge machine. The front surface (+c surface) of the substrate 10 is then polished as desired to make this surface an epi-ready mirror surface. The back surface (-c surface) of the substrate 10 is made into a lapped surface or mirror surface.

[0123] The above-mentioned high-temperature bake step, normal bake step, crystal growth step, and carry-out step are preferably performed in the following order: When n is an integer of 1 or more, for example, the reaction chamber 201 and the exchange chamber 202 are exposed to the atmosphere → high-temperature bake step → crystal growth step → carry-out step → (normal bake step → crystal growth step → carry-out step) × n.

[0124] (3) Effects Obtained by the Present Embodiment According to this embodiment, one or more of the following advantages can be obtained.

[0125] (a) In this embodiment, at least a part of the surface of the member constituting the high-temperature reaction region 201a is covered with a protective layer made of an iron cyano complex (chemical formula: Fe4[Fe(CN)6]3), thereby suppressing the leakage of Fe from the member constituting the high-temperature reaction region 201a to the growth atmosphere, and dramatically reducing the incorporation of Fe into the GaN crystal. Furthermore, by combining this with a manufacturing method having a high-temperature bake step developed by the present inventors, it is possible to obtain a GaN crystal with extremely low both the C concentration and the electron trap E3 concentration, which corresponds to the Fe concentration.

[0126] Specifically, the carbon concentration in the crystal measured by SIMS using the raster change method was 1×10 15 cm -3 and the concentration of electron traps E3 in the GaN crystal is less than 1×10 14 cm -3 Less than 2×10 13 cm -3 It can be less than.

[0127] In addition, the GaN crystal of this embodiment satisfies the above formula (1-1) "[E3] < 1 × 10 14 " while satisfying the formula (1-2) "[E3]·[C] 2 ≦1×10 43 ", and preferably satisfies the above formula (2) "[E3]·[C] 2 ≦1×10 42 " Satisfy.

[0128] In this way, by producing GaN crystals using the above-mentioned production method, it is possible to dramatically reduce both the C concentration and the electron trap E3 concentration, which have been reported to be in a trade-off relationship.

[0129] As a result, the GaN crystal of this embodiment has extremely good crystal quality, such as significantly smaller impurity concentrations and trap concentrations, compared to conventional GaN crystals that had high C concentrations and / or high E3 concentrations.

[0130] Furthermore, when a semiconductor device is fabricated using substrate 10 obtained by slicing the GaN crystal of this embodiment, it is possible to suppress device degradation due to impurity diffusion and instability in device operation due to charging and discharging of impurity-induced traps, compared to the case of using a substrate made of a conventional GaN crystal having a high C concentration or E3 concentration.

[0131] (b) In this embodiment, a vessel having a protective layer made of an iron cyano complex on at least a part of the surface of the member constituting the high-temperature reaction region 201a is used as the reaction vessel 203. Based on the stable properties of the iron cyano complex, the protective layer made of the iron cyano complex can be stably maintained even under the conditions of the growth temperature of the GaN crystal and the temperature in the high-temperature bake step, and in the atmosphere of the source gas. That is, the occurrence of cracks in the protective layer can be suppressed, and the protective layer can be suppressed from becoming porous. This can suppress the leakage of impurities such as Fe from the member made of carbon or the like constituting the high-temperature reaction region 201a into the growth atmosphere.

[0132] Furthermore, in the high-temperature bake step, the temperature of the high-temperature reaction region 201a is heated to a temperature of 1500° C. or higher, while NH3 gas is not supplied to the reaction vessel 203, and H2 gas and halogen-based gas are supplied to the reaction vessel 203, thereby cleaning and modifying the surfaces of the members constituting the high-temperature reaction region 201a. That is, the release of impurity gases from the surfaces of the members constituting the high-temperature reaction region 201a is promoted, and the surfaces can be modified to surfaces that are less likely to release impurities such as C (surfaces that are less likely to generate outgassing) under the temperature and pressure conditions in the crystal growth step.

[0133] As a result, in the GaN crystal of this embodiment, it is possible to dramatically reduce both the C concentration and the concentration of the electron traps E3, which corresponds to the Fe concentration.

[0134] (c) In this embodiment, the GaN crystal is manufactured by the above-mentioned manufacturing method, and the impurity concentration is dramatically reduced, thereby improving the crystal quality of the GaN crystal. This not only reduces the concentration of the electron trap E3 in the GaN crystal, but also reduces the concentrations of other electron traps.

[0135] Specifically, the concentration of electron trap E1 is set to 3×10 12 cm -3 and the concentration of the electron trap Ex is 3×10 13 cm -3 The origin of the E1 and Ex traps is not clear at present. However, since the concentrations of E1 and Ex are reduced by using the protective layer of this embodiment, both E1 and Ex are considered to be traps related to impurities originating from the base material of the member constituting the high-temperature reaction region 201a, like the E3 trap.

[0136] In this way, by reducing the concentration of various electron traps that can occur in GaN crystals, it is possible to prevent instability in device operation due to the charging and discharging of electron traps.

[0137] (d) In this embodiment, by producing GaN crystals using the above-mentioned production method, the concentration of impurities other than C in the GaN crystals can be dramatically reduced. Specifically, the O concentration in the crystals measured by SIMS using the raster variation method can be reduced to 1×10 15 cm -3 The B concentration in the crystal measured by SIMS depth profile analysis can be less than 1×10 15 cm -3 It can be less than.

[0138] (e) The GaN crystal obtained in this embodiment has high purity as described above, and therefore has a resistivity of 1×10 6It has a high insulating property of Ωcm or more. When GaN crystal contains a large amount of donor impurities such as Si and O, a method of adding donor compensating impurities (hereinafter referred to as compensating impurities) such as Mn, Fe, cobalt (Co), Ni, copper (Cu) to the crystal to improve the insulating property of the crystal is known, as disclosed in JP-A-2007-534580. However, this method has a problem in that the quality of the GaN crystal is easily deteriorated by adding compensating impurities. For example, when compensating impurities are added to a GaN crystal, cracks are likely to occur in the substrate obtained by slicing the crystal. Furthermore, the diffusion of compensating impurities into the stacked structure formed on the substrate tends to deteriorate the characteristics of the semiconductor device fabricated using the substrate. In contrast, the GaN crystal of this embodiment can obtain high insulation without adding compensating impurities, making it possible to avoid the problem of crystallinity degradation that is likely to be a problem in conventional methods.

[0139] (d) The insulating properties of the GaN crystal obtained in this embodiment are less temperature-dependent and more stable than the insulating properties obtained by adding compensating impurities to the crystal. 17 cm -3 At first glance, it would appear possible to impart insulating properties similar to those of the GaN crystal of this embodiment by doping Fe at a concentration exceeding the above concentrations to the GaN crystal of this embodiment. However, since the level of Fe used as a compensating impurity is relatively shallow at about 0.6 eV, the insulating properties obtained by doping Fe tend to decrease with increasing temperature, etc., compared to the insulating properties of the GaN crystal of this embodiment. In contrast, according to the present embodiment, insulation can be achieved without adding compensating impurities, making it possible to avoid the problem of increased temperature dependency that is likely to be an issue in the conventional method.

[0140] (e) Since the GaN crystal obtained in this embodiment has a high purity as described above, when the crystal is converted into an n-type semiconductor by implanting Si ions or when the crystal is formed into a p-type semiconductor by implanting Mg ions, it is possible to suppress the amount of ion implantation to a small amount. That is, the GaN crystal of this embodiment is advantageous over conventional GaN crystals containing more impurities such as Fe in that it is possible to impart desired semiconductor characteristics while minimizing the deterioration of crystal quality caused by ion implantation. In addition, the GaN crystal of this embodiment is advantageous over conventional GaN crystals containing more impurities such as Fe in that it is possible to avoid a decrease in carrier mobility because the concentration of impurities that cause carrier scattering is extremely small.

[0141] Second embodiment of the present invention Next, a second embodiment of the present invention will be described, focusing on the differences from the first embodiment.

[0142] The GaN crystal in this embodiment is similar to that in the first embodiment in that both the C concentration and the electron trap E3 concentration are extremely low, but the Si concentration is 1×10 15 cm -3 The above points are different from those in the first embodiment. By containing Si at such a concentration, the GaN crystal in this embodiment has a resistivity of 1×10 2 It has a conductivity of Ωcm or less and functions as a so-called n-type semiconductor crystal. The Si concentration is, for example, 1×10 15 cm -3 5×10 or more 19 cm -3 In this case, the free electron concentration (n-type carrier concentration) under a temperature condition of 20° C. or higher and 300° C. or lower is, for example, 1×10 15 cm -3 5×10 or more 19 cm -3 The resistivity under the same temperature conditions is, for example, 1×10 -4 Ωcm or more and 100Ωcm or less.

[0143] In the GaN crystal of this embodiment, the Si concentration and the free electron concentration in the crystal were almost equal. This means that the actual concentrations of impurities (Fe and C that compensate for free electrons, or O that acts as a donor) that are the source of carriers other than Si are extremely small, and these impurities are less than the minimum value of the Si concentration in this embodiment, 1×10 15 cm -3 This indicates that it is present in the GaN crystal at a negligible level compared to the above.

[0144] The addition of Si to the GaN crystal can be performed by supplying a Si-containing gas such as SiH4 gas or SiH2Cl2 gas to the seed crystal substrate 20 simultaneously with the source gas (GaCl gas + NH3 gas) in the above-mentioned crystal growth step. The partial pressure ratio of the Si-containing gas to the Group III source gas in the reaction vessel 203 (partial pressure of the Si-containing gas / total partial pressure of GaCl gas) is, for example, 1 / 10. 8 ~1 / 10 3 The size of the GaN crystal can be set to 1.0×100 nm. Also, the addition of Si to the GaN crystal can be performed by implanting Si ions into the substrate 10 after obtaining the substrate 10 by the same method as in the first embodiment.

[0145] The GaN crystal obtained in this embodiment has a better quality than conventional GaN crystals containing more impurities, because the concentrations of B, Fe, O, and C in the crystal are extremely small, similar to the GaN crystal of the first embodiment. Moreover, according to this embodiment, the impurity concentrations such as Fe concentration estimated from the concentration of electron trap E3 in the GaN crystal are small as described above, so that it is possible to impart the desired conductivity (n-type semiconductor characteristics) to the GaN crystal even if the amount of Si added is kept small. That is, the GaN crystal of this embodiment is more advantageous than conventional GaN crystals containing more impurities such as Fe and C in that it can impart the desired semiconductor characteristics while minimizing the deterioration of crystal quality due to the addition of Si. Moreover, the GaN crystal of this embodiment is more advantageous than conventional GaN crystals containing more impurities, because the concentrations of impurities that cause carrier scattering are extremely small, so that it is possible to avoid a decrease in carrier mobility.

[0146] Furthermore, the GaN crystal obtained in this embodiment has an extremely small concentration of impurities that compensate for n-type conductivity, such as Fe and C, similar to the GaN crystal of the first embodiment, and therefore can have improved uniformity of carrier concentration compared to conventional GaN crystals that contain larger amounts of these impurities.

[0147] For example, when GaN crystals are grown on a GaN substrate with an off-angle distribution and a surface that is the +c plane, the amount of Fe, C, etc. mixed into the GaN crystal depends on the off-angle. For this reason, when a large amount of Fe or C is mixed into the GaN crystal, the resulting GaN crystal will have a large variation in free electron concentration of several tens of percent or more within the wafer surface. For example, at Shiojima 2019, which will be described later, it was reported that when the off-angle distribution on a 2-inch substrate is about 0.3°, the effective carrier concentration within the surface is 5×10 15 cm -3 ~8×10 15 cm -3 The variance of the carrier concentration measured over the entire surface is equivalent to a variation of 15% or more of the average value.

[0148] In contrast, the GaN crystal of this embodiment has an extremely low concentration of impurities that compensate for n-type conductivity, such as Fe and C, in the crystal, similar to the GaN crystal of the first embodiment. This makes it possible to easily obtain a uniform carrier concentration distribution even if the surface of the GaN crystal constituting the seed crystal substrate 20 has a large off-angle distribution.

[0149] Specifically, for example, when the substrate 10 is a GaN substrate of 25 mm or more (2 inches, 4 inches, or 6 inches) and the off-angle distribution measured in the radial direction of the substrate 10 (the maximum value of the difference between the off-angles measured at any two points within a distance of 80% of the radius from the center in the radial direction) is 0.4° or less, the average carrier concentration (average free electron concentration) in the surface of the substrate 10 is 1×10 15 cm -3 If this is the case, the variance of the carrier concentration can be made 3% or less of the average value.

[0150] In addition, the GaN crystal of the present embodiment has an extremely low concentration of impurities that cause carrier scattering, and is therefore advantageous over conventional GaN crystals that contain a larger amount of impurities in that it is possible to suppress a decrease in carrier mobility. For example, when the electron concentration in the GaN crystal of the present embodiment is 2×10 15 cm -3 If it is less than 1500 cm at room temperature, 2 A high mobility of 1 / Vs or more has been obtained.

[0151] It has been confirmed that the same effect can be obtained when Ge is used instead of Si as the n-type dopant, or when both Si and Ge are used. In these cases, the total concentration of Si and Ge in the crystal is, for example, 1×10 15 cm -3 More preferably, 5×10 19 cm -3 The following is the result.

[0152] <Modification of the second embodiment of the present invention> In the second embodiment described above, the amount of Si-containing gas supplied during the crystal growth step is further reduced to reduce the free electron concentration to 1×10 14 cm -3 More than 1×10 15 cm -3 However, in this case, it is impossible to measure the Si concentration in the crystal, so at present, the Si concentration is set to 1×10 15 cm -3 It can be said that the n-type dopant is less than 100 nm. In addition, it is possible to use Ge instead of Si, or to use both Si and Ge as the n-type dopant.

[0153] <Third embodiment of the present invention> Next, a third embodiment of the present invention will be described, focusing on the differences from the first embodiment. The GaN crystal in this embodiment is similar to that in the first embodiment in that both the C concentration and the electron trap E3 concentration are extremely low, but further contains Mg, the concentration of which is 3×10 18 cm -3 The GaN crystal in this embodiment contains Mg at such a concentration, and thus has a resistivity of 1×10 2 It has a conductivity of less than Ωcm and functions as a so-called p-type semiconductor crystal. The Mg concentration is, for example, 1×10 17 cm -3 5×10 or more 20 cm -3 In this case, the hole (p-type carrier) concentration under a temperature condition of 20° C. or more and 300° C. or less is, for example, 5×10 15 cm -3 5×10 or more 18 cm -3 The resistivity under the same temperature conditions is, for example, 0.5 Ωcm or more and 100 Ωcm or less.

[0154] The addition of Mg to the GaN crystal can be performed by supplying a Mg-containing gas, such as Cp2Mg gas, to the seed crystal substrate 20 simultaneously with the source gas (GaCl gas + NH3 gas) in the above-mentioned crystal growth step. The partial pressure ratio of the Mg-containing gas to the Group III source gas in the reaction vessel 203 (partial pressure of Mg-containing gas / total partial pressure of GaCl gas) is, for example, 1 / 10. 5 ~1 / 10 2 The size of the dopant gas can be set to the size of 100 nm. In addition, instead of Cp2Mg gas, magnesium nitride (Mg3N2) or a gas containing metallic Mg may be used to add Mg to the GaN crystal. For example, Mg3N2 or metallic Mg may be placed in a high temperature region of about 800° C. in the middle of the gas supply pipe 232c to generate vapor of these substances. In addition, Mg can be added to the GaN crystal by implanting Mg ions into the substrate 10 after obtaining the substrate 10 by the same method as in the first embodiment. As in the second embodiment, when a dopant gas is used, Mg can be added uniformly throughout the entire thickness direction of the GaN crystal, and damage to the crystal surface due to ion implantation can be easily avoided. In addition, when ion implantation is used, it is advantageous in that the incorporation of the C component contained in the Cp2Mg gas into the crystal, that is, the increase in the C concentration in the GaN crystal can be easily avoided.

[0155] The GaN crystal obtained in this embodiment has a better quality than conventional GaN crystals containing more of these impurities because the concentrations of Si, B, Fe, O, and C in the crystal are extremely small, similar to the GaN crystal of the first embodiment. Moreover, according to this embodiment, the impurity concentrations of Si, O, and the like in the GaN crystal are small as described above, so that it is possible to impart the desired conductivity (p-type semiconductor characteristics) to the GaN crystal even if the amount of Mg added is kept small. That is, the GaN crystal of this embodiment is more advantageous than conventional GaN crystals containing more impurities such as Si and O in that it can impart the desired semiconductor characteristics while minimizing the deterioration of crystal quality due to the addition of Mg. Moreover, the GaN crystal of this embodiment has an advantage over conventional GaN crystals containing more impurities such as Si and O in that it is possible to avoid a decrease in carrier mobility because the concentration of impurities that cause carrier scattering is extremely small. For example, when the hole concentration in the GaN crystal of this embodiment is 1×10 18 cm -3 When the temperature is 20 cm at room temperature, 2 A high mobility of 1 / Vs or more has been obtained.

[0156] <Fourth embodiment of the present invention> Next, a fourth embodiment of the present invention will be described, focusing on the differences from the first embodiment. The GaN crystal in this embodiment differs from that in the first embodiment in that it does not form a substrate 10 but forms at least a crystal layer 40 of a semiconductor multilayer structure 1.

[0157] FIG. 7 is a schematic cross-sectional view showing the semiconductor laminate of this embodiment. As shown in FIG. 7, the semiconductor laminate 1 of this embodiment includes, for example, a substrate 30 and a crystal layer 40.

[0158] The substrate 30 is configured as a base substrate for epitaxially growing the crystal layer 40 . Examples of the substrate 30 include a sapphire substrate, a SiC substrate, a nitride crystal substrate, etc. When the substrate 30 is a nitride crystal substrate, the substrate 30 may be made of any of the GaN crystals of the first to third embodiments.

[0159] The crystal layer 40 is provided on the substrate 30 and is made of any of the GaN crystals according to the first to third embodiments described above. That is, the C concentration in the crystals constituting the crystal layer 40 is 1×10 15 cm -3 and the concentration of electron traps E3 in the crystal is less than 1×10 14 cm -3 In addition, the crystals constituting the crystal layer 40 satisfy the above-mentioned formula (1-1) “[E3]<1×10 14 " while satisfying the formula (1-2) "[E3]·[C] 2 ≦1×10 43 " Satisfy.

[0160] For example, various semiconductor devices can be manufactured by stacking (bonding) any combination of the semi-insulating crystals shown in the first and second embodiments, the n-type crystals shown in the third embodiment, and the p-type crystals shown in the fourth embodiment.

[0161] For example, in the semiconductor laminate 1 for manufacturing a pn junction diode, the substrate 30 is made of, for example, the n-type GaN crystal of the second embodiment, and the crystal layer 40 is made of, for example, the p-type GaN crystal of the third embodiment.

[0162] For example, in the semiconductor laminate 1 for manufacturing a Schottky barrier diode, the substrate 30 is made of, for example, the high carrier concentration n-type GaN crystal of the second embodiment, and the crystal layer 40 is made of, for example, the low carrier concentration n-type GaN crystal of the second embodiment.

[0163] For example, in a semiconductor laminate 1 for manufacturing a high electron mobility transistor (HEMT), the substrate 30 is, for example, a semi-insulating SiC substrate or a substrate made of the semi-insulating GaN crystal of the first embodiment, and the crystal layer 40 is composed of, for example, an electron transit layer made of the GaN crystal of the first embodiment and an electron supply layer made of aluminum gallium nitride (AlGaN) crystal manufactured in the same manner as in the first embodiment.

[0164] When forming p-type GaN crystals or n-type GaN crystals, as described above, Si or Mg may be added to the crystal using a doping gas, or ions of Si or Mg may be implanted into the semi-insulating GaN crystal.

[0165] Furthermore, for example, a nucleation layer (not shown) may be provided between the substrate 10 and the crystal layer 40. The nucleation layer may be made of, for example, aluminum nitride (AlN).

[0166] According to this embodiment, by forming the crystal layer 40 from the high-quality GaN crystal of the above-described embodiment, it is possible to improve the device characteristics of the semiconductor device obtained from the semiconductor laminate 1.

[0167] <Other embodiments of the present invention> Although the embodiment of the present invention has been specifically described above, the present invention is not limited to the above embodiment, and various modifications can be made without departing from the spirit and scope of the present invention.

[0168] (a) The present invention is not limited to GaN, but may also be applied to Group III nitride crystals such as aluminum nitride (AlN), aluminum gallium nitride (AlGaN), indium nitride (InN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AlInGaN), i.e., In x Al y Ga 1-x-y The present invention can also be suitably applied to the growth of a crystal represented by the composition formula N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1).

[0169] (b) In the above embodiment, the ICTS method is described as a method for measuring the concentration of electron traps E3 and the like. However, the method for measuring electron traps is not limited to the ICTS method, and other measurement methods may be used as long as they are measurable.

[0170] (c) In the above embodiment, a method for making the substrate 10 stand on its own by slicing a crystal ingot grown thick on the seed crystal substrate 20 made of a GaN single crystal has been described, but this is not limited to the above case. For example, the substrate 10 may be manufactured by a so-called VAS (Void-Assisted Separation) method. That is, the substrate 10 may be obtained by forming a GaN layer on a heterogeneous substrate as an underlayer as described in Reference 2, growing the GaN layer thick through a nanomask made of titanium nitride (TiN) or the like, peeling the GaN layer from the heterogeneous substrate, and removing the facet-grown crystals on the heterogeneous substrate side.

[0171] (d) The crystal growth step of the present invention is not limited to the techniques shown in the above-mentioned embodiments, and the following techniques may also be used in combination.

[0172] For example, the dimensions and shape of the gas generator may be optimized to ensure that the HCl gas stays (contacts) on the Ga melt for a long time (for example, 1 minute or more), thereby further reducing the impurity concentration contained in the GaCl gas. For example, a nanomask made of TiN or the like having a large number of micropores that have an impurity capturing effect may be formed on the seed crystal substrate, and a GaN crystal may be grown on the nanomask. For example, when crystal growth on the seed crystal substrate is advanced, the growth period on facets other than the c-plane, which are prone to impurity incorporation, may be shortened. When facet growth is performed on the seed crystal substrate in this way, it is preferable to grow a GaN layer thick, peel it off from the seed crystal substrate, and remove the facet-grown crystal on the heterogeneous substrate side to obtain the substrate 10.

[0173] As described above, the method shown in the first to third embodiments can significantly reduce the impurity concentration in the GaN crystal by itself, but by further combining and using the auxiliary methods described here, it is possible to more reliably reduce the impurity concentration in the crystal. However, it is impossible to obtain the various effects shown in the above embodiments by only using these auxiliary methods in combination without performing the high-temperature bake step.

[0174] (e) In the above embodiment, the case where GaN crystal is grown using the HVPE apparatus 200 has been described, but this is not limited to this case, and an MOCVD apparatus may also be used. That is, as the MOCVD apparatus, an apparatus in which at least a part of the surface of the member constituting the high-temperature reaction region has a protective layer made of an iron cyano complex may be used, and the above-mentioned high-temperature bake step may be performed to grow GaN crystal. EXAMPLES

[0175] Hereinafter, experimental results that support the effects of the above-described embodiment will be described.

[0176] (1) GaN crystal substrate samples Using an HVPE apparatus, GaN crystal films were grown on GaN seed crystal substrates with a diameter of 3 inches and a surface consisting of the +c plane under the following growth conditions to produce GaN crystal substrates for samples A1 to A5 and B1 to B10. Note that impurity doping will be described later.

[0177] (Samples A1 to A5) Among the samples A1 to A5, the samples A3 and A4 correspond to the substrates made of GaN crystal in the above-mentioned embodiment.

[0178] For samples A1 to A5, an HVPE apparatus was used in which the surface of the carbon member constituting the high-temperature reaction region had a protective layer made of an iron cyano complex. For samples A1 to A4, a high-temperature bake step was performed before the crystal growth step without performing an oxidation sequence in which O2 gas was supplied. At this time, the high-temperature bake temperatures for samples A1 to A4 were 1100°C, 1400°C, 1500°C, and 1600°C, respectively. All pressure conditions were 1 atmosphere. For sample A5, the high-temperature bake step was not performed. Next, a GaN crystal with a thickness of 5 mm was grown on a seed crystal substrate without exposing the reaction chamber to the atmosphere. After that, cylindrical grinding was performed to adjust the outer diameter of the GaN crystal, and then a substrate with a thickness of 400 μm was sliced. The substrate had a diameter of 2 inches or more.

[0179] (Samples B1 to B10) Samples B1 to B10 correspond to samples 8 to 17 in Reference 4, respectively.

[0180] For samples B1 to B10, an HVPE apparatus was used in which the surface of the member constituting the high-temperature reaction region had a protective layer made of SiC. For samples B1 to B4, a high-temperature bake step similar to that for samples A1 to A4 was performed before the crystal growth step. For samples B5 to B9, a high-temperature bake step was performed before the crystal growth step, in which an oxidation sequence in which O2 gas was supplied and an etching sequence were alternately repeated. At this time, the high-temperature bake temperatures for samples B5 to B9 were 1100°C, 1400°C, 1500°C, 1550°C, and 1600°C, respectively. The pressure conditions were all 1 atm. Note that the high-temperature bake step was not performed for sample B10. Next, a 5 mm thick GaN crystal was grown on a seed crystal substrate without exposing the reaction chamber to the atmosphere. After that, a 400 μm thick substrate was sliced ​​from the GaN crystal.

[0181] (About impurity doping) First, all the above samples were prepared without doping with impurities, and the impurity analysis and electrical conductivity were confirmed by SIMS, which will be described later. The impurity concentrations shown in Tables 1 to 3 are the measurement results of samples that were not doped with impurities.

[0182] On the other hand, if the GaN crystal film becomes highly pure without doping with impurities, the GaN crystal film will have high resistance. Therefore, it will be impossible to measure electrical properties using the ICTS method or other methods on high-resistance samples. Therefore, for measurements using the ICTS method, samples were prepared and evaluated as follows, depending on the conductivity of the sample.

[0183] Among the samples not doped with impurities, those that did not have high resistance were measured by the ICTS method described below.

[0184] In contrast, among the samples not doped with impurities, samples A3, A4, A5, B3, B4, and B7 to B10, which had high resistance, could not be measured by the ICTS method. 16 cm -3 A separate sample was prepared under the same growth conditions as the non-doped sample, except that Si was intentionally gas-doped at a concentration of 10000 g to impart n-type conductivity. Hereinafter, the sample number will be given an apostrophe, and the sample will be referred to as "Si-lightly doped sample A3'", etc. After the sample preparation, Si-lightly doped samples A3', A4', A5', B3', B4', B7' to B10' were measured by the ICTS method described below.

[0185] Here, in the Si-lightly doped samples A3', A4', A5', B3', B4', and B7' to B10', even if a small amount of Si is doped using a Si-containing gas (SiH2Cl2 gas), it is considered that Fe is hardly mixed into the GaN crystal originating from the Si-containing gas. As described above, since the origin of E3 is Fe, it is considered that there is no difference in the electron trap concentration between the non-doped sample and the Si-lightly doped sample under the same growth conditions except for Si doping.

[0186] Therefore, the measurement results for the Si-lightly doped samples A3', A4', A5', B3', B4', and B7' to B10' are shown in the columns for samples A3, A4, A5, B3, B4, and B7 to B10 in Tables 1 to 3, respectively.

[0187] (2) Evaluation The above-mentioned sample GaN crystal substrates were subjected to the following evaluations.

[0188] (SIMS) The Si concentration, B concentration and Fe concentration in each crystal were measured by SIMS depth profile analysis.

[0189] In addition, the O and C concentrations in each crystal were measured by SIMS using the raster variation method.

[0190] (ICTS Act) As described above, measurements were performed by the ICTS method according to the conductivity of the samples not doped with impurities. That is, for the low-resistance samples A1, A2, B1, B2, B5, and B6, measurements were performed by the ICTS method as they were. On the other hand, for the high-resistance samples A3, A4, A5, B3, B4, and B7 to B10, measurements were performed by the ICTS method on the Si-doped samples A3', A4', A5', B3', B4', and B7' to B10', and the measurement results were evaluated as the results for samples A3, A4, A5, B3, B4, and B7 to B10.

[0191] As a result, the concentrations of electron traps E3, which exist in the energy range of 0.5 eV to 0.65 eV from the conduction band minimum, electron traps E1, which exist in the energy range of 0.15 eV to 0.3 eV from the conduction band minimum, and electron traps Ex, which exist in the energy range of 0.68 eV to 0.75 eV from the conduction band minimum, were measured for each crystal.

[0192] In the ICTS measurement, the measurement temperature was adjusted in the range of 80K to 350K so that the time constant of the thermoelectron emission of the target trap was within the measurable time range (0.01 to 1000 seconds). For example, in FIG. 3, the measurement temperature when measuring the electron traps E3 and Ex was set to room temperature (300K). On the other hand, the temperature when measuring the electron trap E1 at an energy position close to the conduction band was set to, for example, 100K to 150K. In addition, the reverse bias during the ICTS measurement was set to -2V, and the filling pulse was set to 0V for 100msec.

[0193] In the measurements by the ICTS method, the ohmic electrode on the back side of the sample was made of Ti / Al, and the Schottky electrode on the front side was made of Ni / Au.

[0194] (3) Results The evaluation results of the GaN crystal substrates of samples A1 to A5 and B1 to B10 are shown in the following Tables 1 to 3. In the tables, "lower limit" refers to the lower limit of detection in each evaluation, and results below the lower limit of detection are indicated as "DL."

[0195] [Table 1]

[0196] [Table 2]

[0197] [Table 3]

[0198] (Samples B1 to B10) As described above, in samples B1 to B10, the protective layer on the surface of the high-temperature reaction region was made of SiC. Among these, the O and C concentrations were high in sample B10, which did not undergo the high-temperature bake step, samples B1 to B4, which did not undergo the oxidation sequence of the high-temperature bake step, and samples B5 and B6, which underwent the oxidation sequence but had a high-temperature bake temperature of less than 1500°C.

[0199] Additionally, sample B10, which did not undergo the high-temperature bake step, had a high B concentration. Moreover, in samples B1, B2, B5 and B6 in which the high-temperature bake temperature was less than 1500° C., the Si concentration was high.

[0200] In contrast, in samples B7 to B9, which were subjected to a high-temperature bake step including an oxidation sequence at a high-temperature bake temperature of 1500°C or higher, the Si concentration, B concentration, O concentration, and C concentration were below the detection limit, i.e., 1×10 15 cm -3 It was possible to make it less than that.

[0201] In all of the samples B1 to B10, the Fe concentration measured by SIMS depth profile analysis was below the lower detection limit.

[0202] However, when the ICTS method was used to measure samples B1 to B10, the concentration of electron traps E3 in each of samples B1 to B10 was 2.0 × 10 14 cm -3 Since the origin of the electron trap E3 is considered to be Fe, the Fe concentration in samples B1 to B10 was estimated to be 2.0×10 14 cm -3 It turned out that it was more than that.

[0203] In addition, in samples B1 to B10, the electron trap E1 concentration and the electron trap Ex concentration are 2×1013 cm -3 That's it, 1×10 14 cm -3 That was all.

[0204] In samples B1 to B10, the protective layer in the high-temperature reaction region was made of SiC, and therefore the protective layer was vulnerable at the growth temperature of the GaN crystal and in the atmosphere of the raw material gas. For this reason, it is believed that a small amount of Fe as an impurity leaked from the carbon members constituting the high-temperature reaction region. For this reason, it is believed that the concentration of the electron trap E3 could not be reduced. In addition, it is believed that the crystal quality of the GaN crystal was slightly deteriorated due to these impurities, and therefore the electron traps E1 or Ex were generated in the crystal. In addition, it is believed that impurities other than Fe were also generated from the carbon members, and therefore the electron traps E1 and Ex were introduced into the crystal.

[0205] As a result of the above, in samples B1 to B10 based on the technique described in document 4, it was not possible to reduce both the C concentration and the electron trap E3 concentration, which are in a trade-off relationship.

[0206] (Samples A1 to A5) As described above, in samples A1 to A5, the protective layer on the surface of the high-temperature reaction region was composed of an iron cyano complex. Among these, sample A5, which did not undergo a high-temperature bake step, and samples A1 and A2, which had a high-temperature bake temperature of less than 1500°C, had high O and C concentrations.

[0207] Moreover, sample A5, which did not undergo the high-temperature bake step, had a high B concentration, while samples A1 and A2, which had high-temperature bake temperatures below 1500°C, had high Si concentrations.

[0208] In contrast, in samples A3 and A4, in which the protective layer on the surface of the high-temperature reaction region was made of an iron cyano complex and a high-temperature bake step was performed at a temperature of 1500 °C or higher without performing an oxidation sequence, the Si concentration and B concentration were below the detection limit, i.e., 1 × 10 15 cm-3 The O and C concentrations can be less than 1 x 10 15 cm -3 In particular, in sample A4, which underwent a high-temperature bake step at 1600 °C, the O concentration was reduced to less than the lower limit of the raster change method, i.e., 5 × 10 14 cm -3 The C concentration is also set at 1.1×10 14 cm -3 It was possible to do so.

[0209] Furthermore, in the Si-doped samples A3' and A4', the electron trap E3 concentration in the crystal measured by the ICTS method was 1×10 14 cm -3 In particular, in the Si-doped sample A4', the electron trap E3 concentration was reduced to less than 2 × 10 13 cm -3 It was possible to make it less than that.

[0210] In this experiment, the source of Fe, which is the cause of electron trap E3, was thought to be the carbon material in the high-temperature reaction region. However, in samples A3 and A4, the generation of Fe from the carbon material in the high-temperature reaction region was suppressed by the iron cyano complex coating. In this respect, it is thought that the generation of Fe was suppressed regardless of whether or not Si was doped.

[0211] In other words, since the concentration of electron traps E3 is reduced in the lightly Si-doped samples A3' and A4', it is natural that the concentration of electron traps E3 should also be reduced in the samples A3 and A4, which were prepared under the same conditions except that Si was not doped, and it is even considered that the concentration of electron traps E3 is reduced more than that of the lightly Si-doped samples A3' and A4'.

[0212] Based on the above results of the electron trap E3 concentration in the Si-doped samples A3' and A4', the electron trap E3 concentration in the samples A3 and A4 is 1×10 14 cm -3Furthermore, the concentration of electron traps E3 in samples A3 and A4 was confirmed to be less than 2 × 10 13 cm -3 It was confirmed that it was less than

[0213] In addition, since the origin of E3 is considered to be Fe, the Fe concentration in samples A3 and A4 was set to 1×10 based on the E3 concentration. 14 cm -3 It was confirmed that it was possible to do less than that.

[0214] Based on the results of the concentration of electron traps E1 and Ex in the Si-doped samples A3' and A4', the concentration of electron trap E1 was increased to 3 × 10 12 cm -3 and the concentration of the electron trap Ex is 3×10 13 cm -3 It was confirmed that the following could be achieved:

[0215] In this way, it was confirmed that in samples A3 and A4, it was possible to dramatically reduce both the C concentration and the electron trap E3 concentration, which have been reported to be in a trade-off relationship.

[0216] Here, the relationship between the C concentration and the electron trap E3 concentration in samples A3 and A4 will be described with reference to FIG. 8. FIG. 8 is a diagram showing the relationship between the carbon concentration and the electron trap E3 concentration. Note that "pE+q" on each axis in FIG. 8 is p×10 q This means:

[0217] In Figure 8, "samples A3 and A4 series" shows the results of samples A3 and A4 obtained based on the Si-lightly doped samples A3' and A4', as well as the results of samples whose growth conditions were changed from those of samples A3 and A4 within the range that satisfies the requirements of the above-mentioned embodiment.

[0218] FIG. 8 also shows data from papers or patent documents as prior art. [Honda 2012] Honda, Shiojima, JJAP 51 (2012) 04DF04 [Shiojima 2019] Shiojima et al., Phys. Status Solidi B 2019, 1900561 [Tanaka 2016] T. Tanaka, K. Shiojima, T. Mishima, Y. Tokuda, Jpn. J. Appl. Phys. 55, 061101 (2016) [Horikiri 2018] Japanese Unexamined Patent Application Publication No. 2020 - 35980 [Zhang 2020] Zhang et al., J. Appl. Phys. 127, 215707 (2020) [Tokuda 2016] Yutaka Tokuda, ECS Transactions, 75 (4) 39 - 49 (2016) [Kanegae 2019] Kanegae et al., Appl. Phys. Lett. 115, 012103 (2019) [Narita 2020] Narita et al., Jpn. J. Appl. Phys. 59, 105505 (2020)

[0219] Also, "Equatin (1 - 1)", "Equation (1 - 2)", and "Equation 2" in Fig. 8 respectively represent [E3]=1×10 14 , [E3]·[C] 2 =1×10 43 , [E3]·[C] 2 =1×10 42 which are shown as

[0220] As shown in FIG. 8, it was confirmed again that in the conventional technology, there is a trade-off between the C concentration and the concentration of the electron traps E3 in the GaN crystal.

[0221] In addition, the data in the conventional papers and patent documents have not been able to reduce both the C concentration and the electron trap E3 concentration in the GaN crystal. 14 or [E3]·[C] 2 >1×10 43 It was.

[0222] In contrast, in samples A3 and A4 and their corresponding samples, the above formula (1-1) "[E3] < 1 × 10 14 " while satisfying the formula (1-2) "[E3]·[C] 2 ≦1×10 43 ", and preferably satisfies the above formula (2) "[E3]·[C] 2 ≦1×10 42 " was confirmed.

[0223] In addition, in samples A3 and A4, no electron traps other than E1, E3, and Ex existed within the temperature range in which the ICTS measurements were performed, i.e., the temperature range from 80 K to 350 K. This indicates that the total concentration of electron traps existing in the energy range from 0.1 eV to 1.0 eV from the conduction band minimum is 1×10 14 cm -3 It was confirmed that it was less than

[0224] As described above, it has been confirmed that samples A3 and A4, which satisfy the requirements of the above-mentioned embodiment, and samples corresponding to them, make it possible to realize extremely high-quality GaN crystals that could not be achieved with conventional technology.

[0225] (4) Supplementary Information In the above-mentioned experiment, the electron trap concentrations in the samples A3 and A4 were estimated based on the measurement results of the electron trap concentrations in the Si-lightly doped samples A3' and A4', but this is not limited to the case.

[0226] For example, for samples A3 and A4, which are originally high resistance, 1 × 10 16 cm -3 When Si is intentionally ion-implanted at a concentration of 0.1 to 100 μm, it becomes possible to directly measure the samples A3 and A4 by the ICTS method.

[0227] Even in this case, in samples A3 and A4 in which a small amount of Si was ion-implanted, the electron trap E3 concentration was increased to 2×10 13 cm -3 and the concentration of electron trap E1 is 3×10 12 cm -3 and the concentration of the electron trap Ex is 3×10 13 cm -3 It has been confirmed that the following can be achieved.

[0228] <Preferred embodiment of the present invention> Preferred aspects of the present invention will be described below.

[0229] (Appendix 1) In x Al y Ga 1-x-y A crystal represented by the formula N (wherein 0≦x≦1, 0≦y≦1, 0≦x+y≦1), The carbon concentration in the crystal is 1×10 15 cm -3 is less than The concentration of electron traps E3 present in the energy range of 0.5 eV to 0.65 eV from the bottom of the conduction band in the crystal is 1×10 14 cm -3 is less than Nitride crystals.

[0230] (Appendix 2) Satisfying formula (1-2), [E3] [C] 2 ≦1×10 43 (1-2) however, [C] is in cm -3 is the concentration of carbon in the crystal, [E3] is in cm -3 is the E3 concentration in the crystal Attachment 1: The nitride crystal.

[0231] (Appendix 3) In x Al y Ga 1-x-y A crystal represented by the formula N (wherein 0≦x≦1, 0≦y≦1, 0≦x+y≦1), Satisfying formula (1-1) and formula (1-2), [E3]<1×10 14 (1-1) [E3] [C] 2 ≦1×10 43 (1-2) however, [C] is in cm -3 is the concentration of carbon in the crystal, [E3] is the concentration of electron traps E3 present in the energy range of 0.5 eV to 0.65 eV from the bottom of the conduction band in the crystal, and the unit of the concentration of E3 is cm -3 is Nitride crystals.

[0232] (Appendix 4) Satisfying the following formula (2): [E3] [C] 2 ≦1×10 42 (2) 4. The nitride crystal according to claim 2 or 3.

[0233] (Appendix 5) The concentration of electron traps E1 present in the energy range of 0.15 eV to 0.3 eV from the bottom of the conduction band in the crystal is 3×10 12 cm -3 Is less than or equal to 5. The nitride crystal according to any one of claims 1 to 4.

[0234] (Appendix 6) The concentration of electron traps Ex existing in the energy range of 0.68 eV to 0.75 eV from the conduction band bottom in the crystal is 3×10 13 cm -3 Is less than or equal to 6. The nitride crystal according to any one of claims 1 to 5.

[0235] (Appendix 7) The E3 concentration in the crystals was 2×10 13 cm -3 is less than 7. The nitride crystal according to any one of claims 1 to 6.

[0236] (Appendix 8) The concentration of boron in the crystal is 1×10 15 cm -3 is less than The nitride crystal according to any one of claims 1 to 7.

[0237] (Appendix 9) The concentration of oxygen in the crystal is 1×10 15 cm -3 is less than The nitride crystal according to any one of claims 1 to 8.

[0238] (Appendix 10) The total concentration of electron traps in the energy range of 0.1 eV to 1.0 eV from the bottom of the conduction band in the crystal is 1×10 14 cm -3 is less than The nitride crystal according to any one of claims 1 to 9.

[0239] (Appendix 11) The concentration of silicon in the crystal is 1×10 15 cm -3 is less than The nitride crystal according to any one of claims 1 to 10.

[0240] (Appendix 12) The resistivity at temperatures between 20°C and 300°C is 1×10 6 Ωcm or more 12. The nitride crystal according to any one of claims 1 to 11.

[0241] (Appendix 13) The resistivity at temperatures between 20°C and 300°C is 1×10 7 Ωcm or more 13. The nitride crystal according to claim 12.

[0242] (Appendix 14) The total concentration of Si and Ge in the crystal is 1×10 15 cm -3 More preferably, 5×10 19 cm -3 Is less than or equal to The nitride crystal according to any one of claims 1 to 10.

[0243] (Appendix 15) The resistivity at temperatures between 20°C and 300°C is 1×10 2 Ωcm or less, preferably 1×10 -4 Ωcm or more, Preferably, the free electron concentration under a temperature condition of 20° C. or higher and 300° C. or lower is 1×10 15 cm -3 5×10 or more 19 cm -3 Is less than or equal to 15. The nitride crystal according to claim 14.

[0244] (Appendix 16) The Mg concentration in the crystal is 1×10 17 cm -3 More than 5×10 20 cm -3 Is less than or equal to The nitride crystal according to any one of claims 1 to 10.

[0245] (Appendix 17) Resistivity is 1×10 under temperature conditions of 20℃ to 300℃2 The resistance is preferably 0.5 Ωcm or more and 100 Ωcm or less. Preferably, the hole concentration under a temperature condition of 20° C. or more and 300° C. or less is 2×10 17 cm -3 5×10 or more 18 cm -3 Is less than or equal to 17. The nitride crystal according to claim 16.

[0246] (Appendix 18) A substrate; On the substrate, x Al y Ga 1-x-y a nitride crystal layer made of a crystal represented by a composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1); having The carbon concentration in the nitride crystal layer is 1×10 15 cm -3 is less than The concentration of electron traps E3 present in the energy range of 0.5 eV to 0.65 eV from the bottom of the conduction band in the crystal is 1×10 14 cm -3 is less than Semiconductor laminate.

[0247] (Appendix 19) A substrate; On the substrate, x Al y Ga 1-x-y a nitride crystal layer made of a crystal represented by a composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1); having The nitride crystal layer satisfies formula (1-1) and formula (1-2), [E3]<1×10 14 (1-1) [E3] [C] 2 ≦1×10 43 (1-2) however, [C] is in cm -3 is the concentration of carbon in the nitride crystal layer, [E3] is the concentration of electron traps E3 present in the energy range of 0.5 eV to 0.65 eV from the bottom of the conduction band in the crystal, and the unit of the concentration of E3 is cm -3 is Semiconductor laminate.

[0248] (Appendix 20) providing a reaction vessel for containing a substrate; A group III element source gas and a nitrogen source gas are supplied to the substrate heated to a predetermined growth temperature in the reaction vessel, and In x Al y Ga 1-x-y epitaxially growing a nitride crystal represented by a composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1) on the substrate; having The step of preparing a reaction vessel includes: preparing, as the reaction vessel, a vessel having a high-temperature reaction region which is a region heated to the growth temperature and comes into contact with a gas supplied to the substrate, at least a portion of a surface of a member constituting the high-temperature reaction region having a protective layer made of an iron cyano complex; a high-temperature baking process in which the temperature of the high-temperature reaction region is heated to a temperature of 1500° C. or higher, the supply of the nitrogen source gas into the reaction vessel is stopped, and hydrogen gas and a halogen-based gas are supplied into the reaction vessel, thereby cleaning and modifying the surfaces of the members constituting the high-temperature reaction region; have A method for producing nitride crystals.

[0249] (Appendix 21) In the high temperature baking step, The pressure in the reaction vessel is maintained at 0.5 atmospheres or more and 2 atmospheres or less; Also preferably, in the high temperature baking step, maintaining the temperature of at least the high-temperature reaction zone in the reaction vessel at 1500° C. or higher; Also preferably, in the high temperature baking step, The reaction vessel is evacuated while the reaction is being carried out. Preferably, the high-temperature baking step is carried out for 30 minutes or more. A method for producing nitride crystals according to claim 20.

[0250] (Appendix 22) A reaction vessel for accommodating a substrate; a heating unit that heats at least the substrate in the reaction vessel; a gas supply system for supplying a Group III element source gas and a nitrogen source gas to the substrate in the reaction chamber; The Group III element source gas and the nitrogen source gas are supplied to the substrate heated to a predetermined growth temperature in the reaction vessel, and In x Al y Ga 1-x-y A control unit that controls the heating unit and the gas supply system so as to epitaxially grow a nitride crystal represented by a composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1) on the substrate; Equipped with the reaction vessel has a high-temperature reaction region which is heated to the growth temperature and comes into contact with a gas supplied to the substrate; At least a part of the surface of the member constituting the high-temperature reaction region has a protective layer made of an iron cyano complex, The control unit performs a high-temperature bake process for cleaning and modifying the surfaces of the members constituting the high-temperature reaction region, by heating the high-temperature reaction region to a temperature of 1500° C. or higher, stopping the supply of the nitrogen source gas into the reaction vessel, and supplying hydrogen gas and a halogen-based gas into the reaction vessel, prior to the process of epitaxially growing the nitride crystal. Nitride crystal manufacturing equipment. [Explanation of symbols]

[0251] 10 Substrate (nitride crystal substrate) 20 Seed crystal substrate 21 GaN crystal film 30 Substrate 40 Crystal layer (nitride crystal layer)

Claims

1. In ｘ A ｙ G １－ｘ－ｙ A crystal represented by the formula: N (wherein 0≦x≦1, 0≦y≦1, 0≦x+y≦1), The carbon concentration in the crystal is 1×10 １５ cm －３ is less than The concentration of electron traps E3 present in the energy range of 0.5 eV to 0.65 eV from the bottom of the conduction band in the crystal is 1×10 １４ cm －３ is less than Nitride crystals.

2. Satisfying formula (1-2), [E3]・[C] ２ ≦1×10 ４３ ・・・(1-2) however, [C] is in cm －３ is the concentration of carbon in the crystal, [E3] is in cm －３ is the E3 concentration in the crystal The nitride crystal according to claim 1.

3. In ｘ A ｙ G １－ｘ－ｙ A crystal represented by the formula: N (wherein 0≦x≦1, 0≦y≦1, 0≦x+y≦1), Satisfying formula (1-1) and formula (1-2), [[3]<1×10] １４ ・・・(1-1) [E3]・[C] ２ ≦1×10 ４３ ・・・(1-2) however, [C] is in cm －３ is the concentration of carbon in the crystal, [E3] is the concentration of electron traps E3 present in the energy range of 0.5 eV to 0.65 eV from the bottom of the conduction band in the crystal, and the unit of the concentration of E3 is cm －３ is Nitride crystals.

4. The following formula (2) is satisfied: [E3]・[C] ２ ≦1×10 ４２ ・・・(2) The nitride crystal according to claim 2 or 3.

5. The concentration of electron traps E1 present in the energy range of 0.15 eV to 0.3 eV from the bottom of the conduction band in the crystal is 3×10 １２ cm －３ is less than or equal to The nitride crystal according to any one of claims 1 to 4.

6. The concentration of electron traps Ex existing in the energy range of 0.68 eV to 0.75 eV from the bottom of the conduction band in the crystal is 3×10 １３ cm －３ Is less than or equal to The nitride crystal according to any one of claims 1 to 5.

7. The concentration of boron in the crystal is 1×10 １５ cm －３ is less than The nitride crystal according to any one of claims 1 to 6.

8. The concentration of oxygen in the crystal is 1×10 １５ cm －３ is less than The nitride crystal according to any one of claims 1 to 7.

9. The total concentration of electron traps present in the energy range of 0.1 eV to 1.0 eV from the bottom of the conduction band in the crystal is 1×10 １４ cm －３ is less than The nitride crystal according to any one of claims 1 to 8.

10. A substrate; On the substrate, ｘ A ｙ G １－ｘ－ｙ a nitride crystal layer made of a crystal represented by a composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1); having The carbon concentration in the nitride crystal layer is 1×10 １５ cm －３ is less than The concentration of electron traps E3 present in the energy range of 0.5 eV to 0.65 eV from the bottom of the conduction band in the crystal is 1×10 １４ cm －３ is less than Semiconductor laminate.

11. A substrate; On the substrate, ｘ A ｙ G １－ｘ－ｙ a nitride crystal layer made of a crystal represented by a composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1); having The nitride crystal layer satisfies formula (1-1) and formula (1-2), [[3]<1×10] １４ ・・・(1-1) [E3]・[C] ２ ≦1×10 ４３ ・・・(1-2) however, [C] is in cm －３ is the concentration of carbon in the nitride crystal layer, [E3] is the concentration of electron traps E3 present in the energy range of 0.5 eV to 0.65 eV from the bottom of the conduction band in the crystal, and the unit of the concentration of E3 is cm －３ is Semiconductor laminate.

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