Semiconductor device

Abstract

To provide a semiconductor device capable of suppressing formation of a parasitic channel caused by a gate BT stress, in a semiconductor device using an oxide semiconductor, or to provide a semiconductor device having a transistor with excellent electric characteristics.SOLUTION: A semiconductor device is a dual-gate transistor in which an oxide semiconductor film is provided between a first gate electrode and a second gate electrode, and has a gate insulating film provided between the first gate electrode or the second gate electrode and the oxide semiconductor film. The first or second gate electrode and a lateral face of the oxide semiconductor film are opposed to each other via the gate insulating film in a channel width direction of the transistor.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device including a transistor having an oxide semiconductor film and a manufacturing method thereof. [Background technology]

[0002] A transistor (thin film transistor (TFT)) is made by using a semiconductor thin film formed on a substrate. The technology of constructing a transistor is attracting attention. It is widely used in electronic devices such as image display devices (display devices). Silicon-based semiconductor materials are widely known as semiconductor thin films that can be used, but other materials and Oxide semiconductors have been attracting attention as a new type of semiconductor.

[0003] For example, indium (In), gallium (Ga) and nickel are used as the active layer of a transistor. A transistor using an oxide semiconductor containing lead (Zn) has been disclosed (see Patent Document 1). .).

[0004] In addition, a technique for improving carrier mobility by forming an oxide semiconductor layer into a stacked structure is also known. are disclosed (see Patent Documents 2 and 3). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2006-165528 A [Patent Document 2] JP 2011-138934 A [Patent Document 3] JP 2011-124360 A Summary of the Invention [Problem to be solved by the invention]

[0006] In a transistor including an oxide semiconductor film, the oxide semiconductor film contains a large number of defects. This leads to poor electrical characteristics of the transistor and also leads to deterioration over time and stress testing (e.g. For example, in a BT (Bias-Temperature) stress test, the threshold voltage This causes an increase in the amount of pressure fluctuation.

[0007] For example, a transistor using an oxide semiconductor is susceptible to gate BT stress (especially positive BT stress). Transistor characteristics after application of a voltage (Drain current-Gate voltage curve (Id-Vg curve)) In this case, a defect occurs in which the drain current increases stepwise at the threshold voltage. This is because the oxide semiconductor is made n-type on the side surface of the oxide semiconductor film that overlaps with the gate electrode. This is believed to be due to the formation of a parasitic channel. Defects are formed due to damage during processing, and contamination due to the adhesion of impurities Therefore, when stress such as an electric field is applied to the region, the edge of the oxide semiconductor film This portion tends to become activated and become n-type (low resistance), resulting in the formation of a parasitic channel.

[0008] In addition, defects in an oxide semiconductor film include oxygen vacancies. A transistor using an oxide semiconductor film having oxygen vacancies has a threshold voltage This is because oxide semiconductors tend to have a normally-on characteristic. This is because oxygen vacancies in the film generate charges, lowering the resistance. If the semiconductor device has a normally-on characteristic, malfunctions are likely to occur during operation. Various problems occur, such as high power consumption when the device is not in operation. The load test increases the variation of the transistor's electrical characteristics, typically the threshold voltage. There is a problem that...

[0009] In view of this, one embodiment of the present invention is to provide a gate BT switch in a semiconductor device including an oxide semiconductor. One object of the present invention is to provide a semiconductor device in which the formation of a parasitic channel due to a trace is suppressed. Alternatively, a semiconductor device including a transistor with excellent electrical characteristics is provided. [Means for solving the problem]

[0010] According to one embodiment of the present invention, an oxide semiconductor film is provided between a first gate electrode and a second gate electrode. A transistor having a dual gate structure, comprising a first gate electrode and a second gate electrode. a gate insulating film provided between the gate electrode and the oxide semiconductor film; In the width direction of the gate electrode, the first gate electrode or the second gate electrode and the side surface of the oxide semiconductor film The semiconductor device is configured such that the first and second gate electrodes face each other via a gate insulating film.

[0011] Another embodiment of the present invention is a gate electrode including: a second gate electrode facing the other surface of the oxide semiconductor film; A first gate insulating film provided between the oxide semiconductor film and the second gate electrode. a second gate insulating film provided between the first gate electrode and the second gate electrode; and a pair of electrodes in contact with the oxide semiconductor film. A transistor, the first gate electrode or The second gate electrode and the side surface of the oxide semiconductor film are in contact with the first gate insulating film or the second gate The semiconductor devices face each other via an insulating film.

[0012] The gate insulating film, the first gate insulating film, or the second gate insulating film may be formed on the adjacent transistors. A gate insulating film, a first gate insulating film or a second gate insulating film formed in a transistor They may be separated.

[0013] In addition, the gate insulating film, the first gate insulating film, or the second gate insulating film may be formed on the surface of the film. A plurality of openings provided so that an oxide semiconductor film is located between the openings when viewed from a direction perpendicular to the surface. It may have a mouth.

[0014] In addition, the first gate electrode and the second gate electrode may be connected to each other.

[0015] In addition, a conductive film may be provided that is connected to one of the pair of electrodes. The conductive film serves as a pixel electrode. It works.

[0016] The gate insulating film, the first gate insulating film, or the second gate insulating film has a stoichiometric composition. The oxide insulating film may contain more oxygen than the stoichiometric composition. The oxide insulating film containing more oxygen than the theoretical composition was analyzed by thermal desorption spectroscopy (T Analysis by thermal desorption spectroscopy (TDS) The amount of oxygen released is 1.0×10 18 atoms / cm 3 That's all, or 3.0×10 20 atoms / cm 3 That's all.

[0017] In the channel width direction of the transistor, the first gate electrode or the second gate electrode When the first gate electrode faces a side surface of the oxide semiconductor film via the gate insulating film, The electric field of the second gate electrode causes a parasitic capacitance on the side surface of the oxide semiconductor film or in the vicinity thereof. The occurrence of raw channels is suppressed. As a result, the increase in drain current at the threshold voltage The transistor has a steep channel width and excellent electrical characteristics. In the direction of the oxide semiconductor film, the shortest distance between the side surface of the oxide semiconductor film and the second gate electrode is 0.5 μm or less. As a result, the oxide semiconductor film and the second gate electrode Therefore, it is possible to prevent short circuits and increase the yield.

[0018] In addition, the gate insulating film, the first gate insulating film, or the second gate insulating film may have a stoichiometric composition. By providing the oxide insulating film containing more oxygen than the oxygen that satisfies the composition, oxygen contained in the first gate insulating film or the second gate insulating film moves to the oxide semiconductor film, It is possible to reduce oxygen vacancies in the oxide semiconductor film. As a result, the normally-off characteristics are improved. In addition, the transistor voltage changes over time and during stress testing. This can reduce the amount of variation in electrical characteristics, typically the threshold voltage. Effect of the Invention

[0019] According to one embodiment of the present invention, in a semiconductor device including an oxide semiconductor, It is possible to provide a semiconductor device in which the formation of a parasitic channel due to electrical A semiconductor device having a transistor with excellent characteristics can be provided. [Brief description of the drawings]

[0020] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Diagram 2]1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a transistor. [Diagram 3] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 4] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Diagram 5] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 6] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a transistor. [Figure 7] 1 is a cross-sectional view illustrating a structure of a transistor. [Figure 8] FIG. 13 is a diagram for explaining the results of calculating a current-voltage curve. [Figure 9] 11A and 11B are diagrams illustrating calculation results of a potential of a transistor. [Figure 10] FIG. 1 is a diagram illustrating a model. [Figure 11] FIG. 1 is a diagram illustrating a model. [Figure 12] FIG. 13 is a diagram for explaining the results of calculating a current-voltage curve. [Figure 13] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 14] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 15] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 16] FIG. 1 illustrates a band structure of a transistor. [Figure 17] FIG. 1 is a diagram showing an electron microbeam diffraction pattern of an oxide semiconductor. [Figure 18] FIG. 1 is a top view illustrating one embodiment of a semiconductor device. [Figure 19] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0021] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and the embodiments and aspects of the present invention may be modified without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications may be made to the embodiments and details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments and examples. In the following embodiments and examples, the same parts or parts having similar functions are In the case of parts, the same reference numerals or the same hatch patterns are used in common among different drawings, and the repetition The explanation of the repetition will be omitted.

[0022] In each figure described in this specification, the size, thickness, or area of ​​each component is indicated by the following formula: The figures may be exaggerated for clarity and are not necessarily limited to scale. stomach.

[0023] In addition, the terms "first," "second," "third," etc., used in this specification are used interchangeably to avoid confusion of components. The number is added for convenience and is not intended to be a numerical limit. The terms can be replaced with "second" or "third" as appropriate for explanation.

[0024] The function of the "source" and "drain" is to change the direction of the current during circuit operation. For this reason, in this specification, the terms "sauce" and "dressing" are used interchangeably. The terms "in" and "in" may be used interchangeably.

[0025] Voltage is the potential difference between two points, and potential is the electrostatic field at a certain point. This refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in a particle. Generally, the potential difference between a potential at a certain point and a reference potential (for example, ground potential) This is simply called potential or voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, potential may be read as voltage. In this specification, voltage may be read as potential.

[0026] In this specification, when an etching process is performed after a photolithography process, The mask formed in the photolithography process is removed.

[0027] (Embodiment 1) In this embodiment, a semiconductor device according to one embodiment of the present invention and a manufacturing method thereof will be described with reference to drawings. Please refer to the following for explanation.

[0028] 1A to 1C are a top view and a cross-sectional view of a transistor 50 included in a semiconductor device. The transistor 50 shown in FIG. 1 is a channel-etched transistor. FIG. 1(A) is a top view of a transistor 50, and FIG. 1(B) is a top view of a transistor 50 along the dashed line A- in FIG. FIG. 1(C) is a cross-sectional view taken along dashed line CD in FIG. 1(A). In FIG. 1A, for clarity, the substrate 11, the gate insulating film 17, the oxide insulating film 23, The oxide insulating film 25, the nitride insulating film 27, etc. are omitted.

[0029] The transistor 50 shown in FIG. 1B and FIG. 1C has a gate The electrode 15, the substrate 11, and the gate insulating film 17 formed on the gate electrode 15; The oxide semiconductor film 19 overlaps the gate electrode 15 via the insulating film 17. a pair of electrodes 20 and 21 in contact with the gate insulating film 17, an oxide semiconductor film 19, and a pair of The gate insulating film 28 on the electrodes 20 and 21 and the gate insulating film 28 and the gate insulating film 17 are The gate insulating film 28 has an oxide insulating film 23 and an oxide insulating film 29. 25 and a nitride insulating film 27. One of the pair of electrodes 20 and 21, An electrode 30 connected to the electrode 21 is formed on the gate insulating film 17. It functions as a pole.

[0030] The transistor 50 according to this embodiment has an oxide film between the gate electrode 15 and the gate electrode 29. A gate insulating film 19 is provided on the first transistor. The insulating film 28 overlaps with the oxide semiconductor film 19. Specifically, In the direction of FIG. 1(C), the end of the gate insulating film 28 is located on the pair of electrodes 20 and 21. In the channel width direction shown in FIG. 1, an end portion of the gate insulating film 28 is positioned outside the oxide semiconductor film 19. In addition, in the channel width direction shown in FIG. 1(C), the gate electrode 29 is The insulating film 28 faces the side surface of the oxide semiconductor film 19. As shown in FIG. In the channel width direction, the interface between the oxide semiconductor film 19 and the gate insulating film 28 and the gate The shortest distance between the interface of the insulating film 28 and the gate electrode 29 is 0.5 μm or more and 1.5 μm or less. That is, the shortest distance between the side surface of the oxide semiconductor film 19 and the gate electrode 29 is preferably below the The interval is preferably 0.5 μm or more and 1.5 μm or less. As a result, the gate electrode 2 Therefore, a short circuit between the oxide semiconductor film 9 and the oxide semiconductor film 19 can be prevented, and the yield can be increased. do.

[0031] The oxide semiconductor film 19 is typically an In-Ga oxide film, an In-Zn oxide film, or an In -M-Zn oxide film (M is Al, Ga, Y, Zr, La, Ce, or Nd) can be.

[0032] At the edge of the oxide semiconductor film that is processed by etching or the like, the oxide semiconductor film is damaged during the processing. As a result, defects are formed and the material is contaminated by impurities. By providing the trace, the edge of the oxide semiconductor film is activated and becomes an n-type (low resistance) Therefore, in this embodiment, the oxide semiconductor film 19 overlapping with the gate electrode 15 is The end portion of the n-type semiconductor layer is easily converted to n-type. When the n-type region is provided between a pair of electrodes 20 and 21, as in 19c and 19d, However, as shown in Fig. 1(C), As shown in the figure, in the channel width direction, a gate electrode 29 is disposed via a gate insulating film 28. When the gate electrode 29 faces the side surface of the oxide semiconductor film 19, the oxide semiconductor The occurrence of a parasitic channel on or near the side surface of the conductive film 19 is suppressed. A transistor with excellent electrical characteristics in which the drain current increases sharply with the threshold voltage. It becomes.

[0033] In addition, by providing the gate electrode 15 and the gate electrode 29, the electric field from the outside can be prevented. In order to have a function of shielding the gate electrode 29 from the substrate 11, the gate electrode 15, and the like, The charge of the charged particles or the like that is absorbed does not affect the oxide semiconductor film 19. As a result, (For example, -GBT (Gate Bias-Temperature) stress test) Degradation is suppressed and the on-current rise voltage fluctuation at different drain voltages is This effect can be achieved when the gate electrode 15 and the gate electrode 29 are This occurs in the case of one potential or another.

[0034] The BT stress test is a type of accelerated test that detects the transitions that occur during long-term use. It is possible to evaluate the characteristic changes (i.e., aging) of the transistor in a short time. The amount of change in the threshold voltage of a transistor before and after stress testing is used to examine reliability. This is an important indicator. The smaller the change in threshold voltage before and after the BT stress test, the Therefore, it can be said that this is a highly reliable transistor.

[0035] Next, a specific BT stress test method will be described. First, Next, the temperature of the substrate on which the transistor is formed (substrate temperature) is kept constant. a pair of electrodes functioning as a source and a drain of a transistor are kept at the same potential; A potential different from that of the pair of electrodes that function as the source and drain is applied to the gate electrode for a certain period of time. The substrate temperature may be set appropriately depending on the purpose of the test. Next, the substrate temperature is adjusted to the initial characteristic temperature. The electrical characteristics of the transistor are measured at the same temperature as when the initial Threshold voltage in the initial characteristics and threshold voltage in the electrical characteristics after BT stress test The difference between these values ​​can be obtained as the amount of variation in the threshold voltage.

[0036] In addition, the case where the potential applied to the gate electrode is higher than the potentials of the source and drain is called a positive potential. This is called a GBT (+GBT) stress test, in which the potential applied to the gate electrode is When the potential is lower than that of the negative GBT (-GBT) stress test, the The GBT stress test is conducted while irradiating the device with light. When the potential applied to the gate electrode is higher than the potentials of the source and drain, the photo-positive This is called a GBT stress test. Light is irradiated and the potential applied to the gate electrode is When the potential is lower than the drain potential, it is called a light negative GBT stress test.

[0037] Also, the gate electrode 15 and the gate electrode 29 are included. By making the potentials of the transistors 29 the same, the amount of variation in the threshold voltage is reduced. At the same time, the variation in the electrical characteristics of the transistor is reduced. In the SiO2 film, the area through which the carriers flow is larger in the film thickness direction, so the amount of carrier movement is As a result, the on-state current of the transistor 50 increases and the field effect mobility The field effect mobility is typically 20 cm 2 / V s or more.

[0038] In addition, in the gate insulating film 28 provided on the oxide semiconductor film 19, The oxide insulating film includes an oxide insulating film containing more oxygen than the oxygen satisfying the stoichiometric composition. When the oxide insulating film contains more oxygen than oxygen, part of the oxygen is released by heating. The oxide insulating film containing more oxygen than the theoretical composition is found to have oxygen atoms in the oxide film. The amount of oxygen released in terms of atoms is 1.0 × 10 18 atoms / cm 3 Above or 3.0 ×10 20 atoms / cm 3 The oxide insulating film is as described above.

[0039] In the gate insulating film 28, an oxide film containing more oxygen than the oxygen satisfying the stoichiometric composition is formed. When the oxide insulating film is included, a part of the oxygen contained in the gate insulating film 28 is transferred to the oxide semiconductor film 19. By this movement, oxygen vacancies in the oxide semiconductor film 19 can be reduced.

[0040] A transistor including an oxide semiconductor film having oxygen vacancies in the oxide semiconductor film is The threshold voltage tends to shift in the negative direction, and the device tends to have normally-on characteristics. This is because oxygen vacancies in the oxide semiconductor film generate charges, resulting in a decrease in resistance. If a transistor has normally-on characteristics, malfunctions are likely to occur during operation. Various problems may occur, such as high power consumption when not in operation. Stress testing increases the amount of variation in the electrical characteristics of transistors, typically the threshold voltage. There is a problem with this.

[0041] However, the transistor 50 described in this embodiment is provided over the oxide semiconductor film 19. The gate insulating film 28 to be formed is formed of an oxide having more oxygen than the oxygen satisfying the stoichiometric composition. As a result, oxygen contained in the gate insulating film 28 is transferred to the oxide semiconductor film 19. As a result, oxygen vacancies in the oxide semiconductor film 19 can be reduced. In addition, the transistor has a transistor with a turn-off characteristic. This makes it possible to reduce the amount of variation in the electrical characteristics of the transistor, typically the threshold voltage.

[0042] The configuration of the transistor 50 will be described in detail below.

[0043] There is no particular restriction on the material of the substrate 11, but it should be at least strong enough to withstand the subsequent heat treatment. It is necessary to have heat resistance. For example, glass substrate, ceramic substrate, quartz substrate, surface treatment substrate, etc. A fiber substrate or the like may be used as the substrate 11. Also, a single material such as silicon or silicon carbide may be used. Crystalline semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SO It is also possible to apply silicon-on-insulator (I) substrates, etc. These substrates on which semiconductor elements are provided may be used as the substrate 11. When a glass substrate is used as the substrate 11, the sixth generation (1500 mm x 1850 mm) 7th generation (1870mm x 2200mm), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 2800mm), 10th generation (2950mm x 3400mm) By using a large area substrate such as a 300 .mu.m display device, a large display device can be manufactured.

[0044] In addition, a flexible substrate is used as the substrate 11, and the transistor 50 is directly formed on the flexible substrate. Alternatively, a release layer may be provided between the substrate 11 and the transistor 50. The layer is separated from the substrate 11 after a semiconductor device is partially or completely completed thereon, and then the layer is removed. In this case, the transistor 50 is placed on a substrate having poor heat resistance. It can also be transferred to a plate or flexible substrate.

[0045] The gate electrode 15 may be made of aluminum, chromium, copper, tantalum, titanium, molybdenum, or titanium. or an alloy containing the above-mentioned metal elements, It can be formed by using an alloy of a combination of metal elements. The metal element may be selected from one or more of the following: The electrode 15 may have a single-layer structure or a laminated structure of two or more layers. Single layer structure of aluminum film, double layer structure of aluminum film laminated on titanium film, titanium nitride Two-layer structure with a titanium film laminated on a titanium nitride film, and two-layer structure with a tungsten film laminated on a titanium nitride film. A two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film. A two-layer structure in which a copper film is laminated on a titanium film, and a titanium film and an aluminum film are laminated on the titanium film. There are three-layer structures, such as a titanium film on top of the laminated aluminum. Choose from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium. Alternatively, a film of any of the elements mentioned above, an alloy film of a combination of a plurality of elements, or a nitride film may be used.

[0046] The gate electrode 15 is made of indium tin oxide or indium oxide containing tungsten oxide. oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide Indium tin oxide, indium zinc oxide, silicon oxide with titanium oxide A light-transmitting conductive material such as indium tin oxide can also be used. A laminate structure of the above-mentioned light-transmitting conductive material and the above-mentioned metal element may also be used.

[0047] The gate insulating film 17 is made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. Silicon oxide, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn metal An oxide, a silicon nitride, or the like may be used, and the insulating film is provided as a laminated layer or a single layer.

[0048] The gate insulating film 17 is made of hafnium silicate (HfSiO x ), nitrogen is added Hafnium Silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminium minate (HfAl x O y Nz ), hafnium oxide, yttrium oxide and other high- The use of k-materials can reduce the gate leakage of transistors.

[0049] The thickness of the gate insulating film 17 is 5 nm or more and 400 nm or less, and 10 nm or more and 300 nm or less. , or 50 nm or more and 250 nm or less.

[0050] The oxide semiconductor film 19 is typically an In-Ga oxide film, an In-Zn oxide film, or The films are In-M-Zn oxides (where M is Al, Ga, Y, Zr, La, Ce, or Nd). do.

[0051] When the oxide semiconductor film 19 is an In-M-Zn oxide, the sum of In and M is 100 In atomic %, the atomic ratio of In and M is 25 atomic % or more. M is less than 75 atomic %, or In is 34 atomic % or more and M is 66 atomic % or more. The concentration must be less than mic%.

[0052] The oxide semiconductor film 19 has an energy gap of 2 eV or more, 2.5 eV or more, or eV or more. In this way, by using an oxide semiconductor with a wide energy gap, The off-state current of the transistor 50 can be reduced.

[0053] The thickness of the oxide semiconductor film 19 is 3 nm or more and 200 nm or less, and preferably 3 nm or more and 100 nm or less. , or 3 nm or more and 50 nm or less.

[0054] The oxide semiconductor film 19 is an In-M-Zn oxide (wherein M is Al, Ga, Y, Zr, La, or Ce). In the case of In-M-Zn oxide, the sputtering temperature is The atomic ratio of the metal elements in the target preferably satisfies In≧M and Zn≧M. The atomic ratio of the metal elements in such a sputtering target is In:M:Zn=1:1: 1, In:M:Zn=1:1:1.2, and In:M:Zn=3:1:2 are preferred. The atomic ratio of the oxide semiconductor film 19 to be formed is determined by the above sputtering as an error. This includes a ±40% variation in the atomic ratio of metal elements contained in the target.

[0055] As the oxide semiconductor film 19, an oxide semiconductor film with low carrier density is used. For example, The oxide semiconductor film 19 has a carrier density of 1×10 17 pieces / cm 3 Below, 1×10 15 pieces / cm 3 Below, 1×10 13 pieces / cm 3 or less, or 1×10 11 pieces / cm 3 The following oxides A semiconductor film is used.

[0056] In addition, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use a material with an appropriate composition according to the required properties (e.g., the resultant mobility, threshold voltage, etc.). In order to obtain semiconductor characteristics of a transistor, the carrier density and impurity of the oxide semiconductor film 19 are By appropriately adjusting the concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. is preferred.

[0057] Note that the oxide semiconductor film 19 is an oxide semiconductor having a low impurity concentration and a low density of defect states. By using a thin film, it is possible to fabricate transistors with even better electrical properties. Here, it is preferable that the impurity concentration is low and the defect level density is low (there is little oxygen vacancy). High purity authentic or substantially high purity authentic. High purity authentic or substantially high purity authentic Some oxide semiconductors have a small number of carrier generation sources, so the carrier density can be reduced. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film may In this case, the threshold voltage is rarely negative (also called normally-on). In addition, a highly-purified intrinsic or substantially highly-purified intrinsic oxide semiconductor film has a high density of defect states. The trap density may also be low due to the low concentration of high purity intrinsic or substantially The high-purity intrinsic oxide semiconductor film has a significantly small off-state current and a channel width of 1×10 6 Even if the device has a channel length of 10 μm, the voltage between the source and drain electrodes ( In the drain voltage range of 1V to 10V, the off-state current is Below the measurement limit of Isa, that is, 1×10 -13 A characteristic of less than A can be obtained. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has low fluctuation in electrical characteristics. In some cases, the trapping resistance of the oxide semiconductor film is small, resulting in a highly reliable transistor. Charges trapped in the dummy level take a long time to dissipate, and act as if they were fixed charges. Therefore, the channel region is often formed in the oxide semiconductor film having a high density of trap states. The electrical characteristics of a transistor in which such a region is formed may become unstable. Examples include hydrogen, nitrogen, an alkali metal, or an alkaline earth metal.

[0058] Hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. Oxygen vacancies are formed in the lattice from which oxygen has been removed (or in the portion from which oxygen has been removed). When hydrogen enters the electron carrier, it can generate electrons. When it bonds with oxygen, which bonds with a metal atom, it may generate electrons, which act as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen has normally-on characteristics. It's easy to become.

[0059] For this reason, in the oxide semiconductor film 19, oxygen vacancies and hydrogen are reduced as much as possible. Specifically, the oxide semiconductor film 19 is preferably subjected to secondary ion mass spectrometry (SI MS: Secondary Ion Mass Spectrometry The hydrogen concentration is 2×10 20 atoms / cm 3 Below, 5 x 10 19 atoms / cm 3 Below, 1×10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 below, 1×10 18 atoms / cm 3 Below, 5 x 10 17 atoms / cm 3 Less than or equal to 1 ×10 16 atoms / cm 3 The following applies.

[0060] When the oxide semiconductor film 19 contains silicon or carbon, which is one of the group 14 elements, As a result, oxygen vacancies increase in the oxide semiconductor film 19, and the oxide semiconductor film 19 becomes n-type. The concentration of silicon and carbon in the semiconductor film 19 (concentration obtained by secondary ion mass spectrometry) ) to 2 x 10 18 atoms / cm 3 or less, or 2×10 17 atoms / cm 3 Below Below.

[0061] In addition, in the oxide semiconductor film 19, an alkali metal oxide was obtained by secondary ion mass spectrometry. The concentration of alkaline earth metals is 1×10 18 atoms / cm 3 Less than or equal to 2× 10 16 atoms / cm 3 The following are the oxides of alkali metals and alkaline earth metals. When it bonds with a semiconductor, carriers may be generated, increasing the off-state current of the transistor. For this reason, the alkali metal or alkaline earth metal of the oxide semiconductor film 19 It is preferable to reduce the concentration of the genus.

[0062] In addition, when nitrogen is contained in the oxide semiconductor film 19, electrons that serve as carriers are generated. The rear density increases and it becomes easier to make it n-type. As a result, A transistor having such an oxide semiconductor film tends to be normally on. It is preferable that the nitrogen content is reduced as much as possible. For example, in the secondary ion mass spectrometry, The resulting nitrogen concentration is 5×10 18 atoms / cm 3 It is preferable to do the following:

[0063] The oxide semiconductor film 19 may have a non-single crystal structure, for example. , CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor), polycrystalline structure, microcrystalline structure (described below), or Among non-single crystal structures, the amorphous structure has the highest defect level density and CA AC-OS has the lowest defect state density.

[0064] The oxide semiconductor film 19 may have, for example, an amorphous structure. For example, the atomic arrangement is disordered and does not have crystalline components. Or, the oxide film has an amorphous structure. For example, it has a completely amorphous structure and does not have any crystalline parts.

[0065] Note that the oxide semiconductor film 19 may be divided into an amorphous region, a microcrystalline region, a polycrystalline region, and a polycrystalline region. The film may be a mixed film having two or more of the following regions: a region of a CAAC-OS structure, a region of a single crystal structure, and a region of a crystalline structure. The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAA In some cases, the crystal structure may have two or more regions, either a C-OS region or a single crystal structure region. The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAA In some cases, the material has a layered structure of two or more regions, either a C-OS region or a single crystal structure region. be.

[0066] The pair of electrodes 20 and 21 are made of aluminum, titanium, chromium, nickel, copper, yttrium, elemental metals consisting of aluminum, zirconium, molybdenum, silver, tantalum, or tungsten; Or an alloy containing this as a main component is used as a single layer structure or a laminate structure. A single-layer structure of an aluminum film containing titanium, a two-layer structure of an aluminum film laminated on a titanium film, Two-layer structure with aluminum film laminated on tungsten film, copper-magnesium-aluminum Two-layer structure with copper film laminated on aluminum alloy film, two-layer structure with copper film laminated on titanium film, tungsten A two-layer structure in which a copper film is laminated on a titanium film, a titanium film or titanium nitride film, and a titanium film or In the method, an aluminum film or a copper film is laminated on a titanium nitride film, and a titanium film is further laminated on the aluminum film or a copper film. Or a three-layer structure forming a titanium nitride film, a molybdenum film or a molybdenum nitride film, and An aluminum film or a copper film is laminated on the molybdenum film or the molybdenum nitride film, and There is also a three-layer structure in which a molybdenum film or a molybdenum nitride film is formed on top of the above. Transparent conductive materials including indium oxide, tin oxide or zinc oxide may also be used.

[0067] The gate insulating film 28 is formed by stacking the oxide insulating film 23 and the oxide insulating film 2 3 and a nitride insulating film 27 in contact with the oxide insulating film 25. The gate insulating film 28 is made of an oxide film containing more oxygen than the oxygen required for the stoichiometric composition. Here, the oxide insulating film 23 is preferably an oxygen-permeable insulating film. The oxide insulating film 25 is formed by using an oxide insulating film having a stoichiometric composition. An oxide insulating film containing a large amount of oxygen is formed, and a nitride insulating film 27 is formed by blocking hydrogen and oxygen. A nitride insulating film is formed to block the insulating film.

[0068] The oxide insulating film 23 is an oxide insulating film that transmits oxygen. The oxygen desorbed from the oxide insulating film 25 provided on the oxide insulating film 23 is absorbed through the oxide insulating film 23. The oxide insulating film 23 can be moved to the oxide semiconductor film 19. It also functions as a film for reducing damage to the oxide semiconductor film 19 when the oxide insulating film 25 is formed. do.

[0069] The oxide insulating film 23 has a thickness of 5 nm or more and 150 nm or less, or 5 nm or more and 50 Silicon oxide, silicon oxynitride, etc., having a thickness of 1 nm or less can be used. In the above, a silicon oxynitride film is a film whose composition contains more oxygen than nitrogen. A silicon nitride oxide film is a film that contains more nitrogen than oxygen. Point.

[0070] In addition, the oxide insulating film 23 preferably has a small number of defects. Resonance (ESR) measurements revealed that g = 2.001 originates from silicon dangling bonds. The spin density of the signal that appears is 3×10 17 spins / cm 3 It is preferable that: This is because if the oxide insulating film 23 contains a large number of defects, oxygen will be bonded to the defects. This is because the amount of oxygen transmitted through the oxide insulating film 23 decreases.

[0071] In addition, the number of defects at the interface between the oxide insulating film 23 and the oxide semiconductor film 19 is small. Preferably, typically, the oxide semiconductor film 19 has a defect-derived g=1 The spin density of the signal appearing at .93 is 1×10 17 spins / cm 3 Further detection It is preferably equal to or lower than the lower limit.

[0072] Note that in the oxide insulating film 23, all of the oxygen that has entered the oxide insulating film 23 from the outside is In some cases, the oxide insulating film 23 may move to the outside. In some cases, part of the oxygen remains in the oxide insulating film 23. As oxygen enters the oxide insulating film 23, the oxygen contained in the oxide insulating film 23 flows out of the oxide insulating film 23. The movement of oxygen may cause the movement of oxygen in the oxide insulating film 23 in some cases.

[0073] An oxide insulating film 25 is formed so as to be in contact with the oxide insulating film 23. The fifth embodiment is formed using an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. The oxide insulating film containing more oxygen than the stoichiometric composition is heated to remove the oxygen. A part of the element is released. The oxide insulating film contains more oxygen than the oxygen that satisfies the stoichiometric composition. In TDS analysis, the amount of oxygen released was 1.0 x 10 18 atoms / cm 3 or more, or 3.0×10 20 atoms / cm 3 The oxide insulating film is as described above. do.

[0074] The oxide insulating film 25 has a thickness of 30 nm to 500 nm, or 50 nm or more. A silicon oxide film, a silicon oxynitride film, or the like having a thickness of 400 nm or less can be used.

[0075] In addition, it is preferable that the oxide insulating film 25 has a small amount of defects. Therefore, the spin of the signal at g=2.001 originating from the silicon dangling bond Density is 1.5×10 18 spins / cm 3 Less than or even 1×10 18 spins / cm 3 Note that the oxide insulating film 25 has a thickness smaller than that of the oxide insulating film 23. Since the oxide insulating film 23 is separated from the oxide semiconductor film 19, the oxide insulating film 23 may have a higher defect density. stomach.

[0076] The nitride insulating film 27 has at least a blocking effect against hydrogen and oxygen. It has a blocking effect against oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc.

[0077] The nitride insulating film 27 has a thickness of 50 nm to 300 nm, or 100 nm or less. Silicon nitride film, silicon oxynitride film, aluminum nitride film, nitride film, etc., up to 200 nm Examples include aluminum oxide films.

[0078] In place of the nitride insulating film 27, an oxide insulating film having a blocking effect against oxygen, hydrogen, water, etc. may be used. An oxide insulating film having a blocking effect against oxygen, hydrogen, water, and the like may be provided. Examples of the thin-film include an aluminum oxide film, an aluminum oxynitride film, a gallium oxide film, and a gallium oxynitride film. yttrium oxide film, yttrium oxynitride film, hafnium oxide film, yttrium oxynitride film Hafnium film, etc.

[0079] The gate electrode 29 and the electrode 30 are formed using a light-transmitting conductive film. The film is made of indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, Lead oxide, indium oxide with titanium oxide, indium tin oxide with titanium oxide, Indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, and silicon oxide are added. Examples include indium tin oxide with added indium tin.

[0080] Next, a method for manufacturing the transistor 50 shown in FIG. 1 will be described with reference to FIG. 2(A), (C), (E), (G), and (I) are the transistors shown in FIG. 1(B), respectively. 2(B), (D), and (F) show the fabrication process of the sintered semiconductor laser 50 in a cross-sectional view in the channel length direction. ), (H), and (J) are the channel width directions of the transistor 50 shown in FIG. The fabrication steps are shown in cross-sectional views.

[0081] As shown in FIG. 2(A) and FIG. 2(B), a gate electrode 15 is formed on a substrate 11. On the gate electrode 15, an insulating film 16 that will later become a gate insulating film 17 is formed. Next, An oxide semiconductor film 19 is formed thereon.

[0082] Here, a glass substrate is used as the substrate 11.

[0083] The method of forming the gate electrode 15 will be described below. First, the sputtering method, the CVD method, and the evaporation method are used. A conductive film is formed by deposition or the like, and a photolithography process is performed on the conductive film using a first photomask. A mask is formed by a etching process. Next, a part of the conductive film is etched using the mask. This forms the gate electrode 15. After that, the mask is removed.

[0084] The gate electrode 15 may be formed by electrolytic plating, printing, ink jet printing, or the like instead of the above-mentioned method. It may be formed by a jet method or the like.

[0085] Here, a tungsten film having a thickness of 100 nm is formed by sputtering. A mask is formed by a photolithography process, and a tungsten film is formed using the mask. The gate electrode 15 is formed by dry etching.

[0086] The insulating film 16 is formed by a method such as sputtering, CVD, or vapor deposition.

[0087] The insulating film 16 is a silicon oxide film, a silicon oxynitride film, or a silicon nitride oxide film. In the case of forming the silicon-containing film, a deposition gas containing silicon and an oxidizing gas are used as the source gas. Representative examples of deposition gases containing silicon include silane, disilane, trisilane, and Examples of oxidizing gases include oxygen, ozone, nitrous oxide, and dioxygen. Examples include nitrogen oxides.

[0088] When a gallium oxide film is formed as the insulating film 16, MOCVD (Metal Orga The film is formed using the NIC Chemical Vapor Deposition method. This can be done.

[0089] A method for forming the oxide semiconductor film 19 will be described below. An oxide semiconductor film that will become the conductive film 19 is formed. Next, a second photoconductor film is formed on the oxide semiconductor film. After forming a mask by a photolithography process using a mask, the mask is used to By etching a part of the nitride semiconductor film, as shown in FIG. 2(A) and FIG. 2(B), The element-isolated oxide semiconductor film 19 is formed, and then the mask is removed.

[0090] The oxide semiconductor film that will become the oxide semiconductor film 19 later can be formed by a sputtering method, a coating method, a pulsation method, or the like. The thin film can be formed by using a laser deposition method, a laser ablation method, or the like.

[0091] When an oxide semiconductor film is formed by a sputtering method, a power source for generating plasma The device may be an RF power supply device, an AC power supply device, a DC power supply device, or the like, as appropriate.

[0092] The sputtering gas is a rare gas (typically argon), oxygen gas, or a rare gas and In the case of a mixed gas of rare gas and oxygen, the rare gas is It is preferable to increase the gas ratio of oxygen.

[0093] The target may be appropriately selected depending on the composition of the oxide semiconductor film to be formed. .

[0094] In order to obtain a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor film, Not only is it necessary to evacuate the inside of the chamber to a high vacuum, but it is also necessary to highly purify the sputtering gas. The oxygen and argon gases used have dew points of -40°C or less, -80°C or less, and -100°C or less. By using a gas that has been highly purified to a temperature of −120° C. or lower, the oxide semiconductor film is This can prevent as much of the waste as possible from being taken in.

[0095] Here, an In-Ga-Zn oxide target (In:Ga:Zn=3:1:2) was used. A 35-nm-thick In-Ga-Zn oxide film was deposited as an oxide semiconductor film by sputtering. Next, a mask is formed over the oxide semiconductor film, and a part of the oxide semiconductor film is By selectively etching, the oxide semiconductor film 19 is formed.

[0096] Next, as shown in FIG. 2(C) and FIG. 2(D), a pair of electrodes 20 and 21 are formed.

[0097] The method for forming the pair of electrodes 20 and 21 will be described below. First, the sputtering method and the CVD method are used. A conductive film is formed by a deposition method, a vapor deposition method, or the like. Next, a photolithography method is performed on the conductive film using a third photomask. A mask is formed by a lithography process. Then, the conductive film is etched using the mask. This forms a pair of electrodes 20 and 21. After this, the mask is removed.

[0098] Here, a tungsten film with a thickness of 50 nm and a copper film with a thickness of 300 nm are sputtered in this order. Next, a mask is formed on the copper film by a photolithography process. Next, the copper film is etched using the mask by wet etching. , Sci-Fi 6 The tungsten film is etched by dry etching using During the etching, fluoride is formed on the surface of the copper film. Therefore, the diffusion of copper elements from the oxide semiconductor film 19 can be reduced, and the copper concentration in the oxide semiconductor film 19 can be reduced. Cut.

[0099] Next, as shown in FIG. 2(E) and FIG. 2(F), the oxide semiconductor film 19 and the pair of electrodes 2 0, 21, an oxide insulating film 22 which will later become an oxide insulating film 23, and an oxide insulating film 2 Then, an oxide insulating film 24 which will become the layer 5 is formed.

[0100] After the oxide insulating film 22 is formed, the oxide insulating film 2 is continuously removed without being exposed to the air. After the oxide insulating film 22 is formed, the source gas The oxide insulating film 24 is continuously formed by adjusting one or more of the flow rate, pressure, high frequency power, and substrate temperature. By forming the oxide insulating film 22 and the oxide insulating film 24 in the In addition, the impurity concentration in the oxide insulating film 24 can be reduced. The amount of oxygen vacancies in the oxide semiconductor film 19 can be reduced by transferring the oxygen to the oxide semiconductor film 19. It is possible.

[0101] The oxide insulating film 22 is placed in a vacuum-evacuated processing chamber of a plasma CVD apparatus. The substrate is maintained at a temperature of 280° C. or higher and 400° C. or lower, and a source gas is introduced into the processing chamber. The pressure applied is between 20 Pa and 250 Pa, or between 100 Pa and 250 Pa. Depending on the conditions of supplying high frequency power to the electrodes installed in the treatment chamber, a silicon oxide film or an oxide A silicon nitride film can be formed.

[0102] As the source gas for the oxide insulating film 22, a deposition gas containing silicon and an oxidizing gas are used. Representative examples of deposition gases containing silicon include silane, disilane, Examples of oxidizing gases include trisilane, fluorinated silane, etc. Examples of oxidizing gases include oxygen, ozone, and nitrous oxide. , nitrogen dioxide, etc.

[0103] By using the above conditions, an oxide insulating film that transmits oxygen is formed as the oxide insulating film 22. In addition, by providing the oxide insulating film 22, the oxide insulating film to be formed later can be formed. In the formation step of 25, damage to the oxide semiconductor film 19 can be reduced.

[0104] The oxide insulating film 22 is placed in a processing chamber of a plasma CVD apparatus that has been evacuated to a vacuum. The substrate is maintained at a temperature of 280° C. or higher and 400° C. or lower, and a source gas is introduced into the processing chamber. The pressure in the treatment chamber is set to 100 Pa or more and 250 Pa or less, and high-frequency power is applied to the electrode installed in the treatment chamber. Depending on the conditions for supplying the oxygen, the oxide insulating film 22 may be a silicon oxide film or a silicon oxynitride film. A silicon film can be formed.

[0105] Under the film formation conditions, by setting the substrate temperature to the above temperature, the bonding strength between silicon and oxygen As a result, the oxide insulating film 22 is oxygen-permeable, dense, and hard. Oxide insulating film, typically, etching rate for 0.5% by weight hydrofluoric acid at 25°C Silicon oxide film or silicon oxynitride film with a deposition rate of 10 nm / min or less, or 8 nm / min or less A coating can be formed.

[0106] In addition, since the oxide insulating film 22 is formed while heating, the oxide semiconductor Hydrogen, water, etc. contained in the oxide semiconductor film 19 can be desorbed. The hydrogen reacts with oxygen radicals generated in the plasma to form water. During the film formation process, the substrate is heated, and the water generated by the combination of oxygen and hydrogen is That is, the oxide insulating film 22 is formed by the plasma CVD method. By forming the oxide semiconductor film 19, the amount of water and hydrogen contained in the oxide semiconductor film 19 can be reduced. do.

[0107] In addition, since heating is performed in the process of forming the oxide insulating film 22, the oxide semiconductor film 19 The heating time in an exposed state is short, and oxygen is released from the oxide semiconductor film by heat treatment. That is, the amount of oxygen vacancies in the oxide semiconductor film can be reduced. This can be done.

[0108] Furthermore, by setting the pressure in the treatment chamber to 100 Pa or more and 250 Pa or less, the oxide insulating film The water content in the 23 is reduced, which reduces the variation in the electrical characteristics of the transistor 50. It is possible to reduce the threshold voltage and suppress the fluctuation of the threshold voltage.

[0109] In addition, by setting the pressure in the processing chamber to 100 Pa or more and 250 Pa or less, the oxide insulating film 22 When the oxide semiconductor film 19 is formed, damage to the oxide semiconductor film 19 can be reduced. In particular, the amount of oxygen vacancies in the oxide insulating film 22 can be reduced. Alternatively, the deposition temperature of the oxide insulating film 24 to be formed later is increased, typically to 220° C. or higher. By setting the temperature at a low temperature, part of oxygen contained in the oxide semiconductor film 19 is released, and oxygen vacancies are formed. In addition, in order to improve the reliability of the transistor, the oxide insulating film 2 to be formed later is By using the film formation conditions for reducing the amount of defects in 4, the amount of oxygen desorption is easily reduced. As a result, it may be difficult to reduce oxygen vacancies in the oxide semiconductor film 19. The pressure in the processing chamber is set to 100 Pa or more and 250 Pa or less during the formation of the oxide insulating film 22. By reducing damage to the oxide semiconductor film 19 caused by the oxidation of the oxide insulating film 24, the oxide semiconductor film 19 can be easily oxidized. The oxygen vacancies in the oxide semiconductor film 19 can be reduced by the amount of oxygen released.

[0110] In addition, by increasing the amount of oxidizing gas to 100 times or more the amount of deposition gas containing silicon, It is possible to reduce the hydrogen content in the oxide insulating film 22. Since the amount of hydrogen mixed into the semiconductor film 19 can be reduced, the threshold voltage of the transistor can be reduced. The shift can be suppressed.

[0111] Here, the oxide insulating film 22 is made of silane at a flow rate of 30 sccm and 4000 sccm. The source gas was nitrous oxide with a flow rate of 1.0 cm, the pressure in the processing chamber was 200 Pa, and the substrate temperature was 220°C. A 27.12MHz high-frequency power source was used to supply 150W of high-frequency power to the parallel plate electrodes. A silicon oxynitride film with a thickness of 50 nm is formed by the plasma CVD method under the following conditions. In this manner, a silicon oxynitride film through which oxygen is transmitted can be formed.

[0112] The oxide insulating film 24 is placed in a vacuum-evacuated processing chamber of a plasma CVD apparatus. The substrate is kept at a temperature of 180°C to 280°C or 200°C to 240°C. The raw material gas is introduced into the processing chamber to keep the pressure in the processing chamber at 100 Pa or more and 250 Pa or less, or 00 Pa to 200 Pa, and 0.17 W / cm2 applied to the electrodes installed in the treatment chamber 2 End 0.5W / cm 2 or less than 0.25W / cm 2More than 0.35W / cm 2 High frequency below Depending on the conditions of power supply, a silicon oxide film or a silicon oxynitride film is formed.

[0113] As the source gas of the oxide insulating film 24, a deposition gas containing silicon and an oxidizing gas are used. Representative examples of deposition gases containing silicon include silane, disilane, Examples of oxidizing gases include trisilane, fluorinated silane, etc. Examples of oxidizing gases include oxygen, ozone, and nitrous oxide. , nitrogen dioxide, etc.

[0114] The oxide insulating film 24 is formed under the conditions of high frequency irradiation with the above power density in a processing chamber at the above pressure. Supplying microwave power increases the efficiency of decomposing the source gas in the plasma, and oxygen radicals are increased. As the oxidation of the source gas proceeds, the oxygen content in the oxide insulating film 25 becomes stoichiometric. On the other hand, in the film formed at the substrate temperature, the composition of silicon and oxygen is Since the bonding strength is weak, some of the oxygen in the film is released by the heat treatment in the subsequent process. It contains more oxygen than the stoichiometric composition, and some of the oxygen is released by heating. In addition, the oxide insulating film 2 can be formed over the oxide semiconductor film 19. Therefore, in the process of forming the oxide insulating film 24, the oxide insulating film 2 2 serves as a protective film for the oxide semiconductor film 19. As a result, damage to the oxide semiconductor film 19 is prevented. Therefore, the oxide insulating film 24 can be formed by using high-frequency power with high power density while reducing the Cut.

[0115] Here, the oxide insulating film 24 is made of silane at a flow rate of 200 sccm and SiO at a flow rate of 4000 s. The source gas was nitrous oxide (N2O) at 1.0 ccm, the pressure in the processing chamber was 200 Pa, and the substrate temperature was 220° C. A 27.12MHz high-frequency power source was used to apply 1500W of high-frequency power to the parallel plate electrodes. A silicon oxynitride film with a thickness of 400 nm is formed by the supplied plasma CVD method. The plasma CVD device has an electrode area of ​​6000 cm 2 Parallel plate plasma CVD The power supplied to the device is converted to power per unit area (power density) of 0.25W. / cm 2 It is.

[0116] Next, a heat treatment is performed. The temperature of the heat treatment is typically 150° C. or higher and 400° C. or lower. , 300°C or higher and 400°C or lower, or 320°C or higher and 370°C or lower.

[0117] The heat treatment may be performed using an electric furnace, an RTA (Rapid Thermal Anneal) device, etc. By using an RTA device, it is possible to measure the temperature above the strain point of the substrate for a short period of time. Therefore, the heat treatment time can be shortened.

[0118] Heat treatment is carried out using nitrogen, oxygen, or ultra-dry air (water content less than 20 ppm, less than 1 ppm, or 10 ppb or less of air) or in an atmosphere of rare gas (argon, helium, etc.) In addition, the nitrogen, oxygen, ultra-dry air, or rare gas does not contain hydrogen, water, etc. It is preferable.

[0119] By the heat treatment, part of oxygen contained in the oxide insulating film 24 is transferred to the oxide semiconductor film 19. As a result, oxygen vacancies in the oxide semiconductor film 19 can be reduced. As a result, the amount of oxygen vacancies in the oxide semiconductor film 19 can be further reduced.

[0120] In the case where the oxide insulating film 22 and the oxide insulating film 24 contain water, hydrogen, or the like, Then, a nitride insulating film 26 having a blocking function is formed and a heat treatment is performed. Water, hydrogen, and the like contained in the oxide insulating film 22 and the oxide insulating film 24 are absorbed in the oxide semiconductor film 19. However, the oxidation of the oxide semiconductor film 19 is caused by the heating. It is possible to remove water, hydrogen, and the like contained in the oxide insulating film 22 and the oxide insulating film 24. This reduces the variation in the electrical characteristics of the transistor 50 and suppresses the variation in the threshold voltage. It can be controlled.

[0121] The oxide insulating film 24 is formed on the oxide insulating film 22 while being heated. By moving oxygen to the oxide semiconductor film 19, oxygen vacancies contained in the oxide semiconductor film 19 are reduced. Therefore, the heat treatment may not be performed.

[0122] Here, heat treatment is performed in a nitrogen and oxygen atmosphere at 350° C. for 1 hour.

[0123] In addition, when forming the pair of electrodes 20 and 21, the conductive film is etched to form an oxide semiconductor. The oxide semiconductor film 19 is damaged, and the back channel of the oxide semiconductor film 19 ( In this case, oxygen vacancies occur on the surface opposite to the surface facing the gate electrode 15. The oxide insulating film 24 contains more oxygen than the oxygen that satisfies the stoichiometric composition. By applying this method, oxygen vacancies that occurred on the back channel side due to heat treatment can be repaired. This can reduce defects in the oxide semiconductor film 19. Therefore, the reliability of the transistor 50 can be improved.

[0124] Next, the nitride insulating film 26 is formed by sputtering, CVD or the like.

[0125] When the nitride insulating film 26 is formed by the plasma CVD method, the The substrate placed in the evacuated processing chamber is heated to 300°C or higher and 400°C or lower, or 320°C or lower. A temperature of 370° C. or less is preferable because a dense nitride insulating film can be formed.

[0126] When a silicon nitride film is formed as the nitride insulating film 26 by the plasma CVD method, the silicon It is preferable to use a deposition gas containing carbon, nitrogen, and ammonia as the source gas. By using a small amount of ammonia as the source gas compared to nitrogen, ammonia is generated in the plasma. Ni dissociates and generates active species. The active species are contained in the deposition gas containing silicon. The bond between silicon and hydrogen and the triple bond between nitrogen are broken. As a result, silicon and nitrogen The bonding of silicon and hydrogen is promoted, resulting in fewer defects and a dense silicon nitride. On the other hand, the amount of ammonia relative to nitrogen in the source gas is If the amount is too large, the decomposition of the deposition gas containing silicon and nitrogen does not proceed, and silicon and hydrogen Bonds remain, resulting in a silicon nitride film with increased defects and a rough surface. For these reasons, the flow rate ratio of nitrogen to ammonia in the raw gas is set to 5 to 50. Alternatively, it is preferable to set it to 10 or more and 50 or less.

[0127] Here, silane at a flow rate of 50 sccm and 5000 The source gases were nitrogen at a flow rate of 100 sccm and ammonia at a flow rate of 100 sccm. The pressure in the processing chamber was The pressure was set at 100 Pa, the substrate temperature was set at 350°C, and a 27.12 MHz high frequency power source was used for 1000 The nitride insulating film 26 and the The plasma CVD device has an electrode area of ​​1000 nm. 6000cm 2 This is a parallel plate type plasma CVD device, and the power supplied is divided into This is converted to power per unit area (power density) of 1.7 x 10 -1 W / cm 2 It is.

[0128] Through the above steps, the oxide insulating film 22, the oxide insulating film 24, and the nitride insulating film 26 are formed. It can be achieved.

[0129] Next, a heat treatment may be performed. The temperature of the heat treatment is typically 150° C. or higher and 40° C. or lower. The temperature must be below 0°C, between 300°C and 400°C, or between 320°C and 370°C.

[0130] Next, a fourth photomask is used to form a photoresist film on the nitride insulating film 26. After forming a mask, the oxide insulating film 22, the oxide insulating film 24, and The nitride insulating film 26 is partially etched to form the oxide insulating film 23 and the oxide insulating film 2 5 and a gate insulating film 28 having a nitride insulating film 27 is formed.

[0131] As shown in FIG. 2G, in the channel length direction, The end of the gate insulating film 28 is located, and as shown in FIG. The oxide insulating film 28 is formed so that an end of the gate insulating film 28 is located outside the oxide semiconductor film 19. The film 22, the oxide insulating film 24, and the nitride insulating film 26 are each etched. As a result, In addition, a part or a small part of the insulating film 16 can be formed. When at least the surface region is formed of the oxide insulating film 23, etching of the oxide insulating film 23 At the same time, a part of the insulating film 16 is also etched. 7 is formed.

[0132] In this etching process, as shown in FIG. 2(H), The shortest distance between the side surface of the oxide semiconductor film 19 and the side surface of the gate insulating film 28 is 0.5 μm. As a result, the gate electrode 29 and the oxide film 28 formed later are Therefore, it is possible to prevent a short circuit with the nitride semiconductor film 19, and the yield can be increased.

[0133] Next, as shown in FIG. 2(I) and FIG. 2(J), a gate electrode 29 and an electrode 30 are formed. The method of forming the gate electrode 29 and the electrode 30 will be described below. First, a sputtering method is used. Then, a conductive film is formed by a CVD method, a vapor deposition method, or the like, and a fifth photomask is used to form a film on the conductive film. A mask is formed by a photolithography process. Next, a part of the conductive film is removed using the mask. Etching is performed to form the gate electrode 29 and the electrode 30. After this, the mask is removed.

[0134] As shown in FIG. 2(I), a gate insulating film 28 is formed on the gate insulator 28 in the channel length direction. The gate electrode 29 and the electrode 30 are formed so that the end of the gate electrode 29 is located. As shown in (J), in the channel width direction, a gate electrode 29 is disposed via a gate insulating film 28. In other words, the oxide semiconductor film 19 is disposed so as to face the side surface of the oxide semiconductor film 19. The gate electrode 29 and the electrode 30 are formed so that the end of the gate electrode 29 is located on the outer side. do.

[0135] Through the above steps, the transistor 50 can be manufactured.

[0136] In addition, in FIG. 2(G) and FIG. 2(H), after forming the gate insulating film 28, A mask is formed by a lithography process, and a part of the gate insulating film 17 is etched to form a gate An opening 28c is formed to expose a part of the electrode 15. Next, the gate A gate electrode 29a may be formed so as to be connected to the electrode 15. As a result, the gate electrode 15 and a gate electrode 29a are connected to each other. 3(A) to 3(C). That is, the gate electrode 15 and the gate electrode 29a are set to the same potential. It can be said that:

[0137] In addition, as in the transistor 52 shown in FIG. In this case, the end of the gate electrode 29b may be formed to be located outside the gate electrode 15. Typically, as shown in FIG. 4C, the width of the gate electrode 15 in the channel width direction is An end of the gate electrode 29b is located outside the end.

[0138] The transistor shown in this embodiment has gate electrodes 29, 29 When the gate insulating film 28 is interposed between the gate electrodes 29a and 29b and the side surfaces of the oxide semiconductor film 19, the gate electrodes 29a and 29b are Due to the influence of the electric field of the gate electrodes 29, 29a, and 29b, the side surface or the As a result, the drain current at the threshold voltage is reduced. This results in a transistor with excellent electrical characteristics, with a steep rise in in-current.

[0139] In addition, the oxide semiconductor film having a stoichiometric composition is overlapped with the oxide semiconductor film serving as a channel region. By forming an oxide insulating film that contains more oxygen than oxygen that is As a result, oxygen contained in the oxide semiconductor film can be transferred to the oxide semiconductor film. The defect content can be reduced.

[0140] In this embodiment, the plasma CV is performed while heating the substrate to a temperature of 280° C. or higher and 400° C. or lower. In order to form an insulating film that becomes the gate insulating film 28 by using the method D, In addition, in this step, hydrogen, water, and the like that are present in the oxide semiconductor film can be released. The heating time in the exposed state is short, and the temperature of the oxide semiconductor during the heat treatment is 400°C. Even if the threshold voltage is changed by 100 V or less, the threshold voltage change amount is the same as that of a transistor heat-treated at a high temperature. As a result, the cost of the semiconductor device can be reduced. .

[0141] As described above, in a semiconductor device using an oxide semiconductor, the parasitic A semiconductor device in which the formation of a channel is suppressed can be obtained. In this way, a semiconductor device having improved electrical characteristics can be obtained.

[0142] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0143] (Embodiment 2) In this embodiment mode, a semiconductor device different from that in Embodiment Mode 1 and a manufacturing method thereof will be described with reference to drawings. In this embodiment, the protective film is not separated for each transistor. This differs from the first embodiment.

[0144] 5A to 5C are a top view and a cross-sectional view of a transistor 60 included in a semiconductor device. The transistor 60 shown in FIG. 5 is a channel-etched transistor. 5(A) is a top view of transistor 60, and FIG. 5(B) is a top view of transistor 60 along dashed line A- in FIG. FIG. 5(C) is a cross-sectional view taken along dashed line CD in FIG. 5(A). In FIG. 5A, for clarity, the substrate 11, the gate insulating film 31, the oxide insulating film 33, The oxide insulating film 35, the nitride insulating film 37, etc. are omitted.

[0145] The transistor 60 shown in FIG. 5B and FIG. 5C has a gate The electrode 15, the substrate 11, and the gate insulating film 31 formed on the gate electrode 15; The oxide semiconductor film 19 overlaps the gate electrode 15 via the insulating film 31. a pair of electrodes 20 and 21 in contact with the gate insulating film 31, an oxide semiconductor film 19, and a pair of A gate insulating film 38 is formed on the electrodes 20 and 21, and a gate electrode 39 is formed on the gate insulating film 38. The gate insulating film 38 is made of the oxide insulating film 33, the oxide insulating film 35, and the nitride insulating film. The electrode 37 is connected to one of the pair of electrodes 20 and 21, the electrode 21 in this case. The electrode 40 is formed on the nitride insulating film 37. The electrode 40 functions as a pixel electrode.

[0146] The transistor 60 in this embodiment has an oxide film between the gate electrode 15 and the gate electrode 39. The gate insulating film 38 has a plurality of openings. Typically, the gate insulating film 38 is formed by sandwiching the oxide semiconductor film 19 in the channel width direction. The openings 38a and 38b are formed in the gate insulating film 31. An opening is also formed in the gate insulating film 38. In the channel width direction shown in FIG. The gate insulating film 31 and the openings 38a, 38b provided in the gate insulating film 38 and the gate insulating film A gate electrode 39 is formed on the insulating film 38. In the openings 38a and 38b, The openings 38a and 38b are connected to the gate electrode 15 and the gate electrode 39. In this case, the gate electrode 39 faces a side surface of the oxide semiconductor film 19. In this way, the side surface of the oxide semiconductor film 19 and the openings 38 a and 38 b are It is preferable that the shortest distance between the sides is 0.5 μm or more and 1.5 μm or less. The openings 38a and 38b are formed by insulating the oxide semiconductor film 19 with the side closest to the side of the oxide semiconductor film 19. The distance between the side surface of the semiconductor film 19 is preferably 0.5 μm or more and 1.5 μm or less. That is, the shortest distance between the side surface of the oxide semiconductor film 19 and the gate electrode 39 is 0.5 μm or more. As a result, the thickness of the gate electrode 39 and the oxide semiconductor film 19 is preferably 0.5 μm or less. Therefore, it is possible to prevent short circuits and increase the yield.

[0147] At the edge of the oxide semiconductor film that is processed by etching or the like, the oxide semiconductor film is damaged during the processing. As a result, defects are formed and the material is contaminated by impurities. By providing the trace, the edge of the oxide semiconductor film is easily activated, and the n-type Therefore, in the present embodiment, the oxide semiconductor layer overlapping the gate electrode 15 is The end of the conductive film 19 is easily converted to n-type. If it is provided between 20 and 21, the n-type region becomes a carrier path, However, as shown in FIG. 5(C), the raw channel is formed in the channel width direction. The gate electrode 39 faces a side surface of the oxide semiconductor film 19 via a gate insulating film 38. Then, due to the influence of the electric field of the gate electrode 39, the side surface of the oxide semiconductor film 19 or its vicinity As a result, the drain current at the threshold voltage is reduced. This results in a transistor with a steep current rise and excellent electrical characteristics.

[0148] In addition, by having the gate electrode 15 and the gate electrode 39 connected to each other, In order to have a function of shielding an electric field from the gate electrode, Charges of charged particles or the like provided on the oxide semiconductor film 39 do not affect the oxide semiconductor film 19. This suppresses deterioration during stress tests (e.g., -GBT stress tests) and allows for This makes it possible to suppress fluctuations in the on-state current rise voltage at the on-state voltage.

[0149] In addition, by having the gate electrode 15 and the gate electrode 39 connected to each other, the threshold voltage This reduces the variation in the electrical characteristics of multiple transistors. is reduced to

[0150] In addition, in the gate insulating film 38 provided on the oxide semiconductor film 19, The oxide insulating film includes an oxide insulating film containing more oxygen than the oxygen satisfying the stoichiometric composition. When the oxide insulating film contains more oxygen than oxygen, part of the oxygen is released by heating. The oxide insulating film containing more oxygen than the theoretical composition is found to have oxygen atoms in the oxide film. The amount of oxygen released in terms of atoms is 1.0 × 1018 atoms / cm 3 Above or 3.0 ×10 20 atoms / cm 3 The oxide insulating film is as described above.

[0151] In the gate insulating film 38, an oxide film containing more oxygen than the oxygen satisfying the stoichiometric composition is formed. When the oxide insulating film is included, a part of the oxygen contained in the gate insulating film 38 is transferred to the oxide semiconductor film 19. As a result, oxygen vacancies in the oxide semiconductor film 19 can be reduced. As a result, the amount of oxygen vacancies in the oxide semiconductor film 19 can be further reduced.

[0152] A transistor including an oxide semiconductor film having oxygen vacancies in the oxide semiconductor film is The threshold voltage tends to shift in the negative direction, and the device tends to have normally-on characteristics. This is because oxygen vacancies in the oxide semiconductor film generate charges, resulting in a decrease in resistance. If a transistor has normally-on characteristics, malfunctions are likely to occur during operation. Various problems may occur, such as high power consumption when not in operation. The stress test increases the variation of the electrical characteristics of the transistor, typically the threshold voltage. There is a problem that...

[0153] However, the transistor 60 described in this embodiment is provided over the oxide semiconductor film 19. The gate insulating film 38 to be formed is formed of an oxide having more oxygen than the oxygen satisfying the stoichiometric composition. As a result, oxygen vacancies in the oxide semiconductor film 19 can be reduced. This results in a transistor with normally-off characteristics. As a result, the amount of change in the electrical characteristics of the transistor, typically the threshold voltage, can be reduced. do.

[0154] The details of the configuration of the transistor 60 will be described below. Explanation of the symbol configuration will be omitted.

[0155] The gate insulating film 31 is made of the same material as the gate insulating film 17 shown in the first embodiment. It is possible.

[0156] The gate insulating film 38 is formed by the oxide insulating film 33 and the oxide insulating film 3 3 and a nitride insulating film 37 in contact with the oxide insulating film 35. The oxide insulating film 33 is formed using a material similar to that of the oxide insulating film 23 in Embodiment 1 as appropriate. The oxide insulating film 35 can be formed using a material similar to that of the oxide insulating film 25 in Embodiment 1. The nitride insulating film 37 can be formed of the nitride insulating film 2 shown in Embodiment 1. The same materials as those in 7 can be used as appropriate.

[0157] The gate electrode 39 and the electrode 40 are the same as the gate electrode 29 and the electrode 30 shown in the first embodiment. The above materials can be used as appropriate.

[0158] Next, a method for manufacturing the transistor 60 shown in FIG. 5 will be described with reference to FIGS. 6(A) and 6(C) are diagrams showing the transistor 60 shown in FIG. The fabrication process is shown in cross-sectional views in the channel length direction. 1C) shows a manufacturing process of the transistor 60 in a cross-sectional view in the channel width direction.

[0159] As in the first embodiment, a gate electrode is formed on a substrate 11 through the steps shown in FIG. An electrode 15, an insulating film 16, an oxide semiconductor film 19, a pair of electrodes 20 and 21, and an oxide insulating film 22 In this step, the first insulating film 24 and the nitride insulating film 26 are formed. Photolithography steps are performed using the first to third photomasks.

[0160] Next, a fourth photomask is used to form a photoresist film on the nitride insulating film 26. After forming a mask, the oxide insulating film 22, the oxide insulating film 24, and The nitride insulating film 26 is partially etched to form an oxide insulating film 33 and an oxide insulating film 3 5 and a gate insulating film 38 having a nitride insulating film 37 is formed.

[0161] In this step, as shown in FIG. 6(A), the oxide insulating film 33 and the oxide insulating The film 35 and the nitride insulating film 37 are each partially etched to form a channel length direction. An opening 38c is formed to expose one electrode 21 of the pair of electrodes 20 and 21. ), an opening 3 is formed so as to sandwich the oxide semiconductor film 19 in the channel width direction. In the channel width direction, the side surface of the oxide semiconductor film 19 and the opening It is preferable that the shortest distance between the sides of 38a and 38b is 0.5 μm or more and 1.5 μm or less. As a result, a short circuit between the gate electrode 39 to be formed later and the oxide semiconductor film 19 can be prevented. This allows the yield to be increased. A gate insulating film 38 can be formed.

[0162] Next, as shown in FIG. 6(C) and FIG. 6(D), a gate electrode 39 and an electrode 40 are formed. The method of forming the gate electrode 39 and the electrode 40 will be described below. First, a sputtering method is used. Then, a conductive film is formed by a CVD method, a vapor deposition method, or the like, and a fifth photomask is used to form a film on the conductive film. A mask is formed by a photolithography process. Next, a part of the conductive film is removed using the mask. Etching is performed to form the gate electrode 39 and the electrode 40. After this, the mask is removed.

[0163] As shown in FIG. 6D, the gate electrode 39 is located in the channel width direction. The oxide semiconductor film 19 is disposed on the side surfaces of the oxide semiconductor layers 8a and 38b. The gate electrode 39 and the film 19 are arranged so that the end of the gate electrode 39 is located outside the end of the film 19. The electrode 40 is formed.

[0164] Through the above steps, the transistor 60 can be manufactured.

[0165] In the transistor described in this embodiment, the gate electrode 39 is The oxide semiconductor film 19 is formed on the side surfaces of the openings 38 a and 38 b provided in the gate insulating film 38 . When the gate electrode 39 faces the side surface of the oxide semiconductor film 19, the side surface of the oxide semiconductor film 19 faces the side surface of the gate electrode 39. This suppresses the generation of a parasitic channel at or near the threshold voltage. The drain current increases sharply, resulting in a transistor with excellent electrical characteristics.

[0166] In addition, the oxide semiconductor film having a stoichiometric composition is overlapped with the oxide semiconductor film serving as a channel region. By forming an oxide insulating film that contains more oxygen than oxygen that is As a result, oxygen contained in the oxide semiconductor film can be transferred to the oxide semiconductor film. The defect content can be reduced.

[0167] In this embodiment, the plasma CV is performed while heating the substrate to a temperature of 280° C. or higher and 400° C. or lower. In order to form an insulating film that becomes the gate insulating film 28 by using the method D, In addition, in this step, hydrogen, water, and the like that are present in the oxide semiconductor film can be released. The heating time in the exposed state is short, and the temperature of the oxide semiconductor during the heat treatment is 400°C. Even if the threshold voltage is changed by 100 V or less, the threshold voltage change amount is the same as that of a transistor heat-treated at a high temperature. As a result, the cost of the semiconductor device can be reduced. .

[0168] As described above, in a semiconductor device using an oxide semiconductor, the parasitic A semiconductor device in which the formation of a channel is suppressed can be obtained. In this way, a semiconductor device having improved electrical characteristics can be obtained.

[0169] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0170] (Embodiment 3) In this embodiment, the transistor having the dual gate structure shown in the first and second embodiments is The electrical characteristics of a transistor when different gate electrodes are connected and at the same potential. The characteristics will be described with reference to FIG. 1 and FIG. 7 to FIG.

[0171] In this case, the gate electrode 15 and the gate electrode 29 shown in FIG. The driving method of shorting and applying gate voltage is called Dual Gate driving. In the dual gate drive, the voltage of the gate electrode 15 and the voltage of the gate electrode 29 are always becomes equal.

[0172] Here, we calculated the electrical characteristics of the transistor. Figure 7 shows the transistor used in the calculation. The structure of the device is shown in Fig. 1. The calculation was performed using the device simulation software Atlas (Silv Aco) was used.

[0173] The transistor of Structure 1 shown in FIG. 7A is a transistor of a dual gate structure. .

[0174] In the transistor of Structure 1, an insulating film 203 is formed on a gate electrode 201. The oxide semiconductor film 205 is formed on the insulating film 203 and the oxide semiconductor film 205. A pair of electrodes 207 and 208 are formed, and the oxide semiconductor film 205 and the pair of electrodes 207 and 2 An insulating film 209 is formed on the semiconductor layer 08. A gate electrode 213 is formed on the insulating film 209. The gate electrode 201 and the gate electrode 213 are formed on the insulating film 203 and the insulating film 209. The connection is made at an opening (not shown) provided in the through hole.

[0175] The transistor of Structure 2 shown in FIG. 7B has a single-gate structure.

[0176] In the transistor of Structure 2, an insulating film 203 is formed on a gate electrode 201. The oxide semiconductor film 205 is formed on the insulating film 203 and the oxide semiconductor film 205. A pair of electrodes 207 and 208 are formed, and the oxide semiconductor film 205 and the pair of electrodes 207 and 2 An insulating film 209 is formed on the substrate 08 .

[0177] In the calculation, the work function φ of the gate electrode 201 M was set to 5.0 eV. The oxide semiconductor film 203 was set to a thickness of 100 nm and had a dielectric constant of 4.1. 5 is assumed to be a single layer of In-Ga-Zn oxide film (In:Ga:Zn=1:1:1), Band gap E of In-Ga-Zn oxide film g 3.15 eV, electron affinity χ 4.6 eV, relative dielectric constant of 15, and electron mobility of 10 cm 2 / Vs, and the donor density N d 3×10 17 atoms / cm 3 The work function φ of the pair of electrodes 207 and 208 is set as follows: sd 4. The dielectric constant of the insulating film 209 was set to 6 eV, forming an ohmic junction with the oxide semiconductor film 205. The oxide semiconductor film 205 had a defect ratio of 4.1 and a thickness of 100 nm. Models such as recessed levels and surface scattering are not taken into account. The channel widths were set to 10 μm and 100 μm, respectively.

[0178] <Reduction of initial characteristic variations> By using dual gate drive like the transistor shown in Structure 1, the initial characteristics This is because the dual gate drive reduces the Id -Vg characteristic threshold voltage V th The amount of change in is smaller than that of the transistor shown in Structure 2. This is due to the fact that

[0179] Here, as an example, the threshold voltage of the Id-Vg characteristic due to the semiconductor film becoming n-type is The negative shift of will be explained.

[0180] The total charge of the donor ions in the oxide semiconductor film is Q(C). The capacitance formed by the insulating film 203 and the oxide semiconductor film 205 is C Bottom And then oxidation The capacitance formed by the semiconductor film 205, the insulating film 209, and the gate electrode 213 is C Top and At this time, the threshold voltage V th The amount of change ΔV is calculated using the formula ( 1). The threshold voltage V th The amount of change ΔV is calculated using the formula ( 2).

[0181]

number

[0182]

number

[0183] As shown in formula (1), the dual gate drive transistor shown in structure 1 In this case, the capacitance between the donor ion in the oxide semiconductor film and the gate electrode is C Bottom、 Reach C Top Since the sum of the above is obtained, the amount of variation in the threshold voltage becomes small.

[0184] In addition, in the transistors of Structure 1 and Structure 2, the drain voltage was 0.1 V and The results of calculating the current-voltage curves at 1 V and 1 V are shown in FIG. 8. Note that FIG. 8(A) shows the structure 1. 8(B) is a current-voltage curve of the transistor shown in Structure 2. 1 is a current-voltage curve of the transistor shown in structure 1 when the drain voltage Vd is 0.1 V. The threshold voltage is -2.26V, while the threshold voltage of the transistor shown in structure 2 is -4. It was 73V.

[0185] When dual gate drive is adopted, like the transistor shown in Structure 1, the threshold The amount of voltage fluctuation is reduced. This reduces the variation in electrical characteristics among multiple transistors. is also reduced at the same time.

[0186] Note that here, a negative shift in threshold voltage due to donor ions in the oxide semiconductor film However, the fixed charges, mobile charges, or negative charges in the insulating film 203 and the insulating film 209 were taken into consideration. The threshold voltage is increased by a charge (such as an electron trapped in an acceptor-like level). The shift is also suppressed, which is believed to reduce variation.

[0187] <- Suppression of deterioration during GBT stress testing> In addition, by using dual gate drive like the transistor shown in Structure 1, -G The degradation of the -GBT stress test can be reduced. The reason why the above problem can be reduced will be explained below.

[0188] The first reason is that the dual gate drive does not cause electrostatic stress. FIG. 9A shows a transistor having a structure 1, in which a gate electrode 201 and a gate The potential contours were plotted when −30 V was applied to each of the electrodes 213. 9(B) shows the potential in the cross section AB of FIG.

[0189] The oxide semiconductor film 205 is an intrinsic semiconductor, and a negative voltage is applied to the gate electrodes 201 and 213. When the oxide semiconductor film 205 is completely depleted, In this state, the gate electrode 201 and the gate electrode 213 are equally When the potential is increased, as shown in FIG. 9B, the area between the gate electrode 201 and the gate electrode 213 is Since the potentials are equal, the insulating film 203, the oxide semiconductor film 205, and the insulating No electrostatic stress is generated in the insulating film 209. As a result, the mobile ions and the insulating film 203 and the insulating Degradation of the GBT stress test, such as trapping and detrapping of carriers in the film 209 The causative phenomenon does not occur.

[0190] The second reason is that the dual gate drive eliminates the need for external current to drive the FET. The problem is that the field is shielded. Here, the transistor of the structure 1 shown in FIG. In each of the transistors of structure 2 shown in FIG. 7(B), the insulating film 209 or the gate electrode A model of how charged particles in the air are adsorbed onto 213 is shown in Figure 10.

[0191] As shown in FIG. 10B, in the transistor shown in Structure 2, the surface of the insulating film 209 When a negative voltage is applied to the gate electrode 201, positively charged particles in the air are attracted to the The charged particles are adsorbed to the insulating film 209. As a result, as shown by the arrows in FIG. The electric field of the charged particles affects the interface of the oxide semiconductor film 205 with the insulating film 209, and the As a result, the threshold voltage is thought to shift negatively. can be.

[0192] On the other hand, as shown in FIG. 10(A), in the transistor shown in Structure 1, the gate electrode Even if positively charged particles are attached to the surface of the gel, they are not absorbed by the gel, as shown by the arrows in Figure 10(A). Since the gate electrode 213 blocks the electric field of positively charged particles, the electrical characteristics of the transistor are affected by positive charges. That is, when the gate electrode 213 is provided, the transistor is not affected by external charges. It is possible to electrically protect the transistor, and deterioration during -GBT stress testing is suppressed. .

[0193] For these two reasons, the -GBT transistor is the most suitable for dual gate drive transistors. Deterioration of stress tests is suppressed.

[0194] <Suppression of fluctuations in on-current rise voltage at different drain voltages> Here, in the case of structure 2, the on-current rise voltage at different drain voltages is This section explains the fluctuations and their causes.

[0195] The transistor shown in FIG. 11 has a gate insulating film 233 provided on a gate electrode 231. An oxide semiconductor film 235 is provided over the gate insulating film 233. A pair of electrodes 237 and 238 is provided. A gate insulating film 233, an oxide semiconductor film 235, and An insulating film 239 is provided on the pair of electrodes 237 and 238 .

[0196] In the calculation, the work function φ of the gate electrode 231 M The gain was set to 5.0 eV. The insulating film 233 is a 400 nm thick film having a dielectric constant of 7.5 and a 400 nm thick film having a dielectric constant of 4.1. The oxide semiconductor film 235 is an In-Ga-Z Assuming a single layer of n-oxide film (In:Ga:Zn=1:1:1), an In-Ga-Zn oxide film Band gap E g 3.15 eV, electron affinity χ 4.6 eV, relative dielectric constant 15, Child mobility 10cm 2 / Vs, and the donor density N d is 1×10 13 / cm 3 It was set as follows. The work function φ of the pair of electrodes 237 and 238 sd The oxide semiconductor film 235 The dielectric constant of the insulating film 239 is set to 3.9 and the thickness is set to 550 nm. Note that models such as defect states and surface scattering in the oxide semiconductor film 235 were not taken into consideration. The channel length and width of the transistor are set to 3 μm and 50 μm, respectively. μm.

[0197] Next, in the transistor shown in FIG. 11A, positively charged particles are introduced onto the surface of the insulating film 239. The models of the adsorbed transistor are shown in FIG. 11(B) and FIG. 11(C). In B), a structure is assumed in which positive fixed charges are uniformly distributed on the surface of the insulating film 239. In FIG. 1(C), a structure is assumed in which positive fixed charges are partially present on the surface of the insulating film 239. .

[0198] FIG. 12 shows the results of calculating the electrical characteristics of the transistors shown in FIGS. Shown in Figures 12(A) to 12(C).

[0199] As shown in FIG. 12A, a positive fixed potential is formed in the insulating film 239 of the transistor shown in FIG. When a constant charge is not assumed, the drain voltage (Vd) is 1V and 10V, respectively. The rise voltages are almost the same.

[0200] On the other hand, as shown in FIG. 12B, the insulating film 239 of the transistor shown in FIG. If we assume that the positive fixed charges are uniform, the threshold voltage is shifted negatively. The drain voltages (Vd) are 1V and 10V, and the rise voltages are approximately the same.

[0201] As shown in FIG. 12C, the insulating film 239 of the transistor shown in FIG. When the positive fixed charge is partially assumed, the drain voltage (Vd) is 1V and 10V, and The rise voltages of each are different.

[0202] On the other hand, in the transistor shown in Structure 1, the gate electrode 213 is provided. As described above in <Suppression of Deterioration in GBT Stress Test>, the gate electrode 213 is Since the electric field of the charged particles in the semiconductor substrate is shielded, the charged particles do not affect the electrical characteristics of the transistor. That is, the presence of the gate electrode 213 electrically protects the transistor from external charges. It is possible to measure the variation of the on-state current rise voltage at different drain voltages. It can be suppressed.

[0203] From the above, it is possible to apply an arbitrary voltage to each gate electrode by using a dual gate structure. Suppression of degradation in -GBT stress test and on-current rise at different drain voltages It is possible to suppress the fluctuation of the voltage rise. In addition, the dual gate structure has a gate electrode By applying the same voltage, the variation in initial characteristics is reduced and the deterioration of -GBT stress test is improved. It is possible to suppress the change in the ON current rise voltage at different drain voltages. It is.

[0204] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0205] (Embodiment 4) In the transistors described in any of the first to third embodiments, the substrate 11 may be formed as necessary. A base insulating film can be provided between the gate electrode 15 and the insulating film. The base insulating film can be made of the following material: , silicon oxide, silicon oxynitride, silicon nitride, silicon nitride oxide, gallium oxide, Examples include hafnium oxide, yttrium oxide, aluminum oxide, and aluminum oxide nitride. The materials for the base insulating film include silicon nitride, gallium oxide, hafnium oxide, and By using yttrium, aluminum oxide, etc., impurities, typically aluminum, are removed from the substrate 11. The diffusion of alkali metals, water, hydrogen, and the like into the oxide semiconductor film 19 can be suppressed.

[0206] The base insulating film can be formed by a sputtering method, a CVD method, or the like.

[0207] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0208] (Embodiment 5) In the transistors described in any of Embodiments 1 to 4, a gate insulator may be provided as necessary. The insulating film 17 can have a stacked structure. 0, the configuration of the gate insulating film 17 will be described with reference to FIG.

[0209] As shown in FIG. 13A, the gate insulating film 17 is made of a nitride insulating film 17a and an oxide insulating film 17b. The film 17b may have a laminated structure in which the film 17b is laminated in order from the gate electrode 15 side. By providing the nitride insulating film 17a on the electrode 15 side, impurities from the gate electrode 15, typically In this case, hydrogen, nitrogen, an alkali metal, an alkaline earth metal, or the like is transferred to the oxide semiconductor film 19. It can prevent movement.

[0210] In addition, by providing the oxide insulating film 17b on the oxide semiconductor film 19 side, the gate insulating film 17 In addition, the defect state density at the interface of the oxide semiconductor film 19 can be reduced. As a result, a transistor with little deterioration in electrical characteristics can be obtained. As the oxide insulating film 25, more oxygen than that satisfying the stoichiometric composition is used as the oxide insulating film b. When the oxide insulating film 17 is formed using an oxide insulating film containing This is more preferable since it is possible to further reduce the defect state density in the semiconductor layer.

[0211] As shown in FIG. 13B, the gate insulating film 17 is a nitride insulating film 17c having few defects. The nitride insulating film 17d having high hydrogen blocking properties and the oxide insulating film 17b are formed on the gate electrode 17c. The gate insulating film 17 may have a laminated structure in which the layers are laminated in order from the electrode 15 side. By providing the nitride insulating film 17c with few defects, the dielectric strength of the gate insulating film 17 is improved. In addition, by providing the nitride insulating film 17d having a high hydrogen blocking property, Hydrogen from the gate electrode 15 and the nitride insulating film 17c moves to the oxide semiconductor film 19. This can be prevented.

[0212] An example of a method for forming the nitride insulating films 17c and 17d shown in FIG. To achieve this, a mixture of silane, nitrogen, and ammonia was used as the source gas for plasma CVD. By this method, a silicon nitride film with few defects is formed as the nitride insulating film 17c. The fuel gas was changed to a mixture of silane and nitrogen, and the hydrogen concentration was low and hydrogen was not blown. A silicon nitride film capable of being bonded to the nitride insulating film 17d is formed as the nitride insulating film 17d. By using such a formation method, a nitride insulating film having few defects and a blocking property against hydrogen can be formed. A laminated gate insulating film 17 can be formed.

[0213] As shown in FIG. 13C, the gate insulating film 17 is made of a nitride film having a high impurity blocking property. The nitride insulating film 17e has a small number of defects, and the nitride insulating film 17c has a high hydrogen blocking property. The laminated structure includes a metal insulating film 17d and an oxide insulating film 17b laminated in this order from the gate electrode 15 side. The gate insulating film 17 may be made of nitride, which has a high blocking property against impurities. By providing the insulating film 17e, impurities from the gate electrode 15, typically hydrogen and nitrogen, , alkali metal, alkaline earth metal, or the like is prevented from moving to the oxide semiconductor film 19. It is possible.

[0214] An example of a method for producing the nitride insulating films 17e, 17c, and 17d shown in FIG. 13(C) will be described below. First, a plasma was generated using a mixture of silane, nitrogen, and ammonia as the source gas. By using the micro-CVD method, a silicon nitride film with high impurity blocking properties is formed as a nitride insulating film 17e Next, the flow rate of ammonia is increased to form silicon nitride with fewer defects. Next, the source gas is a mixture gas of silane and nitrogen. By switching to silicon nitride, which has a low hydrogen concentration and can block hydrogen, The nitride insulating film 17d is formed of a silicon film. The gate insulating film 17 is formed by laminating a nitride insulating film having an impurity blocking property. It can be achieved.

[0215] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0216] (Embodiment 6) A pair of electrodes 20 and 21 provided in the transistors described in any of the first to fifth embodiments As the metal, tungsten, titanium, aluminum, copper, molybdenum, chromium, or tantalum A conductive material that easily bonds with oxygen, such as a simple substance or an alloy, can be used. The oxygen contained in the oxide semiconductor film 19 is bonded to the conductive material contained in the pair of electrodes 20 and 21. In addition, an oxygen vacancy region is formed in the oxide semiconductor film 19. In some cases, some of the constituent elements of the conductive material forming the pair of electrodes 20 and 21 may be mixed into the conductive material 9 . As a result, as shown in FIG. 14, a pair of electrodes 20 and 2 Low resistance regions 19a and 19b are formed in the vicinity of the region in contact with 1. The gate insulating film 17 and the pair of electrodes 20 and 21 are in contact with each other. The low resistance regions 19a and 19b are formed between the oxide semiconductor film 1 because of their high conductivity. It is possible to reduce the contact resistance between the first electrode 9 and the pair of electrodes 20 and 21, and the on-state of the transistor It is possible to increase the on-current.

[0217] The pair of electrodes 20 and 21 are made of the conductive material that easily bonds with oxygen, titanium nitride, and nitrogen. Alternatively, the layer structure may be a laminate structure with a conductive material that is difficult to bond with oxygen, such as tantalum chloride or ruthenium. With such a stacked structure, at the interface between the pair of electrodes 20 and 21 and the oxide insulating film 23, In this way, it is possible to prevent the pair of electrodes 20 and 21 from being oxidized, and the pair of electrodes 20 and 21 can be highly It is possible to suppress the development of resistance.

[0218] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0219] (Embodiment 7) In this embodiment, compared with Embodiments 1 to 6, defects in an oxide semiconductor film can be reduced. A semiconductor device having a transistor capable of further reducing the amount of The transistor described in this embodiment will be described in the following. In comparison, the present embodiment is different in that it has a multilayer film in which oxide semiconductor films are stacked. The transistor will be described in detail with reference to embodiment 1.

[0220] FIG. 15 illustrates a top view and a cross-sectional view of a transistor 70 included in the semiconductor device. FIG. 15(A) is a top view of a transistor 70, and FIG. 15(B) is a top view of a transistor 70 along the dashed line A- in FIG. 15(C) is a cross-sectional view taken along dashed line CD in FIG. 15(A). In FIG. 15A, for clarity, the substrate 11, the gate insulating film 17, and the oxide insulating film are not shown. 23, the oxide insulating film 25, the nitride insulating film 27, etc. are omitted.

[0221] The transistor 70 shown in FIG. 15(A) to FIG. 15(C) is a gate insulating film provided on a substrate 11. The gate electrode 15 is overlapped with the gate insulating film 17 via the gate insulating film 17. A multilayer film 47 including a pair of electrodes 20 and 21 in contact with the multilayer film 47, a gate insulating film 17, and a multilayer film 47 including a gate insulating film 17 and a gate insulating film 17. The layer 47 and the gate insulating film 28 on the pair of electrodes 20 and 21, and a gate electrode 29 on the gate insulating film 17. The gate insulating film 28 is an oxide insulating film. The insulating film 23, the oxide insulating film 25, and the nitride insulating film 27 are also included. An electrode 30 , which is connected to one of the electrodes 21 , in this case, is formed on the gate insulating film 17 . The electrode 30 functions as a pixel electrode.

[0222] In the transistor 70 described in this embodiment, the multilayer film 47 includes the oxide semiconductor film 19 and The multilayer film 47 has a two-layer structure. A part of the conductive film 19 functions as a channel region. An oxide insulating film 23 is formed between the oxide semiconductor film 19 and the oxide insulating film 23. In addition, an oxide insulating film 23 is provided in contact with the oxide semiconductor film 49a. A veneer 25 is formed.

[0223] The oxide semiconductor film 49a is composed of one or more elements constituting the oxide semiconductor film 19. Therefore, at the interface between the oxide semiconductor film 19 and the oxide semiconductor film 49a, Therefore, the movement of carriers is not hindered at the interface. This increases the field effect mobility of the transistor.

[0224] The oxide semiconductor film 49a is typically an In-Ga oxide film, an In-Zn oxide film, or or In-M-Zn oxide film (M is Al, Ga, Y, Zr, La, Ce, or Nd). The energy of the bottom of the conduction band is closer to the vacuum level than that of the oxide semiconductor film 19. Specifically, the energy of the bottom of the conduction band of the oxide semiconductor film 49a and the energy of the bottom of the conduction band of the oxide semiconductor film 19 are The difference in energy from the lower end of the conductive band is 0.05 eV or more, 0.07 eV or more, or 0.1 eV or more or above, or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0 That is, the electron affinity of the oxide semiconductor film 49a and the electron affinity of the oxide semiconductor film 19 The difference between the electron affinity of is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less Below.

[0225] The oxide semiconductor film 49a contains In, and thus the carrier mobility (electron mobility) is increased. This is preferable.

[0226] The oxide semiconductor film 49a is formed by doping Al, Ga, Y, Zr, La, Ce, or Nd with In. A higher atomic ratio may have the following effects: (1) Oxide semiconductor (2) Enlarging the energy gap of the oxide semiconductor film 49a. (3) It blocks impurities from the outside. (4) Compared with the oxide semiconductor film 19, As a result, the insulating property of the oxide semiconductor film 49a is improved. (5) Al, Ga, Y, Zr, La, C Since e or Nd is a metal element with a strong bond with oxygen, oxygen deficiency is unlikely to occur. do.

[0227] When the oxide semiconductor film 49a is an In-M-Zn oxide film, the sum of In and M is 10 When the atomic percentage of In and M is 0 atomic%, the atomic percentage of In is less than 50 atomic%. And M is 50 atomic % or more, or In is less than 25 atomic % and M is 75a tomic% or more.

[0228] The oxide semiconductor film 19 and the oxide semiconductor film 49a are In-M-Zn oxide films (M is Al, Ga, Y, Zr, La, Ce, or Nd), compared with the oxide semiconductor film 19 In addition, M (Al, Ga, Y, Zr, La, Ce, or Nd) is larger than the above atoms contained in the oxide semiconductor film 19. and the atomic ratio is 1.5 times or more, 2 times or more, or 3 times or more higher.

[0229] In addition, the oxide semiconductor film 19 and the oxide semiconductor film 49a are made of In-M-Zn oxide (M is an In-Zn oxide). In the case of Al, Ga, Y, Zr, La, Ce, or Nd, the oxide semiconductor film 49a is made of In. :M:Zn=x 1 :y 1 :z 1 [Atomic ratio], oxide semiconductor film 19 is In:M:Zn=x 2 :y 2 :z 2 [Atomic ratio], y 1 / x 1 y 2 / x 2 Greater than or y 1 / x 1 y 2 / x 2 is 1.5 times greater than y 1 / x 1 y 2 / x 2 Yo More than twice as large as y 1 / x 1 y 2 / x 2 At this time, the oxide In the semiconductor film, y 2 x 2 In the above, a transistor including the oxide semiconductor film This is preferable because it can impart stable electrical properties to the

[0230] The oxide semiconductor film 19 is an In-M-Zn oxide film (wherein M is Al, Ga, Y, Zr, La, In the case of Ce or Nd), the target used for depositing the oxide semiconductor film 19 The atomic ratio of metal elements is In:M:Zn=x 1 :y 1 :z 1 So, 、 x 1 / y1 teeth , 1 / 3 to 6, or even 1 to 6, 1 / y 1 is between 1 / 3 and 6 , and more preferably 1 to 6. 1 / y 1 is between 1 and 6 This makes it easier to form a CAAC-OS film as the oxide semiconductor film 19. Representative examples of atomic ratios of metal elements are In:M:Zn=1:1:1, In:M:Zn =1:1:1.2, In:M:Zn=3:1:2, etc.

[0231] The oxide semiconductor film 49a is an In-M-Zn oxide film (wherein M is Al, Ga, Y, Zr, or La). , Ce, or Nd), the target used for forming the oxide semiconductor film 49a In this case, the atomic ratio of metal elements is In:M:Zn=x 2 :y 2 :z 2 So, 、 x 2 / y 2 <x 1 / y 1 Where z 2 / y 2 is between 1 / 3 and 6, or between 1 and 6. It is preferable that z 2 / y 2 By setting the value of The ratio of the number of atoms of the target metal elements makes it easier to form a CAAC-OS film. Examples of the table are In:M:Zn=1:3:2, In:M:Zn=1:3:4, In:M: Examples include Zn=1:3:6, In:M:Zn=1:3:8, etc.

[0232] Note that the atomic ratios of the oxide semiconductor film 19 and the oxide semiconductor film 49a are each subject to error. The atomic ratios listed above may vary by ±40%.

[0233] The oxide semiconductor film 49a is a film that is used as an oxide semiconductor when forming the oxide insulating film 25 to be formed later. It also functions as a membrane for reducing damage to the body membrane 19.

[0234] The thickness of the oxide semiconductor film 49a is 3 nm or more and 100 nm or less, or 3 nm or more and 50 nm or less. Let m.

[0235] Similarly to the oxide semiconductor film 19, the oxide semiconductor film 49a has a non-single crystal structure, for example. The non-single crystal structure may be, for example, a CAAC-OS, a polycrystalline structure, or a microcrystalline structure, which will be described later. The structure may be crystalline or amorphous.

[0236] The oxide semiconductor film 49a may have an amorphous structure, for example. For example, the atomic arrangement is disordered and has no crystalline components. Or, an oxide with an amorphous structure The film, for example, has a completely amorphous structure and does not have any crystalline portions.

[0237] Note that the oxide semiconductor film 19 and the oxide semiconductor film 49a each have an amorphous structure. The regions are microcrystalline, polycrystalline, CAAC-OS, and single-crystalline. A mixed film having two or more types of regions may be formed. The mixed film may have, for example, an amorphous structure region. , microcrystalline structure region, polycrystalline structure region, CAAC-OS region, single crystal structure region, In some cases, the mixed film has a single layer structure having two or more regions. Structure region, microcrystalline structure region, polycrystalline structure region, CAAC-OS region, single crystal structure In some cases, the layered structure may include two or more of the above-mentioned regions.

[0238] Here, the oxide semiconductor film 49a is provided between the oxide semiconductor film 19 and the oxide insulating film 23. For this reason, insufficiency is generated between the oxide semiconductor film 49a and the oxide insulating film 23. Even if a trap level is formed due to an impurity or a defect, the trap level and the oxide semiconductor film 1 As a result, electrons flowing through the oxide semiconductor film 19 are trapped in the trap level This makes it possible to increase the on-state current of the transistor and also to reduce the electric field In addition, when an electron is captured in a trap level, the electron This results in a negative fixed charge. As a result, the threshold voltage of the transistor fluctuates. However, since there is a gap between the oxide semiconductor film 19 and the trap states, It is possible to reduce the capture of electrons in the trap level, and the fluctuation of the threshold voltage is reduced. It can be reduced.

[0239] In addition, the oxide semiconductor film 49a can block impurities from the outside; It is possible to reduce the amount of impurities moving from the outside to the oxide semiconductor film 19. For these reasons, the oxide semiconductor film 19 is It is possible to reduce the impurity concentration and the amount of oxygen vacancies in the silicon substrate.

[0240] The oxide semiconductor film 19 and the oxide semiconductor film 49a are not simply laminated. Continuous junctions (here, specifically, structures in which the energy at the bottom of the conduction band changes continuously between each film) In other words, the interfaces of the films are fabricated so that trap centers and recombination centers are formed. The layer structure is designed so that there are no impurities that form defect levels. When impurities are present between the nitride semiconductor film 19 and the oxide semiconductor film 49a, The continuity of the band is lost, and carriers are trapped or recombined at the interface and disappear. It ends up like this.

[0241] To form continuous junctions, a multi-chamber deposition system equipped with a load lock chamber is required. Each film is laminated in succession using a sputtering device without exposing it to the air. Each chamber in the sputtering apparatus is required for the oxide semiconductor film. In order to remove impurities such as water as much as possible, an adsorption type vacuum pump such as a cryopump is used. High vacuum pump (5×10 -7 Pa~1×10 -4 It is preferable to use a temperature of up to about 10 Pa. Alternatively, a turbo molecular pump and cold trap can be combined to separate the chamber from the exhaust system. It is preferable to prevent the backflow of gases into the bar, especially gases containing carbon or hydrogen. stomach.

[0242] As shown in FIG. 15D, a transistor 71 is connected to the gate insulating film 17. The multilayer film 48 overlaps the base electrode 15, and a pair of electrodes 20 and 21 contact the multilayer film 48. This is also fine.

[0243] The multilayer film 48 includes an oxide semiconductor film 49b, an oxide semiconductor film 19, and an oxide semiconductor film 49. a. That is, the multilayer film 48 has a three-layer structure. The oxide semiconductor film 19 has a channel Functions as a territory.

[0244] In addition, the gate insulating film 17 and the oxide semiconductor film 49b are in contact with each other. An oxide semiconductor film 49b is provided between the oxide semiconductor film 19 and the oxide semiconductor film 19.

[0245] The multilayer film 48 and the oxide insulating film 23 are in contact with each other. That is, an oxide semiconductor film 19 is in contact with the oxide insulating film 23. A semiconductor film 49a is provided.

[0246] The oxide semiconductor film 49b is formed using a material and a method similar to those of the oxide semiconductor film 49a. It is possible.

[0247] The oxide semiconductor film 49b is preferably thinner than the oxide semiconductor film 19. The thickness of the conductor film 49b is set to 1 nm or more and 5 nm or less, or 1 nm or more and 3 nm or less. Therefore, it is possible to reduce the amount of variation in the threshold voltage of the transistor.

[0248] In the transistor described in this embodiment, Therefore, the oxide semiconductor film 49a and the oxide insulating film 49b are Even if a trap level is formed between the insulating films 23 due to impurities and defects, the trap There is a gap between the gate level and the oxide semiconductor film 19. The flowing electrons are less likely to be captured by the trap level, increasing the on-current of the transistor. In addition, the field effect mobility can be increased. When an electron is trapped, it becomes a negative fixed charge. However, the oxide semiconductor film 19 and the trap states cause a change in the threshold voltage. Since there is a gap between the trap levels, it is possible to reduce the capture of electrons at the trap levels. Therefore, the variation in the threshold voltage can be reduced.

[0249] In addition, the oxide semiconductor film 49a can block impurities from the outside; It is possible to reduce the amount of impurities moving from the outside to the oxide semiconductor film 19. For these reasons, the oxide semiconductor film 19 is It is possible to reduce the impurity concentration and the amount of oxygen vacancies in the silicon substrate.

[0250] In addition, an oxide semiconductor film 49b is provided between the gate insulating film 17 and the oxide semiconductor film 19. An oxide semiconductor film 49 a is provided between the oxide semiconductor film 19 and the oxide insulating film 23. Therefore, in the vicinity of the interface between the oxide semiconductor film 49b and the oxide semiconductor film 19, The concentration of silicon or carbon in the oxide semiconductor film 19 or the concentration of oxide The concentration of silicon or carbon in the vicinity of the interface between the oxide semiconductor film 49a and the oxide semiconductor film 19 is reduced. As a result, the photocurrent measurement in the multilayer film 48 is The absorption coefficient is 1×10 -3 / cm or less than 1×10 -4 / cm, and localized There are very few ranks.

[0251] The transistor 71 having such a structure is formed in a multilayer film 48 including an oxide semiconductor film 19. Since there are very few defects in the Typically, it is possible to increase the on-current and improve the field effect mobility. Threshold voltage fluctuations during BT stress testing and optical BT stress testing, which are examples of testing Small quantity and high reliability.

[0252] <Band structure of transistor> Next, the multilayer film 47 provided in the transistor 70 shown in FIG. 15(B) and the The band structure of the multilayer film 48 provided in the transistor 71 shown in FIG. He explains.

[0253] Here, as an example, the oxide semiconductor film 19 has an energy gap of 3.15 eV. The oxide semiconductor film 49a is made of an In-Ga-Zn oxide having an energy gap of The energy gap of the In-Ga-Zn oxide is 3.5 eV. The measurement was performed using a meter (HORIBA JOBIN YVON UT-300). This can be done.

[0254] Vacuum levels and energies of the tops of the valence bands of the oxide semiconductor film 19 and the oxide semiconductor film 49a The difference (also called the ionization potential) was 8 eV and 8.2 eV, respectively. The energy difference between the vacuum level and the top of the valence band is measured by ultraviolet photoelectron spectroscopy (UPS). Raviolet Photoelectron Spectroscopy (P Measurements can be performed using a HI VersaProbe.

[0255] Therefore, the vacuum level and the conduction band minimum of the oxide semiconductor film 19 and the oxide semiconductor film 49a are The energy difference (also called electron affinity) is 4.85 eV and 4.7 eV, respectively. .

[0256] FIG. 16(A) shows a schematic diagram of a part of the band structure of the multilayer film 47. A case where a silicon oxide film is provided in contact with the layer film 47 will be described. EcI1 indicates the energy of the bottom of the conduction band of a silicon oxide film, and EcS1 indicates the energy of the oxide semiconductor. EcS2 indicates the energy of the bottom of the conduction band of the oxide semiconductor film 49a. EcI2 indicates the energy of the bottom of the conduction band of the silicon oxide film. In addition, EcI1 corresponds to the gate insulating film 17 in FIG. 15(B), and EcI2 corresponds to the gate insulating film 17 in FIG. In FIG. 5(B), this corresponds to the oxide insulating film 23.

[0257] As illustrated in FIG. 16A, in the oxide semiconductor film 19 and the oxide semiconductor film 49a, The energy at the bottom of the conduction band changes smoothly without any barrier. In other words, it changes continuously. This is because the multilayer film 47 contains elements common to the oxide semiconductor film 19. In addition, oxygen is transferred between the oxide semiconductor film 19 and the oxide semiconductor film 49a. This can be said to be due to the formation of a mixed layer.

[0258] As shown in FIG. 16A, the oxide semiconductor film 19 of the multilayer film 47 serves as a well. In the transistor using the semiconductor device 47, a channel region is formed in the oxide semiconductor film 19. In addition, since the energy of the conduction band minimum changes continuously in the multilayer film 47, In other words, the oxide semiconductor film 19 and the oxide semiconductor film 49a are in continuous contact with each other.

[0259] As shown in FIG. 16A, the boundary between the oxide semiconductor film 49a and the oxide insulating film 23 Although trap levels due to impurities or defects may be formed near the surface, the oxide semiconductor The film 49a is provided to separate the oxide semiconductor film 19 from the trap levels. However, when the energy difference between EcS1 and EcS2 is small, the oxide semiconductor Electrons in the film 19 may exceed the energy difference and reach the trap level. When electrons are trapped by the oxide insulating film, negative charges are generated at the oxide insulating film interface, causing the The threshold voltage is shifted in the positive direction. If the energy difference is set to 0.1 eV or more, or 0.15 eV or more, the threshold of the transistor This is preferable because it reduces fluctuations in the low voltage and provides stable electrical characteristics.

[0260] FIG. 16B is a schematic diagram showing a part of the band structure of the multilayer film 47. In this example, a silicon oxide film is provided in contact with the multilayer film 47. In addition, EcI1 shown in FIG. 16B is the conduction band of the silicon oxide film. EcS1 denotes the energy at the bottom of the conduction band of the oxide semiconductor film 19. EcI2 indicates the energy of the bottom of the conduction band of the silicon oxide film. In FIG. 15(B), EcI2 corresponds to the gate insulating film 17. This corresponds to the oxide insulating film 23 .

[0261] In the transistor shown in FIG. 15B, the multilayer film 4 is formed when the pair of electrodes 20 and 21 are formed. 7, that is, the oxide semiconductor film 49a may be etched. The upper surface of the semiconductor film 19 is in contact with the oxide semiconductor film 19 during the formation of the oxide semiconductor film 49a. A mixed layer of the conductor film 49a may be formed.

[0262] For example, the oxide semiconductor film 19 is an In- Ga-Zn oxide, or In-Ga-Z with In:Ga:Zn=3:1:2 [atomic ratio] n oxide as a sputtering target, and The semiconductor film 49a is an In-Ga-Zn oxide film having an atomic ratio of In:Ga:Zn=1:3:2. In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn=1:3:4, or In In-Ga-Zn oxide with an atomic ratio of Ga:Zn=1:3:6 was sputtered. In the case where the oxide semiconductor film is formed using the oxide semiconductor film 19 as a get, the oxide semiconductor film 19 is formed using the oxide semiconductor film 19 as a get. Since the semiconductor film 49a contains a large amount of Ga, a GaOx layer is formed on the upper surface of the oxide semiconductor film 19. Alternatively, a mixed layer containing more Ga than the oxide semiconductor film 19 can be formed.

[0263] Therefore, even when the oxide semiconductor film 49a is etched, the E The energy of the bottom of the conduction band on the cI2 side becomes higher, and the band structure shown in Figure 16(B) appears. This may be the case.

[0264] When the band structure shown in FIG. 16(B) is obtained, when observing the cross section of the channel region, In some cases, the multilayer film 47 appears to be composed of only the oxide semiconductor film 19. Therefore, the oxide semiconductor film 19 is formed on the oxide semiconductor film 19. The oxide semiconductor film 19 contains more Ga than the oxide semiconductor film 19. Since a mixed layer is formed, the mixed layer can be regarded as the 1.5th layer. The mixed layer is analyzed by, for example, EDX analysis to measure the elements contained in the multilayer film 47. In this case, the composition above the oxide semiconductor film 19 can be analyzed. For example, the composition in the upper part of the oxide semiconductor film 19 contains more Ga than the composition in the oxide semiconductor film 19. This can be confirmed by the large amount of composition.

[0265] FIG. 16C shows a schematic diagram of a part of the band structure of the multilayer film 48. A case where a silicon oxide film is provided in contact with the layer film 48 will be described. EcI1 indicates the energy of the bottom of the conduction band of a silicon oxide film, and EcS1 indicates the energy of the oxide semiconductor. EcS2 indicates the energy of the bottom of the conduction band of the oxide semiconductor film 49a. EcS3 represents the energy of the bottom of the conduction band of the oxide semiconductor film 49b. EcI2 indicates the energy of the bottom of the conduction band of the silicon oxide film. In FIG. 15(D), EcI2 corresponds to the gate insulating film 17. This corresponds to the oxide insulating film 23 .

[0266] As shown in FIG. 16C, the oxide semiconductor film 49b, the oxide semiconductor film 19, and the oxide In the semiconductor film 49a, the energy at the bottom of the conduction band changes smoothly without any barrier. In other words, it can be said that the multilayer film 48 changes continuously. The oxide semiconductor film 49b includes an element common to the oxide semiconductor film 19, and the oxide semiconductor film 49b includes an element common to the oxide semiconductor film 19. Oxygen moves between the nitride semiconductor film 19 and the oxide semiconductor film 49a to form a mixed layer. This can be said to be because

[0267] As shown in FIG. 16C, the oxide semiconductor film 19 of the multilayer film 48 serves as a well. In the transistor using the semiconductor device 48, a channel region is formed in the oxide semiconductor film 19. In addition, since the energy of the conduction band minimum changes continuously in the multilayer film 48, The oxide semiconductor film 49b, the oxide semiconductor film 19, and the oxide semiconductor film 49a are continuously bonded to each other. It can also be said that this is the case.

[0268] Note that in the vicinity of the interface between the oxide semiconductor film 19 and the oxide insulating film 23 and In the vicinity of the interface with the gate insulating film 17, a trap level due to impurities or defects is formed. However, as shown in FIG. 16C, oxide semiconductor films 49a and 49b are provided. This can keep the oxide semiconductor film 19 away from the trap level. The energy difference between EcS1 and EcS2, and between EcS1 and EcS3, is small. In this case, electrons in the oxide semiconductor film 19 may exceed the energy difference and reach the trap level. When electrons are captured in the trap levels, negative charges are generated at the oxide insulating film interface. Therefore, the threshold voltage of the transistor is shifted in the positive direction. The energy difference between EcS1 and EcS2, and between EcS1 and EcS3, is 0.1e V or more, or 0.15 eV or more, the fluctuation of the threshold voltage of the transistor is reduced. This is preferable since it results in stable electrical characteristics.

[0269] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0270] (Embodiment 8) In this embodiment, a transistor included in the semiconductor device described in the above embodiment is In this section, one embodiment applicable to an oxide semiconductor film will be described.

[0271] The oxide semiconductor film is an oxide semiconductor having a single crystal structure (hereinafter referred to as a single crystal oxide semiconductor). , a polycrystalline oxide semiconductor (hereinafter referred to as a polycrystalline oxide semiconductor), oxide semiconductors having an amorphous structure (hereinafter referred to as microcrystalline oxide semiconductors) and amorphous oxide semiconductors having an amorphous structure (hereinafter referred to as The oxide semiconductor film may be formed of one or more of the following: Alternatively, the oxide semiconductor film may be an amorphous oxide semiconductor film. The oxide semiconductor may be a single crystal oxide semiconductor having a conductor and crystal grains. Conductor, CAAC-OS, polycrystalline oxide semiconductor, microcrystalline oxide semiconductor, and amorphous oxide semiconductor The conductor will now be described.

[0272] <Single crystal oxide semiconductor> A single-crystal oxide semiconductor film has a low impurity concentration and a low density of defect states (few oxygen vacancies). ) an oxide semiconductor film. Therefore, the carrier density can be reduced. A transistor using a crystalline oxide semiconductor film rarely has normally-on electrical characteristics. In addition, since the single crystal oxide semiconductor film has a low impurity concentration and a low density of defect states, Therefore, in the case of a transistor using a single crystal oxide semiconductor film, the number of carrier traps may be reduced. The transistor has small fluctuations in electrical characteristics and is highly reliable.

[0273] Note that the oxide semiconductor film has a high density when the number of defects is small. High crystallinity increases density. In addition, the oxide semiconductor film has a low concentration of impurities such as hydrogen. The density of the single crystal oxide semiconductor film is higher than that of the CAAC-OS film. The CAAC-OS film has a higher density than the microcrystalline oxide semiconductor film. The conductor film has a higher density than the microcrystalline oxide semiconductor film. The density is higher than that of an crystalline oxide semiconductor film.

[0274] <caac-os> The CAAC-OS film is one of the oxide semiconductor films having multiple crystal parts. The crystals in the AC-OS film have a c-axis orientation. The area of ​​the crystals in the C-OS film is 2500 nm 2 More than 5μm 2 Greater than or equal to 100 0μm 2 In addition, in a cross-sectional TEM image, the crystal portion is 50% or more, 80% or more , or 95% or more, the resulting thin film has physical properties close to those of a single crystal.

[0275] The CAAC-OS film was observed under a transmission electron microscope (TEM). When observed using a quartz crystal microscope, clear boundaries between the crystals were observed. It is not possible to confirm the grain boundary. It can be said that the AAC-OS film is less susceptible to the decrease in electron mobility caused by grain boundaries.

[0276] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation). When the metal atoms are observed, it can be confirmed that they are arranged in layers in the crystal part. Each layer of the CAAC-OS film is formed on a surface on which the film is to be formed (also called a surface on which the film is to be formed) or on a concave surface on the upper surface. The shape reflects the convexity and is aligned parallel to the surface on which the CAAC-OS film is formed or the top surface. In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. " refers to a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. This also includes cases where the angle is between 85° and 95°.

[0277] On the other hand, the CAAC-OS film was observed by TEM from a direction roughly perpendicular to the sample surface (plane T EM observation reveals that metal atoms are arranged in triangular or hexagonal shapes in the crystals. However, no regularity was observed in the arrangement of metal atoms between different crystal regions. do not have.

[0278] When electron beam diffraction was performed on the CAAC-OS film, spots (bright spots) indicating orientation were observed. is observed.

[0279] Cross-sectional and planar TEM observations revealed that the crystals in the CAAC-OS film had an orientation. It can be seen that...

[0280] X-ray diffraction (XRD) of CAAC-OS film The structure of the CAAC-OS film was analyzed using the out-of-plane method. In the analysis, a peak may appear at a diffraction angle (2θ) of around 31°. This peak is I Since it is assigned to the (00x) plane (x is an integer) of the nGaZn oxide crystal, The crystals of the OS film have a c-axis orientation, and the c-axis is oriented in a direction approximately perpendicular to the surface on which the film is formed or the upper surface. It can be confirmed that there is.

[0281] On the other hand, in-p X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis. In the lane method, a peak may appear at 2θ around 56°. This is attributed to the (110) plane of the InGaZn oxide crystal. In the case of a crystalline oxide semiconductor film, 2θ is fixed at about 56°, and the normal vector of the sample surface is aligned along the axis (φ When the sample is rotated around the (φ) axis while analyzing (φ scan), the results show that the bonds are equivalent to the (110) plane. In contrast, in the case of the CAAC-OS film, 2 Even when θ is fixed at around 56° and φ is scanned, no clear peak appears.

[0282] From the above, it is considered that the orientation of the a-axis and b-axis is uniform between different crystal regions in the CAAC-OS film. Although it is irregular, it has a c-axis orientation, and the c-axis is parallel to the normal vector of the surface on which it is formed or the upper surface. Therefore, the layered structure confirmed by the cross-sectional TEM observation mentioned above is consistent with the Each layer of arranged metal atoms is in a plane parallel to the ab plane of the crystal.

[0283] The crystals are formed when the CAAC-OS film is formed or after a crystallization process such as a heat treatment. As described above, the c-axis of the crystal is aligned along the surface on which the CAAC-OS film is formed or along the surface on which the CAAC-OS film is formed. The orientation of the CAAC-OS film is parallel to the normal vector of the top surface. When the shape of the CAAC-OS film is changed by etching, the c-axis of the crystal is aligned with the surface on which the CAAC-OS film is formed. Or it may not be parallel to the normal vector of the upper surface.

[0284] In addition, the crystallinity in the CAAC-OS film does not have to be uniform. When the crystalline part of the film is formed by crystal growth from the vicinity of the top surface of the CAAC-OS film, The area near the surface may have a higher crystallinity than the area near the surface on which it is formed. When impurities are added to the AC-OS film, the crystallinity of the region to which the impurities are added changes, resulting in a partial In some cases, regions of differing crystallinity may be formed.

[0285] In addition, in the out-of-plane analysis of the CAAC-OS film, 2θ was 31°. In addition to the peaks around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks near the c-axis are due to the presence of crystals that do not have the c-axis orientation in the CAAC-OS film. The CAAC-OS film shows a peak at 2θ of around 31° and a peak at 2θ of around 36°. It is preferable that there is no peak nearby.

[0286] The CAAC-OS film is an oxide semiconductor film with a low concentration of impurities. The oxide semiconductor film is preferably made of silicon or a transition metal element other than the main component of the oxide semiconductor film. The elements that bond to oxygen stronger than the metal elements that form the oxide semiconductor film, such as Zn, By removing oxygen from the oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disturbed, and the crystallinity is reduced. In addition, heavy metals such as iron and nickel, argon, and carbon dioxide are Since the diameter (or molecular radius) of the ions is large, when the ions are contained inside the oxide semiconductor film, the oxide semiconductor film The impurities contained in the oxide semiconductor film are disturbed, which causes a decrease in crystallinity. Pure materials may act as carrier traps or carrier generation sources.

[0287] The CAAC-OS film is an oxide semiconductor film with a low density of defect states. Oxygen vacancies in semiconductor films act as carrier traps and trap hydrogen. This can become a carrier generation source.

[0288] The low impurity concentration and low defect level density (low oxygen vacancies) are called high purity intrinsic or The term "high-purity intrinsic" refers to a substantially high-purity intrinsic oxide semiconductor. Since the film has a small carrier generation source, the carrier density can be reduced. The transistor using the oxide semiconductor film has electrical characteristics (noise) in which the threshold voltage is negative. It is also called "marine". It is rare for it to become "high purity genuine" or "substantially high purity". The intrinsic oxide semiconductor film has few carrier traps. Transistors using the film have little fluctuation in electrical characteristics and are highly reliable. Note that it takes a certain time for charges trapped in the carrier traps in the oxide semiconductor film to be released. The time is long and the charge may behave as if it were a fixed charge. In addition, a transistor using an oxide semiconductor film having a high density of defect states has unstable electrical characteristics. There may be cases where this occurs.

[0289] In addition, the electrical characteristics of transistors using CAAC-OS films are improved by irradiation with visible light or ultraviolet light. Gender variation is small.

[0290] <Polycrystalline oxide semiconductor> In the polycrystalline oxide semiconductor film, crystal grains can be confirmed in the TEM image. The crystal grains contained in the crystalline oxide semiconductor film are, for example, 2 nm to 3 nm in a TEM image. 00 nm or less, 3 nm to 100 nm or 5 nm to 50 nm. In addition, in the case of a polycrystalline oxide semiconductor film, crystal grain boundaries cannot be confirmed in the TEM images. There may be cases where this occurs.

[0291] The polycrystalline oxide semiconductor film has a plurality of crystal grains, and the crystal orientation between the plurality of crystal grains is In addition, the polycrystalline oxide semiconductor film may be measured by using, for example, an XRD device. When performing out-of-plane analysis, single or multiple peaks may appear. For example, in the case of a polycrystalline IGZO film, the 2θ value indicating the orientation peaks at around 31°, and In some cases, multiple peaks may appear, indicating multiple types of orientation.

[0292] A polycrystalline oxide semiconductor film has high crystallinity and therefore may have high electron mobility. Therefore, a transistor using a polycrystalline oxide semiconductor film has high field-effect mobility. However, in the polycrystalline oxide semiconductor film, impurities may be segregated at grain boundaries. The grain boundaries of a polycrystalline oxide semiconductor film become defect states. Since a generation source or a trap state may occur, Compared with transistors using CAAC-OS films, the fluctuation in electrical characteristics is large and the reliability is low. In some cases, the transistor may have a low resistance.

[0293] <Microcrystalline oxide semiconductor> In the TEM image of the microcrystalline oxide semiconductor film, crystal parts can be clearly seen. The crystal parts contained in the microcrystalline oxide semiconductor film may have a size of 1 nm or more and 100 nm or more. In particular, the size of the particles is between 1 nm and 10 nm. Nanocrystals (nc) are microcrystals with a diameter of 1 to 3 nm or less. The oxide semiconductor film having nc-OS (nanocrystalline O The nc-OS film is called a T In EM images, grain boundaries may not be clearly visible.

[0294] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or less). The nc-OS film has a periodic atomic arrangement in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts, and therefore no orientation is observed throughout the film. Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on the analysis method. For example, XRD, which uses X-rays with a diameter larger than that of the crystal part, is used for nc-OS films. When structural analysis is performed using the out-of-plane method, the crystal planes are In addition, the nc-OS film had a diameter larger than that of the crystalline part (e.g. When electron beam diffraction (also called selected area electron beam diffraction) is performed using an electron beam of 50 nm or more, On the other hand, for the nc-OS film, the diffraction pattern is crystalline. The electron beam diameter is close to the size of the crystal part or smaller than the crystal part (for example, 1 nm to 30 nm). When electron diffraction (also called nanobeam electron diffraction) is performed, spots are observed. In addition, when nanobeam electron diffraction was performed on the nc-OS film, a circular (ring-shaped) ) Bright areas may be observed. When diffraction occurs, multiple spots may be observed within the ring-shaped area.

[0295] Figure 17 shows the nanobeam electron diffraction patterns of the sample with the nc-OS film at different measurement points. In this example, the sample was cut in a direction perpendicular to the surface on which the nc-OS film was formed. The slice is cut to a thickness of 10 nm or less. In this example, the electron beam has a diameter of 1 nm. The incident light was incident from a direction perpendicular to the cut surface of the sample. However, when nanobeam electron diffraction is performed, a diffraction pattern showing the crystal planes is obtained, but it is difficult to distinguish the specific direction. It was found that no orientation to the crystal plane was observed.

[0296] The nc-OS film is an oxide semiconductor film that has higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, the crystal orientation is not regular between different crystal parts. The OS film has a higher density of defect states than the CAAC-OS film.

[0297] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0298] (Embodiment 9) In the method for manufacturing a transistor described in any of Embodiments 1 to 8, After forming the layers 0 and 21, the oxide semiconductor film 19 is exposed to plasma generated in an oxidizing atmosphere, Oxygen can be supplied to the oxide semiconductor film 19. The oxidizing atmosphere may be oxygen, ozone, or the like. In addition, the plasma treatment may be performed in the form of a base gas. The oxide semiconductor film 19 is exposed to plasma generated without applying a bias to the plate 11 side. As a result, the oxide semiconductor film 19 is not damaged and oxygen is supplied. As a result, the amount of oxygen vacancies in the oxide semiconductor film 19 can be reduced. In addition, impurities such as fluorine remaining on the surface of the oxide semiconductor film 19 due to the etching treatment are removed. It is possible to remove halogens such as chlorine and hydrogen. It is preferable to perform the process while heating the oxide semiconductor film 19. The hydrogen atoms in the oxide semiconductor film 19 are bonded to water. As a result, the amount of hydrogen and water contained in the oxide semiconductor film 19 can be reduced. This can be done.

[0299] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0300] (Embodiment 10) The oxide semiconductor film disclosed in the above embodiment can be formed by sputtering. However, it may be formed by other methods, for example, thermal CVD. OCVD(Metal Organic Chemical Vapor Deposit) tion method and ALD (Atomic Layer Deposition) method. is also good.

[0301] Thermal CVD is a film formation method that does not use plasma, so defects can occur due to plasma damage. This has the advantage that no additional steps are required.

[0302] In the thermal CVD method, the source gas and the oxidizing agent are fed into the chamber at the same time, and the chamber is heated to atmospheric pressure. Alternatively, a film is formed by reacting the reactants near or on the substrate under reduced pressure and depositing the reactants on the substrate. You may go.

[0303] In addition, in the ALD method, the pressure inside the chamber is set at atmospheric pressure or reduced pressure, and the source gas for the reaction is The gases may be introduced into the chamber in sequence, and the film may be formed by repeating the gas introduction sequence. For example, by switching each switching valve (also called high-speed valve), two or more types of The above source gases are supplied to the chamber in order, and the first source gas is supplied to the chamber in order to prevent the mixture of the source gases. An inert gas (such as argon or nitrogen) is introduced simultaneously with or after the raw material gas. The second source gas is introduced. When an inert gas is introduced at the same time, the inert gas is It acts as a carrier gas, and even if an inert gas is introduced at the same time as the second source gas is introduced, In addition, the first source gas is discharged by evacuation instead of introducing an inert gas. After that, a second source gas may be introduced. The first source gas is adsorbed on the surface of the substrate to form a first layer. The first layer is deposited on the second layer by reacting with the second source gas introduced later. This process is repeated several times while controlling the gas introduction sequence until the desired thickness is reached. By doing so, a thin film with excellent step coverage can be formed. The thickness of the thin film is determined by the gas introduction. The thickness can be precisely adjusted by changing the number of times the sequence is repeated. This is suitable for producing miniature FETs.

[0304] Thermal CVD methods such as MOCVD and ALD have been disclosed in the embodiments described above. It is possible to form various films such as metal films, oxide semiconductor films, and inorganic insulating films. In the case of forming an nGaZnO film, trimethylindium, trimethylgallium, and Dimethyl zinc is used. The chemical formula for trimethylindium is In(CH 3 ) 3 Yes The chemical formula for trimethylgallium is Ga(CH 3 ) 3 In addition, dimethyl thio The chemical formula for lead is Zn(CH 3 ) 2 In addition, the combination is not limited to these, and Instead of methylindium, triethylindium (chemical formula In(C 2 H 5 ) 3 ) It is also possible to use triethylgallium (chemical formula Ga(C)) instead of trimethylgallium. 2 H 5 ) 3 ) can be used, and diethylzinc (chemical formula Zn(C) can be used instead of dimethylzinc. 2 H 5 ) 2 ) can also be used.

[0305] For example, an oxide semiconductor film, such as In-Ga-Zn- When forming an O film, In(CH 3 ) 3 Gas and O 3 Gases were introduced repeatedly in sequence to -O layer, and then Ga(CH 3 ) 3 Gas and O 3 Gas is introduced simultaneously to form the GaO layer. Then Zn(CH 3 ) 2 and O 3 Gases are introduced simultaneously to form the ZnO layer. The order of these layers is not limited to this example. A mixed compound layer such as an O layer, an In-Zn-O layer, or a Ga-Zn-O layer may be formed. , O 3 H obtained by bubbling inert gas such as Ar instead of gas 2 Even with O gas Good but without H 3 It is preferable to use In(CH 3 ) 3 Gas? And In(C 2 H 5 ) 3 Gas may also be used. 3 ) 3 Change to gas, Ga(C 2 H 5 ) 3 Gas may also be used. 2 H 5 ) 2 Gas may also be used. .

[0306] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0307] (Embodiment 11) A semiconductor device having a display function (display) using the transistor shown as an example in the above embodiment In addition, a part of a driver circuit including a transistor can be manufactured. Alternatively, the entire display can be formed on the same substrate as the pixel section to form a system-on-panel. In this embodiment, a display device using the transistors shown as examples in the above embodiment will be described. An example of the device will be described with reference to Figs. 18 and 19. 18B) is a cross-sectional view showing the cross-sectional configuration of the portion indicated by the dashed line MN in FIG. 18B. .

[0308] In FIG. 18A, a pixel portion 902 provided on a first substrate 901 is surrounded by a A sealant 905 is provided and the semiconductor device is sealed with a second substrate 906. ) is different from the region surrounded by the sealant 905 on the first substrate 901. A signal line formed of a single crystal semiconductor or a polycrystalline semiconductor on a separately prepared substrate is placed in the region where the A driver circuit 903 and a scanning line driver circuit 904 are mounted. 03, various signals and potentials given to the scanning line driver circuit 904 or the pixel portion 902 are F Supplied by PC (Flexible printed circuit) 918 and 918b are being provided.

[0309] In FIG. 18B and FIG. 18C, a pixel portion 90 provided on a first substrate 901 A sealant 905 is provided so as to surround the insulating film 902 and the scanning line driver circuit 904. A second substrate 906 is provided on the pixel portion 902 and the scanning line driver circuit 904. The pixel portion 902 and the scanning line driver circuit 904 are formed by a first substrate 901 and a sealing material 905. The display element is sealed with the second substrate 906. In FIG. 9C, the region surrounded by the sealant 905 on the first substrate 901 is In different regions, a signal is formed on a separately prepared substrate using a single crystal semiconductor or polycrystalline semiconductor. In FIG. 18B and FIG. 18C, the signal Various signals and signals provided to the line driver circuit 903, the scanning line driver circuit 904, or the pixel portion 902 The power and potential are supplied from FPC918.

[0310] In addition, in FIG. 18(B) and FIG. 18(C), a signal line driver circuit 903 is separately formed. Although an example in which the first substrate 901 is mounted is shown, the present invention is not limited to this configuration. Alternatively, a driving circuit may be formed separately and mounted, or a part of a signal line driving circuit or a scanning line driving circuit may be mounted. Only a part of it may be formed separately and mounted.

[0311] The method of connecting the separately formed drive circuit is not particularly limited, and may be any method such as COG ( hip on glass method, wire bonding method, or TAB (Ta The PE Automated Bonding method can be used. A) is an example in which a signal line driver circuit 903 and a scanning line driver circuit 904 are mounted by the COG method. FIG. 18B shows an example in which a signal line driver circuit 903 is mounted by the COG method. 18(C) shows an example in which a signal line driver circuit 903 is mounted by the TAB method.

[0312] The display device includes a panel in which a display element is sealed, and a controller for the panel. This includes modules in which ICs, etc., including lasers, are mounted.

[0313] In this specification, the term "display device" refers to an image display device. For example, a module with an FPC or TCP attached, or a printed wiring board on the TCP A module with a display element or a display device with an IC (integrated circuit) directly mounted on it using the COG method. The display device includes all installed modules.

[0314] In addition, the pixel portion and the scan line driver circuit provided on the first substrate have a plurality of transistors. The transistor described in the above embodiment can be applied to the scan line. The transistor described in the above embodiment is applied to a buffer circuit included in a driver circuit. can be done.

[0315] Examples of display elements provided in the display device include liquid crystal elements (also called liquid crystal display elements), light-emitting elements, and the like. A light-emitting element (also called a light-emitting display element) can be used. A light-emitting element is an element that emits light by applying a current or a voltage. This category includes elements whose brightness is controlled by a specific factor, such as inorganic EL (Electroluminescent) devices. These include organic EL elements, electronic inks, etc. A display medium in which the contrast changes due to electrical effects, such as a liquid crystal display, can also be used. FIG. 19(A) shows an example of a liquid crystal display device using a liquid crystal element as a display element, and FIG. An example of a light-emitting display device using a light-emitting element as a display element will be described.

[0316] As shown in FIG. 19(A) and FIG. 19(B), the semiconductor device has a connection terminal electrode 915 and a terminal The connection terminal electrode 915 and the terminal electrode 916 are connected to an FPC 918. The electrode 914 is electrically connected to a terminal via an anisotropic conductive material 919 .

[0317] The connection terminal electrode 915 is formed from the same conductive film as the first electrode 930, and the terminal electrode 916 is formed of the same conductive film as the pair of electrodes of the transistors 910 and 911.

[0318] A pixel portion 902 and a scanning line driver circuit 904 provided on a first substrate 901 are In FIG. 19(A) and FIG. 19(B), a pixel portion 902 includes a transistor. 9 and a transistor 911 included in the scanning line driver circuit 904. In FIG. 19A, the transistor 910 and the transistor 911 are provided with an insulator. In FIG. 19B, a flattening film 921 is further provided on the insulating film 924. It is provided.

[0319] In this embodiment, the transistors 910 and 911 are the same as those in the above embodiment. The transistors shown in FIG. 9 can be appropriately applied. By using the transistor described in the above embodiment as the transistor 911, a high-quality display device can be obtained. It is possible to create a device.

[0320] In FIG. 19B, the transistor 91 for the driver circuit is disposed on the planarizing film 921. A conductive film 917 is provided so as to overlap with a channel region of the oxide semiconductor film 926. In this embodiment, the conductive film 917 is formed of the same conductive film as the first electrode 930. By providing the conductive film 917 so as to overlap with the channel region of the oxide semiconductor film, The amount of change in the threshold voltage of the transistor 911 before and after the BT stress test was further In addition, the potential of the conductive film 917 can be reduced by the gate electrode of the transistor 911. The conductive film may be the same as or different from the first gate electrode, and the conductive film may function as the second gate electrode. The potential of the conductive film 917 can be GND, 0 V, a floating state, or When the minimum potential of the drive circuit (Vss, for example, the potential of the source electrode is used as the reference, The potential may be the same as or equivalent to the potential of the electrode.

[0321] The conductive film 917 also has a function of blocking an external electric field. (The circuit part including the transistor) The shielding function of the conductive film 917 prevents the device from being affected by external electric fields such as static electricity. This can prevent the electrical characteristics of the transistor from being changed. The above-described embodiment mode can be applied to any of the transistors.

[0322] The transistor 910 provided in the pixel portion 902 is electrically connected to a display element. The display element is not particularly limited as long as it can display an image. It can be used.

[0323] In FIG. 19A, a liquid crystal element 913 which is a display element has a first electrode 930, a second electrode The liquid crystal layer 908 is sandwiched between two alignment films 931 and 938. The second electrode 931 is provided with an insulating film 932 and an insulating film 933 that function as a first insulating film. The first electrode 930 and the second electrode 931 are disposed on the second substrate 906 side, and the first electrode 930 and the second electrode 931 are disposed on the second substrate 906 side. The structure is such that they overlap through a gap.

[0324] The spacer 935 is a columnar spacer obtained by selectively etching an insulating film. and in order to control the distance (cell gap) between the first electrode 930 and the second electrode 931, A spherical spacer may also be used.

[0325] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. When the temperature of the cholesteric liquid crystal is increased, the cholesteric phase transitions to the isotropic phase. The blue phase appears only in a narrow temperature range, so it is necessary to improve the temperature range. In order to improve the liquid crystal layer, a liquid crystal composition containing a chiral agent is used. The liquid crystal composition containing the chiral agent has a short response time of 1 msec or less and is optically isotropic. Therefore, alignment treatment is not required and viewing angle dependency is small. Also, no alignment film is required. This eliminates the need for rubbing, preventing electrostatic damage caused by rubbing. This can prevent the liquid crystal display device from being damaged or broken during the manufacturing process. This makes it possible to improve the productivity of liquid crystal display devices.

[0326] The first substrate 901 and the second substrate 906 are fixed by a sealant 925. The molding material 925 can be an organic resin such as a thermosetting resin or a photosetting resin.

[0327] In addition, the transistor including the oxide semiconductor film used in the above embodiment has a switching It has excellent characteristics. In addition, it has a relatively high field effect mobility, which allows for high-speed operation. Therefore, by using the above transistor in a pixel portion of a semiconductor device having a display function, In addition, a driver circuit section or a pixel section can be formed on the same substrate. Since it is possible to manufacture them separately, the number of parts in a semiconductor device can be reduced. do.

[0328] The size of the storage capacitor provided in the liquid crystal display device is determined by the capacitance of the transistor arranged in the pixel portion. It is set so that the charge can be held for a certain period of time, taking into account the break current, etc. By using a transistor having a nitride semiconductor film, the liquid crystal capacitance in each pixel is It is sufficient to provide a storage capacitor having a capacity of 1 / 3 or 1 / 5 or less. Therefore, the aperture ratio of the pixel can be increased.

[0329] In addition, in display devices, black matrices (light-shielding films), polarizing members, phase difference members, reflectors, Optical members (optical substrates) such as anti-reflection members are provided as appropriate. For example, a polarizing substrate and a retardation Circular polarization by the substrate may be used. Also, backlight, sidelight, etc. may be used as the light source. It may be used.

[0330] In addition, the display method in the pixel section uses the progressive method, interlace method, etc. In addition, the color elements controlled by pixels when displaying colors are RGB (RGB=RGB). The color is not limited to the three colors RGBW (W stands for white, G stands for red, B stands for green, and B stands for blue). ) or RGB plus one or more colors such as yellow, cyan, or magenta The size of the display area may be different for each dot of the color element. The present invention is not limited to a color display device, but may be applied to a monochrome display device. can also be applied to.

[0331] In FIG. 19B, a light-emitting element 963 which is a display element is provided in a pixel portion 902. The light-emitting element 963 is electrically connected to the transistor 910. The laminated structure includes a first electrode 930, a light-emitting layer 961, and a second electrode 931. However, the laminated structure is not limited to the structure shown in FIG. The configuration of the light emitting element 963 is appropriately determined according to the direction of the light to be extracted from the light emitting element 963. It can be changed as needed.

[0332] The partition 960 is formed using an organic insulating material or an inorganic insulating material. An opening is formed on the first electrode 930 using a resin material, and the sidewall of the opening has a continuous curvature. It is preferable to form the inclined surface so as to have a slope having a given shape.

[0333] The light-emitting layer 961 may be composed of a single layer or a plurality of layers may be laminated. Either way is fine.

[0334] In order to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 963, the second electrode 9 A protective film may be formed on the insulating film 31 and the partition wall 960. The protective film may be a silicon nitride film, a nitride film, or the like. Silicon oxide film, aluminum oxide film, aluminum nitride film, aluminum oxynitride film An aluminum nitride oxide film, a DLC film, or the like can be formed on the first substrate 90. A filler 964 is placed in the space sealed by the first and second substrates 906 and the sealant 936. In this way, the container is airtight and has minimal degassing, so that it is not exposed to the outside air. Protective films (lamination films, UV-curable resin films, etc.) or cover materials that do not Caging (encapsulation) is preferred.

[0335] The sealant 936 is made of organic resin such as thermosetting resin or photocurable resin, or a free resin containing low melting point glass. Frit glass can be used. Frit glass is highly resistant to impurities such as water and oxygen. In addition, when frit glass is used as the sealant 936, In this case, as shown in FIG. 19B, a frit glass is provided on the insulating film 924 to improve adhesion. This is preferable because it can increase

[0336] Filler 964 can be inert gas such as nitrogen or argon, or ultraviolet curing resin or Thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic resin, poly Imide, epoxy resin, silicone resin, PVB (Polyvinyl Butyral) or EVA (ethylene vinyl acetate) can be used. For example, nitrogen can be used as a filler. Good.

[0337] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be attached to the light-emitting surface of the light-emitting element. ), retardation plates (lambda / 4 plates, lambda / 2 plates), color filters, and other optical films are appropriately installed. Alternatively, the polarizing plate or the circular polarizing plate may be provided with an anti-reflection film. It is possible to apply an anti-glare treatment that can diffuse reflected light and reduce glare.

[0338] A first electrode and a second electrode (a pixel electrode, a common electrode, and a counter electrode) for applying a voltage to a display element In the case of a holographic laser, the direction of the light to be extracted, the location of the electrodes, and the pattern of the electrodes are all determined by the following factors: The translucency or reflectivity can be selected according to the layer structure.

[0339] The first electrode 930 and the second electrode 931 are made of indium oxide containing tungsten oxide. Indium zinc oxide with tungsten oxide, indium oxide with titanium oxide, acid Indium tin oxide with titanium dioxide, ITO, indium zinc oxide, silicon dioxide added A light-transmitting conductive material such as indium tin oxide can be used.

[0340] The first electrode 930 and the second electrode 931 are made of tungsten (W) and molybdenum (Mo ), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), Tantalum (Ta), Chromium (Cr), Cobalt (Co), Nickel (Ni), Titanium (T i) Metals such as platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag), or It can be formed using one or more of the alloys or metal nitrides. do.

[0341] The first electrode 930 and the second electrode 931 are made of a conductive polymer. The conductive polymer may be formed using a conductive composition containing a conductive polymer such as A so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or or its derivatives, polypyrrole or its derivatives, polythiophene or its derivatives, Or a copolymer of two or more of aniline, pyrrole and thiophene or a derivative thereof. Examples include:

[0342] In addition, since transistors are easily damaged by static electricity, etc., a protection circuit for protecting the drive circuit is It is preferable to provide a protection circuit using a non-linear element.

[0343] As described above, by using the transistor described in the above embodiment, Therefore, a highly reliable semiconductor device can be provided.

[0344] The structures and methods described in this embodiment may be used in conjunction with structures and methods described in other embodiments and examples. and the like. [Explanation of symbols]

[0345] 11 Substrate 15 Gate electrode 16 Insulating film 17 Gate insulating film 17a Nitride insulating film 17b Oxide insulating film 17c Nitride insulating film 17d Nitride insulating film 17e Nitride insulating film 19 Oxide semiconductor film 19a Low resistance region 19b Low resistance region 19c Dashed line 19d Dashed line 20 electrodes 21 electrodes 22 Oxide insulating film 23 Oxide insulating film 24 Oxide insulating film 25 Oxide insulating film 26 Nitride insulating film 27 Nitride insulating film 28 Gate insulating film 28c opening 29 Gate electrode 29a Gate electrode 29b Gate electrode 30 electrodes 31 Gate insulating film 33 Oxide insulating film 35 Oxide insulating film 37 Nitride insulating film 38 Gate insulating film 38a opening 38b opening 38c opening 39 Gate electrode 40 electrodes 47 Multilayer film 48 Multilayer film 49a Oxide semiconductor film 49b Oxide semiconductor film 50 Transistors 51 Transistor 52 Transistor 60 Transistor 70 Transistor 71 Transistor 201 Gate electrode 203 Insulating film 205 Oxide Semiconductor Film 207 Electrode 208 Electrode 209 Insulating Film 213 Gate electrode 231 Gate electrode 233 Gate insulating film 235 Oxide Semiconductor Film 237 Electrode 238 Electrode 239 Insulating Film 901 Board 902 Pixel section 903 Signal line driver circuit 904 Scanning line driver circuit 905 Sealing material 906 Substrate 908 Liquid crystal layer 910 Transistor 911 Transistor 913 Liquid crystal element 915 Connection terminal electrode 916 Terminal electrode 917 Conductive Film 918 FPC 919 Anisotropic conductive agent 921 Flattening film 924 Insulating film 925 Sealing material 926 Oxide Semiconductor Film 930 electrode 931 Electrode 932 Insulating film 933 Insulating film 935 Spacer 936 Sealing material 960 Bulkhead 961 Emitting layer 963 Light emitting element 964 Filling material

Claims

1. A first gate electrode; a first insulating film on the first gate electrode; an oxide semiconductor film on the first insulating film; a second insulating film on the oxide semiconductor film; a second gate electrode on the second insulating film; the oxide semiconductor film has a channel formation region, an end of the second insulating film has a region located inside an end of the first gate electrode and a region located outside an end of the second gate electrode in a cross-sectional view in a channel length direction; the second gate electrode has a region overlapping the first insulating film and a first region positioned outside an end of the first gate electrode in a cross section in a channel width direction; In the first region, a bottom surface of the second gate electrode is located lower than a bottom surface of the oxide semiconductor film.

2. A first gate electrode; a first insulating film on the first gate electrode; an oxide semiconductor film on the first insulating film; a second insulating film on the oxide semiconductor film; a second gate electrode on the second insulating film; the oxide semiconductor film has a channel formation region, an end of the second insulating film has a region located inside an end of the first gate electrode and a region located outside an end of the second gate electrode in a cross-sectional view in a channel length direction; an end of the second gate electrode has a region located inside an end of the oxide semiconductor film in a cross-sectional view in a channel length direction; the second gate electrode has a region overlapping the first insulating film and a first region positioned outside an end of the first gate electrode in a cross section in a channel width direction; In the first region, a bottom surface of the second gate electrode is located lower than a bottom surface of the oxide semiconductor film.

3. In claim 1 or 2, When viewed in a cross-sectional view in a channel width direction, the first insulating film has a second region overlapping the channel formation region, the first insulating film has a third region located outside an end of the second gate electrode in a cross-sectional view in a channel width direction; A semiconductor device, wherein the thickness of the first insulating film in the second region is greater than the thickness of the first insulating film in the third region.

Images