Gas phase etching device, oxide film removal method for silicon wafer surface, and manufacturing method of epitaxial silicon wafer

Abstract

To provide a gas phase etching device capable of more uniformly removing an oxide film formed on a silicon wafer surface, an oxide film removal method for a silicon wafer surface, and a manufacturing method of an epitaxial silicon wafer.SOLUTION: A gas phase etching device comprises: a gas introduction pipe for introducing an etching gas from an air outlet which is positioned within a reaction container; a stage for wafer placement which is exposed to the etching gas and positioned below the air outlet of the gas introduction pipe; and a gas discharge pipe for discharging the etching gas to the outside of the reaction container from an air inlet positioned within the reaction container and below the stage for wafer placement. The gas phase etching device further comprises two or more rectification plates which are installed on side walls within the reaction container, bridge the side walls, include a plurality of through holes, and rectify the etching gas. Any rectification plate is disposed below the air outlet of the gas introduction pipe and disposed above the air inlet of the gas discharge pipe.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a vapor phase etching apparatus, a method for removing an oxide film on a surface of a silicon wafer, and a method for manufacturing an epitaxial silicon wafer. [Background technology]

[0002] In recent years, epitaxial silicon wafers, which are made by depositing a silicon epitaxial layer on the surface of a bulk polished silicon wafer, are used in advanced semiconductor device processes. In the manufacturing process of epitaxial silicon wafers, it is known that the high temperature process used to deposit the silicon epitaxial layer causes a problem of autodoping, in which dopants such as boron added to the wafer diffuse into the gas phase and the diffused dopants are mixed into the epitaxial layer.

[0003] In order to solve this problem, a technique is known in which an oxide film is formed on the back surface of a silicon wafer before forming a silicon epitaxial layer to prevent diffusion of dopants. On the other hand, when an oxide film is formed on the back surface of a silicon wafer, the oxide film may be formed up to the edge portion of the front surface. Since the formation of a silicon epitaxial layer on the oxide film causes particles to be generated on the silicon wafer, it is common to remove the oxide film formed on the edge portion of the silicon wafer. For example, Patent Document 1 discloses a method of removing an oxide film, in which an oxide film is formed on the back surface of a semiconductor wafer, the semiconductor wafer is transported into a chamber of a vapor phase etching device having a chamber with a horizontal ceiling, the wafer with the back surface on which the oxide film is formed is placed horizontally on a stage horizontally installed in the chamber, and an etching gas is supplied to the semiconductor wafer to remove excess oxide film formed on the edge portion of the semiconductor wafer by vapor phase etching. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2012-222014 A Summary of the Invention [Problem to be solved by the invention]

[0005] By using the oxide film removal method described in Patent Document 1, it is possible to uniformly remove the oxide film formed on the surface of a silicon wafer. However, with the recent trend toward higher precision in semiconductor processes, there is an increasing demand for improved precision in gas-phase etching. Therefore, an object of the present invention is to provide a gas-phase etching apparatus capable of more uniformly removing the oxide film formed on the surface of a silicon wafer, a method for removing an oxide film from the surface of a silicon wafer, and a method for manufacturing an epitaxial silicon wafer. [Means for solving the problem]

[0006] The present inventors have conducted extensive research to solve the above problems and have come up with the idea of ​​providing a gas-phase etching apparatus with a flow straightening plate, which has enabled the etching gas to come into uniform contact with the wafer surface.

[0007] (1) a gas introduction pipe for introducing an etching gas from an outlet located in a reaction chamber; a wafer mounting stage that is exposed to the etching gas and is located below the outlet of the gas introduction pipe; a gas exhaust pipe that exhausts the etching gas to the outside of the reaction vessel from a suction port located within the reaction vessel and below the wafer mounting stage, The reaction chamber further includes two or more flow straightening plates that are installed on side walls of the reaction chamber and extend between the side walls, the flow straightening plates having a plurality of through holes and straightening the etching gas; a gas-phase etching apparatus, wherein each of the baffles is disposed below the outlet of the gas inlet pipe and above the suction port of the gas exhaust pipe.

[0008] (2) The straightening vane includes a first straightening vane and a second straightening vane arranged parallel to each other and spaced apart from each other, the first current plate is provided above a mounting surface of the wafer mounting stage, The vapor-phase etching apparatus according to (1), wherein the second baffle plate is provided below a mounting surface of the wafer mounting stage.

[0009] (3) The straightening vane further includes a third straightening vane arranged parallel to and spaced apart from the first straightening vane and the second straightening vane, The vapor phase etching apparatus according to (1) or (2), wherein the third current plate is provided between the first current plate and a mounting surface of the wafer mounting stage.

[0010] (4) The vapor-phase etching apparatus according to any one of (1) to (3), wherein the surface of the current plate is made of an acid-resistant resin.

[0011] (5) The vapor phase etching apparatus according to (4), wherein the acid-resistant resin is made of any one of polyvinyl chloride, polyvinylidene chloride, polyethylene, polypropylene, and polytetrafluoroethylene.

[0012] (6) The vapor-phase etching apparatus according to any one of (1) to (5), wherein the gas introduction pipe is installed from a bottom surface of the reaction chamber toward an upper portion.

[0013] (7) A method for removing an oxide film on a surface of a silicon wafer using the vapor phase etching apparatus according to any one of (1) to (6), comprising the steps of: A silicon wafer is placed on the stage surface of the wafer placement stage; A method for removing an oxide film on a surface of a silicon wafer, comprising introducing a hydrogen fluoride-containing gas from the gas inlet pipe.

[0014] (8) The method for removing an oxide film on a silicon wafer surface according to (7), further comprising adjusting an arrangement of the baffle plate in advance so that a coefficient of variation representing a variation in gas flow rate at each point on the peripheral portion of the silicon wafer surface is 20% or less.

[0015] (9) an oxide film removing step of placing a silicon wafer on a stage surface of the vapor phase etching apparatus according to any one of (1) to (6) and introducing a hydrogen fluoride-containing gas through the gas inlet pipe to remove an oxide film on the silicon wafer; an epitaxial growth step of growing a silicon epitaxial layer on the surface of the silicon wafer after the oxide film has been removed; A method for manufacturing an epitaxial silicon wafer. Effect of the Invention

[0016] According to the present invention, it is possible to provide a vapor phase etching apparatus, a vapor phase etching method, and a method for manufacturing an epitaxial silicon wafer, which are capable of more uniformly removing an oxide film formed on the surface of a silicon wafer.

[0017] Furthermore, being able to remove the oxide film more uniformly leads to an improvement in yield when manufacturing wafers and in yield when manufacturing devices from the wafers. Improving yields increases the efficiency of semiconductor manufacturing and enables greater production of high-quality products, thereby promoting technological innovation and contributing to the sustainable development of the industry. Improving yields also contributes to the efficient use of resources by reducing waste of materials consumed in the manufacturing process of semiconductor products. Furthermore, improved yields reduce energy waste in the semiconductor manufacturing process, thereby contributing to a reduction in greenhouse gas emissions. In other words, the present invention makes it possible to contribute to, for example, "Goal 9: Building industry, innovation and infrastructure," "Goal 12: Ensuring sustainable consumption and production," and "Goal 13: Combating climate change" in the Sustainable Development Goals (SDGs). [Brief description of the drawings]

[0018] [Figure 1]1 is a schematic diagram showing an overview of the configuration of a vapor phase etching apparatus according to an embodiment of the present invention. [Diagram 2] FIG. 2 is a schematic diagram illustrating an example of a straightening plate according to the present embodiment. [Diagram 3] FIG. 2 is a schematic diagram illustrating an example of a straightening plate according to the present embodiment. [Figure 4] FIG. 13 is a diagram showing the distribution of gas flow rates directly above a silicon wafer, calculated in Comparative Example 1. [Diagram 5] FIG. 13 is a diagram showing the distribution of gas flow rates directly above a silicon wafer calculated in Comparative Example 2. [Figure 6] FIG. 13 is a diagram showing the distribution of gas flow rates directly above a silicon wafer calculated in Comparative Example 3. [Figure 7] FIG. 1 is a diagram showing the distribution of gas flow rates directly above a silicon wafer, calculated in Example 1-1. [Figure 8] FIG. 13 is a diagram showing the distribution of gas flow rates directly above a silicon wafer, calculated in Example 1-2. [Figure 9] FIG. 13 is a diagram showing the distribution of gas flow rates directly above a silicon wafer, calculated in Example 1-3. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] Prior to describing the embodiments, the present inventor will explain how he completed the present invention. A conventionally known edge oxide film removal device (WREM; Williamson Rogers Edge-etch Module) uniformly removes an oxide film formed on the edge of a silicon wafer while also removing an oxide film formed on the front surface of the silicon wafer. This edge oxide film removal device introduces hydrofluoric acid gas, which is generated by bubbling a hydrofluoric acid solution, into a reaction vessel of the device as an etching gas, and etches the oxide film within a supply rate-limited range. Here, as the diameter of the wafer increases, restrictions on the piping position and various equipment components become stricter, and it is difficult to perform etching while rotating the silicon wafer in the circumferential direction. Therefore, the silicon wafer is left stationary and gas-phase etching is performed. In recent years, the present inventor has considered that the demand for further uniformity in oxide film removal in the silicon oxide film removal process will increase in consideration of the increasing demand for higher precision in semiconductor processes, and attempted to quantify the gas-phase etching state. Therefore, the gas flow velocity distribution over the entire surface of a silicon wafer having a diameter of 300 mm was examined by a numerical simulation when a known end face oxide film removal device was used. Details of the calculation conditions of this numerical simulation will be described in detail in the Examples.

[0020] According to the study of the present inventor, it was confirmed that when performing vapor-phase etching of an oxide film using a conventionally known end face oxide film removal device, a relatively large unevenness was observed in the gas flow velocity distribution on the silicon wafer surface. Therefore, an attempt was made to improve the gas flow velocity distribution on the silicon wafer surface by installing a baffle plate across the side walls in the reaction vessel of the end face oxide film removal device. The baffle plate is a punched metal baffle plate with uniformly spaced through holes. The gas flow velocity on the silicon wafer surface was reduced by installing one baffle plate in the reaction vessel. However, a detailed analysis of the gas flow velocity distribution revealed that the gas flow velocity distribution was more non-uniform than when no baffle plate was installed, regardless of whether the baffle plate was installed upstream between the gas inlet pipe and the silicon wafer, or downstream between the silicon wafer and the gas exhaust pipe. Furthermore, the present inventor conducted extensive studies and found that the gas flow velocity distribution on the silicon wafer surface could be made uniform by installing two or more baffles in the housing. An embodiment of a vapor phase etching apparatus according to the present invention, which has been completed through the above numerical simulations, will now be described in detail.

[0021] (Gas phase etching equipment) The vapor-phase etching apparatus 100 according to the present embodiment will be described in detail below with reference to Fig. 1. The vapor-phase etching apparatus 100 according to the present invention is provided with a gas inlet pipe 300 that is installed in a reaction vessel 110 and introduces an etching gas 200, a wafer mounting stage 400 that is exposed to the etching gas 200 and installed below an outlet 310 of the gas inlet pipe 300, and a gas exhaust pipe 500 that exhausts the etching gas 200 and has an inlet 510 installed below the mounting surface of the wafer mounting stage 400, and further includes two or more rectifying plates 700 that are installed on side walls in the reaction vessel 110 and span the space between the side walls, have a plurality of through holes, and rectify the flow of the etching gas 200, and each of the rectifying plates 700 is located below the outlet 310 of the gas inlet pipe 300 and above the inlet 510 of the gas exhaust pipe 500. The wafer mounting surface of the wafer mounting stage 400 is capable of mounting a silicon wafer 800 thereon. A transfer port and the like (not shown) for transferring the wafer are provided inside the reaction vessel 110. Details of each component of the vapor phase etching apparatus 100 will be described below.

[0022] <Reaction vessel> The reaction vessel 110 has a horizontal ceiling, side walls, and bottom surface. An etching gas 200 is introduced into the reaction vessel 110 and flows therethrough. From the viewpoint of increasing the etching efficiency, it is preferable to reduce the cross-sectional area of ​​the horizontal surface of the reaction vessel, but of course, the cross-sectional area is at least larger than the area of ​​the main surface of the silicon wafer. The material of the reaction vessel can be the same as that used for the reaction vessel of a general end face oxide film removal device.

[0023] <Gas introduction tube> A gas introduction pipe 300 is installed in the reaction vessel 110. The etching gas 200 can be introduced from an outlet 310 located at the end of the gas introduction pipe 300. As shown in FIG. 1, the gas introduction pipe 300 is preferably installed from the bottom surface of the reaction vessel 110 toward the top. By installing the gas introduction pipe 300 in this manner, the etching gas 200 introduced from the outlet 310 collides with the ceiling of the reaction vessel 110 and then diffuses to spread throughout the reaction vessel 110, so that the gas flow rate in the vicinity of the silicon wafer can be made uniform. However, the installation position of the gas introduction pipe 300 is not limited to this, and may be installed from the ceiling of the reaction vessel 110 toward the bottom surface, or may be installed on the wall surface, and is arbitrary.

[0024] <Gas exhaust pipe> The gas exhaust pipe 500 has an inlet 510 installed below the mounting surface of the wafer mounting stage 400. The gas exhaust pipe 500 can exhaust the etching gas 200 introduced from the gas inlet pipe 300 from the reaction vessel 110.

[0025] <<Etching gas>> As described above, the etching gas 200 is introduced into the reaction vessel 110 from the blowing port 310 of the gas introduction pipe 300, and the etching gas 200 is discharged to the outside of the reaction vessel 110 from the suction port 510 of the gas exhaust pipe 500. The type of the etching gas 200 is not particularly limited as long as it can remove the oxide film on the surface of the silicon wafer, and for example, fluorocarbons such as CF4 and CHF3 can be used, but hydrofluoric acid gas is preferable from the viewpoint of selectively etching SiO2 without etching Si. The introduction form of the etching gas 200 is not limited, but for example, when hydrofluoric acid gas is used as the etching gas, it is preferable to introduce the etching gas 200 into the reaction vessel 110 by bubbling a hydrofluoric acid solution, and etch the oxide film formed on the surface of the silicon wafer 800 within a supply rate-limited range (gas flow rate of approximately 0.04 m / s or less).

[0026] <Wafer mounting stage> The wafer mounting stage 400 is a stage for mounting the silicon wafer 800, and is preferably made of an acid-resistant resin. Examples of acid-resistant resins include polyvinyl chloride, polyvinylidene chloride, polyethylene, polypropylene, and polytetrafluoroethylene. In order to perform etching on the peripheral portion of the rear surface of the wafer, the stage shape may be made smaller than the wafer size, and the edge portion of the silicon wafer 800 may be protruded to expose the peripheral portion of the rear surface of the wafer. At this time, the diameter of the stage can be adjusted to adjust the width of the area to be etched on the peripheral portion of the rear surface of the wafer. The wafer mounting stage may be capable of rotating the wafer, but the embodiment of FIG. 1 is an embodiment in which the wafer is placed stationary without rotating it. Even in such a case, the gas flow rate distribution on the wafer surface can be made uniform by providing the flow straightening plate 700.

[0027] <Rectifier plate> The flow straightening plate 700 straightens the etching gas 200 introduced from the gas introduction pipe 300. In this embodiment, two or more flow straightening plates 700 are installed in the reaction vessel 110. The flow straightening plate 700 is preferably installed horizontally so as to span between the side walls in the reaction vessel 110. The installation form is not limited, but for example, the flow straightening plate 700 may be fixed by providing an attachment part, a fixing part, a protrusion, a support part, a locking tool, or the like on the side wall of the reaction vessel 110. Each flow straightening plate 700 is disposed below the blowing port 310 of the gas introduction pipe 300 and above the suction port 510 of the gas exhaust pipe 500.

[0028] 1, the current rectifying plate 700 preferably includes a first current rectifying plate 710 and a second current rectifying plate 720 arranged in parallel and spaced apart from each other. The first current rectifying plate 710 is preferably provided above the mounting surface of the wafer mounting stage 400, and the second current rectifying plate 720 is preferably provided below the mounting surface of the wafer mounting stage 400. It is also preferable to further include a third current rectifying plate 730 arranged in parallel and spaced apart from the first current rectifying plate 710 and the second current rectifying plate 720, and the third current rectifying plate is preferably provided between the first current rectifying plate 710 and the mounting surface of the wafer mounting stage 400.

[0029] Moreover, it is preferable that the material of the rectifying plate 700 is an acid-resistant resin. Examples of the acid-resistant resin include polyvinyl chloride, polyvinylidene chloride, polyethylene, polypropylene, and polytetrafluoroethylene.

[0030] -Through holes- The flow straightening plate 700 has a plurality of through holes, and the etching gas 200 is straightened by passing through the through holes, and the gas flow rate is made uniform on the wafer surface and the edge of the wafer. The form of the through holes provided in the flow straightening plate 700 is not particularly limited, and for example, a punched metal can be used. In addition to the through holes for straightening, the flow straightening plate 700 may be provided with holes for avoiding interference with members inside the reaction vessel 110, such as the gas introduction pipe 300 and the wafer mounting stage 400.

[0031] FIG. 2 is a specific example of a top view of the first and second current plates 710 and 720, respectively, and FIG. 3 is another specific example of a top view of the first and second current plates 710 and 720, respectively. The holes 920 are provided to avoid interference between the current plates 710 and 720 and the gas introduction pipe 300. A plurality of through holes 910 are uniformly provided in the surface of each current plate, and are arranged in a lattice pattern in both examples of FIG. 2 and FIG. 3, and it is preferable that each through hole is uniformly arranged. In addition, the second current plate 720 is further provided with holes 930 to avoid interference with the wafer mounting stage 400.

[0032] The diameter of the through-holes 910 is not particularly limited, and may be, for example, 2 mm or more and 10 mm or less, and may be, for example, φ5 mm. The shape of each of the through-holes 910 is not particularly limited, and although it is circular in the examples of Figs. 2 and 3, it may be elliptical or polygonal. The distance between the outer edges of adjacent through-holes 910 is not particularly limited, and may be, for example, 2 mm or more and 25 mm or less, and may be, for example, 10 mm. The shape, size, arrangement, etc. of the through-holes may be the same or different in each straightening plate.

[0033] As described above, by using the vapor phase etching apparatus 100 according to the present embodiment, the gas flow rate distribution on the surface of a silicon wafer placed in the apparatus can be made uniform, making it possible to remove an oxide film more uniformly than in the past.

[0034] (Gas phase etching method) The vapor-phase etching method according to the present invention is a method of vapor-phase etching using the vapor-phase etching apparatus according to the present invention described above, which is a method for removing an oxide film on a surface of a silicon wafer, comprising placing a silicon wafer on a stage surface of a wafer-mounting stage and introducing a hydrogen fluoride-containing gas through the gas inlet.

[0035] At this time, it is preferable to adjust the arrangement of the straightening plate in advance so that the coefficient of variation, which represents the variation in the gas flow rate at each point on the peripheral portion of the silicon wafer surface, is 20% or less. For example, the installation position of the straightening plate may be adjusted in the vertical direction, or a straightening plate with a different size of through hole may be used. The coefficient of variation and the value of the variance required for calculating the coefficient of variation can be obtained by numerically calculating the gas flow rate distribution. The calculation methods for the variance and the coefficient of variation are generally known, and are specifically as follows.

number

[0036] (Method of manufacturing epitaxial silicon wafers) The method for producing an epitaxial silicon wafer according to the present invention is characterized in that an oxide film on the surface of a silicon wafer is removed using the vapor-phase etching apparatus according to the present invention described above. More specifically, the method includes an oxide film removal step of placing a silicon wafer on a stage surface of the vapor-phase etching apparatus and introducing a hydrogen fluoride-containing gas from the gas inlet to remove the oxide film on the silicon wafer, and an epitaxial growth step of growing a silicon epitaxial layer on the front surface of the silicon wafer after the oxide film removal. The silicon wafer may be a conventionally known one, and may be obtained by a conventionally known method. The epitaxial silicon wafer obtained by this production method has excellent flatness on the front surface and edge portion of the silicon epitaxial layer, since the oxide film on the front surface and edge portion of the wafer is more uniformly removed.

[0037] Examples of the present invention will be described below, but the present invention is not limited to these examples. EXAMPLES

[0038] For ease of explanation, the reference numerals in Fig. 1 will be referred to. A gas flow velocity distribution on the front surface of silicon wafer 800 (hereinafter referred to as "gas flow velocity distribution on silicon wafer") was calculated when silicon wafer 800 having a diameter of 300 mm was placed on wafer mounting stage 400 in vapor phase etching apparatus 100 described above. The finite volume method was used for the calculation.

[0039] Comparative Example 1 The gas flow velocity distribution above silicon wafer 800 was calculated when no baffle plate was provided in vapor-phase etching apparatus 100. In particular, the gas flow velocity distribution at a height of 1 mm from the front surface of silicon wafer 800 (hereinafter referred to as "gas flow velocity distribution directly above silicon wafer") is shown in Fig. 4. The same applies to Figs. 5 to 9.

[0040] Comparative Example 2 In the vapor-phase etching apparatus 100, the gas flow velocity distribution above the silicon wafer 800 was calculated in a state where only the second baffle plate 720 was provided below the silicon wafer between the wafer mounting stage 400 and the suction port 510 of the gas exhaust pipe 500. The baffle plate has a punched metal shape except for holes provided therein to avoid interference with members inside the reaction vessel, the through-holes of the baffle plate have a diameter of φ5 mm, and the distance between the outer edges of the holes is uniformly 10 mm (center-to-center distance of the holes is 15 mm). The gas flow velocity distribution directly above the silicon wafer of Comparative Example 2 is shown in FIG. 5.

[0041] Comparative Example 3 In the vapor-phase etching apparatus 100, the gas flow velocity distribution above the silicon wafer 800 was calculated in a state in which only the first flow straightening plate 710 was provided above the silicon wafer between the wafer mounting stage 400 and the outlet 310 of the gas introduction pipe 300. The conditions of the through-holes other than the holes for avoiding interference with the members inside the reaction vessel were the same as those of the first flow straightening plate 710 in Comparative Example 1. The gas flow velocity distribution directly above the silicon wafer in Comparative Example 3 is shown in FIG.

[0042] (Example 1-1) In the vapor-phase etching apparatus 100, a first current plate 710 was provided above the silicon wafer between the wafer mounting stage 400 and the blow-out port 310 of the gas introduction pipe 300, and a second current plate 720 was provided below the silicon wafer between the wafer mounting stage 400 and the suction port 510 of the gas exhaust pipe 500. The conditions of the through-holes other than the holes for avoiding interference with the members in the reaction vessel were the same as those of the first current plate 710 and the second current plate 720 in Comparative Examples 1 and 2. The gas flow velocity distribution directly above the silicon wafer in Example 1-1 is shown in FIG.

[0043] (Example 1-2) In the vapor phase etching apparatus of Example 1, a third current plate 730 was further installed between the wafer mounting stage 400 and the first current plate 710, and the gas flow velocity distribution above the silicon wafer 800 was calculated. The conditions of the through holes other than the holes for avoiding interference with the members inside the reaction vessel are the same as those of the first current plate 710 and the second current plate 720. The gas flow velocity distribution directly above the silicon wafer of Example 1-2 is shown in FIG.

[0044] (Examples 1-3) The gas flow velocity distribution above silicon wafer 800 was calculated in a state where second baffle plate 720 provided between gas exhaust pipe 500 and suction port 510 was removed from the vapor phase etching apparatus of Example 2. The gas flow velocity distribution directly above silicon wafer 800 in Examples 1-3 is shown in FIG.

[0045] (Example 2-1) The gas flow velocity distribution on the silicon wafer 800 was calculated in the same manner as in Example 1-1, except that the hole diameter of each straightening plate in Example 1-1 was changed from φ5 mm to φ1 mm, and the distance between the outer edges of the holes was changed to 14 mm in order to maintain the center-to-center distance of 15 mm.

[0046] (Example 2-2) The gas flow velocity distribution on the silicon wafer 800 was calculated in the same manner as in Example 1-1, except that the hole diameter of each straightening plate in Example 1-1 was changed from φ5 mm to φ3 mm, and the distance between the outer edges of the holes was changed to 12 mm in order to maintain the center-to-center distance of 15 mm.

[0047] (Example 2-3) The gas flow velocity distribution on the silicon wafer 800 was calculated in the same manner as in Example 1-1, except that the hole diameter of each straightening plate in Example 1-1 was changed from φ5 mm to φ8 mm, and the distance between the outer edges of the holes was changed to 7 mm in order to maintain the center-to-center distance of 15 mm.

[0048] (Example 3-1) In order to change the center-to-center distance of the holes in each straightening plate in Example 1-1 from 15 mm to 20 mm, the gas flow velocity distribution on the silicon wafer 800 was calculated in the same manner as in Example 1-1, except that the distance between the outer edges of the holes was changed to 15 mm.

[0049] (Example 3-2) In order to change the center-to-center distance of the holes in each straightening plate in Example 1-1 from 15 mm to 30 mm, the distance between the outer edges of the holes was changed to 25 mm, and the gas flow velocity distribution on the silicon wafer 800 was calculated in the same manner as in Example 1-1, except that the center-to-center distance between the holes was changed to 25 mm.

[0050] The straightening plate installation conditions, through-hole conditions, and calculated gas flow velocities at each point on the peripheral portion of the silicon wafer surface in each of the above examples and comparative examples are shown in Table 1 below. Here, the average velocity, variance, and coefficient of variation are respectively shown as the gas flow velocities in Table 1. The average velocity, variance, and coefficient of variation of the gas flow velocity are calculated based on the gas flow velocities at the coordinates of 2880 points generated by the intersection of 4 scales set at 1 mm intervals in an area 147 to 150 mm from the center in the radial direction of the wafer, 10 scales set at 1 mm intervals in an area 1 to 10 mm from the front surface in the height direction of the wafer, and 72 scales set at 5° intervals in a range of 360° in the circumferential direction of the wafer.

[0051] [Table 1]

[0052] <Evaluation> First, from the gas flow velocity distribution shown in Figures 4 to 9, it was found that the gas flow velocity can be significantly changed by providing a straightening plate either above or below the silicon wafer, but it was found that only one plate cannot sufficiently suppress the variation in the gas flow velocity. On the other hand, it can be confirmed that the variation in the gas flow velocity can be suppressed by providing two or more straightening plates. In addition, the average velocity when there is no straightening plate is faster than the other levels, but this is thought to be because there are parts where the gas does not flow uniformly from top to bottom. In addition, from the calculation results of Examples 2-1 to 2-3 and Examples 3-1 to 3-2, it was confirmed that the coefficient of variation of the gas flow velocity decreases as the hole diameter becomes smaller and the hole interval becomes narrower. [Industrial Applicability]

[0053] According to the present invention, it is possible to provide a vapor phase etching apparatus, a vapor phase etching method, and a method for manufacturing an epitaxial silicon wafer, which are capable of more uniformly removing an oxide film formed on the surface of a silicon wafer. [Explanation of symbols]

[0054] 100 Gas phase etching equipment 101 Reaction vessel 200 Etching gas 300 Gas introduction pipe 310 Air outlet 400 Wafer loading stage 500 Gas exhaust pipe 510 Intake port 710,720 Rectifier plate 910 Through hole

Claims

1. a gas introduction pipe for introducing an etching gas from an outlet located in the reaction chamber; a wafer mounting stage that is exposed to the etching gas and is located below the outlet of the gas introduction pipe; a gas exhaust pipe that exhausts the etching gas to the outside of the reaction vessel from a suction port located within the reaction vessel and below the wafer mounting stage, The reaction chamber further includes two or more flow straightening plates that are installed on side walls of the reaction chamber and extend between the side walls, the flow straightening plates having a plurality of through holes and straightening the etching gas; a gas-phase etching apparatus, wherein each of the baffles is disposed below the outlet of the gas inlet pipe and above the suction port of the gas exhaust pipe.

2. The flow straightening vane includes a first flow straightening vane and a second flow straightening vane that are spaced apart from each other and arranged in parallel, the first current plate is provided above a mounting surface of the wafer mounting stage, 2. The vapor phase etching apparatus according to claim 1, wherein the second flow straightening plate is provided below a mounting surface of the wafer mounting stage.

3. The flow straightening vane further includes a third flow straightening vane arranged parallel to and spaced apart from the first flow straightening vane and the second flow straightening vane, 3. The vapor phase etching apparatus according to claim 2, wherein the third flow straightening plate is provided between the first flow straightening plate and a mounting surface of the wafer mounting stage.

4. 2. The vapor phase etching apparatus according to claim 1, wherein the surface of said current plate is made of an acid-resistant resin.

5. 5. The vapor phase etching apparatus according to claim 4, wherein the acid-resistant resin is made of any one of polyvinyl chloride, polyvinylidene chloride, polyethylene, polypropylene, and polytetrafluoroethylene.

6. 2. The vapor phase etching apparatus according to claim 1, wherein said gas introduction pipe is disposed so as to face upward from a bottom surface of said reaction vessel.

7. A method for removing an oxide film on a surface of a silicon wafer using the vapor phase etching apparatus according to any one of claims 1 to 6, comprising the steps of: A silicon wafer is placed on the stage surface of the wafer placement stage; A method for removing an oxide film on a surface of a silicon wafer, comprising introducing a hydrogen fluoride-containing gas from the gas inlet pipe.

8. 8. The method for removing an oxide film on a silicon wafer surface according to claim 7, further comprising adjusting an arrangement of the baffle plate in advance so that a coefficient of variation representing a variation in gas flow rate at each point on the peripheral portion of the silicon wafer surface is 20% or less.

9. an oxide film removing step of placing a silicon wafer on a stage surface of the vapor phase etching apparatus according to any one of claims 1 to 6, and introducing a hydrogen fluoride-containing gas through the gas inlet pipe to remove an oxide film on the silicon wafer; an epitaxial growth step of growing a silicon epitaxial layer on the surface of the silicon wafer after the oxide film has been removed; A method for manufacturing an epitaxial silicon wafer.

Images