Forming method for metal oxide

Abstract

To provide a novel metal oxide and a forming method for the same.SOLUTION: A metal oxide includes a first crystal, a second crystal, and a region between the first crystal and the second crystal. In addition, a c-axis of the first crystal and a c-axis of the second crystal are substantially parallel to each other. The crystallinity of the region is lower than that of the first crystal and the second crystal. In addition, the width of the region in a direction perpendicular to the c-axis of the first crystal is more than 0 nm and less than 1.5 nm. The first crystal and the second crystal have a layered crystal structure.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a metal oxide, a method for forming the metal oxide, and a transistor including the metal oxide. Another embodiment of the present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. Another embodiment of the present invention relates to a semiconductor wafer, a module, and an electronic device.

[0002] In this specification and the like, a semiconductor device refers to any device that can function by utilizing semiconductor characteristics. Semiconductor elements such as transistors, semiconductor circuits, arithmetic devices, and memory devices are all embodiments of semiconductor devices. Display devices (such as liquid crystal display devices and light-emitting display devices), projection devices, lighting devices, electro-optical devices, power storage devices, memory devices, semiconductor circuits, imaging devices, electronic devices, and the like may be considered to include semiconductor devices.

[0003] Note that one aspect of the present invention is not limited to the above technical field. One aspect of the invention disclosed in the present specification etc. relates to an object, a method, or a manufacturing method. Alternatively, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter. [Background technology]

[0004] Technology that constructs transistors using semiconductor thin films formed on substrates with insulating surfaces has been attracting attention. Such transistors are widely used in electronic devices such as integrated circuits (ICs) and image display devices (also simply called display devices). Silicon-based semiconductor materials are widely known as semiconductor thin films that can be used in transistors, but oxide semiconductors are also attracting attention as other materials.

[0005] In oxide semiconductors, c-axis aligned crystalline (CAAC) structures and nanocrystalline (nc) structures, which are neither single crystal nor amorphous, have been found (see Non-Patent Documents 1 and 2).

[0006] Non-Patent Documents 1 and 2 disclose techniques for manufacturing a transistor using an oxide semiconductor having a CAAC structure. [Prior art documents] [Non-patent literature]

[0007] [Non-Patent Document 1] S. Yamazaki et al., “SID Symposium Digest of Technical Papers”, 2012, volume 43, issue 1, p.183-186 [Non-Patent Document 2] S. Yamazaki et al., “Japanese Journal of Applied Physics”, 2014, volume 53, Number 4S, p.04ED18-1-04ED18-10 Summary of the Invention [Problem to be solved by the invention]

[0008] An object of one embodiment of the present invention is to provide a novel metal oxide and a method for forming the novel metal oxide. Another object of one embodiment of the present invention is to provide a novel transistor and a manufacturing method thereof. Another object of one embodiment of the present invention is to provide a semiconductor device having high on-state current. Another object of one embodiment of the present invention is to provide a semiconductor device having high field-effect mobility. Another object of one embodiment of the present invention is to provide a semiconductor device with high reliability. Another object of one embodiment of the present invention is to provide a semiconductor device having good electrical characteristics. Another object of one embodiment of the present invention is to provide a semiconductor device that can be miniaturized or highly integrated.

[0009] Note that the description of these problems does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of these problems. Note that problems other than these will become apparent from the description of the specification, drawings, claims, etc., and it is possible to extract problems other than these from the description of the specification, drawings, claims, etc. [Means for solving the problem]

[0010] One embodiment of the present invention is a metal oxide having a first crystal, a second crystal, and a region located between the first crystal and the second crystal, wherein the c-axis of the first crystal and the c-axis of the second crystal are approximately parallel, the crystallinity of the region is lower than that of the first crystal and the second crystal, and the width of the region in a direction perpendicular to the c-axis of the first crystal is greater than 0 nm and less than 1.5 nm.

[0011] Another embodiment of the present invention is a metal oxide having a first crystal, a second crystal, and a region located between the first crystal and the second crystal, wherein the c-axis of the first crystal and the c-axis of the second crystal are approximately parallel, the crystallinity of the region is lower than that of the first crystal and the second crystal, and the shortest distance from a side facing the region of the first crystal to a side facing the region of the second crystal is greater than 0 nm and less than 1.5 nm.

[0012] Another embodiment of the present invention is a metal oxide having a first crystal, a second crystal, and a region located between the first crystal and the second crystal, wherein the c-axis of the first crystal and the c-axis of the second crystal are roughly parallel, the crystallinity of the region is lower than that of the first crystal and the second crystal, and the size of the first crystal in a direction perpendicular to the c-axis of the first crystal is greater than the width of the region.

[0013] Another embodiment of the present invention is a metal oxide having a first crystal, a second crystal, and a region located between the first crystal and the second crystal, wherein the c-axis of the first crystal and the c-axis of the second crystal are approximately parallel, the density of the region is lower than the densities of the first crystal and the second crystal, and the width of the region in a direction perpendicular to the c-axis of the first crystal is greater than 0 nm and less than 1.5 nm.

[0014] Another embodiment of the present invention is a metal oxide having crystals, the metal oxide having a first crystal, a second crystal, and a region located between the first crystal and the second crystal, the c-axis of the first crystal and the c-axis of the second crystal are each approximately perpendicular to an upper surface of a surface on which the metal oxide is formed, the c-axis of the first crystal and the c-axis of the second crystal are approximately parallel, the crystallinity of the region is lower than that of the first crystal and the second crystal, and the width of the region in a direction perpendicular to the c-axis of the first crystal is greater than 0 nm and less than 1.5 nm.

[0015] Another embodiment of the present invention is a metal oxide having crystals, the metal oxide having a first crystal, a second crystal, and a region located between the first crystal and the second crystal, the c-axis of the first crystal and the c-axis of the second crystal are each approximately perpendicular to an upper surface of a surface on which the metal oxide is formed, the c-axis of the first crystal and the c-axis of the second crystal are approximately parallel, the crystallinity of the region is lower than that of the first crystal and the second crystal, and the shortest distance from a side facing the first crystal region to a side facing the second crystal region is greater than 0 nm and less than 1.5 nm.

[0016] In the above metal oxide, it is preferable that the average of the size of the first crystal in a direction perpendicular to the c-axis of the first crystal and the size of the second crystal in a direction perpendicular to the c-axis of the second crystal is 5 nm or more and 10 nm or less.

[0017] In the metal oxide, the first crystals and the second crystals preferably have a layered crystal structure.

[0018] In the above metal oxide, the first crystal and the second crystal are YbFe 2 O 4 Type structure, Yb 2 Fe 3 O 7 It is preferred that the fluororesin has a structure similar to that described above, or a modified structure thereof.

[0019] Another embodiment of the present invention is a metal oxide having crystals, wherein a TEM image of the metal oxide taken in a plane perpendicular to the surface on which the metal oxide is formed shows a first region and a second region in which an image corresponding to a crystal lattice is observed, and a third region in which an image corresponding to the crystal lattice is not clearly observed, the third region is located between the first region and the second region, the layer formed by the bright spots observed in the first region and the layer formed by the bright spots observed in the second region are roughly parallel, the width of the third region is greater than 0 nm and less than 1.5 nm, and the average of the width of the layer formed by the bright spots observed in the first region and the width of the layer formed by the bright spots observed in the second region is greater than the width of the third region.

[0020] Another embodiment of the present invention is a metal oxide having crystals, in which a TEM image of the metal oxide taken on a plane parallel to the surface on which the metal oxide is formed shows a first region and a second region in which bright spots arranged in a hexagonal or triangular shape are observed, and a third region in which the bright spots arranged in a hexagonal or triangular shape are not clearly observed, the third region being located between the first region and the second region, the width of the third region being greater than 0 nm and less than 1.5 nm, and the average of the width of the first region and the width of the second region being greater than the width of the third region.

[0021] In the above metal oxide, the metal oxide preferably contains indium, an element M (M is one or more of gallium, aluminum, yttrium, and tin), and zinc.

[0022] Another embodiment of the present invention is a semiconductor device in which any of the above metal oxides is used for a channel formation region.

[0023] In the above semiconductor device, the channel length is preferably not less than 2 nm and not more than 30 nm.

[0024] Another embodiment of the present invention is a method for forming a metal oxide, comprising: forming a metal oxide film on a substrate by an ALD method using a source gas including a precursor containing indium, a source gas including a precursor containing gallium, and a source gas including a precursor containing zinc; and performing heat treatment at a temperature of 420° C. or higher and 480° C. or lower with a flow rate ratio of nitrogen gas and oxygen gas of 4:1. Effect of the Invention

[0025] According to one embodiment of the present invention, a novel metal oxide and a method for forming the novel metal oxide can be provided. According to one embodiment of the present invention, a novel transistor and a manufacturing method thereof can be provided. According to one embodiment of the present invention, a semiconductor device having high on-state current can be provided. According to one embodiment of the present invention, a semiconductor device having high field-effect mobility can be provided. According to one embodiment of the present invention, a semiconductor device with high reliability can be provided. According to one embodiment of the present invention, a semiconductor device having excellent electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided.

[0026] Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not need to have all of these effects. Note that effects other than these will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract effects other than these from the description in the specification, drawings, claims, etc. [Brief description of the drawings]

[0027] [Figure 1] Fig. 1A is a diagram illustrating a structure, and Fig. 1B and Fig. 1C are diagrams illustrating a metal oxide according to one embodiment of the present invention. [Diagram 2]FIG. 2 illustrates a metal oxide according to one embodiment of the present invention. [Diagram 3] 3A to 3F are diagrams showing a calculation model. [Figure 4] 4A to 4F are diagrams showing a calculation model. [Diagram 5] 5A and 5B are diagrams for explaining the generated energy of VO, and FIGURES 5C and 5D are diagrams for explaining the generated energy of VOH. [Figure 6] 6A to 6D are diagrams illustrating crystals contained in a metal oxide. [Figure 7] Fig. 7A is a diagram illustrating the crystals of a metal oxide, and Figs. 7B to 7D are diagrams illustrating the polyhedrons of the crystals. [Figure 8] 8A to 8D are cross-sectional views illustrating a film forming method. [Figure 9] 9A to 9D are cross-sectional views illustrating a film forming method. [Figure 10] 10A to 10C are cross-sectional views illustrating a film forming method. [Figure 11] 11A to 11D are cross-sectional views of a metal oxide according to one embodiment of the present invention. [Figure 12] 12A and 12B are top and cross-sectional views illustrating the film forming apparatus. [Figure 13] 13A to 13C are diagrams illustrating a film forming method. [Figure 14] Fig. 14A is a diagram for explaining the classification of IGZO crystal structures, Fig. 14B is a diagram for explaining the XRD spectrum of a CAAC-IGZO film, and Fig. 14C is a diagram for explaining the ultrafine electron beam diffraction pattern of a CAAC-IGZO film. [Figure 15] 15A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 15B to 15D are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 16] 16A and 16B are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 17]17A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 17B to 17D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 18] 18A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 18B to 18D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 19] 19A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 19B to 19D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 20] 20A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 20B to 20D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 21] 21A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 21B to 21D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 22] 22A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 22B to 22D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Diagram 23] 23A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 23B to 23D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 24] 24A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 24B to 24D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Diagram 25] 25A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 25B to 25D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 26] 26A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 26B to 26D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 27] Fig. 27A is a top view of a semiconductor device according to one embodiment of the present invention, and Figs. 27B and 27C are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 28] FIG. 28 is a cross-sectional view showing a configuration of a memory device according to one embodiment of the present invention. [Figure 29] FIG. 29 is a cross-sectional view showing a configuration of a memory device according to one embodiment of the present invention. [Diagram 30] FIG. 30 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Diagram 31] 31A and 31B are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Diagram 32] FIG. 32 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Diagram 33] Fig. 33A is a block diagram showing a configuration example of a storage device according to an embodiment of the present invention, and Fig. 33B is a schematic diagram showing a configuration example of a storage device according to an embodiment of the present invention. [Diagram 34] 34A to 34H are circuit diagrams illustrating configuration examples of a memory device according to one embodiment of the present invention. [Diagram 35] 35A and 35B are schematic diagrams of a semiconductor device according to one embodiment of the present invention. [Diagram 36] 36A and 36B are diagrams illustrating an example of an electronic component. [Figure 37] 37A to 37E are schematic diagrams of a memory device which is one embodiment of the present invention. [Figure 38] 38A to 38H are diagrams illustrating electronic devices according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] Hereinafter, the embodiments will be described with reference to the drawings. However, it will be easily understood by those skilled in the art that the embodiments can be implemented in many different ways, and that the modes and details can be changed in various ways without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the following embodiments.

[0029] In addition, in the drawings, the size, thickness of layers, or areas may be exaggerated for clarity. Therefore, the scale is not necessarily limited. The drawings are schematic illustrations of ideal examples, and are not limited to the shapes or values ​​shown in the drawings. For example, in an actual manufacturing process, layers, resist masks, etc. may be unintentionally thinned by etching or other processes, but this may not be reflected in the drawings to facilitate understanding. In addition, in the drawings, the same reference numerals are used in common between different drawings for the same parts or parts having similar functions, and repeated explanations may be omitted. In addition, when referring to similar functions, the same hatch pattern may be used and no particular reference numeral may be attached.

[0030] In order to facilitate understanding of the invention, particularly in top views (also called "plan views") and perspective views, some components may be omitted from the drawings. Also, some hidden lines may be omitted from the drawings.

[0031] In addition, in this specification, ordinal numbers such as first, second, etc. are used for convenience and do not indicate the order of steps or stacking. Therefore, for example, "first" can be appropriately replaced with "second" or "third" for explanation. In addition, the ordinal numbers described in this specification and the like may not match the ordinal numbers used to specify one embodiment of the present invention.

[0032] In addition, in this specification, the terms "above" and "below" indicating the arrangement are used for convenience in order to explain the positional relationship between the components with reference to the drawings. In addition, the positional relationship between the components changes as appropriate depending on the direction in which each component is depicted. Therefore, the terms are not limited to those described in the specification, and can be rephrased appropriately depending on the situation.

[0033] For example, when it is explicitly stated in this specification that X and Y are connected, the case where X and Y are electrically connected, the case where X and Y are functionally connected, and the case where X and Y are directly connected are considered to be disclosed in this specification. Therefore, it is not limited to a specific connection relationship, for example, a connection relationship shown in a figure or text, and a connection relationship other than that shown in a figure or text is also considered to be disclosed in the figure or text. Here, X and Y are objects (for example, a device, an element, a circuit, wiring, an electrode, a terminal, a conductive film, a layer, etc.).

[0034] In this specification, a transistor is an element having at least three terminals including a gate, a drain, and a source. A region where a channel is formed between the drain (drain terminal, drain region, or drain electrode) and the source (source terminal, source region, or source electrode) (hereinafter, also referred to as a channel formation region) is provided, and a current can flow between the source and the drain through the channel formation region. In this specification, a channel formation region refers to a region through which a current mainly flows.

[0035] Furthermore, the functions of the source and drain may be interchanged when transistors of different polarities are used, when the direction of current changes during circuit operation, etc. For this reason, in this specification and the like, the terms source and drain may be used interchangeably.

[0036] The channel length refers to, for example, a region where the semiconductor (or a portion in the semiconductor through which current flows when the transistor is on) and the gate electrode overlap in a top view of a transistor, or a distance between the source (source region or source electrode) and the drain (drain region or drain electrode) in a channel formation region. Note that the channel length of one transistor does not necessarily have the same value in all regions. That is, the channel length of one transistor may not be fixed to one value. Therefore, in this specification, the channel length is defined as any one value, maximum value, minimum value, or average value in the channel formation region.

[0037] The channel width refers to, for example, the length of a channel formation region in a vertical direction based on the channel length direction in a region where a semiconductor (or a portion in the semiconductor through which current flows when the transistor is on) and a gate electrode overlap in a top view of a transistor, or in a channel formation region. Note that the channel width does not necessarily have the same value in all regions in one transistor. In other words, the channel width of one transistor may not be determined to a single value. Therefore, in this specification, the channel width is defined as any one value, maximum value, minimum value, or average value in the channel formation region.

[0038] In this specification and the like, depending on the structure of a transistor, the channel width in a region where a channel is actually formed (hereinafter also referred to as "effective channel width") may differ from the channel width shown in a top view of the transistor (hereinafter also referred to as "apparent channel width"). For example, when a gate electrode covers a side surface of a semiconductor, the effective channel width may be larger than the apparent channel width, and the influence of this may not be negligible. For example, in a fine transistor in which a gate electrode covers a side surface of a semiconductor, the proportion of a channel formation region formed on the side surface of the semiconductor may be large. In that case, the effective channel width is larger than the apparent channel width.

[0039] In such a case, it may be difficult to estimate the effective channel width by actual measurement. For example, in order to estimate the effective channel width from the design value, it is necessary to assume that the shape of the semiconductor is known. Therefore, if the shape of the semiconductor is not precisely known, it is difficult to accurately measure the effective channel width.

[0040] In this specification, when simply described as a channel width, it may refer to an apparent channel width. Alternatively, when simply described as a channel width, it may refer to an effective channel width. Note that the values ​​of the channel length, channel width, effective channel width, apparent channel width, etc. can be determined by analyzing a cross-sectional TEM image, etc.

[0041] Note that impurities in a semiconductor refer to, for example, anything other than the main components constituting the semiconductor. For example, an element with a concentration of less than 0.1 atomic % can be said to be an impurity. The inclusion of impurities can, for example, increase the density of defect states in the semiconductor and reduce the crystallinity. When the semiconductor is an oxide semiconductor, impurities that change the characteristics of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, and transition metals other than the main components of the oxide semiconductor, such as hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen. Note that water can also function as an impurity. For example, the inclusion of impurities can cause oxygen deficiencies (V O In some cases, a junction between the nuclei is formed.

[0042] In this specification and the like, silicon oxynitride refers to a material having a composition that contains more oxygen than nitrogen, and silicon nitride oxide refers to a material having a composition that contains more nitrogen than oxygen.

[0043] In this specification and the like, the term "insulator" can be replaced with an insulating film or an insulating layer, the term "conductor" can be replaced with a conductive film or a conductive layer, and the term "semiconductor" can be replaced with a semiconductor film or a semiconductor layer.

[0044] In addition, in this specification, "parallel" refers to a state in which two straight lines are arranged at an angle of -10 degrees or more and 10 degrees or less. Therefore, it also includes the case of -5 degrees or more and 5 degrees or less. "Approximately parallel" refers to a state in which two straight lines are arranged at an angle of -30 degrees or more and 30 degrees or less. "Perpendicular" refers to a state in which two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, it also includes the case of 85 degrees or more and 95 degrees or less. "Approximately perpendicular" refers to a state in which two straight lines are arranged at an angle of 60 degrees or more and 120 degrees or less.

[0045] In this specification and the like, the term "metal oxide" refers to an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as oxide semiconductors or simply OS), and the like. For example, when a metal oxide is used for a semiconductor layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. In other words, an OS transistor can be rephrased as a transistor having a metal oxide or an oxide semiconductor.

[0046] In this specification and the like, metal oxides containing nitrogen may also be collectively referred to as metal oxides. Furthermore, metal oxides containing nitrogen may also be referred to as metal oxynitrides.

[0047] In this specification and the like, normally off means that when no potential is applied to the gate or when a ground potential is applied to the gate, the drain current flowing through the transistor per 1 μm of channel width is 1×10 -20 A or less, 1×10 at 85℃ -18A or less, or 1×10 at 125°C -16 This means that it is A or lower.

[0048] In addition, in the present specification, when upper and lower limit values ​​are specified, it is understood that any combination of these values ​​is also disclosed.

[0049] (Embodiment 1) In this embodiment, a metal oxide (oxide semiconductor) according to one embodiment of the present invention and a method for forming the metal oxide will be described using a case where the metal oxide is used for a semiconductor layer of a transistor as an example. Note that the metal oxide according to one embodiment of the present invention is not limited to being used for a semiconductor layer of a transistor, and may be used as an insulating material or a conductive material depending on the type, combination, composition, or the like of elements constituting the metal oxide.

[0050] Metal oxides may have lattice defects. Lattice defects include point defects such as atomic vacancies and heteroatoms, line defects such as dislocations, surface defects such as grain boundaries, and volume defects such as voids. Factors that cause lattice defects include a discrepancy in the ratio of the number of atoms of the constituent elements (an excess or deficiency of constituent atoms) and impurities.

[0051] When a metal oxide is used for the semiconductor layer of a transistor, lattice defects in the metal oxide can cause carrier generation, capture, etc. Therefore, when a metal oxide with many lattice defects is used for the semiconductor layer of a transistor, the electrical characteristics of the transistor may become unstable. Therefore, it is preferable that the metal oxide used for the semiconductor layer of a transistor has few lattice defects.

[0052] In particular, transistors using metal oxides have oxygen vacancies (V O ) and impurities may cause electrical characteristics to fluctuate and reliability to deteriorate. In addition, hydrogen near the oxygen vacancy may enter the oxygen vacancy (hereinafter referred to as V OIn some cases, oxygen vacancies (sometimes called H-vacancies) are formed in the channel formation region of the metal oxide, generating electrons that serve as carriers. For this reason, if oxygen vacancies are present in the channel formation region of the metal oxide, the transistor is likely to have normally-on characteristics (characteristics in which a channel exists and a current flows through the transistor even when no voltage is applied to the gate electrode). Therefore, it is preferable that oxygen vacancies and impurities are reduced as much as possible in the channel formation region of the metal oxide. In other words, it is preferable that the carrier concentration of the channel formation region of the metal oxide is reduced and the region is made i-type (intrinsic) or substantially i-type.

[0053] The type of lattice defects likely to exist in a metal oxide and the amount of lattice defects vary depending on the structure of the metal oxide, the method of forming the metal oxide film, and the like.

[0054] Metal oxide structures are divided into single crystal structures and other structures (non-single crystal structures). Non-single crystal structures include, for example, CAAC structures, polycrystalline structures, nc structures, pseudo-amorphous (a-like: amorphous-like) structures, and amorphous structures. The a-like structures are intermediate between the nc structures and the amorphous structures. The classification of crystal structures will be described later.

[0055] Metal oxides having an a-like structure and metal oxides having an amorphous structure have voids or low density regions. That is, metal oxides having an a-like structure and metal oxides having an amorphous structure have lower crystallinity than metal oxides having an nc structure and metal oxides having a CAAC structure. Also, metal oxides having an a-like structure have a higher hydrogen concentration than metal oxides having an nc structure and metal oxides having a CAAC structure. Therefore, lattice defects are easily generated in metal oxides having an a-like structure and metal oxides having an amorphous structure.

[0056] Therefore, it is preferable to use a metal oxide with high crystallinity for the semiconductor layer of a transistor. For example, it is preferable to use a metal oxide having a CAAC structure or a metal oxide having a single crystal structure. By using such a metal oxide for a transistor, a transistor with good electrical characteristics can be realized. In addition, a highly reliable transistor can be realized.

[0057] The metal oxides with high crystallinity do not include metal oxides with a polycrystalline structure. A polycrystalline structure is a crystal structure in which clear crystal grain boundaries are observed. When a metal oxide with a polycrystalline structure is used in a semiconductor layer of a transistor, the crystal grain boundaries are likely to become recombination centers and capture carriers, resulting in a decrease in the on-current of the transistor and a decrease in the field effect mobility.

[0058] 1A is a diagram showing a structure including a metal oxide according to one embodiment of the present invention. The structure includes an undercoat film 10 and a metal oxide 20 formed on the undercoat film 10.

[0059] The metal oxide 20 has a plurality of crystals, and the plurality of crystals are metal oxides whose c-axes are oriented in a specific direction. The specific direction is the thickness direction of the metal oxide 20, the normal direction of the surface on which the metal oxide 20 is formed, or the normal direction of the surface of the metal oxide 20. In this specification and the like, the crystalline region refers to a crystal or a crystal and a region in its vicinity. Therefore, the crystal may be referred to as a crystalline region.

[0060] Here, an enlarged view of an area 51 surrounded by a dashed line in Fig. 1A is shown in Fig. 1B. The area shown by the area 51 is a part of the metal oxide 20. As shown in Fig. 1B, the metal oxide 20 has a crystal 21_1, a crystal 21_2, and a region 22_1 located between the crystal 21_1 and the crystal 21_2. The crystal 21_1 and the crystal 21_2 are adjacent to each other in a direction perpendicular to the c-axis via the region 22_1.

[0061] The c-axes of the crystal 21_1 and the crystal 21_2 are approximately perpendicular to the surface on which the metal oxide 20 is to be formed (the upper surface of the base film 10) or the upper surface of the metal oxide 20. In other words, the ab-planes of the crystal 21_1 and the crystal 21_2 are approximately parallel to the surface on which the metal oxide 20 is to be formed or the upper surface of the metal oxide 20. Furthermore, the c-axis of the crystal 21_1 and the c-axis of the crystal 21_2 are approximately parallel. When the c-axis of a crystal is approximately perpendicular to the surface on which the film including the crystal is to be formed or the upper surface of the film, the crystal is said to be c-axis oriented.

[0062] The crystal 21_1 and the crystal 21_2 preferably have a layered crystal structure. 2 O 4 Type structure, Yb 2 Fe 3 O 7 The crystals 21_1 and 21_2 have a layered crystal structure, so that the crystals 21_1 and 21_2 are easily c-axially oriented with respect to the surface on which the metal oxide 20 is formed (the upper surface of the base film 10) or the upper surface of the metal oxide 20.

[0063] The layered crystal structure may be a structure in which layers formed by covalent bonds and / or ionic bonds are stacked via bonds weaker than covalent bonds and / or ionic bonds, such as van der Waals forces. In this specification and the like, a material having such a structure may be called a layered material (also called an atomic layer material, a two-dimensional material, etc.).

[0064] Furthermore, the crystal 21_1 and the crystal 21_2 are not limited to a layered crystal structure, and may be any crystal that is easily c-axially oriented. For example, the crystal 21_1 and the crystal 21_2 may be a wurtzite structure.

[0065] The region 22_1 contacts the crystal 21_1 in a direction perpendicular to the c-axis of the crystal 21_1, and the region 22_1 contacts the crystal 21_2 in a direction perpendicular to the c-axis of the crystal 21_2.

[0066] The region 22_1 is a region having a lower crystallinity than the crystal 21_1 and the crystal 21_2. For example, the region 22_1 is a region having a short-range order but not a long-range order. Alternatively, the region 22_1 is a region having a lower density than the crystal 21_1 and the crystal 21_2.

[0067] Here, the width of the region 22_1 is defined as A1. Note that A1 can also be said to be the distance between the crystal 21_1 and the crystal 21_2 (the shortest distance from the side surface of the crystal 21_1 facing the region 22_1 to the side surface of the crystal 21_2 facing the region 22_1). A1 is preferably less than 2.0 nm, more preferably less than 1.5 nm, and is more than 0 nm. This prevents defects (V O , V O It is possible to suppress the production of HCl, etc.

[0068] Moreover, it is preferable that the density of the region 22_1 is high. For example, the ratio of the density of the region 22_1 to the density of the crystal 21_1 is preferably 0.87 or more, more preferably 0.92 or more, and further preferably 0.95 or more. By increasing the density of the region 22_1, it is possible to suppress the generation of defects in the metal oxide 20.

[0069] It is preferable that the size of the crystal 21_1 and the crystal 21_2 in the direction perpendicular to the c-axis is large. It is presumed that the width (A1) of the region 22_1 becomes narrower as the size of the crystal 21_1 and the crystal 21_2 in the direction perpendicular to the c-axis becomes larger. Alternatively, it is presumed that the density of the region 22_1 becomes higher. Here, the size of the crystal 21_1 in the direction perpendicular to the c-axis is B1, and the size of the crystal 21_2 is B2. The average of B1 and B2 is C1. It is preferable that C1 is at least larger than A1. Specifically, C1 is 3 nm or more and 15 nm or less, preferably 5 nm or more and 10 nm or less.

[0070] It should be noted that C1 is 3 nm or more and 15 nm or less, preferably 5 nm or more and 10 nm or less, and B1 and B2 are not limited thereto. For example, B1 (B2) may be 5 nm or less or 3 nm or less, or 10 nm or more or 15 nm or more. Each of B1 and B2 is at least 1 nm or more.

[0071] The size of the crystal 21_1 and the crystal 21_2 in the c-axis direction depends on the crystal structure of the crystal 21_1 and the crystal 21_2 and is not particularly limited, but is, for example, 0.7 nm or more.

[0072] As described above, the c-axis of the crystal 21_1 and the c-axis of the crystal 21_2 are approximately parallel. Therefore, when the crystal 21_1 and the crystal 21_2 are observed on the cross section of the metal oxide 20, the direction of the c-axis of the crystal 21_1 and the direction of the c-axis of the crystal 21_2 do not change substantially across the region 22_1. Furthermore, when the crystal 21_1 and the crystal 21_2 are observed from the top surface of the metal oxide 20, the direction of the a-axis (b-axis) of the crystal 21_1 and the direction of the a-axis (b-axis) of the crystal 21_2 are observed to change continuously through the region 22_1. In other words, the region 22_1 is not observed as a clear grain boundary. Therefore, the region 22_1 may be called a GBlike region.

[0073] Also, it may be difficult to clearly detect the boundary between the crystal 21_1 and the region 22_1, and the boundary between the crystal 21_2 and the region 22_1. For example, as shown in FIG. 1C, the region 23a, the region 23b, and the region 23c may be observed between the crystal 21_1 and the crystal 21_2. The region 23a is located between the crystal 21_1 and the crystal 21_2, the region 23b is located between the crystal 21_1 and the region 23a, and the region 23c is located between the crystal 21_2 and the region 23a.

[0074] The region 23a has a different crystallinity from the region 23b and the region 23c. For example, the region 23a has a lower crystallinity than the crystal 21_1 and the crystal 21_2. The region 23b and the region 23c have a lower crystallinity than the crystal 21_1 and the crystal 21_2, and a higher crystallinity than the region 23a. When the region 23a, the region 23b, and the region 23c are observed between the crystal 21_1 and the crystal 21_2, the region 23a, the region 23b, and the region 23c may be regarded as the region 22_1. In other words, the width (A1) of the region 22_1 may be regarded as the sum of the width of the region 23a, the width of the region 23b, and the width of the region 23c.

[0075] In Fig. 1B, the shapes of the crystal 21_1 and the crystal 21_2 are illustrated as rectangles, but are not limited thereto. It is sufficient that the upper and lower surfaces of the crystal 21_1 are approximately parallel, and the upper and lower surfaces of the crystal 21_2 are approximately parallel. Therefore, the shapes of the crystal 21_1 and the crystal 21_2 may be quadrilateral (square, parallelogram, trapezoid, etc.) or polygons with five or more vertices.

[0076] When the width of a region having the same characteristics as the region 22_1 is very small, two adjacent crystals in a direction perpendicular to the c-axis may be observed to be connected without a grain boundary. In other words, it may be difficult to clearly detect the boundary between the two crystals. In this case, the size of the crystal in the direction perpendicular to the c-axis may be larger than the above-mentioned numerical value.

[0077] Region 22_1 may be observed as a region discontinuous with other regions having similar characteristics to region 22_1 because it is surrounded by a plurality of crystals, or region 22_1 may be observed as a region continuous with other regions having similar characteristics to region 22_1.

[0078] In a TEM (Transmission Electron Microscopy) image (also called a cross-sectional TEM image of the metal oxide 20) of the metal oxide 20 obtained on the surface on which the metal oxide 20 is formed (the upper surface of the base film 10) or on a surface perpendicular to the upper surface of the metal oxide 20, the crystals 21_1 and 21_2 are observed as images corresponding to the crystal lattice (lattice images). On the other hand, the region 22_1 is observed as a region where an image corresponding to the crystal lattice is not clearly observed (a region where no regularity is observed in the arrangement of bright spots) or a region where the bright spots are unclear.

[0079] In addition, when the crystal 21_1 and the crystal 21_2 have a layered crystal structure, the crystal 21_1 and the crystal 21_2 are observed in a cross-sectional TEM image as a lattice image in which bright spots are arranged in layers. As described above, the c-axis of the crystal 21_1 and the c-axis of the crystal 21_2 are approximately parallel. Therefore, in the cross-sectional TEM image, the layer formed by the bright spots observed in the crystal 21_1 and the layer formed by the bright spots observed in the crystal 21_2 are observed to be approximately parallel. The average of the width of the layer formed by the bright spots observed in the crystal 21_1 and the width of the layer formed by the bright spots observed in the crystal 21_2 corresponds to the above-mentioned C1.

[0080] The cross-sectional TEM image also includes information about the depth direction. That is, when a crystal and a region having the same characteristics as the region 22_1 are adjacent to each other in the depth direction, the region including the crystal and the region may be observed as a lattice image in the cross-sectional TEM image. Therefore, the region including the lattice image may be called a crystal region.

[0081] In a TEM image of the metal oxide 20 (also called a planar TEM image of the metal oxide 20) obtained on the surface on which the metal oxide 20 is formed (the upper surface of the base film 10) or on a surface parallel to the upper surface of the metal oxide 20, the crystals 21_1 and the crystals 21_2 are observed as images corresponding to the crystal lattice (lattice images). On the other hand, the region 22_1 is observed as a region where an image corresponding to the crystal lattice is not clearly observed (a region where the arrangement of bright spots is not regular), or as a region where the bright spots are unclear.

[0082] In addition, when the crystal 21_1 and the crystal 21_2 have a layered crystal structure, the crystal 21_1 and the crystal 21_2 are observed in a planar TEM image as lattice images in which bright spots are arranged in a hexagonal or triangular shape. As described above, the direction of the a-axis (b-axis) of the crystal 21_1 and the direction of the a-axis (b-axis) of the crystal 21_2 are observed to change continuously through the region 22_1. Therefore, in the planar TEM image, the direction of the hexagonal or triangular shape observed in the crystal 21_1 and the direction of the hexagonal or triangular shape observed in the crystal 21_2 may be observed to be shifted from each other. In addition, the average of the width of the hexagonal or triangular shape observed in the crystal 21_1 and the width of the hexagonal or triangular shape observed in the crystal 21_2 corresponds to the above-mentioned C1.

[0083] 1B illustrates a configuration in which the crystal 21_1 and the crystal 21_2 are adjacent to each other in a direction perpendicular to the c-axis via the region 22_1, but the present invention is not limited to this. As illustrated in FIG. 2, the metal oxide 20 may have a configuration in which the crystal 21_1 and the crystal 21_2 are adjacent to each other in the c-axis direction via the region 22_1. In other words, the metal oxide 20 may have a configuration in which the region 22_1 is located on the crystal 21_1, and the crystal 21_2 is located on the region 22_1.

[0084] 2, the c-axes of the crystal 21_1 and the crystal 21_2 are approximately perpendicular to the surface on which the metal oxide 20 is to be formed (the upper surface of the base film 10) or the upper surface of the metal oxide 20. In other words, the ab-planes of the crystal 21_1 and the crystal 21_2 are approximately parallel to the surface on which the metal oxide 20 is to be formed or the upper surface of the metal oxide 20. Furthermore, the c-axis of the crystal 21_1 and the c-axis of the crystal 21_2 are approximately parallel to each other.

[0085] 2, the width A1 of the region 22_1 is the shortest distance from the upper surface of the crystal 21_1 to the lower surface of the crystal 21_2. A1 is preferably less than 2.0 nm, more preferably less than 1.5 nm, and is greater than 0 nm. This can suppress the generation of defects in the metal oxide 20.

[0086] In the configuration shown in FIG. 2, when the width of a region having the same characteristics as the region 22_1 is very small, two crystals adjacent in the c-axis direction may be observed connected without a grain boundary. In other words, it may be difficult to clearly detect the boundary between the two crystals. Therefore, the size of the crystal in the c-axis direction is not particularly limited, but is, for example, 0.7 nm or more.

[0087] The above is a description of the configuration of the metal oxide 20.

[0088] The metal oxide 20 preferably contains at least indium or zinc. In particular, it is preferable that the metal oxide 20 contains indium and zinc. In addition to these, it is preferable that the metal oxide 20 contains aluminum, gallium, yttrium, tin, etc. In addition, the metal oxide 20 may contain one or more elements selected from boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc.

[0089] <Ease of defect formation in metal oxides> In this section, we explain the ease of defect formation in metal oxides using the results of first-principles calculations. Specifically, oxygen vacancies (V O The formation energy of the defect where hydrogen enters the oxygen vacancy (hereafter referred to as V O The formation energy of H (sometimes referred to as H) is calculated using first-principles calculations to evaluate the ease of defect formation in metal oxides.

[0090] Here, each defect (V O , and V O The formation energy of defect H) will be described. In this specification, the formation energy of a defect is calculated using the following formula. It can be said that the smaller the formation energy of a defect, the easier the defect is to form.

[0091]

number

[0092] Here, ΔE(V O ) is V O is the energy of formation of ΔE(V O H) is V O is the formation energy of H. E(V O ) is V O is the total energy of the calculation model including one O H) is V O is the total energy of the computational model including one H. E(no defect) is the total energy of the computational model including no defects. μ O is the chemical potential of the oxygen atom, and μ H is the chemical potential of the hydrogen atom.

[0093] Chemical potential μ of oxygen atom O , and the chemical potential of the hydrogen atom μ H is calculated using the following formula:

[0094]

number

[0095] Here, E(O 2 ) is an oxygen molecule (O 2 ) and E(H 2 O) is a water molecule (H 2 O).

[0096] The above is an explanation of the defect formation energy.

[0097] [How to create a calculation model] Each defect (V O , and V O In order to calculate the generated energy of H), calculation models 1A to 1C and calculation models 2A to 2C are prepared. The following describes how to create calculation models 1A to 1C and calculation models 2A to 2C.

[0098] First, a crystal of In-Ga-Zn oxide with a composition of In:Ga:Zn:O=1:1:1:4 [atomic ratio] is prepared. The crystal is YbFe 2 O 4 The crystal has a density of 6.2 g / cm 3 Let us assume that.

[0099] Next, a part of the crystal is cut out. The number of atoms contained in the cut out crystal varies depending on the calculation model. Specifically, the number is 224 for calculation models 1A and 2A. The number is 288 for calculation models 1B and 2B. The number is 336 for calculation models 1C and 2C. Three-dimensional periodic boundary conditions are imposed on each of calculation models 1A to 1C and calculation models 2A to 2C.

[0100] Here, in each of the calculation models 1A to 1C and the calculation models 2A to 2C, the calculation models are divided into an area 901 and an area 902. Specifically, the calculation model 1A is divided into an area 901_1A and an area 902_1A. The calculation model 1B is divided into an area 901_1B and an area 902_1B. The calculation model 1C is divided into an area 901_1C and an area 902_1C. The calculation model 2A is divided into an area 901_2A and an area 902_2A. The calculation model 2B is divided into an area 901_2B and an area 902_2B. The calculation model 2C is divided into an area 901_2C and an area 902_2C. Note that a region 901 described below may refer to some or all of the regions 901_1A to 901_1C and the regions 901_2A to 901_2C. Also, a region 902 described below may refer to some or all of the regions 902_1A to 902_1C and the regions 902_2A to 902_2C.

[0101] The number of atoms included in each of the regions 901_1A to 901_1C and the regions 901_2A to 901_2C is 112. The number of atoms included in each of the regions 902_1A and 902_2A is 112. The number of atoms included in each of the regions 902_1B and 902_2B is 168. The number of atoms included in each of the regions 902_1C and 902_2C is 224.

[0102] Next, the density of the regions 902_1A to 902_1C is 5.6 g / cm 3 The lattice constants of the calculation models 1A to 1C are changed so that the density of the regions 902_2A to 902_2C is 6.0 g / cm 3 The lattice constants of the calculation models 2A to 2C are changed so that: Specifically, the region 902 in each calculation model is extended in the b-axis direction; More specifically, the width of the region 902 in each calculation model is extended to the value shown in Table 1.

[0103] [Table 1]

[0104] When the region 902 is extended in the b-axis direction, the coordinates of the atoms included in the region 901 are fixed, whereas the coordinates of the atoms included in the region 902 are changed in accordance with the extension of the region 902 in the b-axis direction.

[0105] Next, a calculation is performed to melt the region 902. Specifically, the coordinates of the atoms located in the region 901 are fixed, and the temperature is set to 4000 K, the time step size to 2 fs, and the number of steps to 1000. Hereinafter, a calculation performed by setting the temperature, time step size, and number of steps may be referred to as a first-principles molecular dynamics calculation.

[0106] The calculations were performed using the OpenMX calculation program software based on density functional theory (DFT). Calculation conditions other than those mentioned above are shown in Table 2.

[0107] [Table 2]

[0108] In the first-principles molecular dynamics calculation performed in this embodiment and the calculation for optimizing the structure of the calculation model (also called optimization calculation), which will be described later, the lattice vectors of the calculation model (corresponding to the axis length and the angle between the axes) are fixed. In other words, the first-principles molecular dynamics calculation is performed under conditions (NVT ensemble) where the number of particles (N), volume (V), and temperature (T) are constant. In the first-principles molecular dynamics calculation, the velocity scaling method is used as a method for controlling the temperature.

[0109] Next, a calculation is performed to cool the melted region 902 to a temperature of 500 K. The cooling rate is set to 500 K / ps. Specifically, first, the coordinates of the atoms located in the region 901 are fixed, the time step width is set to 2 fs, and the number of steps is set to 500. Then, a first-principles molecular dynamics calculation is performed on a calculation model obtained by a calculation to melt the region 902, with the temperature set to 3500 K. Next, a first-principles molecular dynamics calculation is performed on a calculation model obtained after the calculation, with the temperature set to 3000 K. Next, a first-principles molecular dynamics calculation is performed on a calculation model obtained after the calculation, with the temperature set to 2500 K. Next, a first-principles molecular dynamics calculation is performed on a calculation model obtained after the calculation, with the temperature set to 2000 K. Next, a first-principles molecular dynamics calculation is performed on a calculation model obtained after the calculation, with the temperature set to 1500 K. Next, a first-principles molecular dynamics calculation is performed on a calculation model obtained after the calculation, with the temperature set to 1000 K. Next, a first-principles molecular dynamics calculation is performed on the calculation model obtained after the calculation, with the temperature set to 500 K. This completes the calculation for cooling the region 902.

[0110] Next, a calculation is performed to relax the structure of the cooled region 902. Specifically, for the calculation model obtained by the calculation to cool the region 902, the coordinates of the atoms located in the region 901 are fixed, the temperature is set to 300 K, the time step size is set to 2 fs, and the number of steps is set to 2000, and a first-principles molecular dynamics calculation is performed.

[0111] Next, for the computational model obtained by the calculation for relaxing the structure of region 902, the coordinates of the atoms located in region 901 are fixed, the k point is changed to 3 × 1 × 3, and a calculation is performed to optimize the structure of region 902. After that, for the computational model obtained after the calculation, a calculation is performed to optimize the structure of the entire computational model (regions 901 and 902) without fixing the coordinates of the atoms included in the computational model.

[0112] By the above method, the calculation models 1A to 1C and the calculation models 2A to 2C are created. As described above, the three-dimensional periodic boundary condition is imposed on each of the calculation models 1A to 1C and the calculation models 2A to 2C. Therefore, in each calculation model, the region 901 corresponds to the crystal 21_1 and the crystal 21_2, and the region 902 corresponds to the region 22_1.

[0113] The created calculation models 1A to 1C are shown in Figs. 3A to 3F. The created calculation models 2A to 2C are shown in Figs. 4A to 4F. Figs. 3A, 3B, 3C, 4A, 4B, and 4C are views of the calculation models 1A, 1B, 1C, 2A, 2B, and 2C, respectively, viewed from a direction perpendicular to the b-axis and the c-axis. Figs. 3D, 3E, 3F, 4D, 4E, and 4F are views of the calculation models 1A, 1B, 1C, 2A, 2B, and 2C, respectively, viewed from the c-axis direction.

[0114] Using the calculation models 1A to 1C and the calculation models 2A to 2C, V O The formation energy of and VO Calculate the energy of formation of H. Specifically, in each calculation model, by removing one oxygen atom in the calculation model, V O In each calculation model, one oxygen atom in the calculation model is replaced with one hydrogen atom, resulting in a V O Prepare a computational model that includes one H.

[0115] The number of oxygen atoms included in the calculation model 1A and the calculation model 2A is 128. Therefore, in each of the calculation models 1A and 2A, V O There are 128 calculation models, each of which contains one V O 128 calculation models including one H are prepared. The number of oxygen atoms included in calculation models 1B and 2B is 160. Therefore, in each of calculation models 1B and 2B, V O There are 160 calculation models, each of which contains one V O 160 calculation models including one H are prepared. The number of oxygen atoms included in calculation models 1C and 2C is 192. Therefore, in each of calculation models 1C and 2C, V O There are 192 calculation models, each of which contains one V O There are 192 computational models including one H.

[0116] V O A computational model with one O For each calculation model including one H, the k point is set to 3 × 1 × 3, and the rest of the calculation conditions are shown in Table 2. Calculations are performed to optimize the structure of the entire calculation model. O The total energy of the model including one O The total energy of the calculation model including one H is E(V O ), and E(V O H). Note that V O By performing the calculation on a computational model that includes one H, V OH may be converted to other defects (e.g., oxygen vacancies, hydrogen, etc.).

[0117] The calculation models that do not include defects are calculation models 1A, 2A, 1B, 2B, 1C, and 2C. Therefore, E(no defect) is also the total energy of the calculation model after performing calculations to optimize the structure of the entire calculation model.

[0118] E(O 2 ) is one O 2 For a computational model including O 2 It is calculated by performing a calculation to optimize the structure of and then performing a single point calculation on the calculation model obtained after the calculation. In addition, E(H 2 O) is one H 2 For the computational model including O, 2 It is calculated by performing a calculation to optimize the structure of O and then performing a one-point calculation on the calculation model obtained after the calculation. E(O 2 ) and E(H 2 The calculation for calculating O) is performed using the calculation conditions shown in Table 2. 2 or H 2 In calculations to optimize the structure of O, a function for automatically determining the lattice vectors of the calculation model is used.

[0119] The E(V O ), E(V O H), E(no defect), E(O 2 ), and E(H 2 O) to calculate the formation energy of each defect. Note that a common calculation model is used when calculating the formation energy of defects. For example, V in calculation model 1A O The energy produced by ΔE(V O ), E(V O ) is V O The calculation is performed using a calculation model 1A including one defect, and E(no defect) is calculated using a calculation model 1A that does not include a defect.

[0120] The calculated defect (V O , and V O The energy of formation of H) is shown in FIG. 5A to FIG. 5D. V O 5B is the energy of V in Calculation Models 2A to 2C. O 5C shows the energy of V in Calculation Models 1A to 1C. O H formation energy, and FIG. 5D shows V in Calculation Models 2A to 2C. O 5A to 5D, the vertical axis is the defect (V O or V O H) formation energy [eV]. The filled bars indicate the average value of the formation energies of defects in region 901 of each calculation model, and the unfilled bars indicate the average value of the formation energies of defects in region 902 of each calculation model.

[0121] 5A and 5B, in each of the calculation models 1A to 1C and the calculation models 2A to 2C, V O The energy of formation of V in region 901 is O Therefore, the region 902 has a smaller energy of V than the region 901. O It is presumed that V is easily generated in the metal oxide film. Therefore, it is preferable that the region 902 (region 22_1) is narrow. Alternatively, it is preferable that the ratio of the region 902 (region 22_1) to the metal oxide film is small. By narrowing the region 902 (region 22_1), V O It is possible to suppress the generation of

[0122] 5C and 5D, V in the region 901 O The formation energy of H and V in region 902 O The relationship between the formation energy of H and V OTherefore, by narrowing the region 902 (region 22_1), the V O It is possible to suppress the production of H.

[0123] 5A and 5B, V in the region 902 of the calculation model 1A O The energy of formation of V in the region 902 of the calculation model 2A is O In addition, the energy of V in the region 902 of the calculation model 1B is smaller than that of O The energy of formation of V in region 902 of the calculation model 2B is O In addition, the energy of V in the region 902 of the calculation model 1C is smaller than that of O The formation energy of V in region 902 of the calculation model 2C is O Therefore, the density is 5.6 g / cm 3 The area 902 where the density is 6.0 g / cm 3 than the region 902 where V O It is presumed that V is easily generated in the metal oxide film. Therefore, it is preferable that the density of the region 902 (region 22_1) is high. By increasing the density of the region 902 (region 22_1), V O It is possible to suppress the generation of

[0124] In addition, V in the area 902 of the calculation model 2C O and V in region 902 of the computational model 1C O The difference between the formation energy of V in region 902 of calculation model 2B is O and V in region 902 of calculation model 1B O In other words, when the width of the region 902 becomes larger than the width of the region 902 in the calculation model 2B, even if the density of the region 902 is increased, the difference in the energy of V OIt is estimated that V is easily generated in the metal oxide film. Therefore, it is preferable that the width of the region 902 (region 22_1) is smaller than the width of the region 902 in the calculation model 2B. Specifically, it is preferable that the width of the region 902 (region 22_1) is less than 2.1 nm. O It is possible to suppress the generation of

[0125] 5C and 5D, V in the low density region 902 O The formation energy of H and V in the dense region 902 O The relationship between the formation energy of H and V O Therefore, by narrowing the region 902 (region 22_1), the V O It is possible to suppress the production of H.

[0126] From FIG. 5A, V in the region 901 of the calculation model 1B O and V in region 901 of the computational model 1C O The energy of formation of V in the region 902 of the calculation model 1A is O In other words, in all regions (regions 901 and 902), the V O and V of the calculation model 1C O The energy of generation is V of calculation model 1A. O Therefore, when the width of the region 902 is increased, the energy of V O It is estimated that V is easily generated in the metal oxide film. Therefore, it is preferable that the width of the region 902 (region 22_1) is smaller than the width of the region 902 in the calculation model 1B. Specifically, it is preferable that the width of the region 902 (region 22_1) is less than 1.5 nm. O It is possible to suppress the generation of

[0127] From Figure 5B, V of calculation model 2A Oand V for Models 2B and 2C O The relationship between the energy of formation and the density of the region 902 is 5.6 g / cm 3 V of the calculation models (calculation models 1A to 1C) O A similar relationship is observed for the formation energy of

[0128] From Figures 5C and 5D, the V O The formation energy of H and V for Models 1B and 1C. O The relationship with the formation energy of H is that the density of region 902 is 5.6 g / cm 3 V of the calculation models (calculation models 1A to 1C) O The same relationship is seen as for the formation energy of V O The formation energy of H and V for Models 2B and 2C. O The relationship with the formation energy of H is that the density of region 902 is 5.6 g / cm 3 V of the calculation models (calculation models 1A to 1C) O Therefore, by narrowing the region 902 (region 22_1), the V O It is possible to suppress the production of H.

[0129] From the above, by narrowing the width of the region 22_1, defects (V O , and V O H) can be suppressed from being generated. Therefore, by using a metal oxide region 22_1 having a narrow width for a transistor, fluctuation in the electrical characteristics of the transistor can be suppressed.

[0130] The above is an explanation of the ease with which defects are generated in metal oxides.

[0131] <Example of crystal structure> In this section, the crystal structure of the crystal of the metal oxide according to one embodiment of the present invention will be described. As described above, the crystal structure may be, for example, YbFe 2 O 4 Type structure, Yb 2 Fe 3 O 7 There are various types of structures, including modified types of these.

[0132] Here, the case where the metal oxide is an In-M-Zn oxide having indium, element M, and zinc is considered. The element M is aluminum, gallium, yttrium, or tin. Other elements that can be used for the element M include boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and cobalt. However, there are cases where the element M may be a combination of multiple elements mentioned above.

[0133] 6A to 6C are diagrams showing atomic arrangements in crystals of a metal oxide according to one embodiment of the present invention, in which atoms are represented by spheres (circles) and bonds between metal atoms and oxygen atoms are represented by lines.

[0134] 6A to 6C, the c-axis direction in the crystal structure of the In-M-Zn oxide is indicated by an arrow in each of the figures. The ab-plane direction in the crystal structure of the In-M-Zn oxide is perpendicular to the c-axis direction indicated by the arrow in each of the figures.

[0135] Here, the element ME1 is mainly indium. Note that an atom of the element M or a zinc atom may be present at the atomic position of the element ME1. Also, the element ME2 is mainly the element M and zinc. Note that an indium atom may be present at the atomic position of the element ME2.

[0136] As shown in Fig. 6A, the crystal of the metal oxide 20 has a structure in which a layer 31 having atoms of the element ME1 and oxygen atoms and a layer 32 having atoms of the element ME2 and oxygen atoms are stacked. In the crystal structure shown in Fig. 6A, two layers 32 are present between two layers 31 adjacent to each other in the c-axis direction. In other words, the crystal structure shown in Fig. 6A is a structure in which YbFe 2 O 4 For example, when the composition of the metal oxide 20 is In:M:Zn=1:1:1 [atomic ratio] or a value close to that, it is likely to have this crystal structure.

[0137] In Fig. 6A, the atomic arrangement in the crystal is represented by spheres (circles) and lines. Next, the atomic arrangement in the crystal is displayed as a polyhedron. Fig. 7A is a diagram showing the atomic arrangement in the crystal shown in Fig. 6A as a polyhedron. Note that the polyhedron possessed by layer 31 is shown in Fig. 7B, and the polyhedrons that layer 32 may possess are shown in Figs. 7C and 7D.

[0138] The polyhedron shown in Figure 7B is an octahedral structure having an atom of element ME1 (e.g., indium) at the center and oxygen atoms at the vertices. In layer 31, the octahedral structure is edge-shared.

[0139] The polyhedron shown in FIG. 7C has a trigonal bipyramidal structure. The trigonal bipyramidal structure has an atom of element ME2 (e.g., element M or zinc) at or near the center and oxygen atoms at the vertices. The polyhedron shown in FIG. 7D has a tetrahedral structure. The tetrahedral structure has an atom of element ME2 (e.g., element M or zinc) at the center and oxygen atoms at the vertices. In the layer 32 shown in FIG. 7A, the trigonal bipyramidal structures share edges. The configuration of the layer 32 may vary depending on the number of layers 32 present between two layers 31 adjacent to each other in the c-axis direction. For example, in the layer 32, the trigonal bipyramidal structures may share edges, or the tetrahedral structures may share edges.

[0140] The layer 31 and the layer 32 share a vertex. Furthermore, two layers 32 adjacent in the c-axis direction share a vertex or an edge. In FIG. 7A, the two layers 32 adjacent in the c-axis direction share an edge.

[0141] 6A and 7A, an In-M-Zn oxide having a composition of In:M:Zn=1:1:1 [atomic ratio] is shown as an example of the metal oxide 20, but the composition of the oxide 230 is not limited thereto. (1+α) M (1-α) O 3 (ZnO) m (α is a real number greater than −1 and less than 1, and m is a positive real number).

[0142] When m is a real number greater than 0 and less than 1, the crystals of the metal oxide 20 may have a region in which two layers 32 exist between two layers 31 adjacent in the c-axis direction, and a region in which one layer 32 exists between two layers 31 adjacent in the c-axis direction (see FIG. 6B). Note that the crystal structure of the crystals of the metal oxide 20 shown in FIG. 6B is a region in which Yb 2 Fe 3 O 7 When the composition of the metal oxide 20 is In:M:Zn=1:1:0.5 [atomic ratio], it is likely to have the crystal structure shown in FIG. 6B.

[0143] Furthermore, when m is a real number greater than 1, the crystals of the metal oxide 20 may have three or more layers 32 between two layers 31 adjacent in the c-axis direction. For example, in the crystal structure shown in Fig. 6C, three layers 32 exist between two layers 31 adjacent in the c-axis direction. Note that when the composition of the metal oxide 20 is In:M:Zn=1:1:2 [atomic ratio] or close thereto, it is likely to have the crystal structure shown in Fig. 6C.

[0144] The relationship between the laminated structure of the layers 31 and 32 and the composition of the metal oxide 20 is not limited to the above. Even if the composition of the metal oxide 20 is In:M:Zn=1:1:1 [atomic ratio] or a similar ratio, one layer 32 or three or more layers 32 may exist between two layers 31 adjacent in the c-axis direction. The same can be said for the crystal structure of the metal oxide 20 having a composition other than In:M:Zn=1:1:1 [atomic ratio] or a similar ratio. Such a crystal structure may be called a deformed structure. For example, the deformed structure may be a YbFe 2 O 4 Some of the structures and Yb 2 Fe 3 O 7 For example, a crystal structure in which part of the mold structure is laminated.

[0145] When α is a real number greater than 0 and less than 1, layer 32 may contain indium atoms in addition to atoms of element M and zinc atoms. When α is a real number greater than −1 and less than 0, layer 31 may contain atoms of element M or zinc atoms in addition to indium atoms.

[0146] The crystal structure of the crystals of the metal oxide 20 may be a wurtzite structure.

[0147] Fig. 6D is a diagram showing a wurtzite structure. In Fig. 6D, atoms are represented by spheres (circles), and bonds between metal atoms and atoms of element NM are represented by lines. The c-axis direction of the crystal structure shown in Fig. 6D is represented by an arrow in Fig. 6D. The ab-plane direction of the crystal structure shown in Fig. 6D is perpendicular to the c-axis direction represented by the arrow in Fig. 6D.

[0148] The wurtzite structure can be regarded as a structure in which layers 33 are stacked in the c-axis direction. In the layers 33, the tetrahedral structures share vertices.

[0149] The element ME3 is a metal atom, and the element NM is an atom of a nonmetallic element. For example, when the In-M-Zn oxide contains nitrogen, depending on the content of the nitrogen atom, the In-M-Zn oxide may have a wurtzite structure in which an indium atom, an atom of the element M, or a zinc atom is present at the position of the atom of the element ME3, and an oxygen atom or a nitrogen atom is present at the position of the atom of the element NM. Also, for example, when the content of indium and element M in the In-M-Zn oxide is low, the In-M-Zn oxide may have a wurtzite structure in which an indium atom, an atom of the element M, or a zinc atom is present at the position of the atom of the element ME3, and an oxygen atom is present at the position of the atom of the element NM.

[0150] The above is an explanation of the crystal structure of the crystals of the metal oxide.

[0151] <Method of forming metal oxide> In this section, a method for forming a metal oxide according to one embodiment of the present invention will be described.

[0152] Methods for forming metal oxide films include sputtering, chemical vapor deposition (CVD), molecular beam epitaxy (MBE), pulsed laser deposition (PLD), and atomic layer deposition (ALD).

[0153] It is preferable to use an ALD method as a method for forming a metal oxide film according to one embodiment of the present invention. Note that the metal oxide according to one embodiment of the present invention is preferably formed by using a PEALD method described later and a precursor that does not contain a hydrocarbon. When the metal oxide according to one embodiment of the present invention is formed by the PEALD method using a precursor that does not contain a hydrocarbon, it is expected that the crystal structure of the metal oxide will be more stable by reducing the concentration of impurities (carbon, hydrogen, etc.) in the film.

[0154] The ALD method utilizes the self-regulating nature of precursor molecules or atoms contained in the precursors to deposit atoms one layer at a time, and thus has the following advantages: extremely thin films can be formed; films can be formed on structures with high aspect ratios; films can be formed with fewer defects such as pinholes; films can be formed with excellent coverage; and films can be formed at low temperatures. The ALD method also includes a plasma-enhanced ALD (PEALD) method, which is a film formation method that uses plasma. By using plasma, films can be formed at lower temperatures, which may be preferable. Note that some precursors used in the ALD method contain elements such as carbon and chlorine. For this reason, films formed by the ALD method may contain more elements such as carbon and chlorine than films formed by other film formation methods. The amount of these elements can be quantified using X-ray photoelectron spectroscopy (XPS).

[0155] The ALD method is a film formation method in which a film is formed by a reaction on the surface of a workpiece, unlike a film formation method in which particles emitted from a target or the like are deposited. Therefore, it is a film formation method that is less affected by the shape of the workpiece and has good step coverage. In particular, the ALD method has excellent step coverage and excellent thickness uniformity, making it suitable for coating the surface of an opening with a high aspect ratio. However, since the ALD method has a relatively slow film formation speed, it may be preferable to use it in combination with other film formation methods such as a CVD method that has a fast film formation speed.

[0156] In the ALD method, the composition of the film obtained can be controlled by the amount of the raw material gas introduced. For example, in the ALD method, a film of any composition can be formed by changing the amount of the raw material gas introduced or the number of times of introduction (also called the number of pulses). In addition, for example, in the ALD method, a film whose composition changes continuously can be formed by changing the amount of the raw material gas introduced or the number of times of introduction while forming a film. When forming a film while changing the amount of the raw material gas introduced or the number of times of introduction, the time required for film formation can be shortened compared to the case of forming a film using a plurality of film formation chambers because no time is required for transport and pressure adjustment. Therefore, the productivity of semiconductor devices can be increased in some cases.

[0157] [ALD Apparatus and Film Forming Method Using ALD Method] Here, a film formation apparatus utilizing the ALD method that can be used to form a metal oxide film (hereinafter, also referred to as an ALD apparatus) and a film formation method using the ALD method will be described.

[0158] In a film forming apparatus using the ALD method, a first source gas (also called a precursor, metal precursor) and a second source gas (also called a reactant, non-metal precursor) are alternately introduced into a chamber, and the introduction of these source gases is repeated to form a film. The introduction of the source gases can be switched, for example, by switching the respective switching valves (also called high-speed valves). When introducing the source gases, nitrogen (N 2 An inert gas such as argon (Ar) or argon (Ar) may be introduced into the chamber together with the source gas as a carrier gas. By using a carrier gas, even if the source gas has low volatility or low vapor pressure, it is possible to suppress the source gas from being adsorbed inside the piping or valve, and to introduce the source gas into the chamber. In addition, the uniformity of the film formed is improved, which is preferable.

[0159] An example of a film forming method using the ALD method will be described with reference to FIG. 8A to FIG. 8D. First, a first source gas is introduced into the chamber (see FIG. 8A), and a precursor 61 is adsorbed onto the substrate surface (first step). Here, as the precursor 61 is adsorbed onto the substrate surface, a self-termination mechanism of the surface chemical reaction is activated, and the precursor is not further adsorbed onto the precursor layer on the substrate (see FIG. 8B). The appropriate range of the substrate temperature in which the self-termination mechanism of the surface chemical reaction is activated is also called the ALD window. The ALD window is determined by the temperature characteristics, vapor pressure, decomposition temperature, etc. of the precursor, and is set to 100° C. or more and 500° C. or less, preferably 200° C. or more and 400° C. or less. Next, the excess precursor, reaction products, etc. are discharged from the chamber by vacuum evacuation (second step). Alternatively, an inert gas (argon, nitrogen, etc.) may be introduced into the chamber instead of vacuum evacuation, and the excess precursor, reaction products, etc. may be discharged from the chamber. The second step is also called purging. Next, reactant 62 (for example, oxidizing agent (ozone (O 3 ), oxygen (O 2 ), water (H 2 O) and their plasma, radicals, ions, etc.) are introduced into the chamber (see FIG. 8C) and reacted with the precursor 61 adsorbed on the substrate surface, causing some of the components contained in the precursor 61 to leave while the constituent molecules of the film are still adsorbed on the substrate (third step) (see FIG. 8D). Next, the excess reactant 62, reaction products, etc. are discharged from the chamber by evacuation or introduction of an inert gas (fourth step).

[0160] In the following description of this specification, unless otherwise specified, when ozone, oxygen, or water is used as a reactant or an oxidant, it is not limited to the gaseous state or molecular state, but also includes the plasma state, radical state, and ion state. When forming a film using an oxidant in a plasma state, radical state, or ion state, a radical ALD apparatus or plasma ALD apparatus described later may be used.

[0161] It is preferable to use water as an oxidizing agent to remove carbon contained in the precursor. Hydrogen contained in water reacts with carbon contained in the precursor, and carbon can be efficiently separated from the precursor. On the other hand, if it is desired to reduce hydrogen contained in the film to the greatest extent possible, it is preferable to use ozone or oxygen that does not contain hydrogen as an oxidizing agent. In addition, water may be introduced into the chamber as a first oxidizing agent to remove carbon contained in the precursor, followed by evacuation, and ozone or oxygen that does not contain hydrogen may be introduced into the chamber as a second oxidizing agent to remove hydrogen, followed by evacuation. Then, the first to fourth steps are repeated until the desired film thickness is obtained.

[0162] In the above description, an example in which the first source gas is introduced into the chamber and then the second source gas is introduced into the chamber is shown, but one aspect of the present invention is not limited to this. The second source gas may be introduced into the chamber and then the first source gas may be introduced into the chamber. That is, the third step and the fourth step may be performed first, followed by the first step, the second step, the third step, and the fourth step, and then the first step to the fourth step may be repeatedly performed to form a film. Furthermore, the third step and the fourth step may be repeatedly performed a plurality of times, followed by the first step to the fourth step to form a film.

[0163] In this way, it is preferable to perform the third step and the fourth step once each or multiple times before the first step, since the film formation atmosphere in the chamber can be controlled. For example, an oxidizing agent can be introduced in the third step to create an oxygen atmosphere in the chamber. Starting film formation in an oxygen atmosphere is preferable because it increases the oxygen concentration in the film to be formed. Furthermore, oxygen can be supplied to the insulator or oxide that serves as the base of the film. A semiconductor device formed using such a method has good characteristics and can be highly reliable.

[0164] In addition, after performing the first and second steps, the introduction of the second raw material gas in the third step and the evacuation or introduction of the inert gas in the fourth step may be repeated multiple times. That is, the first step, the second step, the third step, the fourth step, the third step, the fourth step, the third step, and the fourth step may be repeated, and then the first and second steps may be performed.

[0165] For example, in the third step, O is used as the oxidizing agent. 3 , and O 2 In the fourth step, a vacuum is performed, and this process may be repeated several times.

[0166] In addition, when the third and fourth steps are repeated, it is not necessary to repeat the introduction of the same type of source gas. For example, in the first third step, H 2 O was used as the oxidizing agent in the third step from the second time onwards. 3 may also be used.

[0167] In this way, by repeating the introduction of an oxidizing agent and evacuation (or introduction of an inert gas) in the chamber several times in a short period of time, it is possible to more reliably remove excess hydrogen atoms, carbon atoms, chlorine atoms, etc. from the precursor adsorbed on the substrate surface and expel them from the chamber. Also, by increasing the number of types of oxidizing agents to two, it is possible to remove more excess hydrogen atoms, etc. from the precursor adsorbed on the substrate surface. In this way, by preventing hydrogen atoms from being incorporated into the film during film formation, it is possible to reduce the amount of water, hydrogen, etc. contained in the formed film.

[0168] By using this method, the amount of water molecules desorbed was 1.0×10 in the surface temperature range of 100°C to 700°C or 100°C to 500°C. 13 molecule / cm 2 Above 1.0×10 16 molecule / cm 2 Less than or equal to 1.0×10 13molecule / cm 2 Above 3.0×10 15 molecule / cm 2 It is possible to form a film having the following properties:

[0169] In this way, a first layer can be formed on the substrate surface, and a second layer can be laminated on the first layer by repeating the first to fourth steps again. By repeating the first to fourth steps multiple times while controlling the gas introduction until the film has a desired thickness, a thin film with excellent step coverage can be formed. The thickness of the thin film can be adjusted by the number of repetitions, allowing precise film thickness adjustment, which is suitable for producing fine transistors.

[0170] In addition, the film formed by the above method may have a layered structure. Furthermore, when the film formed by the above method has a crystalline structure, the c-axis of the film is oriented in a direction approximately parallel to the normal direction of the surface on which the film is formed. That is, the c-axis of the film is oriented perpendicular to the surface on which the film is formed. In this specification, such a crystalline structure may be called a CAAC structure. By using the ALD method, it is possible to form a metal oxide film having a CAAC structure.

[0171] The ALD method is a film formation method in which precursors and reactants are reacted using thermal energy. The temperature required for the reaction of the precursors and reactants is determined by their temperature characteristics, vapor pressure, decomposition temperature, etc., and is 100°C to 500°C, preferably 200°C to 400°C. Furthermore, in addition to the reaction of the precursors and reactants, the ALD method in which a plasma-excited reactant is also introduced into the chamber as a third raw material gas is sometimes called a plasma ALD method. In this case, a plasma generating device is provided at the introduction part of the third raw material gas. Inductively Coupled Plasma (ICP) can be used to generate plasma. In contrast, the ALD method in which the reaction of the precursors and reactants is carried out using thermal energy is sometimes called a thermal ALD method.

[0172] In the plasma ALD method, a plasma-excited reactant is introduced in the third step to form a film. Alternatively, the first to fourth steps are repeated while a plasma-excited reactant (second reactant) is introduced to form a film. In this case, the reactant introduced in the third step is called the first reactant. In the plasma ALD method, the second reactant used in the third raw material gas can be the same material as the oxidizing agent. That is, plasma-excited ozone, oxygen, and water can be used as the second reactant. In addition to the oxidizing agent, a nitriding agent may be used as the second reactant. Nitrogen (N 2 ) or ammonia (NH 3 ) can be used. Nitrogen (N 2 ) and hydrogen (H 2 ) can be used as a nitriding agent. 2 ) 5%, hydrogen (H 2 ) 95% mixed gas can be used as the nitriding agent. By depositing the film while introducing plasma-excited nitrogen or ammonia, a nitride film such as a metal nitride film can be formed.

[0173] In addition, argon (Ar) or nitrogen (N 2 ) may be used. The use of a carrier gas such as argon or nitrogen is preferable because it facilitates plasma discharge and facilitates the generation of a plasma-excited second reactant. When forming an oxide film such as a metal oxide film using the plasma ALD method, if nitrogen is used as the carrier gas, the nitrogen may be mixed into the film and the desired film quality may not be obtained. In this case, it is preferable to use argon as the carrier gas.

[0174] The ALD method can deposit extremely thin films with uniform thickness and has a high surface coverage even on uneven surfaces.

[0175] In addition, deposition by the plasma ALD method allows deposition at lower temperatures than by the thermal ALD method. For example, the plasma ALD method can deposit a film at temperatures below 100°C without reducing the deposition rate. In addition, the plasma ALD method can use many reactants, such as nitriding agents as well as oxidizing agents, so it is possible to deposit many types of films, such as nitrides, oxynitrides, fluorides, and metals, in addition to oxides.

[0176] In addition, when performing plasma ALD, plasma can be generated at a distance from the substrate, such as with ICP. By generating plasma in this way, plasma damage can be reduced.

[0177] By the above method, a film containing atoms contained in the first source gas as one of its components, an oxide film, or a nitride film can be formed.

[0178] On the other hand, when forming a film containing a plurality of metals as the metal oxide, a plurality of precursors for each metal may be prepared and sequentially introduced into the chamber.

[0179] When forming an In-M-Zn oxide as a metal oxide, a source gas containing a first precursor containing indium is introduced into the chamber, and excess source gas is exhausted (purged). Next, an oxidizing agent is introduced into the chamber as a reactant, and excess reactant is exhausted. Next, a source gas containing a second precursor containing element M is introduced into the chamber, and excess source gas is exhausted (purged). Next, an oxidizing agent is introduced into the chamber as a reactant, and excess reactant is exhausted. Next, a source gas containing a third precursor containing zinc is introduced into the chamber, and excess source gas is exhausted (purged). Next, an oxidizing agent is introduced into the chamber as a reactant, and excess reactant is exhausted. By repeating the above steps, a metal oxide having a layer containing indium, a layer containing element M, and a layer containing zinc can be formed.

[0180] The order of introduction of the source gas is not limited to the above. After the introduction of the source gas containing the first precursor, the source gas containing the third precursor may be introduced, and then the source gas containing the second precursor may be introduced, and the order can be appropriately determined by the practitioner according to the properties of the film required. After the introduction of each source gas, the exhaust of the excess source gas, the introduction of the reactant, and the exhaust can be appropriately performed. The metal oxide is not limited to the In-M-Zn oxide. As described above, the metal oxide preferably contains at least indium or zinc, and particularly preferably contains indium and zinc. The metal oxide may contain two types of metals, or four or more types of metals.

[0181] The atomic ratio of the metal contained in the metal oxide can be controlled by adjusting the number of times the source gas containing the precursor containing the metal is introduced into the chamber or the film formation temperature. For example, if it is desired to increase the atomic ratio of element M to indium and zinc, the number of times the source gas containing the second precursor containing element M is introduced into the chamber should be increased more than the number of times the source gas containing the first precursor containing indium is introduced into the chamber and the number of times the source gas containing the third precursor containing zinc is introduced into the chamber.

[0182] Also, multiple precursors may be introduced into the chamber, for example, a source gas containing a first precursor may be introduced into the chamber, excess source gas may be exhausted, a reactant may be introduced into the chamber, excess reactant may be exhausted, a source gas containing a second precursor and a third precursor may be introduced into the chamber, excess source gas may be exhausted, a reactant may be introduced into the chamber, excess reactant may be exhausted, a source gas containing a second precursor and a third precursor may be introduced into the chamber, excess source gas may be exhausted, a reactant may be introduced into the chamber, excess reactant may be exhausted, a metal oxide containing In-M-Zn oxide may be formed. Note that the combination of precursors introduced into the chamber is not limited to the above. A source gas containing a first precursor and a second precursor may be introduced into the chamber, a source gas containing a first precursor and a third precursor may be introduced into the chamber, or a source gas containing a first precursor, a second precursor, and a third precursor may be introduced into the chamber. The operator can appropriately determine which is suitable for the desired film properties.

[0183] Also, source gases containing different precursors may be continuously introduced into the chamber. For example, a source gas containing a first precursor is introduced into the chamber, excess source gas is exhausted, a reactant is introduced into the chamber, excess reactant is exhausted, a source gas containing a second precursor is introduced into the chamber, excess source gas is exhausted, and then the reactant is not introduced into the chamber, and then the source gas containing a third precursor is introduced into the chamber, excess source gas is exhausted, a reactant is introduced into the chamber, excess reactant is exhausted, a source gas containing a second precursor is introduced into the chamber, excess source gas is exhausted, and then the reactant is not introduced into the chamber, and then the source gas containing a third precursor is introduced into the chamber, excess source gas is exhausted, a reactant is introduced into the chamber, and excess reactant is exhausted, thereby forming a metal oxide containing an In-M-Zn oxide. Note that the order and combination of precursors continuously introduced into the chamber are not limited to the above. After the source gas containing the first precursor is introduced into the chamber, the source gas containing the second precursor may be introduced into the chamber without introducing the reactant. This can be appropriately determined by the practitioner depending on the desired film properties.

[0184] Alternatively, a metal oxide may be formed using a precursor containing multiple metals, for example, a precursor containing indium and element M in one molecule, a precursor containing indium and zinc in one molecule, or a precursor containing element M and zinc in one molecule.

[0185] Here, an example of a method for forming a metal oxide 20 having an In-M-Zn oxide will be described with reference to Figs. 9A to 9C and Figs. 10A to 10C. Figs. 9A to 9C and Figs. 10A to 10C show an example in which a layer 31 containing indium is formed, a layer 32a containing element M is formed thereon, and a layer 32b containing zinc is further formed thereon, but this embodiment is not limited to this. For example, one of the layers 32a and 32b may be formed, the layer 31 may be formed thereon, and the other of the layers 32a and 32b may be formed thereon. Alternatively, one of the layers 32a and 32b may be formed, the other of the layers 32a and 32b may be formed thereon, and the layer 31 may be formed thereon.

[0186] First, a source gas containing a precursor containing indium is introduced into the chamber, and the precursor is adsorbed onto the surface of the structure 11 (see FIG. 9A). Here, the source gas contains a carrier gas such as argon or nitrogen in addition to the precursor. As the precursor containing indium, triethylindium, tris(2,2,6,6-tetramethyl-3,5-heptanedionate)indium, cyclopentadienylindium, etc. can be used. Next, the chamber is purged to discharge excess precursor, reaction products, etc. from the chamber.

[0187] Next, an oxidizing agent introduced into the chamber as a reactant is reacted with the adsorbed precursor to remove components other than indium while leaving indium adsorbed on the substrate. This forms a layer 31 composed of indium and oxygen (see FIG. 9B). Ozone, oxygen, water, etc. can be used as the oxidizing agent. Next, the chamber is purged to remove excess reactants, reaction products, etc. from the chamber.

[0188] Next, a source gas containing a precursor containing element M is introduced into the chamber, and the precursor is adsorbed on layer 31 (see FIG. 9C). The source gas contains a carrier gas such as argon or nitrogen in addition to the precursor. When gallium is used as element M, the precursor containing gallium can be trimethylgallium, triethylgallium, gallium trichloride, tris(dimethylamido)gallium, gallium(III) acetylacetonate, tris(2,2,6,6-tetramethyl-3,5-heptanedionate)gallium, dimethylchlorogallium, diethylchlorogallium, or the like. Next, the chamber is purged to discharge excess precursor, reaction products, and the like from the chamber.

[0189] Next, an oxidizing agent introduced into the chamber as a reactant is reacted with the adsorbed precursor to remove components other than element M while leaving element M adsorbed on the substrate. This forms layer 32a composed of element M and oxygen (see FIG. 9D). At this time, some of the oxygen constituting layer 32b may be adsorbed onto layer 32a. Next, the chamber is purged to remove excess reactant, reaction products, etc. from the chamber.

[0190] Next, a source gas containing a precursor containing zinc is introduced into the chamber, and the precursor is adsorbed onto the layer 32a (see FIG. 10A). At this time, a part of the layer 32b composed of zinc and oxygen may be formed. In addition to the precursor, the source gas contains a carrier gas such as argon or nitrogen. As the precursor containing zinc, dimethyl zinc, diethyl zinc, zinc bis(2,2,6,6-tetramethyl-3,5-heptanedionate), etc. can be used. Next, the chamber is purged to discharge the excess precursor, reaction products, etc. from the chamber.

[0191] Next, an oxidizing agent introduced into the chamber as a reactant is reacted with the adsorbed precursor to remove components other than zinc while leaving zinc adsorbed on the substrate. This forms a layer 32b consisting of zinc and oxygen (see FIG. 10B). Next, the chamber is purged to remove excess reactants, reaction products, and the like from the chamber. Note that, by forming layers 32a and 32b multiple times before forming the next layer 31, a stack of layers 32a and 32b having the desired number of atoms, number of layers, and thickness may be formed between the two layers 31.

[0192] Next, layer 31 is formed again on layer 32b by the above-mentioned method (see FIG. 10C). By repeating the above-mentioned method, metal oxide 20 can be formed on the substrate or structure.

[0193] As described above, by using the ALD method, it is possible to form a metal oxide film having a structure in which the c-axis is oriented approximately parallel to the normal direction of the film formation surface (CAAC structure).

[0194] As described above, the ALD method is a film formation method in which a film is formed by a reaction on the surface of a workpiece. Therefore, damage to the workpiece during film formation can be reduced. Therefore, metal oxide films formed using the ALD method may have larger crystals than those formed using other film formation methods. By increasing the size of the crystals contained in the metal oxide, the distance between the crystals can be shortened. Alternatively, the density of the region between the crystals can be increased.

[0195] As described above, the ALD method can control the composition of the film obtained by adjusting the amount of the source gas introduced. In other words, the ALD method can be said to have high controllability over the composition (stoichiometric composition) of the metal oxide. Therefore, by forming a film using the ALD method, it is possible to form a metal oxide film having a desired composition.

[0196] As described above, the ALD method allows deposition on a structure with a high aspect ratio, and allows deposition with excellent coverage on the side surface of the structure. By using the ALD method, a metal oxide having a CAAC structure can be easily formed regardless of the orientation of the surface to be deposited. For example, even if the structure has a convex or concave shape, a metal oxide can be formed with good coverage on the top surface, bottom surface, side surface, and inclined surface of the structure. That is, a metal oxide having an approximately constant film thickness in the normal direction can be formed on each surface to be deposited. In the metal oxide formed on each of the top surface, bottom surface, side surface, and inclined surface of the structure, the ratio of the minimum film thickness to the maximum film thickness can be set to 0.5 or more and 1 or less, preferably 0.7 or more and 1 or less, more preferably 0.9 or more and 1 or less. At this time, when the metal oxide has crystals, its c-axis is oriented in a direction approximately parallel to the normal direction of each surface to be deposited. That is, the c-axis is oriented perpendicular to each surface to be deposited.

[0197] FIG. 11A is a diagram showing a metal oxide 20 having an In-M-Zn oxide formed on a structure 11. Here, the structure refers to an element constituting a semiconductor device such as a transistor. The structure 11 includes conductors such as a substrate, a gate electrode, a source electrode, and a drain electrode, insulators such as a gate insulating film, an interlayer insulating film, and a base insulating film, metal oxides, and semiconductors such as silicon. The structure 11 corresponds to the base film 10 shown in FIG. 1A. FIG. 11A shows a case where the surface of the structure 11 to be deposited is arranged parallel to the substrate (or base body, not shown).

[0198] 11B is an enlarged view of a region 53 which is a part of the metal oxide 20 in FIG. 11A. FIG. 11B shows a state in which a layer 31 containing indium (In), a layer 32a containing an element M, and a layer 32b containing zinc (Zn) are laminated on the top or bottom surface of the structure 11. The layer 31 is disposed parallel to the surface of the structure 11 on which a film is to be formed, a layer 32a is disposed thereon parallel to the surface of the structure 11 on which a film is to be formed, and a layer 32b is disposed thereon parallel to the surface of the structure 11 on which a film is to be formed. That is, the ab-plane of the metal oxide 20 is approximately parallel to the surface of the structure 11 on which a film is to be formed, and the c-axis of the metal oxide 20 is approximately parallel to the normal direction of the surface of the structure 11 on which a film is to be formed.

[0199] FIG. 11C shows a case where the surface of the structure 11 to be deposited is disposed perpendicular to the substrate (or base, not shown). FIG. 11D is an enlarged view of a region 54 which is a part of the metal oxide 20 in FIG. 11C. FIG. 11D shows a state where a layer 31 containing indium (In), a layer 32a containing element M, and a layer 32b containing zinc (Zn) are laminated on the side surface of the structure 11. The layer 31 is disposed parallel to the surface of the structure 11 to be deposited, the layer 32a is disposed thereon parallel to the surface of the structure 11 to be deposited, and the layer 32b is disposed thereon parallel to the surface of the structure 11 to be deposited. That is, the ab-plane of the metal oxide 20 is approximately parallel to the surface of the structure 11 to be deposited, and the c-axis of the metal oxide 20 is approximately parallel to the normal direction of the surface of the structure 11 to be deposited.

[0200] Here, as an example of an apparatus capable of forming a film by the ALD method, the configuration of a film formation apparatus 4000 will be described with reference to Fig. 12A and Fig. 12B. Fig. 12A is a schematic diagram of a multi-chamber type film formation apparatus 4000, and Fig. 12B is a cross-sectional view of an ALD apparatus that can be used for the film formation apparatus 4000.

[0201] [Example of the configuration of a film forming apparatus] The film forming apparatus 4000 has a loading / unloading chamber 4002, a loading / unloading chamber 4004, a transfer chamber 4006, a film forming chamber 4008, a film forming chamber 4009, a film forming chamber 4010, and a transfer arm 4014. Here, the loading / unloading chamber 4002, the loading / unloading chamber 4004, the film forming chamber 4008, the film forming chamber 4009, and the film forming chamber 4010 are independently connected to the transfer chamber 4006. This allows continuous film formation in the film forming chamber 4008, the film forming chamber 4009, and the film forming chamber 4010 without exposure to the atmosphere, and prevents impurities from being mixed into the film. In addition, contamination of the interface between the substrate and the film and the interface between each film is reduced, and clean interfaces are obtained.

[0202] In addition, in order to prevent moisture from adhering to the loading / unloading chamber 4002, the loading / unloading chamber 4004, the transfer chamber 4006, and the film formation chambers 4008 to 4010, it is preferable to fill them with an inert gas (such as nitrogen gas) with a controlled dew point, and it is desirable to maintain a reduced pressure.

[0203] An ALD apparatus can be used in the film formation chambers 4008 to 4010. A film formation apparatus other than an ALD apparatus may be used in any of the film formation chambers 4008 to 4010. Examples of film formation apparatuses that can be used in the film formation chambers 4008 to 4010 include a sputtering apparatus, a plasma CVD (PECVD: Plasma Enhanced CVD) apparatus, a thermal CVD (TCVD: Thermal CVD) apparatus, a photo CVD (Photo CVD) apparatus, a metal CVD (MCVD: Metal CVD) apparatus, and a metal organic CVD (MOCVD: Metal Organic CVD) apparatus. One or more of the film formation chambers 4008 to 4010 may be provided with an apparatus having a function other than that of a film formation apparatus. Examples of such apparatuses include a heating apparatus (typically, a vacuum heating apparatus) and a plasma generating apparatus (typically, a microwave plasma generating apparatus).

[0204] For example, when the film formation chamber 4008 is an ALD apparatus, the film formation chamber 4009 is a PECVD apparatus, and the film formation chamber 4010 is a metal CVD apparatus, a metal oxide can be formed in the film formation chamber 4008, an insulating film that functions as a gate insulating film in the film formation chamber 4009, and a conductive film that functions as a gate electrode in the film formation chamber 4010. At this time, the metal oxide, the insulating film thereon, and the conductive film thereon can be formed successively without being exposed to the atmosphere.

[0205] Although the film formation apparatus 4000 includes the loading / unloading chamber 4002, the loading / unloading chamber 4004, and the film formation chambers 4008 to 4010, one embodiment of the present invention is not limited to this. The film formation apparatus 4000 may have four or more film formation chambers. The film formation apparatus 4000 may be of a single-wafer type or a batch type in which films are formed on a plurality of substrates at once.

[0206] [ALD equipment] 12B, the configuration of an ALD apparatus that can be used for the film formation apparatus 4000 will be described. The ALD apparatus includes a film formation chamber (chamber 4020), a raw material supply unit 4021 (raw material supply unit 4021a and raw material supply unit 4021b), a raw material supply unit 4031, high-speed valves 4022a and 4022b that are introduction amount controllers, a raw material inlet 4023 (raw material inlet 4023a and raw material inlet 4023b), a raw material inlet 4033, a raw material outlet 4024, and an exhaust device 4025. Raw material inlet 4023a, raw material inlet 4023b, and raw material inlet 4033 installed in chamber 4020 are connected to raw material supply units 4021a, 4021b, and 4031 via supply pipes and valves, respectively, and raw material outlet 4024 is connected to exhaust device 4025 via an exhaust pipe, a valve, and a pressure regulator.

[0207] Also, by connecting a plasma generator 4028 to the chamber 4020 as shown in FIG. 12B, a film can be formed by the plasma ALD method in addition to the thermal ALD method. The plasma generator 4028 is preferably an ICP type plasma generator using a coil 4029 connected to a high frequency power source. The high frequency power source can output power having a frequency of 10 kHz to 100 MHz, preferably 1 MHz to 60 MHz, more preferably 10 MHz to 60 MHz. For example, it can output power having a frequency of 13.56 MHz or 60 MHz. In the plasma ALD method, a film can be formed without decreasing the film formation rate even at a low temperature, so it is suitable for use in a single-wafer type film formation device with low film formation efficiency.

[0208] Inside the chamber, there is a substrate holder 4026, and a substrate 4030 is placed on the substrate holder 4026. The substrate holder 4026 may be provided with a mechanism for applying a constant potential or high frequency. Alternatively, the substrate holder 4026 may be floating or grounded. In addition, a heater 4027 is provided on the outer wall of the chamber, and is capable of controlling the temperature of the inside of the chamber 4020, the substrate holder 4026, the surface of the substrate 4030, and the like. The heater 4027 is preferably capable of controlling the temperature of the surface of the substrate 4030 to 100° C. or more and 500° C. or less, preferably 200° C. or more and 400° C. or less, and the temperature of the heater 4027 itself is preferably capable of being set to 100° C. or more and 500° C. or less.

[0209] In the raw material supplying unit 4021a, the raw material supplying unit 4021b, and the raw material supplying unit 4031, a raw material gas is formed from a solid raw material or a liquid raw material by a vaporizer, a heating means, etc. Alternatively, the raw material supplying unit 4021a, the raw material supplying unit 4021b, and the raw material supplying unit 4031 may be configured to supply a gaseous raw material gas.

[0210] 12B shows an example in which two raw material supply units 4021 and one raw material supply unit 4031 are provided, but this embodiment is not limited to this. One raw material supply unit 4021 or three or more raw material supply units 4021 may be provided. Two or more raw material supply units 4031 may be provided. High-speed valve 4022a and high-speed valve 4022b can be precisely controlled in time, and are configured to control the supply of raw material gas supplied from raw material supply unit 4021a and raw material supply unit 4021b.

[0211] In the film forming apparatus shown in FIG. 12B, the substrate 4030 is loaded onto the substrate holder 4026, the chamber 4020 is sealed, and then the substrate 4030 is heated to a desired temperature (for example, 100° C. to 500° C., preferably 200° C. to 400° C.) by the heater 4027. A thin film is formed on the substrate surface by repeating the supply of a source gas from the source supply unit 4021a, exhaust by the exhaust device 4025, supply of a source gas from the source supply unit 4031, and exhaust by the exhaust device 4025. In addition, in the formation of the thin film, the supply of a source gas from the source supply unit 4021b and exhaust by the exhaust device 4025 may be further performed. The temperature of the heater 4027 may be appropriately determined depending on the type of film to be formed, the source gas, the desired film quality, the substrate, or the heat resistance of a film or element provided on the substrate. For example, the temperature of the heater 4027 may be set to 200° C. or higher and 300° C. or lower during film formation, or may be set to 300° C. or higher and 500° C. or lower during film formation.

[0212] By forming a film while heating the substrate 4030 using the heater 4027, it is possible to omit a heat treatment of the substrate 4030 that is required in a later step. That is, by using the chamber 4020 or the film formation apparatus 4000 provided with the heater 4027, the formation of a film on the substrate 4030 and the heat treatment of the substrate 4030 can be performed at the same time.

[0213] In the film forming apparatus shown in FIG. 12B, a metal oxide can be formed by appropriately selecting the raw materials (such as volatile organometallic compounds) used in the raw material supply unit 4021 and the raw material supply unit 4031. When forming an In-Ga-Zn oxide containing indium, gallium, and zinc as a metal oxide, it is preferable to use a film forming apparatus provided with at least three raw material supply units 4021 and at least one raw material supply unit 4031. It is preferable that a precursor containing indium is supplied from the first raw material supply unit 4021, a precursor containing gallium is supplied from the second raw material supply unit 4021, and a precursor containing zinc is supplied from the third raw material supply unit 4021. When a precursor containing indium and gallium is used to form a metal oxide, at least two raw material supply units 4021 may be provided. The precursors described above can be used as the precursor containing indium, the precursor containing gallium, and the precursor containing zinc.

[0214] In addition, a reactant is supplied from the raw material supply unit 4031. As the reactant, an oxidizing agent containing at least one of ozone, oxygen, and water can be used.

[0215] [Film formation sequence] FIG. 13A shows a film formation sequence using the ALD apparatus shown in FIG. 12B. First, the substrate 4030 is set on the substrate holder 4026 in the chamber 4020 (step S101). Next, the temperature of the heater 4027 is adjusted (step S102). Next, the substrate 4030 is held on the substrate holder 4026 so that the temperature of the substrate 4030 is uniform across the substrate surface (step S103). Next, a film is formed by the above-mentioned first to fourth steps. That is, a first source gas and a second source gas are alternately introduced into the chamber 4020, and a film is formed on the substrate 4030 (step S104). In addition, between steps S103 and S104, a process of making the inside of the chamber 4020 an oxygen atmosphere may be performed. After the substrate 4030 is set and held, making the inside of the chamber 4020 an oxygen atmosphere may add oxygen to the substrate 4030 and the film provided on the substrate 4030. In addition, hydrogen may be desorbed from the substrate 4030 before film formation and from the film provided on the substrate 4030. Hydrogen in the substrate 4030 or the film reacts with oxygen added to the substrate 4030 or the film to form water (H 2 O) and may be detached from the substrate 4030 or the film.

[0216] 13B shows a specific example of the above-mentioned film formation sequence. In accordance with the above-mentioned steps S101 to S103, the substrate 4030 is set on the substrate holder 4026, the temperature of the heater 4027 is adjusted, and the substrate 4030 is held.

[0217] Next, the first source gas and the second source gas are alternately introduced to form a film on the substrate 4030 (step S104). The introduction of the first source gas and the second source gas is performed in a pulsed manner. In FIG. 13B, the introduction of the first source gas and the second source gas is indicated by ON, and the period during which the source gas is not introduced is indicated by OFF. During the period during which neither the first source gas nor the second source gas is introduced, the chamber 4020 is evacuated. The pulse time during which the first source gas is introduced into the chamber 4020 is preferably 0.1 to 1 second, more preferably 0.1 to 0.5 seconds. Moreover, the period during which the first source gas is not introduced is 1 to 15 seconds, preferably 1 to 5 seconds. The pulse time during which the second source gas is introduced into the chamber 4020 is preferably 0.1 to 30 seconds, more preferably 0.3 to 15 seconds. The period during which the second source gas is not introduced is set to 1 second or more and 15 seconds or less, and preferably 1 second or more and 5 seconds or less.

[0218] The film formation is performed by repeating one cycle consisting of the introduction of a first raw material gas (first step above), exhaust of the first raw material gas (second step above), introduction of a second raw material gas (third step above), and exhaust of the second raw material gas (fourth step above) to form a film having a desired thickness.

[0219] In addition, when performing a process of making the inside of the chamber 4020 into an oxygen atmosphere between steps S103 and S104, a second source gas may be introduced into the chamber 4020. As the second source gas, ozone (O 3 ), oxygen (O 2 ), and water (H 2 In the present embodiment, ozone (O 3 ), and oxygen (O 2) is used. At this time, the second source gas is preferably introduced in a pulsed manner similarly to the method shown in step S104, but one embodiment of the present invention is not limited thereto. The second source gas may be continuously introduced. In the period in which the second source gas is not introduced, the chamber 4020 is evacuated. The pulse time for introducing the second source gas into the chamber 4020 is preferably 0.1 seconds or more and 30 seconds or less, more preferably 0.3 seconds or more and 15 seconds or less. In addition, the period in which the second source gas is not introduced is 1 second or more and 15 seconds or less, preferably 1 second or more and 5 seconds or less. By introducing the second source gas such as an oxidizing agent into the chamber 4020, the substrate 4030 or a film provided on the substrate 4030 is exposed to the second source gas such as an oxidizing agent.

[0220] If temperature adjustment of heater 4027 is not required after setting substrate 4030 (step S101), this step may be omitted. Also, if it is not necessary to create an oxygen atmosphere inside chamber 4020 after holding substrate 4030 (step S103), this step may be omitted.

[0221] Fig. 13C shows an example of a sequence for forming a film using a plurality of precursor-containing source gases. In Fig. 13C, the precursor-containing source gases are the first source gas, the third source gas, and the fourth source gas, and the oxidizing agent-containing source gas is the second source gas. According to the above steps S101 to S103, the substrate 4030 is set on the substrate holder 4026, the temperature of the heater 4027 is adjusted, and the substrate 4030 is held.

[0222] Next, the first source gas, the second source gas, the third source gas, the second source gas, the fourth source gas, and the second source gas are sequentially introduced to form a film on the substrate 4030 (step S104). The introduction of the first source gas to the fourth source gas is performed in a pulsed manner. In FIG. 13C, the introduction of the first source gas to the fourth source gas is indicated by ON, and the period in which the source gas is not introduced is indicated by OFF. In the period in which none of the first source gas to the fourth source gas is introduced, the chamber 4020 is evacuated. The pulse time for introducing the first source gas, the third source gas, and the fourth source gas into the chamber 4020 is preferably 0.1 seconds or more and 1 second or less, more preferably 0.1 seconds or more and 0.5 seconds or less. In addition, the period in which the first source gas, the third source gas, and the fourth source gas are not introduced is 1 second or more and 15 seconds or less, preferably 1 second or more and 5 seconds or less. The pulse time for introducing the second source gas into the chamber 4020 is preferably 0.1 to 30 seconds, more preferably 0.3 to 15 seconds. The period during which the second source gas is not introduced is 1 to 15 seconds, preferably 1 to 5 seconds.

[0223] The film is formed by repeating one cycle of introducing a first precursor gas, exhausting the first precursor gas, introducing a second precursor gas, exhausting the second precursor gas, introducing a third precursor gas, exhausting the third precursor gas, introducing the second precursor gas, exhausting the second precursor gas, introducing a fourth precursor gas, exhausting the fourth precursor gas, introducing the second precursor gas, and exhausting the second precursor gas, to form a film having a desired thickness.

[0224] For example, when the first raw material gas contains a precursor containing indium, the third raw material gas contains a precursor containing gallium, and the fourth raw material gas contains a precursor containing zinc, In-Ga-Zn oxide can be formed by the sequence shown in FIG. 13C.

[0225] In the sequence shown in FIG. 13C, the order of introduction of the first, third, and fourth source gases is not limited to this. Also, the number of times that the first, third, and fourth source gases are introduced in one cycle is not limited to once. By introducing a certain source gas multiple times in one cycle, a film having a high concentration of metal elements contained in the source gas can be formed. That is, by changing the number of times that each gas is introduced, the atomic ratio of the film to be formed can be controlled. Also, the first, third, and fourth source gases, or two types of source gases selected from these source gases, may be introduced into the chamber 4020 at the same time.

[0226] This concludes the description of the method for forming a metal oxide film using the ALD method.

[0227] Note that a sputtering method may be used as a method for forming the metal oxide film according to one embodiment of the present invention.

[0228] When a metal oxide film is formed by a sputtering method, the higher the substrate temperature (stage temperature) during film formation, the higher the crystallinity of the metal oxide film that can be formed. Also, the higher the ratio of the flow rate of oxygen gas to the total film formation gas used during film formation (also called the oxygen flow rate ratio), the higher the crystallinity of the metal oxide film that can be formed. In this way, the crystallinity of the formed metal oxide film can be controlled by the substrate temperature and the oxygen flow rate ratio in the film formation gas.

[0229] [Heat Treatment] It is preferable to perform a heat treatment after forming a metal oxide film by using a sputtering method or an ALD method. The heat treatment may be performed at 250° C. to 650° C., preferably 300° C. to 500° C., and more preferably 320° C. to 450° C. The heat treatment is performed in a nitrogen gas or inert gas atmosphere, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. For example, when the heat treatment is performed in a mixed atmosphere of nitrogen gas and oxygen gas, the oxygen gas may be about 20%. The heat treatment may be performed under reduced pressure. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas to compensate for the desorbed oxygen after the heat treatment in a nitrogen gas or inert gas atmosphere.

[0230] In addition, the gas used in the heat treatment is preferably highly purified. For example, the amount of moisture contained in the gas used in the heat treatment may be 1 ppb or less, preferably 0.1 ppb or less, and more preferably 0.05 ppb or less. By using a highly purified gas for the heat treatment, it is possible to prevent moisture and the like from being incorporated into the metal oxide as much as possible.

[0231] For example, in the heat treatment, after forming a metal oxide film, the flow ratio of nitrogen gas and oxygen gas is set to 4:1, and treatment is performed for 1 hour at a temperature of 400°C to 550°C, preferably 420°C to 480°C. For example, the flow rate of nitrogen gas is set to 4 slm, and the flow rate of oxygen gas is set to 1 slm. This heat treatment can remove impurities such as water and hydrogen contained in the metal oxide.

[0232] In particular, when a metal oxide film is formed by the ALD method using a precursor containing carbon, the metal oxide may contain carbon. By carrying out the above heat treatment, the carbon in the metal oxide is converted into CO 2 In addition, when a metal oxide film is formed by the ALD method using a precursor containing hydrogen, the metal oxide may contain hydrogen. By carrying out the above heat treatment, the hydrogen in the metal oxide can be converted to H 2It can be removed as O.

[0233] Alternatively, the heat treatment can increase the crystallinity of the metal oxide. For example, the crystals of the metal oxide can be made larger than those before the heat treatment. Thus, the distance between the crystals (for example, the width of the region 22_1) can be narrowed. Alternatively, the density of the region between the crystals (for example, the region 22_1) can be increased. Thus, the generation of defects in the metal oxide 20 can be suppressed.

[0234] In the above manner, the metal oxide of one embodiment of the present invention can be formed.

[0235] <Classification of crystal structures> Below, classification of crystal structures in metal oxides (oxide semiconductors) will be explained.

[0236] First, classification of crystal structures in oxide semiconductors will be described with reference to Fig. 14A. Fig. 14A is a diagram for explaining classification of crystal structures of oxide semiconductors, typically IGZO (metal oxide containing In, Ga, and Zn).

[0237] As shown in FIG. 14A, oxide semiconductors are broadly classified into "Amorphous", "Crystalline", and "Crystal". "Amorphous" includes completely amorphous. "Crystalline" includes c-axis-aligned crystalline (CAAC), nanocrystalline (nc), and cloud-aligned composite (CAC) (excluding single crystal and poly crystal). "Crystalline" excludes single crystal, poly crystal, and completely amorphous. "Crystal" includes single crystal and poly crystal.

[0238] The structure in the bold frame shown in Fig. 14A is an intermediate state between "Amorphous" and "Crystal" and belongs to a new boundary region (New crystalline phase). In other words, this structure is completely different from the energetically unstable "Amorphous" and "Crystal".

[0239] The crystal structure of the film or substrate can be evaluated using an X-ray diffraction (XRD) spectrum. FIG. 14B shows an XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement of the CAAC-IGZO film classified as "Crystalline". The GIXD method is also called the thin film method or the Seemann-Bohlin method. Hereinafter, the XRD spectrum obtained by the GIXD measurement shown in FIG. 14B will be simply referred to as the XRD spectrum. The composition of the CAAC-IGZO film shown in FIG. 14B is in the vicinity of In:Ga:Zn=4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in FIG. 14B is 500 nm.

[0240] In FIG. 14B, the horizontal axis is 2θ [deg.] and the vertical axis is intensity [a.u.]. As shown in FIG. 14B, in the XRD spectrum of the CAAC-IGZO film, peaks indicating distinct crystallinity are detected. Specifically, in the XRD spectrum of the CAAC-IGZO film, a peak indicating c-axis orientation is detected near 2θ = 31°. As shown in FIG. 14B, the peak near 2θ = 31° is asymmetric about the angle at which the peak intensity was detected.

[0241] Also, the crystal structure of the film or substrate can be evaluated by the diffraction pattern (also referred to as the nano beam electron diffraction pattern) observed by nano beam electron diffraction (NBED). The diffraction pattern of the CAAC-IGZO film is shown in FIG. 14C. FIG. 14C is a diffraction pattern observed by NBED in which the electron beam is incident parallel to the substrate. Note that the composition of the CAAC-IGZO film shown in FIG. 14C is near In:Ga:Zn = 4:2:3 [atomic ratio]. Also, in nano beam electron diffraction, electron diffraction is performed with a probe diameter of 1 nm.

[0242] As shown in FIG. 14C, in the diffraction pattern of the CAAC-IGZO film, a plurality of spots indicating c-axis orientation are observed.

[0243] <Metal Oxide Having a CAAC Structure> Hereinafter, the details of the metal oxide having a CAAC structure will be described.

[0244] The CAAC structure has multiple crystals, and the multiple crystals have c-axes oriented in a specific direction. The specific direction is the thickness direction of the metal oxide having the CAAC structure, the normal direction of the surface on which the metal oxide having the CAAC structure is formed, or the normal direction of the surface of the metal oxide having the CAAC structure. When a crystal region is referred to as a crystal region, the crystal region refers to the crystal itself of the CAAC structure, or the crystal of the CAAC structure and a region in the vicinity of the crystal. Therefore, the crystal of the CAAC structure may be referred to as a crystal region of the CAAC structure.

[0245] A crystalline region is a region in which the atomic arrangement has periodicity. If the atomic arrangement is considered as a lattice arrangement, the crystalline region is also a region in which the lattice arrangement is uniform. Furthermore, the CAAC structure has a region in which multiple crystalline regions are connected in the ab-plane direction, and the region may have distortion. The distortion refers to a portion in which the direction of the lattice arrangement changes between a region in which the lattice arrangement is uniform and another region in which the lattice arrangement is uniform in the region in which multiple crystalline regions are connected. In other words, a metal oxide having a CAAC structure is a metal oxide that is c-axis oriented and does not have a clear orientation in the ab-plane direction.

[0246] Each of the multiple crystalline regions is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of one minute crystal, the maximum diameter of the crystalline region is less than 10 nm. When a crystalline region is composed of many minute crystals, the size of the crystalline region may be about several tens of nm.

[0247] In addition, in an In-M-Zn oxide (wherein element M is one or more elements selected from aluminum, gallium, yttrium, tin, titanium, etc.), the CAAC structure tends to have a layered crystal structure (also referred to as a layered structure) in which a layer having indium (In) and oxygen and a layer having element M, zinc (Zn), and oxygen are stacked. The layer having indium and oxygen may contain element M or zinc. The layer having element M, zinc, and oxygen may contain indium. The layered structure is observed as a lattice image in a high-resolution TEM image, for example.

[0248] When a metal oxide having a CAAC structure is subjected to structural analysis using, for example, an XRD device, a peak indicating c-axis orientation is detected at or near 2θ=31° in out-of-plane XRD measurement using θ / 2θ scan. Note that the position of the peak indicating c-axis orientation (2θ value) may vary depending on the type and composition of the metal element constituting the metal oxide.

[0249] For example, in the electron diffraction pattern of a metal oxide having a CAAC structure, multiple bright spots are observed, and one spot and another spot are observed at positions that are point-symmetric with respect to the spot of the incident electron beam that has passed through the sample (also called the direct spot).

[0250] When the crystal region is observed from the specific direction, the lattice arrangement in the crystal region is based on a hexagonal lattice, but the unit lattice is not necessarily a regular hexagon, and may be a non-regular hexagon. In addition, the above distortion may have a lattice arrangement such as a pentagon or heptagon. In addition, in a metal oxide having a CAAC structure, no clear crystal grain boundary can be confirmed even in the vicinity of the distortion. That is, it can be seen that the formation of crystal grain boundaries is suppressed by the distortion of the lattice arrangement. This is thought to be because the metal oxide having a CAAC structure can tolerate distortion due to the fact that the arrangement of oxygen atoms in the ab-plane direction is not dense, and the bond distance between atoms changes due to the substitution of metal atoms.

[0251] Metal oxides having a CAAC structure are highly crystalline and have no clear crystal grain boundaries. In other words, it can be said that metal oxides having a CAAC structure are less susceptible to a decrease in electron mobility due to crystal grain boundaries. Therefore, metal oxides having a CAAC structure have stable physical properties. Therefore, metal oxides having a CAAC structure are resistant to heat and highly reliable. Therefore, metal oxides having a CAAC structure are one of the crystalline oxides having a crystal structure suitable for the semiconductor layer of a transistor.

[0252] <Transistors with metal oxide> Next, a case where a metal oxide (oxide semiconductor) is used for a transistor will be described.

[0253] By using the metal oxide (oxide semiconductor) of one embodiment of the present invention for a transistor, a transistor with high field-effect mobility can be realized. In addition, a highly reliable transistor can be realized. In addition, a miniaturized or highly integrated transistor can be realized. For example, a transistor with a channel length of 2 nm to 30 nm can be manufactured.

[0254] For the channel formation region of the transistor, an oxide semiconductor with a low carrier concentration is preferably used. For example, the carrier concentration of the channel formation region of the oxide semiconductor is 1×10 17 cm -3 Less than or equal to 1×10 15 cm -3 Less than 1×10, more preferably 13 cm -3 Less than or equal to 1×10 11 cm -3 Less than 1×10, more preferably 10 cm -3 Less than 1 x 10 -9 cm -3The above is the case. Note that in order to reduce the carrier concentration of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film may be reduced to reduce the density of defect states. In this specification and the like, an oxide semiconductor having a low impurity concentration and a low density of defect states is referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor. Note that an oxide semiconductor having a low carrier concentration may be referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor.

[0255] Furthermore, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states, and therefore the density of trap states might also be low.

[0256] In addition, charges trapped in the trap states of an oxide semiconductor take a long time to disappear and may behave as if they are fixed charges. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high density of trap states may have unstable electrical characteristics.

[0257] Therefore, in order to stabilize the electrical characteristics of a transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. In order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in a nearby film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.

[0258] <Impurities in metal oxides> Here, the influence of each impurity in a metal oxide (oxide semiconductor) will be described.

[0259] When an oxide semiconductor contains silicon or carbon, which is one of the Group 14 elements, defect levels are formed in the oxide semiconductor. For this reason, the concentration of silicon or carbon in the channel formation region of the oxide semiconductor and the concentration of silicon or carbon near the interface with the channel formation region of the oxide semiconductor (concentration obtained by secondary ion mass spectrometry (SIMS)) are set to 2×10 18 atoms / cm 3Less than or equal to 2×10 17 atoms / cm 3 The following applies.

[0260] In addition, when an oxide semiconductor contains an alkali metal or an alkaline earth metal, defect levels are formed and carriers are generated in some cases. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal is likely to have normally-on characteristics. For this reason, when the concentration of the alkali metal or the alkaline earth metal in the channel formation region of the oxide semiconductor obtained by SIMS is set to 1×10 18 atoms / cm 3 Less than or equal to 2×10 16 atoms / cm 3 To the following:

[0261] Furthermore, when nitrogen is contained in an oxide semiconductor, electrons serving as carriers are generated, the carrier concentration increases, and the semiconductor is likely to become n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor is likely to have normally-on characteristics. Alternatively, when nitrogen is contained in an oxide semiconductor, trap states may be formed. As a result, the electrical characteristics of the transistor may become unstable. For this reason, the nitrogen concentration in the channel formation region of the oxide semiconductor obtained by SIMS is set to 5×10 19 atoms / cm 3 Less than or equal to 5×10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Less than 5×10, more preferably 17 atoms / cm 3 To the following:

[0262] Furthermore, hydrogen contained in the oxide semiconductor reacts with oxygen bonded to a metal atom to form water, which may form an oxygen vacancy. When hydrogen enters the oxygen vacancy, electrons serving as carriers may be generated. In addition, some of the hydrogen may bond with oxygen bonded to a metal atom to generate electrons serving as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen is likely to have normally-on characteristics. For this reason, it is preferable to reduce hydrogen in the channel formation region of the oxide semiconductor as much as possible. Specifically, the hydrogen concentration measured by SIMS in the channel formation region of the oxide semiconductor is 1×10 20 atoms / cm 3 Less than 5 x 10 19 atoms / cm 3 less than 1×10 19 atoms / cm 3 less than 5×10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 Make it less than.

[0263] When an oxide semiconductor in which impurities are sufficiently reduced is used for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0264] <Other materials that can be used for the semiconductor layer of transistors> One embodiment of the present invention is not limited to the above-mentioned metal oxide. For example, the above-mentioned layered material may be used. The layered material may have a crystal 21_1, a crystal 21_2, and a region located between the crystal 21_1 and the crystal 21_2 and having the same characteristics as the region 22_1, as in the above-mentioned metal oxide.

[0265] In addition, layered materials have high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity in the channel formation region, it is possible to provide a transistor with a large on-state current.

[0266] Layered materials include graphene, silicene, and chalcogenides. Chalcogenides are compounds that contain chalcogen. Chalcogen is a general term for elements in group 16, including oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Chalcogenides include transition metal chalcogenides and group 13 chalcogenides.

[0267] For example, a transition metal chalcogenide that functions as a semiconductor is preferably used as the semiconductor layer of a transistor. Specifically, molybdenum sulfide (representatively, MoS 2 ), molybdenum selenide (represented by MoSe 2 ), molybdenum tellurium (represented by MoTe 2 ), tungsten sulfide (represented by WS 2 ), tungsten selenide (represented by WSe 2 ), tungsten tellurium (represented by WTe 2 ), hafnium sulfide (represented by HfS 2 ), hafnium selenide (represented by HfSe 2 ), zirconium sulfide (typically ZrS 2 ), zirconium selenide (represented by ZrSe 2 ) etc.

[0268] This embodiment mode can be implemented in appropriate combination with structures described in other embodiment modes.

[0269] (Embodiment 2) In this embodiment, an example of a semiconductor device including the transistor 200 using the metal oxide described in the above embodiment and a manufacturing method thereof will be described with reference to FIGS.

[0270] <Example of semiconductor device configuration> A configuration of a semiconductor device having a transistor 200 will be described with reference to FIG. 15. FIGS. 15A to 15D are a top view and a cross-sectional view of a semiconductor device having a transistor 200. FIG. 15A is a top view of the semiconductor device. FIGS. 15B to 15D are cross-sectional views of the semiconductor device. FIG. 15B is a cross-sectional view of a portion indicated by a dashed line A1-A2 in FIG. 15A, and is also a cross-sectional view of the transistor 200 in the channel length direction. FIG. 15C is a cross-sectional view of a portion indicated by a dashed line A3-A4 in FIG. 15A, and is also a cross-sectional view of the transistor 200 in the channel width direction. FIG. 15D is a cross-sectional view of a portion indicated by a dashed line A5-A6 in FIG. 15A. Note that some elements are omitted in the top view of FIG. 15A for clarity.

[0271] The semiconductor device of one embodiment of the present invention includes an insulator 212 on a substrate (not shown), an insulator 214 on the insulator 212, a transistor 200 on the insulator 214, an insulator 280 on the transistor 200, an insulator 282 on the insulator 280, an insulator 283 on the insulator 282, and an insulator 285 on the insulator 283. The insulators 212, 214, 280, 282, 283, and 285 function as interlayer insulating films. The semiconductor device also includes a conductor 240a and a conductor 240b which are electrically connected to the transistor 200 and function as plugs. Note that an insulator 241a is provided in contact with a side surface of the conductor 240a, and an insulator 241b is provided in contact with a side surface of the conductor 240b. In addition, conductors 246a and 246b, which are electrically connected to the conductor 240 and function as wiring, are provided on the insulator 285, the conductor 240a, and the conductor 240b.

[0272] In the following, the conductor 240a and the conductor 240b may be collectively referred to as the conductor 240. Furthermore, the insulator 241a and the insulator 241b may be collectively referred to as the insulator 241. Furthermore, the conductor 246a and the conductor 246b may be collectively referred to as the conductor 246.

[0273] Insulator 241a is provided in contact with the inner wall of the opening of insulator 280, insulator 282, insulator 283, and insulator 285, and conductor 240a is provided in contact with the side of insulator 241a. Insulator 241b is provided in contact with the inner wall of the opening of insulator 280, insulator 282, insulator 283, and insulator 285, and conductor 240b is provided in contact with the side of insulator 241b. Insulator 241 has a structure in which a first insulator is provided in contact with the inner wall of the opening, and a second insulator is provided further inward. In addition, conductor 240 has a structure in which a first conductor is provided in contact with the side of insulator 241, and a second conductor is provided further inward.

[0274] Note that, although the transistor 200 shows a structure in which the first conductor of the insulator 241 and the second conductor of the insulator 241 are stacked, one embodiment of the present invention is not limited to this. For example, the insulator 241 may be provided as a single layer or a stacked structure of three or more layers. Furthermore, the transistor 200 shows a structure in which the first conductor of the conductor 240 and the second conductor of the conductor 240 are stacked, but one embodiment of the present invention is not limited to this. For example, the conductor 240 may be provided as a single layer or a stacked structure of three or more layers. When a structure has a stacked structure, an ordinal number may be assigned to the order of formation to distinguish the structures.

[0275] [Transistor 200] As shown in FIGS. 15A to 15D , the transistor 200 includes an insulator 216 on an insulator 214, a conductor 205 (conductor 205a and conductor 205b) disposed so as to be embedded in the insulator 216, an insulator 222 on the insulator 216 and on the conductor 205, an insulator 224 on the insulator 222, an oxide 230a on the insulator 224, an oxide 230b on the oxide 230a, a conductor 242a on the oxide 230b, an insulator 271a on the conductor 242a, and an oxide 272a on the oxide 272b. conductor 242b on oxide 230b, insulator 271b on conductor 242b, insulator 250 (insulator 250a and insulator 250b) on oxide 230b, conductor 260 (conductor 260a and conductor 260b) located on insulator 250 and overlapping part of oxide 230b, and insulator 275 arranged to cover insulator 222, insulator 224, oxide 230a, oxide 230b, conductor 242a, conductor 242b, insulator 271a, and insulator 271b.

[0276] In the following, the oxide 230a and the oxide 230b may be collectively referred to as the oxide 230. Furthermore, the conductor 242a and the conductor 242b may be collectively referred to as the conductor 242. Furthermore, the insulator 271a and the insulator 271b may be collectively referred to as the insulator 271.

[0277] An opening reaching the oxide 230b is provided in the insulator 280 and the insulator 275. The insulator 250 and the conductor 260 are disposed in the opening. In addition, in the channel length direction of the transistor 200, the conductor 260 and the insulator 250 are provided between the insulator 271a and the conductor 242a and the insulator 271b and the conductor 242b. The insulator 250 has a region in contact with a side surface of the conductor 260 and a region in contact with a bottom surface of the conductor 260.

[0278] The oxide 230 preferably has an oxide 230a disposed on the insulator 224 and an oxide 230b disposed on the oxide 230a. By having the oxide 230a below the oxide 230b, it is possible to suppress the diffusion of impurities from a structure formed below the oxide 230a to the oxide 230b.

[0279] Note that in the transistor 200, the oxide 230 has a two-layer structure of the oxide 230a and the oxide 230b, but one embodiment of the present invention is not limited to this. For example, the oxide 230b may have a single layer or a stacked structure of three or more layers, or each of the oxide 230a and the oxide 230b may have a stacked structure.

[0280] The conductor 260 functions as a first gate (also referred to as a top gate) electrode, and the conductor 205 functions as a second gate (also referred to as a back gate) electrode. The insulator 250 functions as a first gate insulating film, and the insulators 224 and 222 function as second gate insulating films. The conductor 242a functions as one of a source electrode or a drain electrode, and the conductor 242b functions as the other of the source electrode or the drain electrode. At least a part of a region of the oxide 230 overlapping with the conductor 260 functions as a channel formation region.

[0281] For the oxide 230 (the oxide 230a and the oxide 230b) including the channel formation region of the transistor 200, the metal oxide (hereinafter also referred to as an oxide semiconductor) described in the above embodiment can be used.

[0282] The metal oxide described in the above embodiment can function as a semiconductor. In this case, the metal oxide has a band gap of 2 eV or more, or 2.5 eV or more. By using such a metal oxide having a wide band gap, the off-state current of a transistor can be reduced.

[0283] As described in the previous embodiment, for example, a metal oxide such as an In-M-Zn oxide having indium, element M, and zinc (element M is one or more selected from aluminum, gallium, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, etc.) may be used as the oxide 230. Alternatively, an In-Ga oxide, an In-Zn oxide, or an indium oxide may be used as the oxide 230.

[0284] Here, it is preferable that the atomic ratio of In to element M in the metal oxide used for oxide 230b is greater than the atomic ratio of In to element M in the metal oxide used for oxide 230a.

[0285] In this manner, by disposing the oxide 230a below the oxide 230b, it is possible to suppress the diffusion of impurities and oxygen from structures formed below the oxide 230a into the oxide 230b.

[0286] In addition, the oxide 230a and the oxide 230b have a common element other than oxygen (as a main component), so that the defect state density at the interface between the oxide 230a and the oxide 230b can be reduced. Since the defect state density at the interface between the oxide 230a and the oxide 230b can be reduced, the effect of interface scattering on carrier conduction is small, and a high on-current can be obtained.

[0287] A highly crystalline metal oxide such as CAAC-OS has few impurities and defects (such as oxygen vacancies) and a dense structure, so that the source electrode or drain electrode can suppress the extraction of oxygen from the oxide 230b. As a result, even if a heat treatment is performed, the extraction of oxygen from the oxide 230b can be reduced, so that the transistor 200 is stable against high temperatures (so-called thermal budget) in the manufacturing process.

[0288] FIG. 16A shows an enlarged view of the vicinity of the channel formation region of the transistor 200. When oxygen is supplied to the oxide 230b, a channel formation region is formed in a region between the conductor 242a and the conductor 242b. Thus, as shown in FIG. 16A, the oxide 230b has a region 230bc that functions as a channel formation region of the transistor 200, and regions 230ba and 230bb that are provided on either side of the region 230bc and function as a source region or a drain region. At least a portion of the region 230bc overlaps with the conductor 260. In other words, the region 230bc is provided in a region between the conductor 242a and the conductor 242b. The region 230ba is provided overlapping with the conductor 242a, and the region 230bb is provided overlapping with the conductor 242b.

[0289] The region 230bc, which functions as a channel formation region, is a high-resistance region with a low carrier concentration because it has fewer oxygen vacancies or a lower impurity concentration than the regions 230ba and 230bb. Therefore, the region 230bc can be said to be i-type (intrinsic) or substantially i-type.

[0290] Moreover, the regions 230ba and 230bb that function as source and drain regions have many oxygen vacancies or high concentrations of impurities such as hydrogen, nitrogen, and metal elements, which increases the carrier concentration and reduces resistance. That is, the regions 230ba and 230bb are n-type regions with a high carrier concentration and low resistance compared to the region 230bc.

[0291] Here, the carrier concentration of the region 230bc functioning as a channel forming region is 1×10 18 cm -3 It is preferable that the value is less than 1×10 17 cm -3 More preferably, it is less than 1×10 16 cm -3 More preferably, it is less than 1×10 13 cm -3 More preferably, it is less than 1×10 12 cm-3 The lower limit of the carrier concentration of the region 230bc that functions as a channel formation region is not particularly limited, but is, for example, 1×10 -9 cm -3 It can be said that:

[0292] In addition, a region having a carrier concentration equal to or lower than that of the region 230ba and the region 230bb, and equal to or higher than that of the region 230bc, may be formed between the region 230bc and the region 230ba or the region 230bb. That is, the region functions as a junction region between the region 230bc and the region 230ba or the region 230bb. The junction region may have a hydrogen concentration equal to or lower than that of the region 230ba and the region 230bb, and equal to or higher than that of the region 230bc. The junction region may have an oxygen vacancy equal to or less than that of the region 230ba and the region 230bb, and equal to or more than that of the region 230bc.

[0293] 16A illustrates an example in which the regions 230ba, 230bb, and 230bc are formed in the oxide 230b, but one embodiment of the present invention is not limited to this. For example, each of the above regions may be formed in not only the oxide 230b but also the oxide 230a.

[0294] In addition, it may be difficult to clearly detect the boundaries between the regions in the oxide 230. The concentrations of metal elements, hydrogen, nitrogen, and other impurity elements detected in each region may not only vary stepwise from region to region, but may also vary continuously within each region. In other words, it is sufficient that the concentrations of metal elements, hydrogen, nitrogen, and other impurity elements decrease in the region closer to the channel formation region.

[0295] 15C , in a cross-sectional view in the channel width direction of the transistor 200, a curved surface may be formed between the side surface of the oxide 230b and the top surface of the oxide 230b. In other words, the end of the side surface and the end of the top surface may be curved (also referred to as rounded).

[0296] The radius of curvature of the curved surface is preferably greater than 0 nm and smaller than the film thickness of the oxide 230b in the region overlapping with the conductor 242, or smaller than half the length of the region not having the curved surface. Specifically, the radius of curvature of the curved surface is greater than 0 nm and less than 20 nm, preferably greater than 1 nm and less than 15 nm, and more preferably greater than 2 nm and less than 10 nm. By forming the curved surface in this manner, the coverage of the oxide 230b by the insulator 250 and the conductor 260 can be improved.

[0297] The oxide 230 preferably has a laminated structure of a plurality of oxide layers with different chemical compositions. Specifically, in the metal oxide used for the oxide 230a, the atomic ratio of element M to the metal element that is the main component is preferably greater than the atomic ratio of element M to the metal element that is the main component in the metal oxide used for the oxide 230b. In addition, in the metal oxide used for the oxide 230a, the atomic ratio of element M to In is preferably greater than the atomic ratio of element M to In in the metal oxide used for the oxide 230b. In addition, in the metal oxide used for the oxide 230b, the atomic ratio of In to element M is preferably greater than the atomic ratio of In to element M in the metal oxide used for the oxide 230a.

[0298] Here, the conduction band minimum changes gradually at the junction between the oxide 230a and the oxide 230b. In other words, the conduction band minimum at the junction between the oxide 230a and the oxide 230b can be said to change continuously or to be a continuous junction. To achieve this, it is preferable to reduce the defect level density of the mixed layer formed at the interface between the oxide 230a and the oxide 230b.

[0299] Specifically, the oxide 230a and the oxide 230b have a common element other than oxygen as a main component, so that a mixed layer with a low density of defect states can be formed. For example, when the oxide 230b is an In-M-Zn oxide, the oxide 230a may be an In-M-Zn oxide, an M-Zn oxide, an oxide of element M, an In-Zn oxide, or indium oxide.

[0300] Specifically, the oxide 230a may be a metal oxide having a composition of In:M:Zn=1:3:4 [atomic ratio] or a composition close thereto, or In:M:Zn=1:1:0.5 [atomic ratio] or a composition close thereto. The oxide 230b may be a metal oxide having a composition of In:M:Zn=1:1:1 [atomic ratio] or a composition close thereto, In:M:Zn=4:2:3 [atomic ratio] or a composition close thereto, or In:M:Zn=5:1:3 [atomic ratio] or a composition close thereto. The composition close thereto includes a range of ±30% of the desired atomic ratio. It is preferable to use gallium as the element M.

[0301] In addition, when a metal oxide film is formed by a sputtering method, the above atomic ratio is not limited to the atomic ratio of the formed metal oxide film, but may be the atomic ratio of a sputtering target used to form the metal oxide film.

[0302] By configuring the oxide 230a and the oxide 230b as described above, the defect state density at the interface between the oxide 230a and the oxide 230b can be reduced, so that the effect of interface scattering on carrier conduction is reduced, and the transistor 200 can obtain a large on-current and high frequency characteristics.

[0303] Note that, in the transistor 200, the oxide 230 has a two-layer structure of the oxide 230a and the oxide 230b; however, one embodiment of the present invention is not limited to this. For example, the oxide 230b may have a single layer or a stacked structure of three or more layers. Each of the oxide 230a and the oxide 230b may have a stacked structure. When the oxide 230 has a stacked structure of three or more layers, a part of the stacked structure of the oxide 230 may be formed in the openings formed in the insulator 280 and the insulator 275, as in the case of the insulator 250.

[0304] At least one of the insulators 212, 214, 271, 275, 282, and 283 preferably functions as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen from the substrate side or from above the transistor 200 to the transistor 200. Therefore, at least one of the insulators 212, 214, 271, 275, 282, and 283 preferably suppresses the diffusion of impurities such as hydrogen, hydrogen, and nitrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules (N 2 O, NO, NO 2 It is preferable to use an insulating material that has a function of suppressing the diffusion of impurities such as copper atoms (the impurities are unlikely to permeate through the insulating material), or that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (the oxygen is unlikely to permeate through the insulating material).

[0305] In this specification, a barrier insulating film refers to an insulating film having a barrier property. In this specification, the barrier property means a function of suppressing the diffusion of a corresponding substance (also called low permeability) or a function of capturing and fixing a corresponding substance (also called gettering).

[0306] For example, aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride, or silicon nitride oxide can be used for the insulators 212, 214, 271, 275, 282, and 283. For example, it is preferable to use silicon nitride or the like, which has a higher hydrogen barrier property, for the insulators 212, 275, and 283. For example, it is preferable to use aluminum oxide or magnesium oxide, which has a higher function of capturing and fixing hydrogen, for the insulators 214, 271, and 282. This can suppress impurities such as water and hydrogen from diffusing from the substrate side to the transistor 200 side through the insulators 212 and 214. Alternatively, it is possible to suppress impurities such as water and hydrogen from diffusing from an interlayer insulating film disposed outside the insulator 283 to the transistor 200 side. Alternatively, oxygen contained in the insulator 224 or the like can be suppressed from diffusing toward the substrate side through the insulator 212 and the insulator 214. Alternatively, oxygen contained in the insulator 280 or the like can be suppressed from diffusing upward from the transistor 200 through the insulator 282 or the like. In this manner, it is preferable to have a structure in which the transistor 200 is surrounded by the insulators 212, 214, 271, 275, 282, and 283, which have a function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen.

[0307] Here, it is preferable to use an oxide having an amorphous structure as at least one of the insulators 212, 214, 271, 275, 282, and 283. For example, AlO x (x is any number greater than 0), or MgO yIt is preferable to use a metal oxide such as y (y is any number greater than 0). In such a metal oxide having an amorphous structure, oxygen atoms have dangling bonds, and the dangling bonds may have the property of capturing or fixing hydrogen. By using such a metal oxide having an amorphous structure as a component of the transistor 200 or providing it around the transistor 200, hydrogen contained in the transistor 200 or hydrogen present around the transistor 200 can be captured or fixed. In particular, it is preferable to capture or fix hydrogen contained in the channel formation region of the transistor 200. By using a metal oxide having an amorphous structure as a component of the transistor 200 or providing it around the transistor 200, a transistor 200 and a semiconductor device having good characteristics and high reliability can be manufactured.

[0308] At least one of the insulators 212, 214, 271, 275, 282, and 283 is preferably an amorphous structure, but may have a polycrystalline structure region in a portion thereof. At least one of the insulators 212, 214, 271, 275, 282, and 283 may have a multilayer structure in which a layer of an amorphous structure and a layer of a polycrystalline structure are stacked. For example, a layered structure in which a layer of a polycrystalline structure is formed on a layer of an amorphous structure may be used.

[0309] The insulators 212, 214, 271, 275, 282, and 283 may be formed by, for example, a sputtering method. Since the sputtering method does not require the use of hydrogen in the film formation gas, the hydrogen concentration of the insulators 212, 214, 271, 275, 282, and 283 can be reduced. Note that the film formation method is not limited to the sputtering method, and a CVD method, an MBE method, a PLD method, an ALD method, or the like may be used as appropriate. For example, the insulator 275 may be formed by an ALD method, which has relatively good coverage. Among the ALD methods, a PEALD method, which can reduce the film formation temperature, may be used.

[0310] In addition, it may be preferable to reduce the resistivity of the insulator 212 and the insulator 283. For example, it is preferable to reduce the resistivity of the insulator 212 and the insulator 283 to approximately 1×10 13 By setting the resistivity at Ωcm, the insulator 212 and the insulator 283 may be able to reduce charge-up of the conductor 205, the conductor 242, the conductor 260, or the conductor 246 in a process using plasma or the like in a semiconductor device manufacturing process. 10 Ωcm or more 1×10 15 Ωcm or less.

[0311] The insulator 216 and the insulator 280 preferably have a lower dielectric constant than the insulator 214. By using a material with a low dielectric constant as an interlayer insulating film, the parasitic capacitance generated between wirings can be reduced. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, silicon oxide having vacancies, or the like may be used as the insulator 216 and the insulator 280 as appropriate.

[0312] The conductor 205 is disposed so as to overlap the oxide 230 and the conductor 260. Here, the conductor 205 is preferably provided by being embedded in an opening formed in the insulator 216. Also, a part of the conductor 205 may be embedded in the insulator 214.

[0313] The conductor 205 includes conductor 205a and conductor 205b. The conductor 205a is provided in contact with the bottom surface and side wall of the opening. The conductor 205b is provided so as to be embedded in a recess formed in the conductor 205a. Here, the height of the upper surface of the conductor 205b is approximately equal to the height of the upper surface of the conductor 205a and the height of the upper surface of the insulator 216.

[0314] Here, the conductor 205a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, a nitrogen oxide molecule (N 2 O, NO, NO 2 It is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as copper atoms, etc., or oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.).

[0315] By using a conductive material having a function of reducing hydrogen diffusion for the conductor 205a, it is possible to prevent impurities such as hydrogen contained in the conductor 205b from diffusing into the oxide 230 via the insulator 224 and the like. In addition, by using a conductive material having a function of suppressing oxygen diffusion for the conductor 205a, it is possible to suppress the conductor 205b from being oxidized and its conductivity from decreasing. As the conductive material having a function of suppressing oxygen diffusion, it is preferable to use, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like. Therefore, the conductor 205a may be a single layer or a multilayer of the above conductive material. For example, the conductor 205a may be made of titanium nitride.

[0316] The conductor 205b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component, for example, tungsten.

[0317] The conductor 205 may function as a second gate electrode. In this case, the threshold voltage (Vth) of the transistor 200 can be controlled by changing the potential applied to the conductor 205 independently of the potential applied to the conductor 260. In particular, by applying a negative potential to the conductor 205, the Vth of the transistor 200 can be increased and the off-current can be reduced compared to when no potential is applied to the conductor 205. Therefore, the drain current when the potential applied to the conductor 260 is 0 V can be reduced by applying a negative potential to the conductor 205 compared to when no potential is applied.

[0318] As shown in FIG. 15A, the conductor 205 is preferably provided larger than the size of the region of the oxide 230 that does not overlap with the conductor 242a and the conductor 242b. In particular, as shown in FIG. 15C, the conductor 205 preferably extends in a region outside the end of the oxide 230a and the oxide 230b that intersects with the channel width direction. In other words, outside the side surface of the oxide 230 in the channel width direction, the conductor 205 and the conductor 260 preferably overlap with each other via an insulator. With this configuration, the channel formation region of the oxide 230 can be electrically surrounded by the electric field of the conductor 260 that functions as the first gate electrode and the electric field of the conductor 205 that functions as the second gate electrode. In this specification, a structure of a transistor in which the channel formation region is electrically surrounded by the electric fields of the first gate and the second gate is called a surrounded channel (S-channel) structure.

[0319] In this specification and the like, a transistor with an S-channel structure refers to a transistor structure in which a channel formation region is electrically surrounded by the electric fields of one and the other of a pair of gate electrodes. The S-channel structure disclosed in this specification and the like is different from a fin type structure and a planar type structure. By adopting the S-channel structure, it is possible to improve resistance to the short channel effect, in other words, to make a transistor in which the short channel effect is unlikely to occur.

[0320] 15C, the conductor 205 is extended to function as wiring. However, the present invention is not limited to this, and a conductor functioning as wiring may be provided below the conductor 205. Also, it is not necessary to provide one conductor 205 for each transistor. For example, the conductor 205 may be shared by multiple transistors.

[0321] Note that in the transistor 200, the conductor 205 has a stacked structure of the conductor 205a and the conductor 205b; however, one embodiment of the present invention is not limited to this structure. For example, the conductor 205 may have a single layer structure or a stacked structure of three or more layers.

[0322] The insulators 222 and 224 function as gate insulating films.

[0323] The insulator 222 preferably has a function of suppressing the diffusion of hydrogen (e.g., at least one of hydrogen atoms, hydrogen molecules, etc.). The insulator 222 preferably has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.). For example, the insulator 222 preferably has a function of suppressing the diffusion of one or both of hydrogen and oxygen more than the insulator 224.

[0324] The insulator 222 may be an insulator containing an oxide of one or both of aluminum and hafnium, which are insulating materials. As the insulator, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like. When the insulator 222 is formed using such a material, the insulator 222 functions as a layer that suppresses the release of oxygen from the oxide 230 to the substrate side, or the diffusion of impurities such as hydrogen from the periphery of the transistor 200 to the oxide 230. Thus, by providing the insulator 222, it is possible to suppress the diffusion of impurities such as hydrogen into the inside of the transistor 200 and the generation of oxygen vacancies in the oxide 230. In addition, it is possible to suppress the reaction of the conductor 205 with the oxygen contained in the insulator 224 and the oxide 230.

[0325] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to the insulator. Alternatively, these insulators may be nitrided. The insulator 222 may be formed by stacking silicon oxide, silicon oxynitride, or silicon nitride on these insulators.

[0326] The insulator 222 may be made of, for example, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO 3 ), (Ba,Sr)TiO 3 Insulators containing so-called high-k materials such as (BST) may be used in a single layer or a multilayer. As transistors become smaller and more highly integrated, problems such as leakage current may occur due to the thinning of the gate insulator. By using a high-k material for the insulator that functions as the gate insulator, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0327] The insulator 224 in contact with the oxide 230 may be made of, for example, silicon oxide, silicon oxynitride, or the like as appropriate. By providing the insulator 224 containing oxygen in contact with the oxide 230, oxygen vacancies in the oxide 230 can be reduced and the reliability of the transistor 200 can be improved. The insulator 224 is preferably processed into an island shape so as to overlap with the oxide 230a. In this case, the insulator 275 is configured to be in contact with the side surface of the insulator 224 and the top surface of the insulator 222. With this configuration, the volume of the insulator 224 can be significantly reduced and the insulator 224 and the insulator 280 can be separated by the insulator 275. Therefore, the oxygen contained in the insulator 280 can be diffused into the insulator 224, and the oxygen in the insulator 224 can be prevented from becoming excessive.

[0328] Note that the insulator 222 and the insulator 224 may have a stacked structure of two or more layers. In this case, the insulator 222 and the insulator 224 are not limited to a stacked structure made of the same material, and may be a stacked structure made of different materials. Note that although a structure in which the insulator 224 is formed in an island shape overlapping with the oxide 230a is shown in FIG. 15B and the like, one embodiment of the present invention is not limited to this. As long as the amount of oxygen contained in the insulator 224 can be appropriately adjusted, the insulator 224 may be configured without being patterned, similar to the insulator 222.

[0329] In addition, in the manufacturing process of the transistor 200, it is preferable to perform heat treatment while the surface of the oxide 230 is exposed. The heat treatment may be performed, for example, at a temperature of 100° C. or higher and 600° C. or lower, more preferably 350° C. or higher and 550° C. or lower. Note that the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing an oxidizing gas at 10 ppm or higher, 1% or higher, or 10% or higher. For example, the heat treatment is preferably performed in an oxygen atmosphere. This supplies oxygen to the oxide 230 to reduce oxygen deficiencies (V O) can be reduced. The heat treatment may be performed under reduced pressure. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in order to compensate for the desorbed oxygen after the heat treatment in a nitrogen gas or inert gas atmosphere. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in order to compensate for the desorbed oxygen. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in succession to a heat treatment in a nitrogen gas or inert gas atmosphere.

[0330] In addition, by subjecting the oxide 230 to an oxygen addition treatment, the oxygen vacancies in the oxide 230 are repaired by the supplied oxygen. In other words, O +O→null. Furthermore, the reaction of the supplied oxygen with the hydrogen remaining in the oxide 230 can be accelerated to convert the hydrogen into H 2 O. This causes the hydrogen remaining in the oxide 230 to recombine with the oxygen vacancies and form V. O The formation of H can be suppressed.

[0331] The conductor 242a and the conductor 242b are preferably provided in contact with the top surface of the oxide 230b. The conductor 242a and the conductor 242b function as a source electrode and a drain electrode of the transistor 200, respectively.

[0332] As the conductor 242 (conductor 242a and conductor 242b), for example, a nitride containing tantalum, a nitride containing titanium, a nitride containing molybdenum, a nitride containing tungsten, a nitride containing tantalum and aluminum, a nitride containing titanium and aluminum, or the like is preferably used. In one embodiment of the present invention, a nitride containing tantalum is particularly preferable. Also, for example, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, or the like may be used. These materials are preferable because they are conductive materials that are difficult to oxidize, or materials that maintain their conductivity even when they absorb oxygen.

[0333] Here, it is preferable to use a film with a large compressive stress as the conductor 242, for example, a tantalum nitride film formed by sputtering. The stress of the conductor 242 causes distortion in the crystal structure of the regions 230ba and 230bb, which makes oxygen vacancies more likely to form in these regions. This causes the V O Since the amount of H increases, the carrier concentration in the regions 230ba and 230bb can be increased to make them n-type.

[0334] Note that hydrogen contained in the oxide 230b etc. may diffuse into the conductor 242a or the conductor 242b. In particular, by using a nitride containing tantalum for the conductor 242a and the conductor 242b, hydrogen contained in the oxide 230b etc. is likely to diffuse into the conductor 242a or the conductor 242b, and the diffused hydrogen may bond with nitrogen contained in the conductor 242a or the conductor 242b. In other words, hydrogen contained in the oxide 230b etc. may be absorbed by the conductor 242a or the conductor 242b.

[0335] Moreover, it is preferable that no curved surface is formed between the side surface of the conductor 242 and the top surface of the conductor 242. By forming the conductor 242 without such a curved surface, it is possible to increase the cross-sectional area of ​​the conductor 242 in the cross section in the channel width direction as shown in Fig. 15D. This can increase the conductivity of the conductor 242 and the on-current of the transistor 200.

[0336] The insulator 271a is provided in contact with the upper surface of the conductor 242a, and the insulator 271b is provided in contact with the upper surface of the conductor 242b. The insulator 271 preferably has a function of capturing impurities such as hydrogen. In that case, an insulator such as a metal oxide having an amorphous structure, for example, aluminum oxide or magnesium oxide, may be used as the insulator 271. In particular, it is preferable to use aluminum oxide having an amorphous structure or aluminum oxide having an amorphous structure as the insulator 271, because hydrogen can be captured or fixed more effectively. This makes it possible to manufacture a transistor 200 and a semiconductor device having excellent characteristics and high reliability.

[0337] The insulator 271 preferably functions as a barrier insulating film against oxygen. Therefore, the insulator 271 preferably has a function of suppressing oxygen diffusion. For example, the insulator 271 preferably has a function of suppressing oxygen diffusion more than the insulator 280. In this case, the insulator 271 may be, for example, a nitride containing silicon, such as silicon nitride.

[0338] The insulator 275 is provided in contact with the upper surface of the insulator 222, the side surface of the insulator 224, the side surface of the oxide 230a, the side surface of the oxide 230b, the side surface of the conductor 242, and the side surface and upper surface of the insulator 271. The insulator 275 has openings formed in the regions where the insulator 250 and the conductor 260 are provided.

[0339] The insulator 275 preferably functions as a barrier insulating film that suppresses oxygen permeation. The insulator 275 preferably functions as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen, and preferably has a function of capturing impurities such as hydrogen. The insulator 275 may be, for example, a single layer or a stack of insulators such as aluminum oxide or silicon nitride. For example, an aluminum oxide film having an amorphous structure may be provided, and a silicon nitride film may be stacked thereon. Such a stacked structure is preferable because it can enhance the barrier properties against hydrogen and oxygen more than a single layer of an aluminum oxide film or a single layer of a silicon nitride film.

[0340] By providing the insulators 271 and 275 as described above, the conductor 242 can be wrapped in an insulator having a barrier property against oxygen. That is, it is possible to prevent oxygen contained in the insulators 224, 280, and 250a from diffusing into the conductor 242. This makes it possible to suppress a decrease in on-current due to an increase in resistivity caused by direct oxidation of the conductor 242 caused by the oxygen contained in the insulators 224, 280, and 250a.

[0341] Furthermore, by providing insulators 214, 271, and 275, which have the function of capturing impurities such as hydrogen, in the region sandwiched between insulators 212 and 275, impurities such as hydrogen contained in insulator 224 or insulator 216 can be captured and the amount of hydrogen in the region can be kept constant. In this case, it is preferable that at least a portion of insulator 275 contains aluminum oxide with an amorphous structure.

[0342] The insulator 250 has an insulator 250a and an insulator 250b on the insulator 250a, and functions as a gate insulating film. The insulator 250a is preferably disposed in contact with the top surface of the oxide 230b and the side surface of the insulator 280. The thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less.

[0343] The insulator 250a may be made of silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide doped with fluorine, silicon oxide having vacancies, etc. In particular, silicon oxide and silicon oxynitride are preferred because they are stable against heat. Note that the insulator 250a is preferably one having a low carbon content in the film.

[0344] However, one embodiment of the present invention is not limited thereto, and the insulator 250a may contain carbon. For example, the carbon concentration of the insulator 250a is preferably 1×10 18 atoms / cm 3 5×10 or more 20 atoms / cm 3 Less than or equal to 5×10 18 atoms / cm 3 More than 1×10 20 atoms / cm 3 The carbon concentration in the film of the insulator 250a can be measured by SIMS analysis or the like.

[0345] Similar to the insulator 224, the insulator 250a preferably has a reduced concentration of impurities such as water and hydrogen.

[0346] It is preferable that the insulator 250a is formed using an insulator through which oxygen can easily diffuse when heated, and the insulator 250b is formed using an insulator that has a function of suppressing the diffusion of oxygen. With this configuration, when the oxygen contained in the insulator 250a is diffused, the diffusion of oxygen to the conductor 260 can be suppressed. In other words, a decrease in the amount of oxygen supplied to the oxide 230 can be suppressed. In addition, the oxidation of the conductor 260 due to the oxygen contained in the insulator 250a can be suppressed. For example, the insulator 250b can be provided using the same material as the insulator 222.

[0347] When silicon oxide, silicon oxynitride, or the like is used for the insulator 250a, the insulator 250b may be an insulating material that is a high-k material with a high dielectric constant. By forming the gate insulator into a laminated structure of the insulators 250a and 250b, it is possible to obtain a laminated structure that is stable against heat and has a high dielectric constant. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical thickness of the gate insulator. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator that functions as the gate insulator.

[0348] Specifically, the insulator 250b may be a metal oxide containing one or more of hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, or the like, or a metal oxide that can be used as the oxide 230. In particular, it is preferable to use an insulator containing an oxide of one or both of aluminum and hafnium. It is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like, as the insulator. Alternatively, the insulator 250b may be a stacked film in which a hafnium oxide film and a silicon nitride film are provided on the hafnium oxide film.

[0349] Note that although the insulator 250 is illustrated as having a two-layer stack structure in FIGS. 15B and 15C, one embodiment of the present invention is not limited thereto. The insulator 250 may have a single layer structure or a stack structure of three or more layers. For example, as shown in FIG. 16B, an insulator 250c may be provided between the insulator 250b and the conductor 260a. The insulator 250c may be any of the insulators that can be used for the insulator 250b. The insulator 250c is preferably a barrier insulating film against hydrogen. This can prevent impurities such as hydrogen contained in the conductor 260 from diffusing into the insulator 250b, the insulator 250a, and the oxide 230b. For example, the insulator 250c may be a silicon nitride film formed by a PEALD method.

[0350] Furthermore, a metal oxide may be provided between the insulator 250 and the conductor 260. The metal oxide preferably suppresses the diffusion of oxygen from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses the diffusion of oxygen, the diffusion of oxygen from the insulator 250 to the conductor 260 is suppressed. In other words, a decrease in the amount of oxygen supplied to the oxide 230 can be suppressed. Furthermore, oxidation of the conductor 260 due to oxygen from the insulator 250 can be suppressed.

[0351] The metal oxide may have a function as a part of the first gate electrode. For example, the metal oxide that can be used as the oxide 230 can be used as the metal oxide. In this case, the conductor 260a is formed by a sputtering method, whereby the electrical resistance value of the metal oxide can be reduced to make it a conductor. This can be called an OC (Oxide Conductor) electrode. By including the metal oxide, the on-current of the transistor 200 can be improved without weakening the effect of the electric field from the conductor 260.

[0352] The conductor 260 is provided on the insulator 250b and functions as a first gate electrode of the transistor 200. The conductor 260 preferably includes a conductor 260a and a conductor 260b disposed on the conductor 260a. For example, the conductor 260a is preferably disposed so as to surround the bottom and side surfaces of the conductor 260b. As shown in FIGS. 15B and 15C, the top surface of the conductor 260 is substantially flush with the top surface of the insulator 250. Note that, although the conductor 260 is shown as having a two-layer structure of the conductor 260a and the conductor 260b in FIGS. 15B and 15C, the conductor 260 may have a single-layer structure or a laminated structure of three or more layers.

[0353] The conductor 260a is preferably made of a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules, copper atoms, etc. Alternatively, it is preferably made of a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

[0354] Furthermore, since the conductor 260a has a function of suppressing oxygen diffusion, it is possible to suppress a decrease in conductivity due to oxidation of the conductor 260b caused by oxygen contained in the insulator 250. As a conductive material having a function of suppressing oxygen diffusion, it is preferable to use, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like.

[0355] In addition, since the conductor 260 also functions as wiring, it is preferable to use a conductor with high conductivity. For example, the conductor 260b can be a conductive material mainly composed of tungsten, copper, or aluminum. The conductor 260b may also have a laminated structure, for example, a laminated structure of titanium or titanium nitride and the above-mentioned conductive material.

[0356] In addition, in the transistor 200, the conductor 260 is formed in a self-aligned manner so as to fill an opening formed in the insulator 280 or the like. By forming the conductor 260 in this manner, the conductor 260 can be reliably disposed in the region between the conductor 242a and the conductor 242b without alignment. Note that, as shown in FIG. 16A and other figures, when the upper part of the opening is wider than the lower part of the opening, the conductor 260 also has a shape wider than the lower part.

[0357] 15C, in the channel width direction of the transistor 200, the height of the bottom surface of the conductor 260 in the region where the conductor 260 and the oxide 230b do not overlap is preferably lower than the height of the bottom surface of the oxide 230b when the bottom surface of the insulator 222 is used as a reference. The conductor 260, which functions as a gate electrode, is configured to cover the side and upper surfaces of the channel formation region of the oxide 230b via the insulator 250 or the like, so that the electric field of the conductor 260 can be easily applied to the entire channel formation region of the oxide 230b. This makes it possible to increase the on-current of the transistor 200 and improve the frequency characteristics. When the bottom surface of the insulator 222 is used as a reference, the difference between the height of the bottom surface of the conductor 260 in the region where the oxide 230a and the oxide 230b do not overlap with the conductor 260 and the height of the bottom surface of the oxide 230b is 0 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less, and more preferably 5 nm or more and 20 nm or less.

[0358] The insulator 280 is provided on the insulator 275, and openings are formed in the regions where the insulator 250 and the conductor 260 are provided. The upper surface of the insulator 280 may be flattened. In this case, it is preferable that the upper surface of the insulator 280 is roughly aligned with the upper surfaces of the insulator 250 and the conductor 260.

[0359] The insulator 280 that functions as an interlayer insulating film preferably has a low dielectric constant. By using a material with a low dielectric constant as the interlayer insulating film, the parasitic capacitance that occurs between wirings can be reduced. The insulator 280 is preferably provided using, for example, the same material as the insulator 216. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable. In particular, materials such as silicon oxide, silicon oxynitride, and silicon oxide having vacancies are preferable because they can easily form a region containing oxygen that is desorbed by heating.

[0360] Like the insulator 224, the insulator 280 may have excess oxygen. The insulator 280 preferably has a reduced concentration of impurities such as water and hydrogen. For example, the insulator 280 may be an oxide containing silicon, such as silicon oxide or silicon oxynitride, as appropriate. By providing the insulator 280 in contact with the insulator 250a, oxygen can be supplied to the oxide 230 through the insulator 250a. The oxygen can reduce oxygen vacancies in the oxide 230, thereby improving the reliability of the transistor 200.

[0361] The insulator 282 is provided in contact with the top surface of the insulator 280, the top surface of the insulator 250, and the top surface of the conductor 260. For example, an insulator such as aluminum oxide may be used as the insulator 282. By forming aluminum oxide as the insulator 282 by a sputtering method, the insulator 280 can contain excess oxygen. The insulator 282 preferably functions as a barrier insulating film that suppresses impurities such as water and hydrogen from diffusing from above into the insulator 280, and preferably has a function of capturing impurities such as hydrogen. The insulator 282 also preferably functions as a barrier insulating film that suppresses oxygen permeation. By providing the insulator 282 in contact with the insulator 280 in a region sandwiched between the insulator 212 and the insulator 283 and having a function of capturing impurities such as hydrogen, impurities such as hydrogen contained in the insulator 280 can be captured, and the amount of hydrogen in the region can be kept constant. In particular, aluminum oxide having an amorphous structure or aluminum oxide having an amorphous structure is preferably used as the insulator 282 because hydrogen can be captured or fixed more effectively in some cases. This makes it possible to manufacture a transistor 200 and a semiconductor device having favorable characteristics and high reliability.

[0362] The insulator 283 functions as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen from above into the insulator 280. The insulator 283 is disposed on the insulator 282. As the insulator 283, it is preferable to use a nitride containing silicon, such as silicon nitride or silicon nitride oxide. For example, the insulator 283 may be silicon nitride formed by a sputtering method. By forming the insulator 283 by a sputtering method, a silicon nitride film that is high in density and unlikely to form voids can be formed. Furthermore, as the insulator 283, silicon nitride formed by an ALD method may be stacked on silicon nitride formed by a sputtering method. With such a structure, even if defects, such as voids, occur in the silicon nitride formed by the sputtering method, the voids can be filled by the silicon nitride formed by the ALD method, which has good coverage, and thus the sealing performance can be improved.

[0363] The insulator 285 is provided over the insulator 283. The insulator 285 is preferably provided using, for example, a material similar to that of the insulator 280. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable. Note that although a structure in which the insulator 285 is provided is illustrated in FIGS. 15B and 15C , one embodiment of the present invention is not limited to this. A structure in which the insulator 285 is not provided and the conductor 246 is provided in contact with the insulator 283 may also be used.

[0364] The conductor 240a and the conductor 240b are preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductor 240a and the conductor 240b may each have a layered structure.

[0365] Furthermore, when the conductor 240 has a laminated structure, it is preferable to use a conductive material having a function of suppressing the permeation of impurities such as water and hydrogen for the first conductor in contact with the insulator 241. For example, it is preferable to use tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide, etc. Furthermore, the conductive material having a function of suppressing the permeation of impurities such as water and hydrogen may be used in a single layer or a laminated layer. Furthermore, it is possible to suppress impurities such as water and hydrogen contained in layers above the insulator 283 from being mixed into the oxide 230 through the conductor 240a and the conductor 240b.

[0366] The insulator 241a and the insulator 241b may be a barrier insulating film that can be used for the insulator 275 or the like. For example, the insulator 241a and the insulator 241b may be an insulator such as silicon nitride, aluminum oxide, or silicon nitride oxide. The insulator 241a and the insulator 241b are provided in contact with the insulator 283, the insulator 282, and the insulator 271, and therefore can prevent impurities such as water and hydrogen contained in the insulator 280 or the like from being mixed into the oxide 230 through the conductor 240a and the conductor 240b. In particular, silicon nitride is preferable because it has a high blocking property against hydrogen. In addition, it can prevent oxygen contained in the insulator 280 from being absorbed by the conductor 240a and the conductor 240b.

[0367] When the insulators 241a and 241b are formed into a layered structure as shown in FIG. 15A, it is preferable that the first insulator in contact with the inner wall of an opening such as insulator 280 and the second insulator inside it are made of a combination of a barrier insulating film against oxygen and a barrier insulating film against hydrogen.

[0368] For example, the first insulator may be made of aluminum oxide formed by the ALD method, and the second insulator may be made of silicon nitride formed by the PEALD method. This structure can suppress oxidation of the conductor 240 and reduce hydrogen contamination of the conductor 240.

[0369] Also, a conductor 246a may be disposed in contact with the upper surface of the conductor 240a to function as wiring, and a conductor 246b may be disposed in contact with the upper surface of the conductor 240b to function as wiring. The conductor 246 (conductor 246a and conductor 246b) is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductor may have a laminated structure, for example, a laminate of titanium or titanium nitride and the above conductive material. The conductor may be formed so as to be embedded in an opening provided in an insulator.

[0370] <Materials for semiconductor devices> The following describes constituent materials that can be used in the semiconductor device.

[0371] <<Substrate>> The substrate on which the transistor 200 is formed may be, for example, an insulating substrate, a semiconductor substrate, or a conductive substrate. Examples of insulating substrates include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (such as an yttria stabilized zirconia substrate), and a resin substrate. Examples of semiconductor substrates include a semiconductor substrate made of silicon or germanium, or a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, and gallium oxide. Examples of semiconductor substrates include a semiconductor substrate having an insulating region inside the semiconductor substrate, such as an SOI (Silicon On Insulator) substrate. Examples of conductive substrates include a graphite substrate, a metal substrate, an alloy substrate, and a conductive resin substrate. Examples of substrates include a substrate having a metal nitride, a substrate having a metal oxide, and the like. Examples of substrates include a substrate having a conductor or semiconductor provided on an insulating substrate, a substrate having a conductor or insulator provided on a semiconductor substrate, and a substrate having a semiconductor or insulator provided on a conductive substrate. Alternatively, a substrate provided with elements may be used. The elements provided on the substrate include a capacitor element, a resistor element, a switch element, a light-emitting element, a memory element, and the like.

[0372] <<Insulators>> Examples of the insulator include oxides, nitrides, oxynitrides, nitride oxides, metal oxides, metal oxynitrides, and metal nitride oxides, each of which has insulating properties.

[0373] For example, as transistors become more miniaturized and highly integrated, problems such as leakage current can occur due to thinner gate insulators. By using a high-k material for the insulator that functions as the gate insulator, it is possible to reduce the voltage required for transistor operation while maintaining the physical film thickness. On the other hand, by using a material with a low dielectric constant for the insulator that functions as the interlayer insulating film, it is possible to reduce the parasitic capacitance that occurs between wiring. Therefore, it is best to select materials according to the insulator's functions.

[0374] Further, examples of insulators with a high relative dielectric constant include gallium oxide, hafnium oxide, zirconium oxide, oxides having aluminum and hafnium, oxynitrides having aluminum and hafnium, oxides having silicon and hafnium, oxynitrides having silicon and hafnium, and nitrides having silicon and hafnium.

[0375] Examples of insulators with a low dielectric constant include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, silicon oxide with voids, or resin.

[0376] In addition, the transistor using metal oxide can have stable electrical characteristics by being surrounded by an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen. As the insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum may be used in a single layer or a stacked layer. Specifically, as the insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen, metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide, and metal nitrides such as aluminum nitride, silicon nitride oxide, and silicon nitride can be used.

[0377] The insulator that functions as the gate insulator is preferably an insulator having a region containing oxygen that is released by heating. For example, by using a structure in which silicon oxide or silicon oxynitride having a region containing oxygen that is released by heating is in contact with the oxide 230, oxygen vacancies in the oxide 230 can be compensated for.

[0378] <<Conductors>> As the conductor, it is preferable to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., or an alloy containing the above-mentioned metal elements as a component, or an alloy combining the above-mentioned metal elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, nitride containing titanium and aluminum, nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxide containing strontium and ruthenium, oxide containing lanthanum and nickel, etc. In addition, tantalum nitride, titanium nitride, nitride containing titanium and aluminum, nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxide containing strontium and ruthenium, oxide containing lanthanum and nickel are conductive materials that are difficult to oxidize, or materials that maintain conductivity even when oxygen is absorbed, so they are preferable. Furthermore, a semiconductor having high electrical conductivity, typified by polycrystalline silicon containing an impurity element such as phosphorus, or a silicide such as nickel silicide may be used.

[0379] A plurality of conductive layers formed of the above-mentioned materials may be stacked. For example, a stacked structure may be formed by combining the above-mentioned material containing a metal element and a conductive material containing oxygen. A stacked structure may be formed by combining the above-mentioned material containing a metal element and a conductive material containing nitrogen. A stacked structure may be formed by combining the above-mentioned material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen.

[0380] In addition, when an oxide is used for the channel formation region of a transistor, a conductor functioning as a gate electrode preferably has a stacked structure in which a material containing a metal element and a conductive material containing oxygen are combined. In this case, the conductive material containing oxygen is preferably provided on the channel formation region side. By providing the conductive material containing oxygen on the channel formation region side, oxygen released from the conductive material is easily supplied to the channel formation region.

[0381] In particular, it is preferable to use a conductive material containing oxygen and a metal element contained in the metal oxide in which the channel is formed as a conductor functioning as a gate electrode. The conductive material containing the metal element and nitrogen described above may also be used. For example, a conductive material containing nitrogen, such as titanium nitride or tantalum nitride, may also be used. Indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide to which silicon is added may also be used. Indium gallium zinc oxide containing nitrogen may also be used. By using such a material, hydrogen contained in the metal oxide in which the channel is formed may be captured. Alternatively, hydrogen mixed in from an external insulator may be captured.

[0382] <Method for manufacturing semiconductor device> Next, a manufacturing method of the semiconductor device of one embodiment of the present invention shown in FIGS. 15A to 15D will be described with reference to FIGS.

[0383] 17A, 18A, 19A, 20A, 21A, 22A, 23A, 24A, 25A, and 26A are top views, and 17B, 18B, 19B, 20B, 21B, 22B, 23B, 24B, 25B, and 26B are cross-sectional views corresponding to the portions indicated by the dashed dotted line A1-A2 in 17A, 18A, 19A, 20A, 21A, 22A, 23A, 24A, 25A, and 26A, respectively, and are cross-sectional views in the channel length direction of the transistor 200. In addition, Figures 17C, 18C, 19C, 20C, 21C, 22C, 23C, 24C, 25C, and 26C are cross-sectional views corresponding to the portions indicated by the dotted line A3-A4 in Figures 17A, 18A, 19A, 20A, 21A, 22A, 23A, 24A, 25A, and 26A, respectively, and are also cross-sectional views in the channel width direction of transistor 200. Also, Fig. 17D, Fig. 18D, Fig. 19D, Fig. 20D, Fig. 21D, Fig. 22D, Fig. 23D, Fig. 24D, Fig. 25D, and Fig. 26D are cross-sectional views of the portion indicated by the dashed line A5-A6 in Fig. 17A, Fig. 18A, Fig. 19A, Fig. 20A, Fig. 21A, Fig. 22A, Fig. 23A, Fig. 24A, Fig. 25A, and Fig. 26A, respectively. Note that in the top views of Fig. 17A, Fig. 18A, Fig. 19A, Fig. 20A, Fig. 21A, Fig. 22A, Fig. 23A, Fig. 24A, Fig. 25A, and Fig. 26A, some elements are omitted for clarity.

[0384] In the following, insulating materials for forming insulators, conductive materials for forming conductors, or semiconductor materials for forming semiconductors can be formed as films by appropriately using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0385] There are three types of sputtering: RF sputtering, which uses a high-frequency power source for the sputtering power supply, DC sputtering, which uses a direct current power source, and pulsed DC sputtering, which changes the voltage applied to the electrode in a pulsed manner. RF sputtering is mainly used when depositing insulating films, while DC sputtering is mainly used when depositing metal conductive films. Pulsed DC sputtering is mainly used when depositing compounds such as oxides, nitrides, and carbides using reactive sputtering.

[0386] CVD methods can be classified into plasma enhanced CVD (PECVD) methods (sometimes called plasma chemical vapor deposition), which use plasma, thermal CVD (TCVD) methods (using heat), and photo CVD (photo CVD) methods (using light). They can also be further divided into metal CVD (MCVD) methods and metal organic CVD (MOCVD) methods (sometimes called metal organic chemical vapor deposition) based on the source gas used.

[0387] The plasma CVD method can obtain a high-quality film at a relatively low temperature. Moreover, the thermal CVD method is a film formation method that can reduce plasma damage to the object to be processed because it does not use plasma. For example, wiring, electrodes, elements (transistors, capacitive elements, etc.) included in a semiconductor device may be charged up by receiving electric charge from plasma. At this time, the wiring, electrodes, elements, etc. included in the semiconductor device may be destroyed by the accumulated electric charge. On the other hand, in the case of the thermal CVD method that does not use plasma, such plasma damage does not occur, so the yield of the semiconductor device can be increased. Furthermore, in the thermal CVD method, plasma damage does not occur during film formation, so a film with few defects can be obtained.

[0388] As the ALD method, a thermal ALD method in which a reaction between a precursor and a reactant is carried out using only thermal energy, a PEALD method in which a plasma-excited reactant is used, or the like can be used.

[0389] In addition, the ALD method utilizes the self-regulating nature of atoms to deposit atoms one layer at a time, and thus has the following advantages: extremely thin films can be formed; films can be formed on structures with high aspect ratios; films can be formed with fewer defects such as pinholes; films can be formed with excellent coverage; and films can be formed at low temperatures. In the PEALD method, the use of plasma can be preferable because it allows films to be formed at lower temperatures. Note that some precursors used in the ALD method contain impurities such as carbon. For this reason, films formed by the ALD method may contain more impurities such as carbon than films formed by other film formation methods. Note that the amount of impurities can be quantified using X-ray photoelectron spectroscopy (XPS).

[0390] The CVD method and the ALD method are different from the film formation method in which particles emitted from a target or the like are deposited, and are film formation methods in which a film is formed by a reaction on the surface of a workpiece. Therefore, they are film formation methods that are not easily affected by the shape of the workpiece and have good step coverage. In particular, the ALD method has excellent step coverage and excellent thickness uniformity, so it is suitable for coating the surface of an opening with a high aspect ratio. However, since the ALD method has a relatively slow film formation speed, it may be preferable to use it in combination with other film formation methods such as the CVD method, which has a fast film formation speed.

[0391] In the CVD method and the ALD method, the composition of the film obtained can be controlled by the flow rate ratio of the raw material gas. For example, in the CVD method and the ALD method, a film of any composition can be formed by changing the flow rate ratio of the raw material gas. In addition, for example, in the CVD method and the ALD method, a film whose composition changes continuously can be formed by changing the flow rate ratio of the raw material gas while forming the film. When forming a film while changing the flow rate ratio of the raw material gas, the time required for film formation can be shortened compared to the case of forming a film using multiple film formation chambers because no time is required for transport and pressure adjustment. Therefore, the productivity of semiconductor devices can be increased in some cases.

[0392] First, a substrate (not shown) is prepared, and the insulator 212 is formed on the substrate (see FIGS. 17A to 17D). The insulator 212 is preferably formed by a sputtering method. By using a sputtering method that does not require hydrogen as a deposition gas, the hydrogen concentration in the insulator 212 can be reduced. However, the method for forming the insulator 212 is not limited to the sputtering method, and a CVD method, an MBE method, a PLD method, an ALD method, or the like may be used as appropriate.

[0393] In this embodiment, a silicon nitride film is formed as the insulator 212 by pulsed DC sputtering using a silicon target in an atmosphere containing nitrogen gas. By using pulsed DC sputtering, the generation of particles due to arcing on the target surface can be suppressed, making the film thickness distribution more uniform. In addition, by using a pulsed voltage, the rise and fall of the discharge can be made steeper than with a high-frequency voltage. This allows power to be supplied to the electrodes more efficiently, improving the sputtering rate and film quality.

[0394] By using an insulator such as silicon nitride through which impurities such as water and hydrogen do not easily permeate, it is possible to suppress the diffusion of impurities such as water and hydrogen contained in layers below the insulator 212. Furthermore, by using an insulator such as silicon nitride through which copper does not easily permeate as the insulator 212, even if a metal that easily diffuses, such as copper, is used for a conductor in a layer (not shown) below the insulator 212, it is possible to suppress the diffusion of the metal upward through the insulator 212.

[0395] Next, the insulator 214 is deposited on the insulator 212 (see FIGS. 17A to 17D). The insulator 214 is preferably deposited by a sputtering method. By using a sputtering method that does not require hydrogen as a deposition gas, the hydrogen concentration in the insulator 214 can be reduced. However, the deposition of the insulator 214 is not limited to the sputtering method, and a CVD method, an MBE method, a PLD method, an ALD method, or the like may also be used as appropriate.

[0396] In this embodiment, an aluminum oxide film is formed as the insulator 214 by pulsed DC sputtering using an aluminum target in an atmosphere containing oxygen gas. By using the pulsed DC sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and film quality can be improved. Here, RF (Radio Frequency) power may be applied to the substrate. For example, a configuration may be adopted in which no RF power is applied when forming the lower layer of the insulator 214, and RF power is applied when forming the upper layer of the insulator 214. The amount of oxygen injected into the layer below the insulator 214 can be controlled by the magnitude of the RF power applied to the substrate. The RF power is set to 0 W / cm. 2 Above 1.86W / cm 2 The following is set forth. In other words, the amount of oxygen suitable for the transistor characteristics can be changed and injected by adjusting the RF power when forming the insulator 214. Therefore, it is possible to inject an amount of oxygen suitable for improving the reliability of the transistor. In addition, the RF frequency is preferably 10 MHz or higher. Typically, it is 13.56 MHz. The higher the RF frequency, the less damage can be caused to the substrate.

[0397] It is preferable to use a metal oxide having an amorphous structure, such as aluminum oxide, which has a high function of trapping and fixing hydrogen, as the insulator 214. This makes it possible to trap or fix hydrogen contained in the insulator 216 and the like and prevent the hydrogen from diffusing into the oxide 230. In particular, it is preferable to use aluminum oxide having an amorphous structure or aluminum oxide having an amorphous structure as the insulator 214, because hydrogen can be more effectively trapped or fixed. This makes it possible to manufacture a transistor 200 and a semiconductor device having excellent characteristics and high reliability.

[0398] Next, the insulator 216 is deposited over the insulator 214. The insulator 216 is preferably deposited by a sputtering method. By using a sputtering method that does not require hydrogen as a deposition gas, the hydrogen concentration in the insulator 216 can be reduced. However, the deposition of the insulator 216 is not limited to the sputtering method, and a CVD method, an MBE method, a PLD method, an ALD method, or the like may also be used as appropriate.

[0399] In this embodiment, a silicon oxide film is formed by pulsed DC sputtering using a silicon target in an atmosphere containing oxygen gas as the insulator 216. By using the pulsed DC sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and film quality can be improved.

[0400] It is preferable that the insulators 212, 214, and 216 are successively formed without exposure to the air. For example, a multi-chamber film formation apparatus can be used. This allows the insulators 212, 214, and 216 to be formed with reduced hydrogen in the films, and further reduces the incorporation of hydrogen into the films between each film formation process.

[0401] Next, an opening is formed in the insulator 216, reaching the insulator 214. The opening may be, for example, a groove or a slit. The opening may be an area where the opening is formed. The opening may be formed by wet etching, but dry etching is preferable for fine processing. It is preferable to select an insulator that functions as an etching stopper film when etching the insulator 216 to form a groove as the insulator 214. For example, when silicon oxide or silicon oxynitride is used for the insulator 216 that forms the groove, the insulator 214 may be silicon nitride, aluminum oxide, or hafnium oxide. Note that a recess may be formed in the insulator 214, overlapping the opening of the insulator 216.

[0402] As the dry etching apparatus, a capacitively coupled plasma (CCP) etching apparatus having parallel plate electrodes can be used. The capacitively coupled plasma etching apparatus having parallel plate electrodes can be configured to apply a high frequency voltage to one of the parallel plate electrodes. Alternatively, it can be configured to apply a plurality of different high frequency voltages to one of the parallel plate electrodes. Alternatively, it can be configured to apply a high frequency voltage of the same frequency to each of the parallel plate electrodes. Alternatively, it can be configured to apply high frequency voltages of different frequencies to each of the parallel plate electrodes. Alternatively, a dry etching apparatus having a high density plasma source can be used. As the dry etching apparatus having a high density plasma source, for example, an inductively coupled plasma (ICP) etching apparatus or the like can be used.

[0403] After the opening is formed, a conductive film that becomes the conductor 205a is formed. The conductive film preferably contains a conductor that has a function of suppressing oxygen permeation. For example, tantalum nitride, tungsten nitride, titanium nitride, or the like can be used. Alternatively, the conductive film may be a stacked film of a conductor that has a function of suppressing oxygen permeation and tantalum, tungsten, titanium, molybdenum, aluminum, copper, or a molybdenum-tungsten alloy. The conductive film can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0404] In this embodiment, a titanium nitride film is formed as the conductive film that becomes the conductor 205a. By providing such a metal nitride in contact with the lower surface and side surface of the conductor 205b, it is possible to prevent the conductor 205b from being oxidized by the insulator 216 or the like. Even if a metal that easily diffuses, such as copper, is used as the conductor 205b, it is possible to prevent the metal from diffusing out of the conductor 205a.

[0405] Next, a conductive film to be the conductor 205b is formed. The conductive film may be made of tantalum, tungsten, titanium, molybdenum, aluminum, copper, a molybdenum-tungsten alloy, or the like. The conductive film may be formed by a plating method, a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, a tungsten film is formed as the conductive film.

[0406] Next, a CMP process is performed to remove a portion of the conductive film that will become the conductor 205a and a portion of the conductive film that will become the conductor 205b, thereby exposing the insulator 216 (see FIGS. 17A to 17D). As a result, the conductor 205a and the conductor 205b remain only in the openings. This makes it possible to form a conductor 205 with a flat upper surface. Note that the CMP process may remove a portion of the insulator 216.

[0407] Next, the insulator 222 is formed on the insulator 216 and the conductor 205 (see FIGS. 18A to 18D). As the insulator 222, an insulator containing one or both of an oxide of aluminum and hafnium may be formed. Note that as the insulator containing one or both of an oxide of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like. An insulator containing one or both of an oxide of aluminum and hafnium has a barrier property against oxygen, hydrogen, and water. When the insulator 222 has a barrier property against hydrogen and water, the hydrogen and water contained in the structure provided around the transistor 200 are prevented from diffusing into the inside of the transistor 200 through the insulator 222, and the generation of oxygen vacancies in the oxide 230 can be suppressed.

[0408] The insulator 222 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. In this embodiment, hafnium oxide is formed as the insulator 222 by an ALD method.

[0409] It is preferable to carry out a heat treatment subsequently. The heat treatment may be carried out at 250°C or higher and 650°C or lower, preferably 300°C or higher and 500°C or lower, and more preferably 320°C or higher and 450°C or lower. The heat treatment may be carried out in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or higher, 1% or higher, or 10% or higher of an oxidizing gas. For example, when the heat treatment is carried out in a mixed atmosphere of nitrogen gas and oxygen gas, the oxygen gas may be about 20%. The heat treatment may be carried out under reduced pressure. Alternatively, the heat treatment may be carried out in an atmosphere of nitrogen gas or an inert gas, and then in an atmosphere containing 10 ppm or higher, 1% or higher, or 10% or higher of an oxidizing gas to compensate for the desorbed oxygen.

[0410] In addition, it is preferable that the gas used in the heat treatment is highly purified. For example, the amount of moisture contained in the gas used in the heat treatment is 1 ppb or less, preferably 0.1 ppb or less, and more preferably 0.05 ppb or less. By performing the heat treatment using a highly purified gas, it is possible to prevent moisture and the like from being taken into the insulator 222 as much as possible.

[0411] In this embodiment, after the insulator 222 is formed, heat treatment is performed at a flow rate ratio of nitrogen gas and oxygen gas of 4 slm:1 slm at a temperature of 400° C. for one hour. The heat treatment can remove impurities such as water and hydrogen contained in the insulator 222. When an oxide containing hafnium is used as the insulator 222, the heat treatment may cause part of the insulator 222 to crystallize. The heat treatment can also be performed at a timing such as after the insulator 224 is formed.

[0412] Next, the insulating film 224A is formed on the insulator 222 (see FIGS. 18A to 18D). The insulating film 224A can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, a silicon oxide film is formed as the insulating film 224A by a sputtering method. By using a sputtering method that does not require hydrogen as a film formation gas, the hydrogen concentration in the insulating film 224A can be reduced. Since the insulating film 224A comes into contact with the oxide 230a in a later step, it is preferable that the hydrogen concentration be reduced in this manner.

[0413] Next, the oxide film 230A and the oxide film 230B are sequentially formed on the insulating film 224A (see FIGS. 18A to 18D). It is preferable that the oxide film 230A and the oxide film 230B are successively formed without being exposed to the air environment. By forming the oxide film 230A and the oxide film 230B without being exposed to the air, it is possible to prevent impurities or moisture from the air environment from adhering to the oxide film 230A and the oxide film 230B, and it is possible to keep the vicinity of the interface between the oxide film 230A and the oxide film 230B clean.

[0414] The oxide film 230A and the oxide film 230B can be formed by using a sputtering method, a CVD method, a MOCVD method, an MBE method, a PLD method, an ALD method, or the like.

[0415] For example, when the oxide film 230A and the oxide film 230B are formed by sputtering, oxygen or a mixed gas of oxygen and a rare gas is used as the sputtering gas. By increasing the ratio of oxygen contained in the sputtering gas, the excess oxygen in the oxide film to be formed can be increased. In addition, when the oxide film is formed by sputtering, the above-mentioned In-M-Zn oxide target can be used.

[0416] During the formation of the oxide film 230A, some of the oxygen contained in the sputtering gas may be supplied to the insulating film 224A. Therefore, the ratio of oxygen contained in the sputtering gas may be set to 70% or more, preferably 80% or more, and more preferably 100%.

[0417] When the oxide film 230B is formed by a sputtering method, an oxygen-excessive oxide semiconductor is formed when the ratio of oxygen contained in the sputtering gas is more than 30% and less than or equal to 100%, preferably 70% to 100%. A transistor using an oxygen-excessive oxide semiconductor for a channel formation region can have relatively high reliability. However, one embodiment of the present invention is not limited thereto. When the oxide film 230B is formed by a sputtering method, an oxygen-deficient oxide semiconductor is formed when the ratio of oxygen contained in the sputtering gas is more than or equal to 1% and less than or equal to 30%, preferably 5% to 20%,. A transistor using an oxygen-deficient oxide semiconductor for a channel formation region can have relatively high field-effect mobility. When the oxide film is formed while the substrate is heated, the crystallinity of the oxide film can be improved.

[0418] In this embodiment, the oxide film 230A is formed by sputtering using an oxide target with an atomic ratio of In:Ga:Zn=1:3:4. The oxide film 230B is formed by sputtering using an oxide target with an atomic ratio of In:Ga:Zn=1:1:1. The oxide film 230B may be formed by an oxide target with an atomic ratio of In:Ga:Zn=4:2:4.1. Each oxide film may be formed according to the characteristics required for the oxide 230a and the oxide 230b by appropriately selecting the film formation conditions and atomic ratio.

[0419] It is preferable to form the insulating film 224A, the oxide film 230A, and the oxide film 230B by a sputtering method without exposing them to the atmosphere. For example, a multi-chamber film forming apparatus may be used. This allows the insulating film 224A, the oxide film 230A, and the oxide film 230B to be formed with reduced hydrogen in the films, and further reduces the inclusion of hydrogen in the films between each film forming process.

[0420] Next, it is preferable to perform a heat treatment. The heat treatment may be performed in a temperature range in which the oxide film 230A and the oxide film 230B are not polycrystallized, and may be performed at 250°C to 650°C, preferably 400°C to 600°C. The heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. For example, when the heat treatment is performed in a mixed atmosphere of nitrogen gas and oxygen gas, the oxygen gas may be about 20%. The heat treatment may be performed under a reduced pressure. Alternatively, the heat treatment may be performed in an atmosphere of nitrogen gas or an inert gas, and then in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas to compensate for the desorbed oxygen.

[0421] In addition, the gas used in the heat treatment is preferably highly purified. For example, the amount of moisture contained in the gas used in the heat treatment may be 1 ppb or less, preferably 0.1 ppb or less, and more preferably 0.05 ppb or less. By using a highly purified gas to perform the heat treatment, it is possible to prevent moisture and the like from being taken into the oxide film 230A and the oxide film 230B as much as possible.

[0422] In this embodiment, the heat treatment is performed at a temperature of 450° C. for 1 hour with a flow rate ratio of nitrogen gas to oxygen gas of 4 slm:1 slm. Such heat treatment including oxygen gas can reduce impurities such as carbon, water, and hydrogen in the oxide film 230A and the oxide film 230B. By reducing the impurities in the film in this way, the crystallinity of the oxide film 230B can be improved, and a denser and more compact structure can be obtained. This increases the crystalline regions in the oxide film 230A and the oxide film 230B, and reduces the in-plane variation of the crystalline regions in the oxide film 230A and the oxide film 230B. Therefore, the in-plane variation of the electrical characteristics of the transistor 200 can be reduced.

[0423] Next, the conductive film 242A is formed on the oxide film 230B (see FIGS. 18A to 18D). The conductive film 242A can be formed by sputtering, CVD, MBE, PLD, ALD, or the like. For example, a tantalum nitride film may be formed as the conductive film 242A by sputtering. Note that a heat treatment may be performed before the conductive film 242A is formed. The heat treatment may be performed under reduced pressure, and the conductive film 242A may be formed continuously without exposure to the air. By performing such a treatment, moisture and hydrogen adsorbed on the surface of the oxide film 230B and the like can be removed, and the moisture concentration and hydrogen concentration in the oxide film 230A, the oxide film 230B, and the oxide film 230B can be reduced. The temperature of the heat treatment is preferably 100° C. or higher and 400° C. or lower. In this embodiment, the temperature of the heat treatment is set to 200° C.

[0424] Next, the insulating film 271A is formed over the conductive film 242A (see FIGS. 18A to 18D). The insulating film 271A can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulating film 271A is preferably an insulating film having a function of suppressing oxygen permeation. For example, an aluminum oxide film may be formed by a sputtering method as the insulating film 271A.

[0425] Note that the conductive film 242A and the insulating film 271A are preferably formed by a sputtering method without exposure to the air. For example, a multi-chamber film formation apparatus may be used. This allows the conductive film 242A and the insulating film 271A to be formed with reduced hydrogen in the films, and further reduces the inclusion of hydrogen in the films between film formation steps. In addition, when a hard mask is provided on the insulating film 271A, the film to be the hard mask may also be formed continuously without exposure to the air.

[0426] Next, the insulating film 224A, the oxide film 230A, the oxide film 230B, the conductive film 242A, and the insulating film 271A are processed into an island shape by using a lithography method to form the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B (see FIGS. 19A to 19D). Here, the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B are formed so that at least a part of them overlaps with the conductor 205. The above processing can be performed by a dry etching method or a wet etching method. Processing by the dry etching method is suitable for fine processing. In addition, the insulating film 224A, the oxide film 230A, the oxide film 230B, the conductive film 242A, and the insulating film 271A may be processed under different conditions.

[0427] In the lithography method, first, the resist is exposed through a mask. Next, the exposed area is removed or left using a developer to form a resist mask. Next, a conductor, a semiconductor, an insulator, or the like can be processed into a desired shape by etching through the resist mask. For example, a resist mask may be formed by exposing the resist using KrF excimer laser light, ArF excimer laser light, EUV (Extreme Ultraviolet) light, or the like. Also, a liquid immersion technique may be used in which a liquid (e.g., water) is filled between the substrate and the projection lens and exposure is performed. Also, an electron beam or an ion beam may be used instead of the light described above. When an electron beam or an ion beam is used, a mask is not required. The resist mask can be removed by performing a dry etching process such as ashing, a wet etching process, a wet etching process after a dry etching process, or a dry etching process after a wet etching process.

[0428] Furthermore, a hard mask made of an insulator or a conductor may be used under the resist mask. When using a hard mask, an insulating film or a conductive film that will be the hard mask material is formed on the conductive film 242A, a resist mask is formed thereon, and the hard mask material is etched to form a hard mask of a desired shape. Etching of the conductive film 242A and the like may be performed after removing the resist mask, or may be performed while leaving the resist mask. In the latter case, the resist mask may disappear during etching. After etching of the conductive film 242A and the like, the hard mask may be removed by etching. On the other hand, if the material of the hard mask does not affect the subsequent process or can be used in the subsequent process, it is not necessarily necessary to remove the hard mask. In this embodiment, the insulating layer 271B is used as the hard mask.

[0429] Here, since the insulating layer 271B functions as a mask for the conductive layer 242B, the conductive layer 242B does not have a curved surface between the side surface and the top surface, as shown in FIG. 19B to FIG. 19D. As a result, the conductors 242a and 242b shown in FIG. 15B and FIG. 15D have angular ends where the side surface and the top surface intersect. Since the end where the side surface and the top surface of the conductor 242 intersect is angular, the cross-sectional area of ​​the conductor 242 is larger than when the end has a curved surface. This reduces the resistance of the conductor 242, and therefore the on-current of the transistor 200 can be increased.

[0430] As shown in FIG. 19B to FIG. 19D, the cross sections of the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B may be tapered. In this specification and the like, the tapered shape refers to a shape in which at least a part of the side surface of the structure is inclined with respect to the substrate surface. For example, it is preferable that the angle between the inclined side surface and the substrate surface (hereinafter, sometimes referred to as the taper angle) is less than 90°. For example, the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B may have a taper angle of 60° or more and less than 90°. By making the cross section tapered in this way, the coverage of the insulator 275 and the like can be improved in the subsequent steps, and defects such as voids can be reduced.

[0431] However, the present invention is not limited to the above, and the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B may be configured to be approximately perpendicular to the upper surface of the insulator 222. With such a configuration, it is possible to reduce the area and increase the density when providing multiple transistors 200.

[0432] Furthermore, by-products generated in the above etching process may be formed in layers on the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B. In this case, the layered by-products are formed between the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B and the insulator 275. Therefore, it is preferable to remove the layered by-products.

[0433] Next, the insulator 275 is formed to cover the insulator 224 and the insulating layer 271B. (See FIGS. 20A to 20D). Here, the insulator 275 is preferably in close contact with the upper surface of the insulator 222 and the side surface of the insulator 224. The insulator 275 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulator 275 is preferably an insulating film having a function of suppressing oxygen permeation. For example, the insulator 275 may be formed by forming an aluminum oxide film by a sputtering method, and then forming a silicon nitride film thereon by a PEALD method. By forming the insulator 275 in such a layered structure, the function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen may be improved.

[0434] In this manner, the insulator 224, the oxide 230a, the oxide 230b, and the conductive layer 242B can be covered with the insulator 275 and the insulating layer 271B, which have a function of suppressing the diffusion of oxygen. This makes it possible to reduce the direct diffusion of oxygen from the insulator 280, etc., to the insulator 224, the oxide 230a, the oxide 230b, and the conductive layer 242B in a later process.

[0435] Next, an insulating film to be the insulator 280 is formed on the insulator 275. The insulating film can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. For example, a silicon oxide film may be formed by a sputtering method as the insulating film. The insulating film can be formed by a sputtering method in an atmosphere containing oxygen, thereby forming the insulator 280 containing excess oxygen. The hydrogen concentration in the insulator 280 can be reduced by using a sputtering method that does not require hydrogen as a deposition gas. Note that a heat treatment may be performed before the insulating film is formed. The heat treatment may be performed under reduced pressure, and the insulating film may be continuously formed without exposure to the atmosphere. By performing such a treatment, moisture and hydrogen adsorbed on the surface of the insulator 275 and the like can be removed, and the moisture concentration and hydrogen concentration in the oxide 230a, the oxide 230b, and the insulator 224 can be further reduced. The heat treatment conditions described above can be used for the heat treatment.

[0436] Next, the insulating film that will become the insulator 280 is subjected to CMP processing to form the insulator 280 with a flat upper surface (see FIGS. 20A to 20D). Note that a silicon nitride film may be formed on the insulator 280 by, for example, a sputtering method, and the CMP processing may be performed until the silicon nitride reaches the insulator 280.

[0437] Next, a part of the insulator 280, a part of the insulator 275, a part of the insulating layer 271B, and a part of the conductive layer 242B are processed to form an opening that reaches the oxide 230b. The opening is preferably formed so as to overlap the conductor 205. By forming the opening, the insulator 271a, the insulator 271b, the conductor 242a, and the conductor 242b are formed (see FIGS. 21A to 21D).

[0438] 21B and 21C, the side surfaces of the insulator 280, the insulator 275, the insulator 271, and the conductor 242 may have a tapered shape. Also, the taper angle of the insulator 280 may be larger than the taper angle of the conductor 242. Also, although not shown in FIGS. 21A to 21C, the upper part of the oxide 230b may be removed when the opening is formed.

[0439] Furthermore, a part of the insulator 280, a part of the insulator 275, a part of the insulating layer 271B, and a part of the conductive layer 242B can be processed by dry etching or wet etching. Processing by dry etching is suitable for fine processing. Moreover, the processing may be performed under different conditions. For example, a part of the insulator 280 may be processed by dry etching, a part of the insulator 275 and a part of the insulating layer 271B may be processed by wet etching, and a part of the conductive layer 242B may be processed by dry etching.

[0440] Here, impurities may adhere to the side of the oxide 230a, the top and side of the oxide 230b, the side of the conductor 242, the side of the insulator 280, etc., or may diffuse into these. A step of removing such impurities may be performed. In addition, a damaged area may be formed on the surface of the oxide 230b by the dry etching. Such a damaged area may be removed. The impurities include those originating from components contained in the insulator 280, the insulator 275, a part of the insulating layer 271B, and the conductive layer 242B, components contained in the members used in the device used to form the opening, and components contained in the gas or liquid used in etching. The impurities include, for example, hafnium, aluminum, silicon, tantalum, fluorine, and chlorine.

[0441] In particular, impurities such as aluminum or silicon inhibit the formation of CAAC in the oxide 230b. Therefore, it is preferable that impurity elements such as aluminum or silicon that inhibit the formation of CAAC are reduced or removed. For example, the concentration of aluminum atoms in the oxide 230b and its vicinity may be 5.0 atomic % or less, preferably 2.0 atomic % or less, more preferably 1.5 atomic % or less, even more preferably 1.0 atomic % or less, and even more preferably less than 0.3 atomic %.

[0442] In addition, the regions of metal oxides in which the CAAC formation is inhibited by impurities such as aluminum or silicon and which have an a-like structure are sometimes called non-CAAC regions. In non-CAAC regions, the density of the crystal structure is reduced, so V O A large amount of H is formed, which makes the transistor more likely to be normally on. Therefore, it is preferable that the non-CAAC region of the oxide 230b is reduced or eliminated.

[0443] In contrast, it is preferable that the oxide 230b has a CAAC structure. In particular, it is preferable that the oxide 230b has a CAAC structure up to the lower end of the drain. Here, in the transistor 200, the conductor 242a or the conductor 242b and its vicinity function as the drain. In other words, it is preferable that the oxide 230b near the lower end of the conductor 242a (conductor 242b) has a CAAC structure. In this way, even at the drain end, which significantly affects the drain breakdown voltage, the damaged region of the oxide 230b is removed, and by having the CAAC structure, the fluctuation in the electrical characteristics of the transistor 200 can be further suppressed. In addition, the reliability of the transistor 200 can be improved.

[0444] In order to remove impurities attached to the surface of the oxide 230b in the above etching process, a cleaning process is performed. The cleaning method includes wet cleaning using a cleaning solution (also called wet etching process), plasma processing using plasma, and cleaning by heat treatment, and the above cleaning methods may be combined appropriately. Note that the above grooves may become deeper due to the cleaning process.

[0445] For wet cleaning, a cleaning process may be performed using an aqueous solution of ammonia water, oxalic acid, phosphoric acid, hydrofluoric acid, or the like diluted with carbonated water or pure water, pure water, carbonated water, or the like. Alternatively, ultrasonic cleaning may be performed using these aqueous solutions, pure water, or carbonated water. Alternatively, these cleaning methods may be combined as appropriate.

[0446] In this specification, an aqueous solution obtained by diluting commercially available hydrofluoric acid with pure water may be called diluted hydrofluoric acid, and an aqueous solution obtained by diluting commercially available ammonia water with pure water may be called diluted ammonia water. The concentration and temperature of the aqueous solution may be appropriately adjusted depending on the impurities to be removed and the configuration of the semiconductor device to be cleaned. The ammonia concentration of the diluted ammonia water may be 0.01% or more and 5% or less, preferably 0.1% or more and 0.5% or less. The hydrogen fluoride concentration of the diluted hydrofluoric acid may be 0.01 ppm or more and 100 ppm or less, preferably 0.1 ppm or more and 10 ppm or less.

[0447] In addition, it is preferable to use a frequency of 200 kHz or more, and more preferably 900 kHz or more, for ultrasonic cleaning. By using such a frequency, damage to the oxide 230b and the like can be reduced.

[0448] The above cleaning process may be performed multiple times, and the cleaning solution may be changed for each cleaning process. For example, a first cleaning process may be performed using diluted hydrofluoric acid or diluted ammonia water, and a second cleaning process may be performed using pure water or carbonated water.

[0449] As the cleaning process, in this embodiment, wet cleaning is performed using diluted ammonia water. By performing this cleaning process, impurities attached to the surfaces of the oxides 230a and 230b or diffused inside the oxides 230a and 230b can be removed.

[0450] Heat treatment may be performed after the etching or cleaning. The heat treatment may be performed at 100° C. or higher and 500° C. or lower, preferably 300° C. or higher and 500° C. or lower, more preferably 350° C. or higher and 400° C. or lower. The heat treatment may be performed in an atmosphere of nitrogen gas, inert gas, or oxidizing gas. Alternatively, the heat treatment may be performed in an atmosphere of nitrogen gas or inert gas containing 10 ppm or more, 1% or more, or 10% or more of oxidizing gas. For example, the heat treatment is preferably performed in a mixed atmosphere of oxygen gas and nitrogen gas. This allows oxygen to be supplied to the oxide 230a and the oxide 230b, thereby reducing oxygen deficiency. In addition, by performing such heat treatment, the crystallinity of the oxide 230b can be improved. In addition, the heat treatment may be performed under reduced pressure. Alternatively, after the heat treatment in the oxygen atmosphere, the heat treatment may be performed in a nitrogen atmosphere without exposure to the air. Furthermore, when heat treatment in an oxygen atmosphere is followed by heat treatment in a nitrogen atmosphere without exposure to the air, the heat treatment in the oxygen atmosphere may be performed for a longer period of time than the heat treatment in the nitrogen atmosphere.

[0451] Next, the insulating film 250A is formed (see FIGS. 22A to 22D). A heat treatment may be performed before the formation of the insulating film 250A, and the heat treatment may be performed under reduced pressure, and the insulating film 250A may be formed continuously without exposure to the atmosphere. The heat treatment is preferably performed in an atmosphere containing oxygen. By performing such a treatment, moisture and hydrogen adsorbed on the surface of the oxide 230b can be removed, and the moisture concentration and hydrogen concentration in the oxide 230a and the oxide 230b can be further reduced. The temperature of the heat treatment is preferably 100° C. or higher and 400° C. or lower.

[0452] The insulating film 250A can be formed by sputtering, CVD, PECVD, MBE, PLD, ALD, or the like. The insulating film 250A is preferably formed by a film formation method using a gas in which hydrogen atoms are reduced or removed. This allows the hydrogen concentration of the insulating film 250A to be reduced. Since the insulating film 250A becomes the insulator 250a that contacts the oxide 230b in a later process, it is preferable that the hydrogen concentration is reduced in this manner.

[0453] In addition, it is preferable to form the insulating film 250A by using the ALD method. The thickness of the insulator 250 functioning as the gate insulating film of the miniaturized transistor 200 needs to be extremely thin (for example, about 5 nm to 30 nm) and to have small variations. In contrast, the ALD method is a film formation method in which a precursor and a reactant (for example, an oxidizing agent, etc.) are alternately introduced, and the film thickness can be adjusted by the number of times this cycle is repeated, so that precise film thickness adjustment is possible. Therefore, the precision of the film thickness of the gate insulating film required by the miniaturized transistor 200 can be achieved. In addition, as shown in FIG. 22B and FIG. 22C, the insulating film 250A needs to be formed with good coverage on the bottom and side surfaces of the opening formed by the insulator 280, etc. Since layers of atoms can be deposited one by one on the bottom and side surfaces of the opening, the insulating film 250A can be formed with good coverage on the opening.

[0454] Also, for example, SiH 4 (or Si 2 H 6 When the insulating film 250A is formed by the PECVD method using a gas containing hydrogen such as SiO 2 , the hydrogen-containing gas is decomposed in the plasma to generate a large amount of hydrogen radicals. OWhen H is formed, the hydrogen concentration in the oxide 230b increases. However, when the insulating film 250A is formed using the ALD method, the generation of hydrogen radicals can be suppressed both when the precursor and the reactant are introduced. Therefore, by forming the insulating film 250A using the ALD method, the hydrogen concentration in the oxide 230b can be prevented from increasing.

[0455] In this embodiment, a silicon oxide film is formed as the insulating film 250A by the PEALD method.

[0456] If the above-mentioned impurities are not removed before forming the insulating film 250A, the impurities may remain between the oxide 230a, the oxide 230b, the conductor 242, the insulator 280, etc. and the insulator 250a.

[0457] Next, it is preferable to perform microwave treatment in an atmosphere containing oxygen (see Figs. 22A to 22D). Here, the microwave treatment refers to treatment using, for example, a device having a power source that generates high-density plasma using microwaves. In addition, in this specification and the like, microwaves refer to electromagnetic waves having a frequency of 300 MHz or more and 300 GHz or less.

[0458] In FIG. 22B to FIG. 22D, the dotted lines indicate high-frequency oxygen plasma such as microwaves or RF, or oxygen radicals. For the microwave treatment, it is preferable to use a microwave treatment device having a power source that generates high-density plasma using microwaves. Here, the frequency of the microwave treatment device may be 300 MHz or more and 300 GHz or less, preferably 2.4 GHz or more and 2.5 GHz or less, for example, 2.45 GHz. In addition, the power of the power source that applies the microwave of the microwave treatment device may be 1000 W or more and 10000 W or less, preferably 2000 W or more and 5000 W or less. In addition, the microwave treatment device may have a power source that applies RF to the substrate side. By using high-density plasma, high-density oxygen radicals can be generated. In addition, by applying RF to the substrate side, oxygen ions generated by high-density plasma can be efficiently guided into the oxide 230b.

[0459] The microwave treatment is preferably carried out under reduced pressure, with the pressure being 60 Pa or more, preferably 133 Pa or more, more preferably 200 Pa or more, and even more preferably 400 Pa or more. For example, 10 Pa or more and 1000 Pa or less, preferably 300 Pa or more and 700 Pa or less. The treatment temperature is 750° C. or less, preferably 500° C. or less, for example, about 400° C. After the oxygen plasma treatment, a heat treatment may be carried out continuously without exposure to the outside air. For example, the temperature may be 100° C. or more and 750° C. or less, preferably 300° C. or more and 500° C. or less.

[0460] For example, the microwave treatment may be performed using oxygen gas and argon gas. Here, the oxygen flow rate ratio (O 2 / (O 2 The oxygen flow rate (O + Ar)) should be greater than 0% and less than 100%. 2 / (O 2 The oxygen flow rate (O + Ar) should be greater than 0% and less than 50%. 2 / (O 2 The oxygen flow rate ratio (O + Ar) should be 10% or more and 40% or less.2 / (O 2 +Ar)) may be set to 10% or more and 30% or less. In this way, by performing microwave treatment in an atmosphere containing oxygen, the carrier concentration in the region 230bc can be reduced. In addition, by preventing an excessive amount of oxygen from being introduced into the chamber during microwave treatment, it is possible to prevent the carrier concentration in the regions 230ba and 230bb from being excessively reduced.

[0461] As shown in Figures 22B to 22D, by performing microwave processing in an atmosphere containing oxygen, oxygen gas can be turned into plasma using microwaves or high frequency waves such as RF, and the oxygen plasma can be applied to the region between the conductors 242a and 242b of the oxide 230b. At this time, microwaves or high frequency waves such as RF can also be irradiated to the region 230bc. In other words, microwaves or high frequency oxygen plasma such as RF can be applied to the region 230bc shown in Figure 16A. The action of the plasma, microwaves, etc., causes the V of the region 230bc to increase. O H can be split off and hydrogen H can be removed from the region 230bc. O H→H+V O " reaction occurs, and V in the region 230bc O H can be reduced. Therefore, the oxygen vacancies in the region 230bc and V O By supplying oxygen radicals generated by the oxygen plasma or oxygen contained in the insulator 250 to the oxygen vacancies formed in the region 230bc, the oxygen vacancies in the region 230bc can be further reduced, and the carrier concentration can be reduced.

[0462] On the other hand, conductors 242a and 242b are provided on regions 230ba and 230bb shown in Fig. 16A. Here, conductor 242 preferably functions as a shielding film against the action of microwaves, high frequencies such as RF, oxygen plasma, etc., when performing microwave processing in an atmosphere containing oxygen. For this reason, conductor 242 preferably has a function of shielding electromagnetic waves of 300 MHz or more and 300 GHz or less, for example, 2.4 GHz or more and 2.5 GHz or less.

[0463] 22B to 22D, the conductors 242a and 242b shield the effects of microwaves or high-frequency oxygen plasma such as RF, so that these effects do not reach the regions 230ba and 230bb. As a result, the microwave treatment causes the V O Since there is no reduction in H and no excessive supply of oxygen, a decrease in the carrier concentration can be prevented.

[0464] In this manner, oxygen vacancies and V are selectively formed in the oxide semiconductor region 230bc. O By removing H, the region 230bc can be made i-type or substantially i-type. Furthermore, the supply of excess oxygen to the regions 230ba and 230bb that function as source and drain regions can be suppressed, and the n-type can be maintained. This suppresses fluctuations in the electrical characteristics of the transistor 200, and suppresses variations in the electrical characteristics of the transistor 200 within the substrate surface.

[0465] In addition, in the microwave treatment, thermal energy may be directly transferred to the oxide 230b due to electromagnetic interaction between the microwaves and the molecules in the oxide 230b. The oxide 230b may be heated by this thermal energy. Such a heating treatment may be called microwave annealing. By performing the microwave treatment in an atmosphere containing oxygen, an effect equivalent to that of oxygen annealing may be obtained. In addition, if the oxide 230b contains hydrogen, it is considered that the thermal energy is transferred to the hydrogen in the oxide 230b, and the activated hydrogen is released from the oxide 230b.

[0466] Next, the insulating film 250B is formed (see FIG. 23A to FIG. 23D). The insulating film 250B can be formed by sputtering, CVD, MBE, PLD, ALD, or the like. The insulating film 250B is preferably formed using an insulator having a function of suppressing oxygen diffusion. With such a configuration, it is possible to suppress the oxygen contained in the insulator 250a from diffusing into the conductor 260. That is, it is possible to suppress a decrease in the amount of oxygen supplied to the oxide 230. In addition, it is possible to suppress the oxidation of the conductor 260 due to the oxygen contained in the insulator 250a. For example, the insulating film 250A can be provided using a material that can be used for the insulator 250a described above, and the insulating film 250B can be provided using a material similar to that of the insulator 222.

[0467] Specifically, the insulating film 250B may be a metal oxide containing one or more of hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, etc., or a metal oxide that can be used as the oxide 230. In particular, it is preferable to use an insulator containing an oxide of one or both of aluminum and hafnium.

[0468] In this embodiment, a hafnium oxide film is formed as the insulating film 250B by a thermal ALD method.

[0469] A microwave treatment may be performed after the formation of the insulating film 250B (see FIGS. 23A to 23D). The microwave treatment may be performed under the conditions of the microwave treatment performed after the formation of the insulating film 250A described above. Alternatively, the microwave treatment may be performed after the formation of the insulating film 250B without performing the microwave treatment after the formation of the insulating film 250A.

[0470] Also, after the formation of the insulating film 250A and after the formation of the insulating film 250B, a heating treatment may be performed while maintaining the reduced pressure state. By performing such a treatment, hydrogen in the insulating film 250A, the insulating film 250B, the oxide 230b, and the oxide 230a can be efficiently removed. Also, some of the hydrogen may be gettered to the conductor 242 (the conductor 242a and the conductor 242b). Alternatively, a step of performing a heating treatment may be repeated multiple times while maintaining the reduced pressure state after the microwave treatment. By repeatedly performing the heating treatment, hydrogen in the insulating film 250A, the oxide 230b, and the oxide 230a can be more efficiently removed. The heating treatment temperature is preferably 300° C. or more and 500° C. or less. Also, the microwave treatment, i.e., microwave annealing, may serve as the heating treatment. If the oxide 230b, etc. is sufficiently heated by the microwave annealing, the heating treatment may not be performed.

[0471] Furthermore, by modifying the film quality of the insulating film 250A and the insulating film 250B by microwave processing, it is possible to suppress the diffusion of hydrogen, water, impurities, etc. Therefore, it is possible to suppress the diffusion of hydrogen, water, impurities, etc. into the oxide 230b, the oxide 230a, etc. through the insulator 250 by a post-process such as film formation of a conductive film that becomes the conductor 260, or a post-process such as heat treatment.

[0472] Next, a conductive film that becomes the conductor 260a and a conductive film that becomes the conductor 260b are formed in this order. The conductive film that becomes the conductor 260a and the conductive film that becomes the conductor 260b can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, the conductive film that becomes the conductor 260a is formed using the ALD method, and the conductive film that becomes the conductor 260b is formed using the CVD method.

[0473] Next, the insulating film 250A, the insulating film 250B, the conductive film to be the conductor 260a, and the conductive film to be the conductor 260b are polished by CMP until the insulator 280 is exposed, thereby forming the insulator 250a, the insulator 250b, the conductor 260a, and the conductor 260b (see FIGS. 24A to 24D). As a result, the insulator 250 is disposed so as to cover the inner wall (side wall and bottom surface) of the opening that reaches the oxide 230b. The conductor 260 is disposed so as to fill the opening through the insulator 250.

[0474] Next, heat treatment may be performed under the same conditions as the above heat treatment. In this embodiment, the treatment is performed in a nitrogen atmosphere at a temperature of 400° C. for 1 hour. The heat treatment can reduce the moisture and hydrogen concentrations in the insulators 250 and 280. Note that after the heat treatment, the insulator 282 may be formed without exposure to the air.

[0475] Next, the insulator 282 is formed over the insulator 250, the conductor 260, and the insulator 280 (see FIGS. 25A to 25D). The insulator 282 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulator 282 is preferably formed by a sputtering method. By using a sputtering method that does not require the use of hydrogen in the film formation gas, the hydrogen concentration in the insulator 282 can be reduced. In addition, by forming the insulator 282 in an atmosphere containing oxygen by using a sputtering method, oxygen can be added to the insulator 280 while forming the film. This allows the insulator 280 to contain excess oxygen. At this time, the insulator 282 is preferably formed while heating the substrate.

[0476] In this embodiment, an aluminum oxide film is formed by pulse DC sputtering using an aluminum target in an atmosphere containing oxygen gas as the insulator 282. By using the pulse DC sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and film quality can be improved.

[0477] Next, it is preferable to perform heat treatment. The heat treatment can be performed under the same conditions as the above-mentioned heat treatment. In this embodiment, the treatment is performed in a nitrogen atmosphere at a temperature of 400° C. for one hour. By the heat treatment, oxygen added by the formation of the insulator 282 can be diffused into the insulator 280 and the insulator 250a and selectively supplied to the channel formation region of the oxide 230. As a result, a semiconductor device with favorable electrical characteristics can be provided. In addition, a semiconductor device with favorable reliability can be provided.

[0478] Note that the above heat treatment may be performed not only after the formation of the insulator 282 but also after the formation of the insulator 283, or the like.

[0479] Next, the insulator 283 is formed over the insulator 282 (see FIGS. 25A to 25D). The insulator 283 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulator 283 is preferably formed by a sputtering method. By using a sputtering method that does not require hydrogen as a deposition gas, the hydrogen concentration in the insulator 283 can be reduced. The insulator 283 may also be multi-layered. For example, a silicon nitride film may be formed by a sputtering method, and a silicon nitride film may be formed on the silicon nitride by a CVD method.

[0480] Next, the insulator 285 is deposited over the insulator 283. The insulator 285 can be deposited by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. For example, the insulator 285 may be formed as a silicon oxide film by a CVD method.

[0481] Next, openings reaching the conductor 242 are formed in the insulators 271, 275, 280, 282, 283, and 285 (see FIGS. 26A to 26D). The openings may be formed by using a lithography method. Note that, although the shape of the openings is circular in top view in FIG. 26A, the shape is not limited to this. For example, the openings may be substantially circular such as an ellipse, polygonal such as a rectangle, or polygonal such as a rectangle with rounded corners in top view.

[0482] Next, an insulating film that will become the insulators 241a and 241b is formed, and the insulating film is anisotropically etched to form the insulators 241a and 241b (see FIGS. 26A to 26D). The insulating film can be formed by sputtering, CVD, MBE, PLD, ALD, or the like. It is preferable to use an insulating film that has a function of suppressing oxygen permeation as the insulating film. For example, it is preferable to form an aluminum oxide film by the ALD method, and then form a silicon nitride film thereon by the PEALD method. Silicon nitride is preferable because it has a high blocking property against hydrogen.

[0483] Moreover, the anisotropic etching of the insulating film that becomes the insulators 241a and 241b may be performed by, for example, dry etching. By providing the insulator 241 on the sidewall of the opening, it is possible to suppress the permeation of oxygen from the outside and prevent the oxidation of the conductor 240 to be formed next. It is also possible to prevent impurities such as water and hydrogen contained in the insulator 280 from diffusing into the conductor 240a and the conductor 240b.

[0484] Next, a conductive film that becomes the conductor 240a and the conductor 240b is formed. The conductive film is preferably a laminated structure including a conductor that has a function of suppressing the permeation of impurities such as water and hydrogen. For example, it can be a laminated structure of tantalum nitride, titanium nitride, or the like, and tungsten, molybdenum, copper, or the like. The conductive film can be formed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0485] Next, a CMP process is performed to remove parts of the conductive film that will become the conductors 240a and 240b, exposing the upper surface of the insulator 285. As a result, the conductive film remains only in the openings, forming the conductors 240a and 240b with flat upper surfaces (see Figures 26A to 26D). Note that the CMP process may remove part of the upper surface of the insulator 285.

[0486] Next, a conductive film is formed to become the conductor 246. The conductive film can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0487] Next, the conductive film that becomes the conductor 246 is processed by lithography to form the conductor 246a in contact with the top surface of the conductor 240a and the conductor 246b in contact with the top surface of the conductor 240b. At this time, a part of the insulator 285 in the region where the conductor 246a and the conductor 246b do not overlap with the insulator 285 may be removed.

[0488] 15A to 15D can be manufactured. As shown in FIGS. 17 to 26, the transistor 200 can be manufactured by the manufacturing method of a semiconductor device described in this embodiment.

[0489] <Modifications of the semiconductor device> An example of a semiconductor device which is one embodiment of the present invention will be described below with reference to FIG.

[0490] FIG. 27A shows a top view of the semiconductor device 500. The x-axis shown in FIG. 27A is parallel to the channel length direction of the transistor 200, and the y-axis is perpendicular to the x-axis. FIG. 27B is a cross-sectional view corresponding to the portion indicated by the dashed line A1-A2 in FIG. 27A, and is also a cross-sectional view in the channel length direction of the transistor 200. FIG. 27C is a cross-sectional view corresponding to the portion indicated by the dashed line A3-A4 in FIG. 27A, and is also a cross-sectional view of the opening region 400 and its vicinity. Note that some elements are omitted in the top view of FIG. 27A for clarity.

[0491] 27A to 27C, structures having the same functions as those of the structures constituting the semiconductor device shown in <Configuration example of semiconductor device> are denoted by the same reference numerals. Note that, in this section, the materials described in detail in <Configuration example of semiconductor device> can be used as the materials constituting the semiconductor device.

[0492] The semiconductor device 500 shown in Figures 27A to 27C is a modified example of the semiconductor device shown in Figures 15A to 15D. The semiconductor device 500 shown in Figures 27A to 27C differs from the semiconductor device shown in Figures 15A to 15D in that an opening region 400 is formed in the insulator 282 and the insulator 280. Also, the semiconductor device 500 differs from the semiconductor device shown in Figures 15A to 15D in that a sealing portion 265 is formed so as to surround the multiple transistors 200.

[0493] The semiconductor device 500 has a plurality of transistors 200 and a plurality of opening regions 400 arranged in a matrix. In addition, a plurality of conductors 260 functioning as gate electrodes of the transistors 200 are each provided extending in the y-axis direction. The opening region 400 is formed in a region that does not overlap with the oxide 230 and the conductor 260. In addition, a sealing portion 265 is formed so as to surround the plurality of transistors 200, the plurality of conductors 260, and the plurality of opening regions 400. Note that the number, arrangement, and size of the transistors 200, the conductors 260, and the opening regions 400 are not limited to the structure shown in FIG. 27A, and may be appropriately set according to the design of the semiconductor device 500.

[0494] As shown in FIG. 27B and FIG. 27C, the sealing portion 265 is provided so as to surround the multiple transistors 200, the insulator 216, the insulator 222, the insulator 275, the insulator 280, and the insulator 282. In other words, the insulator 283 is provided so as to cover the insulator 216, the insulator 222, the insulator 275, the insulator 280, and the insulator 282. In addition, in the sealing portion 265, the insulator 283 is in contact with the upper surface of the insulator 214. In addition, in the sealing portion 265, the insulator 274 is provided between the insulator 283 and the insulator 285. The upper surface of the insulator 274 is approximately the same height as the uppermost surface of the insulator 283. In addition, the insulator 274 may be the same as the insulator 280.

[0495] With such a structure, the multiple transistors 200 can be enclosed by the insulator 283, the insulator 214, and the insulator 212. Here, it is preferable that one or more of the insulator 283, the insulator 214, and the insulator 212 function as a barrier insulating film against hydrogen. This can prevent hydrogen contained outside the region of the sealing portion 265 from entering the region of the sealing portion 265.

[0496] 27C, insulator 282 has an opening in opening region 400. In addition, insulator 280 may have a groove overlapping the opening of insulator 282 in opening region 400. The depth of the groove in insulator 280 may be at most until the top surface of insulator 275 is exposed, and may be, for example, approximately ¼ to ½ of the maximum film thickness of insulator 280.

[0497] 27C, insulator 283 contacts the side surface of insulator 282, the side surface of insulator 280, and the top surface of insulator 280 inside opening region 400. Also, a part of insulator 274 may be formed in opening region 400 so as to fill a recess formed in insulator 283. At this time, the height of the top surface of insulator 274 formed in opening region 400 and the top surface of insulator 283 may roughly match.

[0498] By performing heat treatment in a state where such an opening region 400 is formed and the insulator 280 is exposed through the opening of the insulator 282, part of the oxygen contained in the insulator 280 can be diffused outward from the opening region 400 while oxygen is supplied to the oxide 230. In this way, sufficient oxygen can be supplied from the insulator 280 containing oxygen released by heating to a region in the oxide semiconductor layer that functions as a channel formation region and its vicinity, while preventing an excessive amount of oxygen from being supplied.

[0499] At this time, the hydrogen contained in the insulator 280 can be bonded with oxygen and released to the outside through the opening region 400. The hydrogen bonded with oxygen is released as water. Therefore, the hydrogen contained in the insulator 280 can be reduced, and the hydrogen contained in the insulator 280 can be prevented from mixing with the oxide 230.

[0500] 27A, the shape of the opening region 400 in a top view is substantially rectangular, but this is not a limitation of one embodiment of the present invention. For example, the shape of the opening region 400 in a top view may be rectangular, elliptical, circular, or rhombic, or a combination of these shapes. The area and spacing of the opening regions 400 can be set as appropriate in accordance with the design of a semiconductor device including the transistors 200. For example, in a region where the density of the transistors 200 is low, the area of ​​the opening regions 400 may be increased or the spacing of the opening regions 400 may be narrowed. For example, in a region where the density of the transistors 200 is high, the area of ​​the opening regions 400 may be narrowed or the spacing of the opening regions may be widened.

[0501] According to one embodiment of the present invention, a semiconductor device with large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device with high field-effect mobility can be provided. According to one embodiment of the present invention, a semiconductor device with good frequency characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with good electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with good reliability can be provided. According to one embodiment of the present invention, a semiconductor device with low power consumption can be provided. According to one embodiment of the present invention, a semiconductor device with little variation in transistor characteristics can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided.

[0502] The structures, methods, and the like described in this embodiment can be used in appropriate combination with the structures, methods, and the like described in other embodiments.

[0503] (Embodiment 3) In this embodiment mode, one mode of a semiconductor device will be described with reference to FIGS.

[0504] [Storage device 1] 28 illustrates an example of a semiconductor device (memory device) according to one embodiment of the present invention. In the semiconductor device of one embodiment of the present invention, a transistor 200 is provided above a transistor 300, and a capacitor 100 is provided above the transistors 300 and 200. Note that the transistor 200 described in the above embodiment can be used as the transistor 200.

[0505] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer including an oxide semiconductor. Since the off-state current of the transistor 200 is small, stored data can be retained for a long time by using the transistor 200 in a memory device. In other words, a refresh operation is not required or the frequency of the refresh operation is extremely low, so that the power consumption of the memory device can be sufficiently reduced.

[0506] 28, a wiring 1001 is electrically connected to a source of a transistor 300, and a wiring 1002 is electrically connected to a drain of the transistor 300. A wiring 1003 is electrically connected to one of a source and a drain of the transistor 200, a wiring 1004 is electrically connected to a first gate of the transistor 200, and a wiring 1006 is electrically connected to a second gate of the transistor 200. The gate of the transistor 300 and the other of the source and drain of the transistor 200 are electrically connected to one electrode of the capacitor 100, and a wiring 1005 is electrically connected to the other electrode of the capacitor 100.

[0507] Moreover, the memory device shown in FIG. 28 can be arranged in a matrix to form a memory cell array.

[0508] <Transistor 300> The transistor 300 is provided on a substrate 311 and includes a conductor 316 functioning as a gate, an insulator 315 functioning as a gate insulator, a semiconductor region 313 formed of a part of the substrate 311, and a low-resistance region 314a and a low-resistance region 314b functioning as a source region or a drain region. The transistor 300 may be either a p-channel type or an n-channel type.

[0509] Here, in the transistor 300 shown in FIG. 28, a semiconductor region 313 (a part of a substrate 311) in which a channel is formed has a convex shape. A conductor 316 is provided so as to cover the side and top surface of the semiconductor region 313 via an insulator 315. Note that the conductor 316 may be made of a material that adjusts the work function. Such a transistor 300 is also called a FIN type transistor because it uses a convex portion of a semiconductor substrate. Note that an insulator that contacts the upper portion of the convex portion and functions as a mask for forming the convex portion may be provided. Note that, although a case where a convex portion is formed by processing a part of a semiconductor substrate has been shown here, a semiconductor film having a convex shape may be formed by processing an SOI substrate.

[0510] Note that the transistor 300 illustrated in FIG. 28 is just an example, and the present invention is not limited to this structure. An appropriate transistor may be used depending on the circuit configuration or driving method.

[0511] <Capacitive element 100> The capacitor 100 is provided above the transistor 200. The capacitor 100 includes a conductor 110 that functions as a first electrode, a conductor 120 that functions as a second electrode, and an insulator 130 that functions as a dielectric. Here, the insulator 130 is preferably an insulator that can be used as the insulator 275 described in the above embodiment.

[0512] For example, the conductor 112 over the conductor 240 and the conductor 110 can be formed at the same time. Note that the conductor 112 functions as a plug or a wiring electrically connected to the capacitor 100, the transistor 200, or the transistor 300.

[0513] 28, the conductor 112 and the conductor 110 are shown to have a single-layer structure, but are not limited to this configuration and may have a laminated structure of two or more layers. For example, a conductor having barrier properties and a conductor having high adhesion to the conductor having high conductivity may be formed between a conductor having barrier properties and a conductor having high conductivity.

[0514] The insulator 130 can be made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride, or the like, and can be provided as a stacked layer or a single layer.

[0515] For example, it is preferable to use a laminated structure of a material with high dielectric strength, such as silicon oxynitride, and a high dielectric constant (high-k) material for the insulator 130. With this configuration, the capacitance element 100 can ensure sufficient capacitance by having an insulator with high dielectric constant (high-k), and the capacitance element 100 can have improved dielectric strength by having an insulator with high dielectric strength, thereby suppressing electrostatic breakdown of the capacitance element 100.

[0516] Examples of high dielectric constant (high-k) materials (materials with a high relative dielectric constant) include gallium oxide, hafnium oxide, zirconium oxide, oxides having aluminum and hafnium, oxynitrides having aluminum and hafnium, oxides having silicon and hafnium, oxynitrides having silicon and hafnium, and nitrides having silicon and hafnium.

[0517] On the other hand, materials with high dielectric strength (materials with low dielectric constant) include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, silicon oxide or resin with voids, etc.

[0518] <Wiring layer> Between each structure, a wiring layer having an interlayer film, wiring, plugs, etc. may be provided. Also, a plurality of wiring layers may be provided according to the design. Here, a conductor having a function as a plug or wiring may be collectively given the same symbol as a plurality of structures. Also, in this specification, the wiring and the plug electrically connected to the wiring may be integrated. That is, there are cases where a part of the conductor functions as the wiring, and cases where a part of the conductor functions as the plug.

[0519] For example, an insulator 320, an insulator 322, an insulator 324, and an insulator 326 are stacked in this order as an interlayer film over the transistor 300. A conductor 328, a conductor 330, and the like that are electrically connected to the capacitor 100 or the transistor 200 are embedded in the insulator 320, the insulator 322, the insulator 324, and the insulator 326. The conductor 328 and the conductor 330 function as plugs or wirings.

[0520] The insulator functioning as an interlayer film may also function as a planarizing film that covers the uneven shape underneath. For example, the top surface of the insulator 322 may be planarized by a planarization process using a chemical mechanical polishing (CMP) method or the like to enhance flatness.

[0521] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in Fig. 28, an insulator 350, an insulator 352, and an insulator 354 are stacked in this order. A conductor 356 is formed in the insulator 350, the insulator 352, and the insulator 354. The conductor 356 functions as a plug or a wiring.

[0522] Similarly, a conductor 218, a conductor constituting the transistor 200 (conductor 205), and the like are embedded in the insulators 210, 212, 214, and 216. Note that the conductor 218 functions as a plug or wiring electrically connected to the capacitor 100 or the transistor 300. Furthermore, an insulator 150 is provided over the conductor 120 and the insulator 130.

[0523] Here, similarly to the insulator 241 shown in the above embodiment, the insulator 217 is provided in contact with the side surface of the conductor 218 functioning as a plug. The insulator 217 is provided in contact with the inner wall of the opening formed in the insulators 210, 212, 214, and 216. In other words, the insulator 217 is provided between the conductor 218 and the insulators 210, 212, 214, and 216. Note that the conductor 205 can be formed in parallel with the conductor 218, and therefore the insulator 217 may be formed in contact with the side surface of the conductor 205.

[0524] As the insulator 217, for example, an insulator such as silicon nitride, aluminum oxide, or silicon nitride oxide may be used. Since the insulator 217 is provided in contact with the insulator 210, the insulator 212, the insulator 214, and the insulator 222, it is possible to prevent impurities such as water or hydrogen from the insulator 210 or the insulator 216 from being mixed into the oxide 230 through the conductor 218. In particular, silicon nitride is preferable because it has a high blocking property against hydrogen. In addition, it is possible to prevent oxygen contained in the insulator 210 or the insulator 216 from being absorbed by the conductor 218.

[0525] The insulator 217 can be formed by a method similar to that of the insulator 241. For example, a silicon nitride film is formed by a PEALD method, and an opening reaching the conductor 356 is formed by anisotropic etching.

[0526] Examples of insulators that can be used as the interlayer film include insulating oxides, nitrides, oxynitrides, nitride oxides, metal oxides, metal oxynitrides, and metal nitride oxides.

[0527] For example, by using a material with a low dielectric constant for the insulator that functions as an interlayer film, the parasitic capacitance generated between wirings can be reduced. Therefore, it is advisable to select a material according to the function of the insulator.

[0528] For example, the insulator 150, the insulator 210, the insulator 352, the insulator 354, etc. preferably have an insulator with a low relative dielectric constant. For example, the insulator preferably has silicon oxynitride, silicon nitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, silicon oxide having voids, or resin. Alternatively, the insulator preferably has a laminated structure of silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen has been added, or silicon oxide having voids, and resin. Silicon oxide and silicon oxynitride are thermally stable, and therefore can be combined with a resin to form a laminated structure that is thermally stable and has a low relative dielectric constant. Examples of the resin include polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, and acrylic.

[0529] Furthermore, when a transistor using an oxide semiconductor is surrounded by an insulator that has a function of suppressing the permeation of oxygen and impurities such as hydrogen, the electrical characteristics of the transistor can be stabilized. Therefore, the insulators 214, 212, and 350 can be made of insulators that have a function of suppressing the permeation of oxygen and impurities such as hydrogen.

[0530] As an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum may be used in a single layer or a stacked layer. Specifically, as an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen, metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or tantalum oxide, silicon nitride oxide, or silicon nitride may be used.

[0531] Conductors that can be used for wiring and plugs include materials containing one or more metal elements selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, etc. Also, semiconductors with high electrical conductivity, typified by polycrystalline silicon containing impurity elements such as phosphorus, and silicides such as nickel silicide may be used.

[0532] For example, the conductor 328, the conductor 330, the conductor 356, the conductor 218, the conductor 112, etc. can be formed of a single layer or a stack of conductive materials such as metal materials, alloy materials, metal nitride materials, or metal oxide materials formed from the above materials. It is preferable to use a high melting point material such as tungsten or molybdenum that has both heat resistance and conductivity, and it is preferable to use tungsten. Alternatively, it is preferable to form the conductor from a low resistance conductive material such as aluminum or copper. By using a low resistance conductive material, the wiring resistance can be reduced.

[0533] <Wiring or plug of layer provided with oxide semiconductor> Note that when an oxide semiconductor is used for the transistor 200, an insulator having an excess oxygen region may be provided near the oxide semiconductor. In that case, an insulator having a barrier property is preferably provided between the insulator having the excess oxygen region and a conductor provided in the insulator having the excess oxygen region.

[0534] 28, for example, an insulator 241 may be provided between the insulator 285 and the insulator 280, which have excess oxygen or impurities, and the conductor 240. By providing the insulator 241 in contact with the insulator 222, the insulator 275, the insulator 282, and the insulator 283, the insulator 224 and the transistor 200 can be sealed with an insulator having barrier properties.

[0535] In other words, the insulator 241 can prevent excess oxygen in the insulator 280 from being absorbed by the conductor 240. Furthermore, the insulator 241 can prevent hydrogen, which is an impurity, from diffusing into the transistor 200 through the conductor 240.

[0536] As the insulator 241, an insulating material having a function of suppressing the diffusion of impurities such as water or hydrogen, and oxygen, may be used. For example, it is preferable to use silicon nitride, silicon nitride oxide, aluminum oxide, or hafnium oxide. In particular, silicon nitride is preferable because it has a high blocking property against hydrogen. In addition, other metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, or tantalum oxide may be used.

[0537] As described in the above embodiment, the transistor 200 may be sealed with the insulators 212, 214, 282, and 283. Such a structure can reduce the intrusion of hydrogen contained in the insulators 285, 150, and the like into the insulator 280 and the like.

[0538] Here, the conductor 240 penetrates the insulator 283 and the insulator 282, and the conductor 218 penetrates the insulator 214 and the insulator 212, but as described above, the insulator 241 is provided in contact with the conductor 240, and the insulator 217 is provided in contact with the conductor 218. This makes it possible to reduce hydrogen that is mixed into the inside of the insulators 212, 214, 282, and 283 through the conductors 240 and 218. In this way, the transistor 200 is sealed with the insulators 212, 214, 282, 283, 241, and 217, and it is possible to reduce impurities such as hydrogen contained in the insulator 285, etc., from the outside.

[0539] <Dicing line> In the following, a dicing line (sometimes called a scribe line, a dividing line, or a cutting line) that is provided when a large-area substrate is divided into individual semiconductor elements to extract multiple semiconductor devices in chip form will be described. As a dividing method, for example, first, grooves (dicing lines) for dividing the semiconductor elements are formed in the substrate, and t...

Claims

1. forming a metal oxide film on a substrate by an ALD method using a source gas including a precursor including indium, a source gas including a precursor including gallium, and a source gas including a precursor including zinc; and performing a heat treatment at a temperature of 420° C. or higher and 480° C. or lower with a flow rate ratio of nitrogen gas and oxygen gas of 4:

1. A method for forming a metal oxide.

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