Solder composition, method of preparing the same, and method of manufacturing semiconductor package using the same

Abstract

To provide a solder composition, and to provide a method of preparing the solder composition and a method of manufacturing a semiconductor package using the solder composition.SOLUTION: A solder composition of the invention includes: a solder paste including at least one of a tin (Sn)-bismuth (Bi) alloy and a tin (Sn)-silver (Ag)-copper (Cu) alloy; and a plurality of nanoparticles dispersed in the adhering solder paste. Each of the nanoparticles includes a core that is spherical. The core includes a metal oxide, and the metal oxide has density of 7 g / cm3 or more and a melting point of 2000°C or higher.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a solder composition, a method for manufacturing the same, and a method for manufacturing a semiconductor package using the same.

Background Art

[0002] Over the past few decades, the development of technology, materials, and manufacturing processes has led to the rapid development of computer power and wireless communication technology. As a result, the direct implementation of high-performance transistors has become possible, and the speed of integration has doubled approximately every 18 months according to Moore's law. The miniaturization, thinning, and power efficiency of systems are permanent goals of the semiconductor manufacturing industry, and at the current point where the limits of economic and physical processes have been reached, 3D integration packaging has been presented as an effective solution.

[0003] The development of three-dimensionally integrated devices began with CMOS integrated elements presented in 1980 and has since evolved through 30 years of continuous research and development. Examples of 3D integration technologies include the integration of logic circuits and memory circuits, sensor packaging, and heterogeneous integration of MEMS and CMOS. The three-dimensional integration technology enables not only a reduction in form factor but also the achievement of high reliability, low power consumption, and low manufacturing costs.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] The present invention has been made in view of the above prior art, and an object of the present invention is to provide a solder composition with improved performance and reliability, a method for manufacturing the same, and a method for manufacturing a semiconductor package using the same.

Means for Solving the Problem

[0006] A solder composition according to an aspect of the present invention made to achieve the above object includes a solder paste containing at least one of a tin (Sn)-bismuth (Bi) alloy and a tin (Sn)-silver (Ag)-copper (Cu) alloy, and a plurality of nanoparticles dispersed in the solder paste. Each of the plurality of nanoparticles includes a spherical core, the core includes a metal oxide, and the metal oxide has a density of 7 g / cm 3 or more and a melting point of 2000 °C or more.

[0007] A method for manufacturing a solder composition according to an aspect of the present invention made to achieve the above object includes a step of synthesizing nanoparticles including a core, and a step of mixing the nanoparticles into a solder paste. The step of synthesizing the nanoparticles includes a step of synthesizing the core using a hydrothermal synthesis process, and the core includes a metal oxide.

[0008] A method for manufacturing a semiconductor package according to an aspect of the present invention made to achieve the above object includes a step of manufacturing a solder composition including a plurality of nanoparticles, a step of providing a substrate, and a step of bonding a semiconductor chip using the solder composition on the substrate. Each of the plurality of nanoparticles includes a spherical core and a metal coating layer surrounding the core. The step of manufacturing the solder composition includes a step of synthesizing the core using a hydrothermal synthesis process, forming the metal coating layer surrounding the core to synthesize the plurality of nanoparticles, and a step of mixing the plurality of nanoparticles into a solder paste. The solder paste includes at least one of a tin (Sn)-bismuth (Bi) alloy and a tin (Sn)-silver (Ag)-copper (Cu) alloy. The core includes a metal oxide, and the metal oxide has a density of 7 g / cm 3 or more and a melting point of 2000 °C or more.

Advantages of the Invention

[0009] According to the present invention, it is possible to provide a solder composition with improved performance and reliability, a method for manufacturing the same, and a method for manufacturing a semiconductor package using the same.

Brief Description of the Drawings

[0010]

Figure 1

Figure 2

Figure 3

Figure 4A

Figure 4B

Figure 4C

Figure 4D

Figure 5A

Figure 5B

Figure 6A

Figure 6B

Figure 6C

Figure 6D

Figure 7A

Figure 7B

Figure 8

Embodiments for Carrying Out the Invention

[0011] Hereinafter, specific examples of embodiments for carrying out the present invention will be described in detail with reference to the drawings. Hereinafter, the embodiments of the present invention are embodied in only one of them, and the following embodiments can be embodied in combination of one or more. Therefore, the technical idea of the present invention is not construed as being limited to one embodiment.

[0012] FIG. 1 is a cross-sectional view of a semiconductor package 10 manufactured using a solder composition according to an embodiment of the present invention.

[0013] Referring to FIG. 1, the semiconductor package 10 includes a substrate 20 and a semiconductor chip 30 bonded on the substrate 20.

[0014] In some embodiments, the substrate 20 includes a lower insulating layer 21, a wiring layer 23, and an upper insulating layer 25.

[0015] In one embodiment, the wiring layer 23 includes silicon (Si). Alternatively, the wiring layer 23 includes a semiconductor element such as silicon (Si) or germanium (Ge), or a compound semiconductor such as silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs), and indium phosphide (InP). The wiring layer 23 includes a conductor material doped with a doping agent. Alternatively, the wiring layer 23 has a silicon on insulator (SOI) structure. For example, the wiring layer 23 includes a buried oxide layer (BOX layer). The wiring layer 23 includes a conductive region, such as a well doped with impurities or a structure doped with impurities. Further, the wiring layer 23 has various element isolation structures such as a shallow trench isolation (STI) structure.

[0016] In one embodiment, the wiring layer 23 includes a plurality of individual devices of various types and an interlayer insulating film. The plurality of individual devices include various microelectronic devices, such as a metal-oxide-semiconductor field effect transistor (MOSFET) such as a complementary metal-insulator-semiconductor transistor (CMOS transistor), a large scale integration (system LSI), a flash memory, a dynamic random access memory (DRAM), a static random access memory (SRAM), an electrically erasable programmable read-only memory (EEPROM), a phase change random access memory (PRAM), a magnetic random access memory (MRAM), or a resistive random access memory (RERAM), an image sensor such as a CMOS imaging sensor (CIS), a micro-electro-mechanical system (MEMS), an active device, a passive device, and the like. The plurality of individual devices are formed in the wiring layer 23 from a cell region (CR), and the plurality of individual devices are electrically connected to the conductive region of the wiring layer 23. The wiring layer 23 further includes at least two of the plurality of individual devices, or a conductive wiring or a conductive plug that electrically connects the plurality of individual devices and the conductive region of the wiring layer 23. Further, the plurality of individual devices are electrically separated from other adjacent individual devices by an insulating film, respectively.

[0017] In one embodiment, the wiring layer 23 is formed to include a plurality of wiring structures for connecting a plurality of individual elements to other wirings formed in the wiring layer 23. The plurality of wiring structures include metal wiring patterns extending in the horizontal direction and via plugs extending in the vertical direction. The metal wiring patterns and the via plugs include a barrier film and a conductive layer. The wiring barrier film includes at least one substance selected from titanium (Ti), titanium nitride (TiN), tantalum (Ta), and tantalum nitride (TaN). The conductive layer includes at least one metal selected from tungsten (W), aluminum (Al), and copper (Cu). The plurality of wiring structures have a multilayer structure in which two or more metal wiring patterns and two or more via plugs are alternately laminated.

[0018] In one embodiment, the wiring layer 23 has a lower surface and an upper surface facing each other, the lower insulating layer 21 is disposed on the lower surface of the wiring layer 23, and the upper insulating layer 25 is disposed on the upper surface of the wiring layer 23. In the present specification, the lower surface and the upper surface of the substrate mean surfaces perpendicular to the direction (vertical direction, i.e., Z direction) in which the substrates are laminated. In particular, the lower surface means a surface with a lower double vertical level, and the upper surface means a surface with a higher vertical level. The lower insulating layer 21 and the upper insulating layer 25 are protective layers for protecting the wiring layer 23 and the wiring structures formed therein from external impacts and moisture. In one embodiment, the lower insulating layer 21 and the upper insulating layer 25 include at least any one of silicon nitride, silicon oxide, and silicon oxynitride.

[0019] In one embodiment, a lower pad 22 is disposed on the lower surface of the wiring layer 23. The side surface of the lower pad 22 is covered by the lower insulating layer 21. One surface of the lower pad 22 is exposed to the outside coplanar with the upper surface of the lower insulating layer 21.

[0020] In one embodiment, an upper pad 26 is disposed on the upper surface of the wiring layer 23. The side surface of the upper pad 26 is covered by an upper insulating layer 25. One surface of the upper pad 26 is exposed to the outside coplanar with the upper surface of the upper insulating layer 25. A conductive solder 35 is disposed on the upper pad 26 to electrically connect the substrate 20 to the semiconductor chip 30.

[0021] According to one embodiment, the lower pad 22 and the upper pad 26 also contain at least one metal selected from tungsten (W), aluminum (Al), and copper (Cu).

[0022] A semiconductor chip 30 is disposed on the substrate 20. A conductive solder 35 is disposed between the semiconductor chip 30 and the substrate 20.

[0023] In one embodiment, the semiconductor chip 30 is, for example, a memory semiconductor chip. The memory semiconductor chip is, for example, a volatile memory semiconductor chip such as a DRAM (Dynamic Random Access Memory) or an SRAM (Static Random Access Memory), or a non-volatile memory semiconductor chip such as a PRAM (Phase-change Random Access Memory), an MRAM (Magnetoresistive Random Access Memory), a FeRAM (Ferroelectric Random Access Memory), or a ReRAM (Resistive Random Access Memory).

[0024] In one embodiment, the semiconductor chip 30 contains silicon (Si). Alternatively, the semiconductor chip 30 contains a semiconductor element such as germanium (Ge), or a compound semiconductor such as silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs), and indium phosphide (InP). The semiconductor chip 30 has an SOI structure. Also, the semiconductor chip 30 has various element isolation structures such as an STI structure.

[0025] In one embodiment, the conductive solder 35 is disposed between the semiconductor chip 30 and the substrate 20 to bond the semiconductor chip 30 and the substrate 20.

[0026] In one embodiment, the conductive solder 35 contains a solder material. The conductive solder 35 contains tin (Sn), indium (In), bismuth (Bi), antimony (Sb), copper (Cu), silver (Ag), zinc (Zn), lead (Pb), and / or their alloys. For example, the conductive solder 35 contains Sn, Pb, Sn-Pb, Sn-Ag, Sn-Au, Sn-Cu, Sn-Bi, Sn-Zn, Sn-Ag-Cu, Sn-Ag-Bi, Sn-Ag-Zn, Sn-Cu-Bi, Sn-Cu-Zn, Sn-Bi-Zn, etc.

[0027] In one embodiment, the conductive solder 35 is manufactured using a solder composition in which a plurality of nanoparticles 33 are mixed. The plurality of nanoparticles 33 are dispersed in the solder paste to form the solder composition.

[0028] Specifically, the solder composition includes a solder paste and a plurality of nanoparticles 33 dispersed in the solder paste. The plurality of nanoparticles 33 include a core 31 and a metal coating layer 32 surrounding the core 31. The core 31 contains a metal oxide. The core 31 is substantially spherical.

[0029] For example, the solder paste contains one or more selected from a tin (Sn)-bismuth (Bi) alloy and a tin (Sn)-silver (Ag)-copper (Cu) alloy.

[0030] For example, the metal oxide constituting the core 31 has a density of 7 g / cm 3The above has a melting point of 2000 °C or higher. For example, the metal oxide constituting the core 31 includes one or more selected from cerium (Ce) oxide, hafnium (Hf) oxide, europium (Eu) oxide, samarium (Sm) oxide, dysprosium (Dy) oxide, terbium (Tb) oxide, erbium (Er) oxide, ytterbium (Yb) oxide, thulium (Tm) oxide, and neodymium (Nd) oxide.

[0031] For example, the diameter of the core 31 is about 10 nm to about 1000 nm. For example, the diameter of the core 31 is within about 100 nm to about 500 nm, or within about 200 nm to 300 nm. For example, the particle size distribution of the size of each core of the plurality of nanoparticles 33 is 20% or less. That is, the difference in the size of the cores between the plurality of nanoparticles 33 is within 20%. For example, the particle size distribution of the size of each core of the plurality of nanoparticles 33 is 10% or less. That is, the difference in the size of the cores between the plurality of nanoparticles 33 is within 10%.

[0032] For example, the plurality of nanoparticles 33 are contained in the solder composition at about 0.1 wt% to about 1 wt%.

[0033] For example, the thickness of the metal coating layer 32 is 1 / 5 or less of the diameter of the core 31. The thickness of the metal coating layer 32 is understood to mean the dimension perpendicular to the surface (for example, spherical) on which the coating is formed. The layer thickness may vary, and thus it must be understood that there are various thicknesses for each position. For example, the metal coating layer 32 includes one or more selected from silver (Ag), nickel (Ni), gold (Au), tin (Sn), copper (Cu), and cobalt (Co).

[0034] In some embodiments, the core 31 is synthesized using a hydrothermal synthesis process. A method for manufacturing a solder composition containing the core 31 will be described in detail later with reference to FIG. 2 and below.

[0035] In one embodiment, as shown in FIG. 1, bumps 36 are further disposed between semiconductor chip 30 and conductive solder 35. Bumps 36, together with conductive solder 35, mediate the electrical connection between semiconductor chip 30 and substrate 20. Bumps 36, together with conductive solder 35, constitute a conductive post. Bumps 36 include at least one metal selected from among tungsten (W), aluminum (Al), and copper (Cu). Bumps 36 are formed in the form of pillars or pads and are a separate configuration distinct from conductive solder 35.

[0036] FIG. 2 is a flowchart showing a method (S100) for manufacturing a solder composition according to an embodiment of the present invention. FIG. 3 is a flowchart of some steps (S111) of a method (S100) for manufacturing a solder composition according to an embodiment of the present invention.

[0037] Referring to FIG. 2, a step (S110) of synthesizing nanoparticles 33 (see FIG. 1) is performed. As described above, nanoparticles 33 include a core 31 (see FIG. 1) and a metal coating layer 32 (see FIG. 1) surrounding the core.

[0038] First, as shown in FIG. 2, a step (S111) of synthesizing core 31 using a hydrothermal synthesis process is performed.

[0039] Specifically, referring also to FIG. 3, the step (S111) of synthesizing core 31 using a hydrothermal synthesis process includes a step (S111_1) of stirring a metal precursor and a solvent to produce a metal precursor solution and a step (S111_2) of synthesizing metal oxide particles from the metal precursor solution using a hydrothermal synthesis process.

[0040] First, a step (S111_1) of stirring a metal precursor and a solvent to produce a metal precursor solution is performed. For example, a metal precursor, a ligand, and a solvent are stirred to produce a metal precursor solution.

[0041] The metal precursor includes one or more selected from, for example, a cerium (Ce) precursor, a hafnium (Hf) precursor, a europium (Eu) precursor, a samarium (Sm) precursor, a dysprosium (Dy) precursor, a terbium (Tb) precursor, an erbium (Er) precursor, a ytterbium (Yb) precursor, a thulium (Tm) precursor, and a neodymium (Nd) precursor.

[0042] Next, a step (S111_2) of synthesizing metal oxide particles using a hydrothermal synthesis process is performed with the metal precursor solution produced in the step (S111_1) of producing the metal precursor solution.

[0043] For example, the hydrothermal synthesis process is performed within a temperature range of about 100°C to about 300°C. For example, the hydrothermal synthesis process is performed for 1 to 20 hours. The temperature and time for performing the hydrothermal synthesis process are not limited to those described above and are performed at various temperatures and times. For example, the hydrothermal synthesis process is performed within a temperature range of about 130°C to about 180°C. For example, the hydrothermal synthesis process is performed within about 1 to 5 hours.

[0044] Metal oxide particles are synthesized to produce the core 31.

[0045] In some embodiments, the diameter of the core 31 synthesized in the step (S111) of synthesizing the core using the hydrothermal synthesis process according to the technical idea of the present invention is about 10 nm to about 1000 nm. In some embodiments, the size of the core 31 synthesized in the step (S111) of synthesizing the core using the hydrothermal synthesis process is relatively uniform. For example, the particle size distribution of the size of the core 31 synthesized in the step (S111) of synthesizing the core using the hydrothermal synthesis process is about 20% or less. For example, the particle size distribution of the size of the core 31 synthesized in the step (S111) of synthesizing the core using the hydrothermal synthesis process is about 10% or less.

[0046] Referring to FIG. 2 again, a step (S112) of forming a metal coating layer 32 surrounding the core 31 is performed. Specifically, after forming a metal seed layer on the core 31, a step of coating the core 31 with metal is then performed.

[0047] The metal coating layer 32 contains one or more selected from, for example, silver (Ag), nickel (Ni), gold (Au), tin (Sn), copper (Cu), and cobalt (Co).

[0048] In some embodiments, the thickness of the metal coating layer 32 is about 1 / 5 or less of the diameter of the core 31. For example, when the diameter of the core 31 is about 10 nm, the thickness of the metal coating layer 32 is about 2 nm or less. For example, when the diameter of the core 31 is about 1000 nm, the thickness of the metal coating layer 32 is about 200 nm or less.

[0049] By the step of synthesizing nanoparticles (S110) according to an embodiment of the present invention, a plurality of nanoparticles 33 including the core 31 and the metal coating layer 32 surrounding it are synthesized.

[0050] Referring to FIG. 2 again, the step of mixing a plurality of nanoparticles 33 into the solder paste (S120) is performed.

[0051] In some embodiments, the solder paste contains one or more selected from a tin (Sn)-bismuth (Bi) alloy and a tin (Sn)-silver (Ag)-copper (Cu) alloy.

[0052] In some embodiments, to mix a plurality of nanoparticles 33 into the solder paste, the mixture of the plurality of nanoparticles 33 and the solder paste is stirred. In some embodiments, the plurality of nanoparticles 33 are mixed into the solder paste so as to be contained at 0.1 wt% to 1 wt% of the solder composition.

[0053] Figures 4A to 4D are transmission electron microscope (TEM) images and scanning electron microscope (SEM) images of CeO2 and CeO2 / Ag nanoparticles synthesized by a method for manufacturing a solder composition according to an embodiment of the present invention. Figures 5A and 5B are histograms showing the diameters of CeO2 and CeO2 / Ag nanoparticles synthesized by a method for manufacturing a solder composition according to an embodiment of the present invention. Figures 6A to 6D are enlarged views of TEM images of CeO2 / Ag nanoparticles synthesized by a method for manufacturing a solder composition according to an embodiment of the present invention, and images showing energy dispersive spectroscopy (EDS) composition analysis results. Figures 7A and 7B are X-ray diffraction (XRD) graphs of CeO2 and CeO2 / Ag nanoparticles synthesized by a method for manufacturing a solder composition according to an embodiment of the present invention.

[0054] Hereinafter, the configuration and effects of the present invention will be described in more detail based on specific examples and comparative examples. However, these examples are merely for better understanding of the present invention and are not intended to limit the scope of the present invention.

[0055] In some embodiments, CeO2 nanoparticles are synthesized as follows (Example 1). In some embodiments, CeO2 / Ag nanoparticles are synthesized as follows (Example 2).

[0056] Example 1: Cerium(III) nitrate hexahydrate (Ce(NO3)3·6H2O) and polyvinylpyrrolidone (PVP) 1300K are hydrothermally synthesized at 160°C for 18 hours at a ratio of 1:3.

[0057] Example 2: After dispersing 1 g of the CeO2 nanoparticles of Example 1 in 250 ml of DI water, 50 ml of 0.1 M NaOH is added to adjust the pH to 12. After forming an Ag seed layer on the surface of the CeO2 nanoparticles using silver nitrate (AgNO3), AgNO3 is further injected for Ag coating.

[0058] Thereby, CeO2 nanoparticles and CeO2 / Ag nanoparticles as shown in FIGS. 4A to 4D are synthesized.

[0059] Specifically, FIG. 4A is a transmission electron microscope (TEM) image of the CeO2 nanoparticles of Example 1. FIG. 4B is a scanning electron microscope (SEM) image of the CeO2 nanoparticles of Example 1. FIG. 4C is a TEM image of the CeO2 / Ag nanoparticles of Example 2. FIG. 4D is an SEM image of the CeO2 / Ag nanoparticles of Example 2.

[0060] As shown in FIGS. 4A to 4D, according to an exemplary embodiment based on the technical idea of the present invention, the CeO2 nanoparticles and CeO2 / Ag nanoparticles of Example 1 and Example 2 are synthesized using a hydrothermal synthesis process, and a plurality of nanoparticles with a diameter of 500 nm or less are synthesized.

[0061] Next, referring to FIGS. 5A and 5B, the size distributions of the CeO2 nanoparticles and CeO2 / Ag nanoparticles of Example 1 and Example 2 synthesized using a hydrothermal synthesis process according to an exemplary embodiment based on the technical idea of the present invention can be confirmed. Specifically, FIG. 5A is a histogram showing the diameter distribution of the CeO2 nanoparticles of Example 1. FIG. 5B is a histogram showing the diameter distribution of the CeO2 / Ag nanoparticles of Example 2.

[0062] As shown in FIG. 5A, the diameters of the CeO2 nanoparticles of Example 1 have a distribution of about 10% around an average of about 329.5 nm. As shown in FIG. 5B, the diameters of the CeO2 / Ag nanoparticles of Example 2 have a distribution of about 10% around an average of about 327.4 nm.

[0063] A method (S100) for manufacturing a solder composition according to an embodiment of the present invention can manufacture a plurality of nanoparticles having a size with a particle size distribution of about 20% or less by using a hydrothermal synthesis process. For example, a method (S100) for manufacturing a solder composition synthesizes a core using a hydrothermal synthesis process to manufacture a plurality of nanoparticles having a size with a particle size distribution of about 10% or less. That is, according to an embodiment based on the technical idea of the present invention, a plurality of nanoparticles with an improved particle size distribution of particle size can be manufactured.

[0064] Referring to FIGS. 6A to 6D, it is confirmed that the CeO2 / Ag nanoparticles of Example 2 were synthesized. Specifically, FIG. 6A is an enlarged TEM image of the CeO2 / Ag nanoparticles of FIG. 4C. FIGS. 6B to 6D are images labeled with cerium (Ce), oxygen (O), and silver (Ag), respectively, as energy dispersive spectroscopy (EDS) composition analysis results using the image of FIG. 6A.

[0065] Referring to FIGS. 7A and 7B, it is confirmed that the CeO2 nanoparticles of Example 1 and the CeO2 / Ag nanoparticles of Example 2 were synthesized. Specifically, FIGS. 7A and 7B are XRD analysis graphs of the CeO2 nanoparticles of Example 1 and the CeO2 / Ag nanoparticles of Example 2, respectively.

[0066] As shown in FIG. 7A, the CeO2 nanoparticles of Example 1 were analyzed by XRD to confirm the CeO2 peak. As shown in FIG. 7B, the CeO2 / Ag nanoparticles of Example 2 were analyzed by XRD to confirm the CeO2 peak and the Ag peak, respectively.

[0067] Hereinafter, the nanoparticles of Example 1 and Example 2 were mixed into a solder paste, and a thermal cycle (TC) evaluation was carried out in comparison with the cases of Comparative Examples 1 to 3 (see Table 1 below).

[0068] Specifically, Comparative Examples 1 to 3 are the cases where no nanoparticles are mixed in the solder paste (Comparative Example 1), and the cases where ZnSe nanoparticles and In2O3 nanoparticles are respectively mixed in the solder paste (Comparative Examples 2 and 3). In Comparative Examples 2 and 3, nanoparticles without metal coating were mixed.

[0069]

Table 1

[0070] Referring to Table 1 above, in the case of Comparative Example 1 where no nanoparticles were mixed, after 500 cycles, the shear strength decreased from 74.6 MPa to 69.6 MPa, showing a decrease rate of about -7%.

[0071] Comparative Example 2 had ZnSe nanoparticles with a density of 5.27 g / cm 3 and a melting point of 1525°C mixed in the solder paste. As a result of 500 cycles, the shear strength decreased from 74.6 MPa to 66 MPa, showing a decrease rate of about -12%.

[0072] Comparative Example 3 had In2O3 nanoparticles with a density of 7.18 g / cm 3 and a melting point of 1910°C mixed in the solder paste. As a result of 500 cycles, the shear strength decreased from 75.1 MPa to 67.7 MPa, showing a decrease rate of about -10%.

[0073] On the other hand, in Example 1, CeO2 nanoparticles with a density of 7.22 g / cm 3 and a melting point of 2400°C were mixed in the solder paste. As a result of 500 cycles, the shear strength decreased from 71.8 MPa to 68.6 MPa, showing a decrease rate of about -5%.

[0074] In Example 2, CeO2 / Ag nanoparticles with a density of 7.22 g / cm 3 wherein the CeO2 core was coated with Ag were mixed in the solder paste. As a result of 500 cycles, the shear strength decreased from 70.3 MPa to 68.1 MPa, showing a decrease rate of about -3%.

[0075] That is, as described above, in the case of Example 1 where CeO2 nanoparticles were mixed, compared with the case of Comparative Example 1 where no nanoparticles were mixed, it was confirmed that the reduction rate of shear strength decreased. In the case of Example 2 where CeO2 / Ag nanoparticles with an Ag coating on the CeO2 core were mixed, it was confirmed that the reduction rate of shear strength further decreased.

[0076] On the other hand, the ZnSe nanoparticles of Comparative Example 2 have a density of less than 7 g / cm 3 and a melting point of less than 2000 °C. It was confirmed that the reduction rate of shear strength increased compared with the case of Comparative Example 1 where no nanoparticles were mixed and the cases of Example 1 and Example 2 where CeO2 nanoparticles and CeO2 / Ag nanoparticles were mixed, respectively.

[0077] Similarly, the In2O3 nanoparticles of Comparative Example 3 have a melting point of less than 2000 °C. It was confirmed that the reduction rate of shear strength increased compared with the case of Comparative Example 1 where no nanoparticles were mixed and the cases of Example 1 and Example 2 where CeO2 nanoparticles and CeO2 / Ag nanoparticles were mixed, respectively.

[0078] That is, in the cases of Comparative Example 2 and Comparative Example 3, it can be confirmed that there is no effect of improving the reliability of the solder composition.

[0079] By including a metal oxide with a high density (7 g / cm 3 or more) and a high melting point (2000 °C or more) in the solder composition according to an embodiment of the present invention, the phenomenon of phase separation of a plurality of nanoparticles from the solder composition is improved. As a result, the shear strength characteristics of the solder composition are improved. That is, an embodiment according to the technical idea of the present invention provides a solder composition with improved performance and reliability.

[0080] By further including a metal coating layer surrounding the core in the solder composition according to an embodiment of the present invention, a solder composition containing nanoparticles with improved wettability with solder paste is provided. Thereby, the shear strength characteristics of the solder composition are improved. That is, according to an embodiment based on the technical idea of the present invention, a solder composition with improved performance and reliability is provided.

[0081] By synthesizing nanoparticles containing metal oxides with high density (7 g / cm 3 or more) and high melting point (2000 °C or more) in the method for manufacturing a solder composition according to an embodiment of the present invention, the phenomenon in which a plurality of nanoparticles are phase-separated from the solder composition is improved. Thereby, the shear strength characteristics of the solder composition are improved. That is, according to an embodiment based on the technical idea of the present invention, a method for manufacturing a solder composition with improved performance and reliability is provided.

[0082] By further including a metal coating layer surrounding the core in the solder composition according to an embodiment of the present invention, a method for manufacturing a solder composition that produces nanoparticles with improved wettability with solder paste is provided. Thereby, the shear strength characteristics of the solder composition are improved. That is, according to an embodiment based on the technical idea of the present invention, a method for manufacturing a solder composition with improved performance and reliability is provided.

[0083] According to an embodiment of the present invention, the metal oxides that can be used as the core of nanoparticles with high density (7 g / cm 3 or more) and high melting point (2000 °C or more) are as shown in Table 2 below.

[0084]

Table 2

[0085] That is, the core of the nanoparticles of the solder composition according to one embodiment of the present invention contains one or more selected from cerium (Ce) oxide, hafnium (Hf) oxide, europium (Eu) oxide, samarium (Sm) oxide, dysprosium (Dy) oxide, terbium (Tb) oxide, erbium (Er) oxide, ytterbium (Yb) oxide, thulium (Tm) oxide, and neodymium (Nd) oxide.

[0086] That is, the core of the nanoparticles synthesized by the method for manufacturing a solder composition according to one embodiment of the present invention contains one or more selected from cerium (Ce) oxide, hafnium (Hf) oxide, europium (Eu) oxide, samarium (Sm) oxide, dysprosium (Dy) oxide, terbium (Tb) oxide, erbium (Er) oxide, ytterbium (Yb) oxide, thulium (Tm) oxide, and neodymium (Nd) oxide.

[0087] FIG. 8 is a flowchart showing a method (S200) for manufacturing a semiconductor package according to one embodiment of the present invention.

[0088] Referring to FIG. 8, a step (S205) of manufacturing a solder composition containing nanoparticles is performed. The step (S205) of manufacturing a solder composition containing nanoparticles in the method (S200) for manufacturing a semiconductor package includes the method (S100) for manufacturing a solder composition described with reference to FIGS. 2 and 3.

[0089] Specifically, the step (S205) of manufacturing a solder composition containing nanoparticles includes a step (S111) of synthesizing a core using the hydrothermal synthesis process described with reference to FIG. 2, a step (S112) of forming a metal coating layer surrounding the core, and a step (S120) of mixing a plurality of nanoparticles into a solder paste. The step (S111) of synthesizing a core using the hydrothermal synthesis process described with reference to FIGS. 2 and 3 includes, for example, a step (S111_1) of stirring a metal precursor and a solvent to produce a metal precursor solution, and a step (S111_2) of synthesizing metal oxide particles from the metal precursor solution using the hydrothermal synthesis process.

[0090] Next, a step of providing a substrate (S210) is performed. For example, the substrate 20 described with reference to FIG. 1 is provided.

[0091] Next, a step of bonding a semiconductor chip using a solder composition on the substrate (S220) is performed. For example, the semiconductor chip 30 described with reference to FIG. 1 is bonded on the substrate 20.

[0092] Specifically, the solder composition manufactured through a step of manufacturing a solder composition containing a plurality of nanoparticles under the semiconductor chip 30 (S205) is applied, placed on the substrate 20, and then heat and / or pressure is applied to bond the substrate 20 and the semiconductor chip 30.

[0093] For example, a bump 36 (see FIG. 1) coated with the solder composition manufactured through a step of manufacturing a solder composition containing a plurality of nanoparticles under the semiconductor chip 30 (S205) is attached, placed on the substrate 20, and then heat and / or pressure is applied to bond the substrate 20 and the semiconductor chip 30.

[0094] The semiconductor package 10 described with reference to FIG. 1 is manufactured by a method of manufacturing a semiconductor package (S200) described with reference to FIG. 8.

[0095] According to an embodiment of the present invention, a method of manufacturing a semiconductor package (S200) using a solder composition containing a plurality of nanoparticles is provided. That is, according to an embodiment based on the technical idea of the present invention, a method of manufacturing a semiconductor package (S200) with improved performance and reliability is provided.

[0096] As described above, the embodiments of the present invention have been described in detail with reference to the drawings. However, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the technical idea of the present invention.

Explanation of Reference Numerals

[0097] 10 Semiconductor package 20 Substrate 21 Lower Insulating Layer 22 Lower Pad 23 Wiring Layer 25 Upper Insulating Layer 26 Upper Pad 30 Semiconductor Chip 31 Core 32 Metal Coating Layer 33 Nanoparticles 35 Conductive Solder 36 Bump

Claims

1. A solder paste containing at least one of a tin (Sn)-bismuth (Bi) alloy and a tin (Sn)-silver (Ag)-copper (Cu) alloy, and a plurality of nanoparticles dispersed in the solder paste, each of the plurality of nanoparticles includes a spherical core, the core includes a metal oxide, The metal oxide has a density of 7 g / cm ３ or more and a melting point of 2000 °C or more, and is a solder composition characterized by this.

2. The solder composition according to claim 1, wherein the core is synthesized using a hydrothermal synthesis process.

3. The solder composition according to claim 1, wherein the metal oxide includes one or more selected from the group consisting of cerium (Ce) oxide, hafnium (Hf) oxide, europium (Eu) oxide, samarium (Sm) oxide, dysprosium (Dy) oxide, terbium (Tb) oxide, erbium (Er) oxide, ytterbium (Yb) oxide, thulium (Tm) oxide, and neodymium (Nd) oxide.

4. The solder composition according to claim 1, wherein the diameter of the core is 10 nm to 1000 nm.

5. The solder composition according to claim 4, wherein the particle size distribution of the core size is 20% or less.

6. The solder composition according to claim 1, wherein the plurality of nanoparticles are included at 0.1 wt% to 1 wt% of the solder composition.

7. The solder composition according to claim 1, wherein each of the plurality of nanoparticles further includes a metal coating layer surrounding the core.

8. The solder composition according to claim 7, wherein the thickness of the metal coating layer is 1 / 5 or less of the diameter of the core.

9. The solder composition according to claim 7, wherein the metal coating layer includes one or more selected from the group consisting of silver (Ag), nickel (Ni), gold (Au), tin (Sn), copper (Cu), and cobalt (Co).

10. A step of synthesizing nanoparticles including a core, and a step of mixing the nanoparticles into a solder paste, the step of synthesizing the nanoparticles includes a step of synthesizing the core using a hydrothermal synthesis process, A method for manufacturing a solder composition, wherein the core includes a metal oxide.

11. The step of synthesizing the core includes a step of stirring a metal precursor and a solvent to produce a metal precursor solution, and a step of synthesizing metal oxide particles using the hydrothermal synthesis process with the metal precursor solution. The method for manufacturing the solder composition according to claim 10, wherein the hydrothermal synthesis step is carried out at a temperature of 100°C to 300°C for 1 to 20 hours.

12. The metal oxide has a density of 7 g / cm ３ or more and a melting point of 2000 °C or more, and a method for producing the solder composition according to claim 10, characterized in that.

13. The method for manufacturing the solder composition according to claim 10, wherein the metal oxide contains one or more selected from cerium (Ce) oxide, hafnium (Hf) oxide, europium (Eu) oxide, samarium (Sm) oxide, dysprosium (Dy) oxide, terbium (Tb) oxide, erbium (Er) oxide, ytterbium (Yb) oxide, thulium (Tm) oxide, and neodymium (Nd) oxide.

14. The method for manufacturing the solder composition according to claim 10, wherein the step of synthesizing the nanoparticles further includes a step of forming a metal coating layer surrounding the core.

15. The method for manufacturing the solder composition according to claim 14, wherein the metal coating layer contains one or more selected from silver (Ag), nickel (Ni), gold (Au), tin (Sn), copper (Cu), and cobalt (Co).

16. The method for manufacturing the solder composition according to claim 10, wherein the solder paste contains at least one of a tin (Sn)-bismuth (Bi) alloy and a tin (Sn)-silver (Ag)-copper (Cu) alloy.

17. A step of manufacturing a solder composition containing a plurality of nanoparticles; A step of providing a substrate; Bonding a semiconductor chip using the solder composition on the substrate, and having Each of the plurality of nanoparticles includes a spherical core and a metal coating layer surrounding the core, The step of manufacturing the solder composition is Synthesizing the core using a hydrothermal synthesis step, forming the metal coating layer surrounding the core, and synthesizing the plurality of nanoparticles; Mixing the plurality of nanoparticles into a solder paste, and including The solder paste contains at least one of a tin (Sn)-bismuth (Bi) alloy and a tin (Sn)-silver (Ag)-copper (Cu) alloy, The core contains a metal oxide, The metal oxide has a density of 7 g / cm ３ or more and a melting point of 2000 °C or more, and a method for manufacturing a semiconductor package characterized by this.

18. The step of synthesizing the core is Stirring a metal precursor and a solvent to produce a metal precursor solution; Synthesizing metal oxide particles using the hydrothermal synthesis step with the metal precursor solution, and including The method for manufacturing a semiconductor package according to claim 17, wherein the hydrothermal synthesis step is carried out at a temperature of 100°C to 300°C for 1 to 20 hours.

19. The method for manufacturing a semiconductor package according to claim 17, wherein the metal oxide contains one or more selected from cerium (Ce) oxide, hafnium (Hf) oxide, europium (Eu) oxide, samarium (Sm) oxide, dysprosium (Dy) oxide, terbium (Tb) oxide, erbium (Er) oxide, ytterbium (Yb) oxide, thulium (Tm) oxide, and neodymium (Nd) oxide.

20. The method for manufacturing a semiconductor package according to claim 17, wherein the metal coating layer contains one or more selected from silver (Ag), nickel (Ni), gold (Au), tin (Sn), copper (Cu), and cobalt (Co).

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