Circuit board
The circuit board design with a selective protective layer addresses the issue of foreign matter-induced damage by protecting specific lead portions, enhancing reliability and reducing defects.
Patent Information
- Application Number
- JP2024087273
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-02-06
- Filing Date
- 2024-05-29
- Publication Date
- 2025-08-19
- Estimated Expiration
- 2044-05-29
AI Technical Summary
Conventional circuit boards are susceptible to damage from foreign matter during transport or winding, leading to defects such as whiskers and deformation due to exposure of outer leads and test pads.
A circuit board design with a protective layer that covers only certain lead portions, leaving others exposed, preventing foreign matter from rubbing and compressing the unprotected leads, thereby preventing whisker formation.
Prevents damage to outer leads and test pads by foreign matter, reducing defects and ensuring reliable circuit functionality.
Smart Images

Figure 2025121347000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a circuit board, and more particularly to a flexible circuit board that prevents a circuit from being scratched or compressed by foreign objects. [Background technology]
[0002] The conventional circuit board tape T1 comprises multiple units 10, each of which includes a substrate 11, multiple circuits 12, and a protective layer 13 (see FIG. 1). Each circuit 12 has an inner lead 12a, an outer lead 12b, and a test pad 12c, with the outer lead 12b being located between the inner lead 12a and the test pad 12c. The protective layer 13 covers the circuits 12 but does not cover the inner lead 12a, outer lead 12b, or test pad 12c. Summary of the Invention [Problem to be solved by the invention]
[0003] However, when the circuit board tape T1 is transported or wound up, foreign matter (not shown, such as metal particles / scrap generated in the process environment, ink particles / scrap, etc.) remaining on the circuit board tape T1 scrapes the exposed outer leads 12b and test pads 12c, or compresses the outer leads 12b and test pads 12c, causing whiskers or deformation, which results in the unit 10 being determined to be defective during inspection.
[0004] Therefore, the present inventors believed that the above drawbacks could be improved, and as a result of extensive research, they came up with the proposal of the present invention, which effectively improves the above problems through rational design.
[0005] The present invention was made through extensive research by the inventors in view of the above problems, and its object is to provide a circuit board that can prevent foreign matter remaining on the circuit board from rubbing against the circuits of the circuit board when the circuit board is wound up or transported, and can also prevent the circuits from being compressed and causing whiskers to form. [Means for solving the problem]
[0006] In order to solve the above problems, the present invention employs the following means. A circuit board according to one aspect of the present invention includes a substrate, a plurality of circuits, and a protective layer. The substrate has a surface defining a first region, a second region, and a third region, and the second region is located between the first region and the third region along a first direction in which the circuit board is transported. Each of the circuits has a first lead portion provided in the first region, a second lead portion provided in the second region, and a third lead portion provided in the third region, the first lead portion having an inner lead and an outer lead, the second lead portion being located between the first lead portion and the third lead portion, and the second lead portion being connected to the outer lead and the third lead portion. The protective layer covers the first lead portion and the third lead portion, but does not cover the second lead portion, the inner lead, or the outer lead.
[0007] By doing this, the protective layer covering the third lead portion is higher than the circuit, which prevents foreign matter remaining on the circuit board from rubbing against the exposed outer lead and second lead portions, and also prevents the outer lead and second lead portions from being compressed, which could cause whiskers to form. [Brief explanation of the drawings]
[0008] [Figure 1] FIG. 1 is a plan view showing a conventional circuit board tape. [Figure 2] 1 is a plan view showing a circuit board tape according to an embodiment of the present invention; [Figure 3] 1 is a plan view showing a circuit board according to an embodiment of the present invention; [Figure 4A] 1 is a plan view showing a circuit board according to an embodiment of the present invention; [Figure 4B] 1 is a plan view showing a circuit board according to an embodiment of the present invention; [Figure 5] FIG. 4 is a cross-sectional view taken along line AA in FIG. [Figure 6] FIG. 4 is a partial cross-sectional view of the circuit board tape according to the present invention being wound up. DETAILED DESCRIPTION OF THE INVENTION
[0009] The present invention will be described below through embodiments of the invention, but the embodiments do not limit the scope of the invention as claimed. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.
[0010] The circuit board tape T2 includes a plurality of circuit boards 100, each of which includes a substrate 110, a plurality of circuits 120, and a protective layer 130. The material of the substrate 110 can be selected from polyimide (PI) and other materials. A first region 111a, a second region 111b, and a third region 111c are defined on a surface 111 of the substrate 110. The second region 111b is located between the first region 111a and the third region 111c along a first direction Y in which the circuit board 100 is transported (see FIGS. 2 and 3).
[0011] 2, 3, and 5, circuits 120 are disposed on the surface 111, and the material of the circuits 120 can be selected from copper or other metal materials. In this embodiment, each of the circuits 120 has a copper layer 120a and a tin layer 120b, and the tin layer 120b covers the copper layer 120a. Each of the circuits 120 has a first lead portion 121 disposed in the first region 111a, a second lead portion 122 disposed in the second region 111b, and a third lead portion 123 disposed in the third region 111c, and the second lead portion 122 is located between the first lead portion 121 and the third lead portion 123. The first lead portion 121 has an inner lead 121a and an outer lead 121b at both ends, and the second lead portion 122 is connected to the outer lead 121b and the third lead portion 123 of the first lead portion 121. The inner lead 121a of the first lead portion 121 is used to connect an electronic element (not shown, for example, a chip). In this embodiment of the invention, the third lead portion 123 has a test pad 123a.
[0012] 2 and 3, the protective layer 130 covers the first lead portion 121 and the third lead portion 123 of the circuit 120, but does not cover the second lead portion 122, the inner lead 121a and the outer lead 121b of the first lead portion 121, and the test pad 123a of the third lead portion 123. The material of the protective layer 130 can be selected from solder mask materials.
[0013] 2 and 3, the protective layer 130 has a first protective portion 131, at least one second protective portion 132, and a hollow portion 133, and the hollow portion 133 is located between the first protective portion 131 and the second protective portion 132. In the present embodiment, the protective layer 130 has two second protective portions 132, and the first protective portion 131 is located between the second protective portions 132, but the present invention is not limited thereto.
[0014] 3 and 5, the first protective portion 131 covers the first lead portion 121 but does not cover the inner lead 121a and the outer lead 121b. The second protective portion 132 covers the third lead portion 123 but does not cover the test pad 123a. In this embodiment, the second protective portion 132 covers the tin layer 120b, so that the tin layer 120b is located between the copper layer 120a and the second protective portion 132. A hollow portion 133 located between the first protective portion 131 and the second protective portion 132 exposes the second lead portion 122 located between the first lead portion 121 and the third lead portion 123.
[0015] 3 and 5, the second protective portion 132 covers the upper surface 123b and side surface 123c of the third lead portion 123, and also covers the surface 111 of the substrate 110 located between adjacent third lead portions 123. The second protective portion 132 covering the upper surface 123b of the third lead portion 123 has a thickness D, which is 0.5 μm or more and 50 μm or less (0.5 μm≦D≦50 μm).
[0016] Next, the outer lead 121b that is not covered by the first protective portion 131 is connected to the second lead portion 122 and is exposed to the hollow portion 133 (see FIG. 3).
[0017] 3, a predetermined cut line 140 passes through the hollow portion 133 and is located between the first protective portion 131 and the second protective portion 132 along a second direction X intersecting the first direction Y, and the outer lead 121b is located between the first protective portion 131 and the predetermined cut line 140. In this embodiment, the first direction Y is the vertical direction and the second direction X is the horizontal direction. The predetermined cut line 140 surrounds the first region 111a and divides the circuit board 100 into a portion 100a that will not be removed and a portion 100b that will be removed. The first lead portion 121 and the first protective portion 131 covering the first lead portion 121 are located in the portion 100a that will not be removed, and the second lead portion 122, the third lead portion 123, and the second protective portion 132 covering the third lead portion 123 are located in the portion 100b that will be removed. During the cutting process, a cutting tool (not shown) cuts the circuit board 100 along a predetermined cut line 140 to separate the portion 100a that will not be removed and the portion 100b that will be removed, separating the second lead portion 122 from the first lead portion 121 of each circuit 120, and retaining the outer lead 121b in the portion 100a that will not be removed.
[0018] 3, a first distance G1 is defined between the first protective portion 131 and the second protective portion 132 along the first direction Y, and the first distance G1 is in the range of 0.5 μm to 2 μm (0.5 μm≦G1≦2 μm). A second distance G2 is defined between the second protective portion 132 and the end of the test pad 123a, and the second distance G2 is in the range of 0.5 μm to 2 μm (0.5 μm≦G2≦2 μm).
[0019] 3 and 4A, the second protective portion 132 extends along the second direction X, and the second protective portion 132 has a continuous geometric shape, such as a straight line, a curve, a rectangle, or a regular or irregular geometric shape. Alternatively, as shown in FIG. 4B, the second protective portion 132 has a discontinuous geometric shape, and the second protective portion 132 has a plurality of protrusions 132a, and the protrusions 132a have a rectangular, circular, regular or irregular geometric shape. A third distance G3 is defined between adjacent protrusions 132a along the second direction X, and the third distance G3 is 0.5 μm or more and 158 mm or less (0.5 μm≦G3≦158 mm). There is a fourth distance G4 between adjacent protrusions 132a along the first direction Y, and the fourth distance G4 is 0.5 μm or more and 50 mm or less (0.5 μm≦G4≦50 mm). In the example of Fig. 3, the second protective portion 132 has a first edge 132b and a second edge 132c along the first direction Y, and the first edge 132b is closer to the first protective portion 131 than the second edge 132c. There is a fifth distance G5 between the first edge 132b and the second edge 132c, and the fifth distance G5 is 0.5 μm or more and 50 mm or less (0.5 μm≦G5≦50 mm).
[0020] Next, as shown in Figures 2, 3, 5 and 6, when the circuit board tape T2 is transported or wound up, the second protective portion 132 provided in the third region 111c and the third lead portion 123 is higher than the circuit 120, thereby preventing foreign matter remaining on the circuit board 100 (not shown, for example, metal particles / scrap, ink particles / scrap, etc. generated in the process environment) from rubbing against the outer leads 121b of the first lead portion 121, the second lead portion 122, and the test pads 123a of the third lead portion 123, and also preventing the outer leads 121b of the first lead portion 121, the second lead portion 122, and the test pads 123a of the third lead portion 123 from being compressed, which would result in the formation of whiskers.
[0021] The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope of the claims. Embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included in the technical scope of the present invention. [Explanation of symbols]
[0022] 10 Circuit Board Unit 11 Circuit Board 12 circuits 12a Inner Lead 12b outer lead 12c test pad 13 Protective layer 100 Circuit Boards 100a Part not to be removed 100b Part to be removed 110 Substrate 111 Surface 111a 1st area 111b 2nd area 111c 3rd area 120 circuits 120a copper layer 120b Tin layer 121 First lead part 121a Inner Lead 121b outer lead 122 Second lead part 123 Third Lead Part 123a Test Pad 123b Top surface 123c side 130 Protective layer 131 1st Protection Department 132 2nd Protection Department 132a Convex body 132b First Edge 132c 2nd Edge 133 Hollow part 140 Prescribed cut line G1 1st distance G2 2nd distance G3 3rd distance G4 4th distance G5 5th distance T1 Circuit Board Tape T2 Circuit Board Tape X 2nd direction Y 1st direction
Claims
1. a substrate having a surface on which a first region, a second region, and a third region are defined, the second region being located between the first region and the third region along a first direction in which the circuit board is transported; a plurality of circuits, each of the circuits having a first lead portion provided in the first region, a second lead portion provided in the second region, and a third lead portion provided in the third region, the first lead portion having an inner lead and an outer lead, the second lead portion being located between the first lead portion and the third lead portion, and the second lead portion being connected to the outer lead and the third lead portion; a protective layer that covers the first lead portion and the third lead portion, but does not cover the second lead portion, the inner lead, or the outer lead.
2. the protective layer has a first protective portion, at least one second protective portion, and a hollow portion; 2. The circuit board according to claim 1, wherein the hollow portion is located between the first protective portion and the second protective portion, the first protective portion covers the first lead portion but not the inner lead and the outer lead, the second protective portion covers the third lead portion, the outer lead and the second lead portion are exposed in the hollow portion, a predetermined cut line passes through the hollow portion and is located between the first protective portion and the second protective portion, the circuit board is divided into a portion that will not be removed and a portion that will be removed, the outer lead is located between the first protective portion and the predetermined cut line, the first lead portion and the first protective portion covering the first lead portion are located in the portion that will not be removed, and the second protective portion covering the second lead portion, the third lead portion, and the third lead portion are located in the portion that will be removed.
3. 3. The circuit board according to claim 2, wherein the second protective portion does not cover the test pad of the third lead portion.
4. 3. The circuit board according to claim 2, wherein the protective layer has two second protective portions, and the first protective portion is located between the second protective portions.
5. 3. The circuit board according to claim 2, wherein a first distance is defined between the first protective portion and the second protective portion along the first direction, and the first distance is equal to or greater than 0.5 μm and equal to or less than 2 μm.
6. 6. The circuit board of claim 5, wherein the second protective portion does not cover the test pad of the third lead portion, and a second distance is defined between the second protective portion and the end of the test pad along the first direction, and the second distance is 0.5 μm or more and 2 μm or less.
7. The circuit board according to claim 2 , wherein the second protection portion extends along a second direction intersecting the first direction.
8. 3. The circuit board according to claim 2, wherein the second protective portion has a plurality of protrusions, and a third distance is defined between adjacent protrusions along a second direction intersecting the first direction, and the third distance is equal to or greater than 0.5 μm and equal to or less than 158 mm.
9. 9. The circuit board according to claim 2, 3, or 8, wherein the second protective portion includes a plurality of protrusions, and a fourth distance is defined between adjacent protrusions along the first direction, and the fourth distance is equal to or greater than 0.5 μm and equal to or less than 50 mm.
10. The circuit board according to claim 2, characterized in that the second protective portion covers the upper and side surfaces of the third lead portions and also covers the surface of the substrate located between adjacent third lead portions, and the second protective portion covering the upper surfaces of the third lead portions has a thickness, the thickness being 0.5 μm or more and 50 μm or less.
11. 11. The circuit board according to claim 10, wherein each of the circuits has a copper layer and a tin layer, the tin layer being located between the copper layer and the second protective portion.
12. 3. The circuit board according to claim 2, wherein the second protective portion has a first edge and a second edge, the first edge is closer to the first protective portion than the second edge, a fifth distance is defined between the first edge and the second edge, and the fifth distance is 0.5 μm or more and 50 μm or less.
Citation Information
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