Component built-in wiring board

Abstract

To improve connection reliability of a component built-in wiring board.SOLUTION: A component built-in wiring board includes a core substrate which has a first surface and a second surface opposite to the first surface, and an opening penetrating to the second surface from the first surface, an electronic component inserted into the opening, a first build-up part arranged on the first surface, a second build-up part which includes an insulation layer and is arranged on the second surface, a first resin part embedding a part on the first surface side of the opening, and a second resin part which is composed of a partial resin of the insulation layer, and embeds the remainder on the second surface side of the opening, wherein a via conductor connected to the electronic component is formed in the second resin part and the insulation layer.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a wiring board with built-in components. [Background technology]

[0002] Patent Document 1 discloses a wiring board structure that includes a core substrate having an opening, a plurality of electronic components arranged in the opening while spaced apart from each other with gaps therebetween, and a build-up portion arranged on the core substrate and the electronic components, the gaps being filled with resin. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2003-147049 Summary of the Invention [Problem to be solved by the invention]

[0004] In a component-embedded wiring board including a build-up portion, when via conductors are formed in resin, there are concerns about connection reliability. [Means for solving the problem]

[0005] The component-embedded wiring board of the present disclosure is a component-embedded wiring board comprising: a core substrate having a first surface and a second surface opposite the first surface and having an opening penetrating from the first surface to the second surface; an electronic component inserted inside the opening; a first build-up portion arranged on the first surface; a second build-up portion including an insulating layer and arranged on the second surface; a first resin portion filling a portion of the first surface side of the opening; and a second resin portion composed of some of the resin of the insulating layer and filling the remaining portion of the second surface side of the opening, wherein via conductors connected to the electronic component are formed in the second resin portion and the insulating layer.

[0006] The component-built-in wiring board of the present disclosure achieves both ease of via conductor formation and connection reliability, compared to a configuration in which the opening is filled only with the first resin portion. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is a cross-sectional view showing a cut-out portion of a component-embedded wiring board according to an embodiment of the present disclosure. [Figure 2] FIG. 2 is a cross-sectional view illustrating a core insulation layer according to an embodiment of the present disclosure. [Figure 3] 10 is a cross-sectional view showing a state in which an opening is formed in a core insulating layer according to an embodiment of the present disclosure and the manufacturing of a core substrate has begun. [Figure 4] 1 is a cross-sectional view showing a state in which a first component and a second component are placed in an opening of an embodiment of the present disclosure. [Figure 5] 10 is a cross-sectional view of a state in which a first surface side resin portion is embedded in an opening of the embodiment of the present disclosure. FIG. [Figure 6] FIG. 10 is a cross-sectional view of the state in which a second-surface-side resin portion is embedded in the opening of the embodiment of the present disclosure. [Figure 7] 1 is a cross-sectional view of a core substrate according to an embodiment of the present disclosure turned upside down, with an interlayer insulating layer laminated thereon as a build-up portion. DETAILED DESCRIPTION OF THE INVENTION

[0008] Next, embodiments of the present disclosure will be described in detail with reference to the drawings.

[0009] FIG. 1 is a cross-sectional view showing a part of a component-embedded wiring board 10 according to an embodiment of the present disclosure (hereinafter referred to as "the present embodiment").

[0010] As shown in FIG. 1, the component-embedded wiring board 10 of this embodiment has a core substrate 20 having a first surface 20F and a second surface 20B opposite the first surface, a build-up portion 22 as a first build-up portion arranged on the first surface 20F of the core substrate 20, and a build-up portion 21 as a second build-up portion arranged on the second surface 20B of the core substrate 20.

[0011] Hereinafter, for convenience in the thickness direction of component-embedded wiring board 10, the side farther from core insulating layer 70 may be referred to as the upper side, upper direction, or top, and the side closer to core insulating layer 70 may be referred to as the lower side, lower direction, or bottom.

[0012] Buildup sections 21 and 22 each have a plurality of stacked interlayer insulating layers 50, a plurality of conductor patterns 81 and 82 formed between the plurality of interlayer insulating layers 50, and a plurality of via conductors 60 formed to penetrate at least interlayer insulating layer 50. Interlayer insulating layer 50 is an example of an insulating layer. Buildup sections 21 and 22 are disposed on core substrate 20 so as to cover openings 27, which will be described later.

[0013] The core substrate 20 has a structure in which the through-hole conductors 36, the conductor patterns 81 and 82, and the opening 27 are formed in the core insulating layer 70. That is, the core substrate 20 has the opening 27. As shown in FIG. 2 , the core insulating layer 70 is composed of an insulating substrate 30 and resin layers 42 and 41 formed on the first surface 20F and the second surface 20B opposite the first surface 20F of the insulating substrate 30, respectively. The resin layers 41 and 42 are formed using a thermosetting resin sheet, for example, a prepreg. In this embodiment, the insulating substrate 30 contains a reinforcing material 25 to ensure the strength of the core substrate 20 as a whole, but the insulating substrate 30 does not necessarily need to contain the reinforcing material 25.

[0014] As shown in FIG. 1, the through-hole conductor 36 is formed by forming a metal plating film such as copper plating on the inner wall of a through hole in the insulating substrate 30, filling the inside with resin, and then applying cap plating to the end surface.

[0015] A plurality of conductor patterns 81, 82, which are conductor layers, are formed on the resin layers 41, 42, respectively. These plurality of conductor patterns 81, 82 are formed by plating on the resin layer 41 formed on the second surface 20B of the insulating substrate 30 and the resin layer 42 formed on the first surface 20F, respectively.

[0016] Via conductors 60 are formed on the first surface 20F side and the second surface 20B side of the through-hole conductor 36. These via conductors 60 are formed by filling through holes formed in the resin layers 42 and 41 with plating, respectively.

[0017] A part of the conductor pattern 81 and a part of the conductor pattern 82 are configured to be electrically connected via the through-hole conductors 36 and the conductor patterns on both sides of the insulating substrate 30 (not shown).

[0018] As shown in FIG. 1, opening 27 penetrates core substrate 20 from first surface 20F to second surface 20B by a distance equal to height H of core substrate 20. Height H (depth of opening 27) is, for example, 1.0 mm or more and 2.0 mm or less, but is not limited thereto. Multiple electronic components 90 are inserted into opening 27. With multiple electronic components 90 inserted, opening 27 is filled with first-surface-side resin portion 44 and second-surface-side resin portion 46. First-surface-side resin portion 44 and second-surface-side resin portion 46 are examples of a first resin portion and a second resin portion, respectively. Note that the top and bottom of FIGS. 2 to 6 are reversed from the top and bottom of FIGS. 1 and 7.

[0019] 5, the first-surface-side resin portion 44 is formed inside the opening 27 to a height HL from the bottom surface, with the first surface 20F of the core substrate 20 as the bottom surface. In other words, the first-surface-side resin portion 44 fills a part of the opening 27 on the first surface 20F side. Details of the height HL will be described later. The resin that constitutes the first-surface-side resin portion 44 is determined taking into consideration the thermal expansion coefficient and adhesion to the first component 92 and the second component 96. One example of the resin that constitutes the first-surface-side resin portion 44 is epoxy resin with inorganic filler dispersed therein.

[0020] 1 and 6, the second-surface-side resin portion 46 is formed on the first-surface-side resin portion 44 inside the opening 27. In other words, the second-surface-side resin portion 46 fills the remaining portion on the second surface 20B side of the opening 27. The resin that makes up the second-surface-side resin portion 46 is determined taking into consideration the ease of via formation, and the resin that makes up the second-surface-side resin portion 46 is different from the resin that makes up the first-surface-side resin portion 44.

[0021] 1 , the second-surface-side resin portion 46 is formed together with a portion of the interlayer insulating layer 50 of the build-up portion 21. Via conductors 60 are formed in the second-surface-side resin portion 46 and the interlayer insulating layer 50. The via conductors 60 are formed by filling vias (outer edge portions of the via conductors 60) formed in the second-surface-side resin portion 46 and the interlayer insulating layer 50 on the second-surface-side resin portion 46 side with plating, and the via conductors 60 are electrically connected to the conductor pattern 81.

[0022] The resin that constitutes the first-surface-side resin portion 44 has a smaller thermal expansion coefficient than the resin that constitutes the second-surface-side resin portion 46. The first surface 20F and the second surface 20B of the core substrate 20 are each in contact with an interlayer insulating layer 50. The resin that constitutes the second-surface-side resin portion 46 is the same resin as the interlayer insulating layer 50 of the buildup portions 21 and 22, but the resin that constitutes the first-surface-side resin portion 44 is different from the resin that constitutes the interlayer insulating layer 50 of the buildup portions 21 and 22. Note that since the buildup portion 21 is different from the buildup portion 22, the conductor patterns 81 and 82 are also different from each other.

[0023] The plurality of electronic components 90 includes at least a first component 92 and a second component 96. The plurality of electronic components 90 are, for example, passive components such as capacitors and inductors, or semiconductor elements.

[0024] As shown in Fig. 4, the first component 92 is box-shaped with a rectangular cross section, and has a bottom surface 92B and a top surface 92F that is positioned at a first height H1 from the bottom surface 92B and is formed along the bottom surface 92B. A pair of terminals 94 are arranged on the bottom surface 92B of the first component 92, but no terminals are formed on the top surface 92F. The terminals 94 are arranged flush with the first surface 20F, and are electrically connected to the conductive pattern 82 or the via conductor 60 (see Fig. 1). The height of the first component 92 is HL.

[0025] The second component 96 is box-shaped with a rectangular cross section and has a bottom surface 96B and a top surface 96F located at a second height H2 from the bottom surface 96B and formed along the bottom surface 96B. In this embodiment, the second height H2 is higher than the first heights H1 and HL. That is, the first component 92 and the second component 96 have different heights. The second height H2 is lower than the height (thickness) H of the core substrate 20 (see FIG. 1), that is, a height that fits inside the core substrate 20. The second component 96 has a pair of terminals 98 disposed on the bottom surface 96B and a pair of terminals 99 disposed on the top surface 96F. In this embodiment, as shown in FIG. 1, the terminal surfaces 98A of the terminals 98 are disposed flush with the first surface 20F, and the terminals 98 are electrically connected to the conductive pattern 82 or the via conductors 60. The terminals 99 are electrically connected to the via conductors 60.

[0026] As shown in FIG. 4 , the first component 92 and the second component 96 are inserted into the opening 27 while being separated by a gap D. Here, the height HL at which the first-surface-side resin portion 44 fills the opening 27 needs only to be 75% or more of the first height H1. Furthermore, the height HL is preferably equal to or greater than the height of the first component 92, and more preferably less than the height of the second component 96. For example, the height HL is 50% or more and 80% or less of the depth of the opening 27, but is not limited to this. Regarding the upper limit of the height HL, when there are multiple electronic components having terminals on the second surface 20B side, the height HL is preferably less than the height of the shortest electronic component among the multiple electronic components.

[0027] Next, a method for manufacturing component built-in wiring board 10 of this embodiment will be described.

[0028] (cavity formation) As shown in FIG. 3, an opening 27 is formed in the core substrate 20 .

[0029] 4, adhesive tape T is attached to the end face of conductive pattern 82 of core substrate 20 so that the adhesive surface faces conductive pattern 82. Additionally, multiple electronic components 90 are prepared. The multiple electronic components 90 are inserted into opening 27 from the terminal surface 94A side and the terminal surface 98A side. When inserting the multiple electronic components 90 into opening 27, they are inserted so that they are flush with the adhesive surface of adhesive tape T.

[0030] 5, opening 27 is filled with resin that forms first-surface-side resin portion 44. When the resin solidifies to form first-surface-side resin portion 44, a portion of the lower side of opening 27 is filled with first-surface-side resin portion 44, and multiple electronic components 90 are fixed inside opening 27 on the first surface 20F side of opening 27.

[0031] 6, the area above the first-surface-side resin portion 44 inside the opening 27 is filled with resin that forms the second-surface-side resin portion 46 and the interlayer insulating layer 50. The resin solidifies to form the second-surface-side resin portion 46, and the remaining portion of the opening 27 on the second surface 20B side is filled with the second-surface-side resin portion 46, and the multiple electronic components 90 are fixed inside the opening 27. The resin solidifies on the second surface 20B to form the interlayer insulating layer 50, and the interlayer insulating layer 50 is disposed on the second surface 20B.

[0032] Next, the adhesive tape T is peeled off from the core substrate 20 on which the multiple electronic components 90 are fixed, and an inverted core substrate 20 is prepared. Note that, unlike FIGS. 2 to 6, FIG. 7 shows the first surface 20F and the second surface 20B in the upside-down positions. As shown in FIG. 7, one interlayer insulating layer 50 is laminated on the first surface 20F of the core substrate 20. After lamination, vias are formed in the interlayer insulating layer 50 on the first surface 20F side and in the interlayer insulating layer 50 and second-surface-side resin portion 46 on the second surface 20B side, respectively, and then the terminals of the first component 92 and the second component 96 are electrically connected to the via conductors 60 and the conductive patterns 82 and 81, respectively. In this embodiment, vias penetrating the interlayer insulating layer 50 and the second-surface-side resin portion 46 on the second surface 20B side are formed in a single process, so that the via conductors 60 and the conductive pattern 81 are integrally formed.

[0033] As described above, multiple interlayer insulating layers 50 are stacked in accordance with the product specifications. Finally, component-embedded wiring board 10 is manufactured together with core substrate 20 as build-up sections 21 and 22.

[0034] According to this embodiment, compared to a configuration in which the opening 27 is filled only with the first-surface-side resin portion 44, both ease of via conductor formation and connection reliability are achieved.

[0035] Next, in this embodiment, multiple electronic components 90 in component-built-in wiring board 10 have different heights H1 from bottom surface 92B to top surface 92F and H2 from bottom surface 96B to top surface 96F. This configuration improves design freedom compared to a configuration in which multiple electronic components have the same height.

[0036] Furthermore, in this embodiment, buildup portions 21, 22 in component-embedded wiring board 10 have interlayer insulating layer 50, and second-surface-side resin portion 46 is made of the same resin as interlayer insulating layer 50. This configuration provides more stable quality than a configuration in which second-surface-side resin portion 46 and interlayer insulating layer 50 are different.

[0037] Furthermore, in this embodiment, first-surface-side resin portion 44 of component-embedded wiring board 10 has a smaller thermal expansion coefficient than second-surface-side resin portion 46. This configuration results in more stable quality than a configuration in which first-surface-side resin portion 44 has the same or larger thermal expansion coefficient than second-surface-side resin portion 46.

[0038] Furthermore, in component-built-in wiring board 10 of the present embodiment, opening 27 has a depth of 1.0 mm or more and 2.0 mm or less. With this configuration, even if opening 27 is deep, first-surface-side resin portion 44 and second-surface-side resin portion 46 can reliably fill opening 27.

[0039] In component-built-in wiring board 10 of the present embodiment, height HL of first-surface-side resin portion 44 is 50% or more and 80% or less of the depth of opening 27. With this configuration, the capacity of second-surface-side resin portion 46 can be relatively small compared to the capacity of first-surface-side resin portion 44, thereby suppressing the occurrence of depressions and the like on the second surface of interlayer insulating layer 50.

[0040] Although the present disclosure has been described in detail above with respect to specific embodiments, it will be apparent to those skilled in the art that the present disclosure is not limited to such embodiments and that various other embodiments of the present disclosure are possible within the scope of the present disclosure. For example, there are the following modifications, but the present disclosure is not limited to these.

[0041] (Variation) (Presence or absence of terminals on multiple electronic components) Although the first component 92 has been configured such that no terminals are arranged on the top surface 92F, this is not limiting. Terminals may be arranged on the top surface 92F of the first component 92. Although the second component 96 has been configured such that terminals 99 are arranged on the top surface 96F, this is not limiting. Terminals may also be arranged on the top surface 96F of the second component 96.

[0042] Although the first part 92 and the second part 96 are both box-shaped with rectangular cross sections, the present invention is not limited to this. The first part 92 and the second part 96 may be different in size or shape, and the first part 92 and the second part 96 may be inserted into the opening 27 in a connected state. [Explanation of symbols]

[0043] 10. Component-embedded wiring board 20 Core Board 21, 22 Build-up section 27 Opening 30 Insulating substrate 41, 42 Resin layer 44 First surface side resin portion (an example of the first resin portion) 46 Second surface side resin portion (an example of the second resin portion) 50 Interlayer insulating layer (an example of an insulating layer) 60 via conductor 70 Core insulation layer 90 Multiple Electronic Components 92 First Part 92B Bottom 92F top 94 terminals 96 2nd Part 96B Bottom 96F Top Terminals 98 and 99

Claims

1. a core substrate having a first surface and a second surface opposite to the first surface, the core substrate having an opening penetrating from the first surface to the second surface; an electronic component to be inserted inside the opening; a first buildup portion disposed on the first surface; a second buildup portion including an insulating layer and disposed on the second surface; a first resin portion that fills a portion of the opening on the first surface side; a second resin portion that is formed of a portion of the resin of the insulating layer and fills the remaining portion of the opening on the second surface side; A component-embedded wiring board comprising: Via conductors connected to the electronic component are formed in the second resin portion and the insulating layer.

2. 2. The component-embedded wiring board according to claim 1, The electronic component is made up of a plurality of components, They are different heights.

3. 2. The component-embedded wiring board according to claim 1, The first resin portion has a smaller thermal expansion coefficient than the second resin portion.

4. 2. The component-embedded wiring board according to claim 1, The depth of the opening is not less than 1.0 mm and not more than 2.0 mm.

5. 2. The component-embedded wiring board according to claim 1, The height of the first resin portion from the first surface is 50% or more and 80% or less of the depth of the opening.

6. 2. The component-embedded wiring board according to claim 1, The resin constituting the first resin portion is different from the resin constituting the insulating layer included in the first buildup portion.

7. 2. The component-embedded wiring board according to claim 1, Via conductors connected to the electronic components are formed in the insulating layer included in the first buildup section.

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