Crystal oscillator structure having internal etched region and wafer-level-package structure of crystal oscillator

Abstract

To achieve better impedance and device characteristics by forming an etched region at the inside of a crystal oscillator structure and reducing frequency offset after encapsulation.SOLUTION: A crystal oscillator structure having an internal etched region and a wafer-level-package structure of a crystal oscillator include a package base, a crystal oscillator and an upper lid body. An etched region is formed at the inside of the crystal oscillator, the region is formed to penetrate between an upper surface and a lower surface of the crystal oscillator, and the etched region separates a main vibration region and a region adjacent thereto. The package base includes an upper plane, the upper lid body has a lower plane, the crystal oscillator is disposed between the upper plane and the lower surface, and an upper cavity and a lower cavity which are sealed are formed between the package base and the upper lid body. An upper seal ring and a lower seal ring are provided around the crystal oscillator in a ring so that the crystal oscillator is sealed tightly.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present invention relates to a wafer-level package (WLP) structure for a quartz crystal unit, and more particularly to a wafer-level package structure designed with an etched-away region formed between the upper and lower surfaces of the quartz crystal unit structure. [Background technology]

[0002] In line with the trend toward system integration, clock components are now installed in various electronic systems, and integrating clock components with sensing elements into electronic systems has been the mainstream of semiconductor packaging technology. Using a quartz crystal element as an oscillator is currently one of the best options in terms of accuracy and stability, so in current practice, quartz crystal units are often used for clock components. According to the International Electrotechnical Commission (IEC), there are four categories of quartz crystal oscillators: Simple Package Crystal Oscillators (SPXO), Voltage Controlled Crystal Oscillators (VCXO), Temperature Compensated Crystal Oscillators (TCXO), and Oven Controlled Crystal Oscillators (OCXO). With the rapid development of the electronics industry, research and development of electronic products is moving in the direction of multi-functionality, high performance, and light weight. In order to meet the packaging requirements for higher integration and miniaturization of semiconductor IC chips, previous packaging technology is no longer sufficient.

[0003] Generally, with the miniaturization of semiconductor piezoelectric devices, existing technologies mainly involve packaging the quartz crystal unit and integrated circuit with ceramic materials and then electrically connecting them. However, considering the risk of the packaging material being thermally melted, which could cause a short circuit in the device, or the risk of the quartz crystal unit tilting downward and contacting the base, many existing packaging structures have a cavity on the surface of the lower base, which houses the quartz crystal unit. However, due to the limited space of the cavity and the limitations of the process capability of the lower base, the contact area of ​​the electrical unit required in the manufacturing process of the piezoelectric element is very small, which makes it difficult to test the piezoelectric element in the testing process and reduces the test yield.

[0004] Furthermore, existing wafer-level packaging (WLP) technologies are generally defined as those that perform most or all of the packaging test procedures directly on the wafer, followed by singulation. Among these, redistribution and conductive bumping technologies have become common options for signal I / O wiring layout. Due to its advantages of smaller package size and improved electrical performance, WLP is currently widely used in packaging consumer ICs, which require thinner, lighter, and smaller products. As consumer demands for lighter, thinner, shorter, and smaller electronic products increase, the size of each element within the electronic package structure is also shrinking. To significantly reduce the drawbacks and limitations of traditional 2D packaging technologies, the packaging industry and research institutes have been actively developing 3D packaging technologies in recent years. In the 3D packaging field, through-silicon via (TSV) technology has become a prominent technology due to its ability to effectively connect chips across the thickness and shorten transmission distances. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] U.S. Patent No. 7,608,986 Summary of the Invention [Problem to be solved by the invention]

[0006] However, due to the shrinking feature size, there are still problems that need to be overcome, such as mismatches in the thermal expansion coefficients of materials within the structure, heat dissipation problems under temperature loads, and thermal stress concentrations within the package structure. Therefore, taking into account the numerous issues listed above, multifaceted consideration is required. The inventors of the present invention recognized that the above-mentioned drawbacks could be improved, and based on their many years of experience in this field, through careful observation, research, and theoretical application, have proposed the present invention, which provides a novel design and effective method for resolving the above drawbacks. This invention is a novel quartz crystal resonator structure and a wafer-level package structure in which the same is formed. The specific structure and implementation method are described in detail below. [Means for solving the problem]

[0007] To solve the problems of the prior art, the present invention provides an improved quartz crystal resonator structure. This is a new type of quartz crystal resonator structure with an etched-away region formed therein. The quartz crystal resonator structure with the etched-away region includes a main vibration region (the region that primarily vibrates in the quartz crystal resonator), a first adjacent region disposed adjacent to one side of the main vibration region, and a second adjacent region disposed adjacent to the other side of the main vibration region, corresponding to the first adjacent region. The main vibration region has an upper surface and a lower surface opposite the upper surface. The maximum thicknesses of the first and second adjacent regions are greater than the quartz thickness of the main vibration region, so that an upper cavity is formed between the upper top surfaces of the first and second adjacent regions and the upper surface of the main vibration region, and a lower cavity is formed between the lower bottom surfaces of the first and second adjacent regions and the lower surface of the main vibration region.

[0008] At least one etched-off (CUT-OFF) region is formed between the main vibration region and the first adjacent region or the second adjacent region adjacent thereto, thereby separating the main vibration region from the first adjacent region or the second adjacent region located on both sides thereof.

[0009] According to the present invention, the etched-away region is formed using a dry etching process or a wet etching process.

[0010] Specifically, according to one embodiment of the present invention, the etched-away region is formed between the main vibration region and the first adjacent region, thereby separating the main vibration region from the first adjacent region.

[0011] Alternatively, according to another embodiment of the present invention, the etched-away region is formed between the other side of the main vibration region and the second adjacent region, thereby separating the main vibration region from the second adjacent region.

[0012] Alternatively, according to yet another embodiment of the present invention, it is possible to select an etching-removed region formed within the quartz crystal oscillator structure of the present invention to be formed between the main vibration region and the first adjacent region, and at the same time, between the main vibration region and the second adjacent region, thereby forming a gap between the main vibration region and the first adjacent region, and at the same time, forming a gap between the main vibration region and the second adjacent region.

[0013] In practice, the etched-away region formed in the present invention extends from the upper surface of the main vibration region of the quartz crystal resonator structure to its lower surface, thereby forming a penetration between the upper and lower surfaces of the quartz crystal resonator structure. Furthermore, according to a possible embodiment of the present invention, specifically, the etched-away width of the etched-away region can be selectively adjusted. For example, in one embodiment, when the etched-away region has a first etched-away width, the first adjacent region or the second adjacent region is designed to have a protrusion on one side closer to the main vibration region. On the other hand, when the etched-away region has a second etched-away width, the first adjacent region or the second adjacent region is designed to have a linear shape on one side closer to the main vibration region, and the second etched-away width is larger than the first etched-away width. Therefore, the formed etched-away region has an adjustable etched-away width. That is, the side closer to the main vibration region of the first adjacent region or the second adjacent region can have different edge shapes, such as a protrusion, a linear shape, or even an internal recess structure. However, the present invention is not limited to these embodiments. In another possible embodiment of the present invention, the etching-removed region formed inside the quartz crystal resonator structure can also be selected to have a narrower etching width. Considering this, that is, according to the above-mentioned embodiments and their optional alternative embodiments provided in the present invention, it should be noted that the present invention is not limited to the disclosed embodiments. In other words, for those skilled in the art and those with common knowledge and technical background in the present invention, if modifications or alterations are made based on different structural configuration needs without departing from the scope of the present invention, the modified embodiments and / or implementation modes of the quartz crystal resonator structure still fall within the scope of the claims of the present invention.

[0014] The present invention also discloses a novel wafer-level packaging structure for crystal oscillators. The purpose of this novel wafer-level packaging structure is to complete the packaging of the crystal oscillator structure by adopting a planar design for the package base and top cover. This effectively avoids the process capability limitations of the bottom cover in the prior art, while also resolving the problem of the contact area between the piezoelectric material electrical unit and the bottom cover being too small to perform testing. According to the present invention, this novel wafer-level packaging structure includes a package base (bottom layer), a top cover (capping layer), and a crystal oscillator (oscillator crystal). The package base has an upper flat surface, the top cover has a lower flat surface, and the crystal oscillator is disposed between the package base and the top cover, and the crystal oscillator contacts the upper flat surface of the package base and the lower flat surface of the top cover. The crystal unit includes a main vibration region, a first adjacent region, and a second adjacent region, the main vibration region having an upper surface and a lower surface opposite to the upper surface, the first adjacent region being disposed adjacent to one side of the main vibration region, the second adjacent region corresponding to the first adjacent region, and the second adjacent region being disposed adjacent to the other side of the main vibration region. The maximum thicknesses of the first adjacent region and the second adjacent region are greater than the crystal thickness of the main vibration region, so that an upper cavity is formed between upper top surfaces of the first adjacent region and the second adjacent region and the upper surface of the main vibration region, and a lower cavity is formed between lower bottom surfaces of the first adjacent region and the second adjacent region and the lower surface of the main vibration region. At least one etched-out region is formed between the main vibration region and the first adjacent region or the second adjacent region adjacent thereto, thereby separating the main vibration region from the first adjacent region or the second adjacent region located on both sides thereof. At the same time, a sealed upper cavity is formed between the upper surface of the main vibration region and the lower plane of the upper cover, and a sealed lower cavity is formed between the lower surface of the main vibration region and the upper plane of the package base, thereby completing the packaging of the crystal unit.

[0015] Specifically, according to an embodiment of the present invention, an upper seal ring is further formed between the lower flat surface of the upper cover and the crystal unit, and a lower seal ring is further formed between the upper flat surface of the package base and the crystal unit, and the upper seal ring and the lower seal ring are each arranged in a ring shape around the crystal unit, thereby sealing the crystal unit between the upper cover and the package base via the upper seal ring and the lower seal ring.

[0016] In detail, the upper sealing ring is formed between the lower flat surface of the upper cover and the upper top surfaces of the first adjacent region and the second adjacent region of the quartz crystal unit, the lower sealing ring is formed between the upper flat surface of the package base and the lower bottom surfaces of the first adjacent region and the second adjacent region of the quartz crystal unit, and the upper sealing ring and the lower sealing ring are each arranged in annular shapes around the main vibration region of the quartz crystal unit.

[0017] The upper sealing ring and the lower sealing ring each include two interface metal layers and one bonding metal layer. The interface metal layer in the upper sealing ring connects to the top surface of the crystal unit and the bottom surface of the upper cover, respectively. The interface metal layer in the lower sealing ring connects to the bottom surface of the crystal unit and the top surface of the package base, respectively. A diffusion barrier layer is formed between each interface metal layer and the bonding metal layer. The diffusion barrier layer is made of, for example, ruthenium (Ru), titanium (Ti), or an alloy thereof (Ru-Ti alloy), an organic polymer, or an oxide.

[0018] For example, the material of the interface metal layer may be chromium (Cr), and the material of the bonding metal layer may be gold (Au), tin (Sn), or an alloy thereof (Au-Sn alloy). Another object of the present invention is to provide a wafer-level package structure for a quartz crystal unit, in which a diffusion barrier layer is provided between the interface metal layer and the bonding metal layer in the sealing ring, and the material of the diffusion barrier layer is ruthenium, titanium, or an alloy thereof, an organic polymer, or an oxide, thereby avoiding the problem of interface diffusion between the bonding metals.

[0019] Another object of the present invention is to control the thermal expansion coefficients of the top lid, the crystal unit, and the package base to be close to or identical to each other in order to optimize the thermal stress design of the package structure. For example, in a preferred embodiment of the present invention, in order to optimize the stress strength of the package structure, according to one embodiment of the present invention, by selecting a top lid and a package base with similar thermal expansion coefficients, thermal stress problems during hermetic sealing can be further prevented. For example, the thermal expansion coefficients of the top lid and the package base selected in the present invention are 2×10 -7 / K to 9×10 -7 / K. Furthermore, in the wafer level package structure for a crystal unit disclosed in one embodiment of the present invention, the materials for the top cover, the crystal unit, and the package base can all be selected to be quartz (crystal) in order to optimize the stress strength of the package structure.

[0020] The present invention further incorporates through quartz via (TQV) technology to form at least one through metal via, and uses the through metal via to penetrate electrical connections or electrodes through the wafer substrate, thereby enabling high-density connections between crystal chips in the process and providing a more optimal integration technique between front-end wafer fabrication and back-end packaging technology. For example, according to one possible embodiment of the present invention, an upper excitation electrode is formed on the upper surface of the crystal unit of the present invention, a lower excitation electrode is formed on the lower surface, and the upper excitation electrode is disposed in the sealed upper cavity, and the lower excitation electrode is disposed in the sealed lower cavity, respectively. A bottom metal layer is formed on the lower plane of a package base, and at least one via hole is formed through the package base, so that the bottom metal extends upward and fills the at least one via hole to form at least one metal pillar, electrically connecting the upper excitation electrode, the lower excitation electrode, and the bottom metal layer for signal input and output. In one embodiment, the material of the bottom metal layer is, for example, copper.With the above-mentioned structure arrangement, the present invention realizes effective electrical connection of the wafer level package structure of the crystal resonator. [Effects of the Invention]

[0021] From the above, it is clear that the present invention provides a reliable and precisely designed, innovative, and improved crystal resonator structure and wafer-level packaging structure for the crystal resonator, based on the technical solution of the present invention. The improved crystal resonator structure has at least one etched-away region therein, which separates the main vibrating region from its adjacent region. The etched-away region formed within the crystal resonator structure of the present invention can reduce frequency shift after packaging and achieve better impedance and device characteristics. From these points of view, it is clear that the present invention has many advantages by adopting the crystal resonator and its packaging structure of the present invention, and it is also clear that the technical solution of the present invention is useful and significantly advantageous in improving existing deficiencies compared to existing technologies.

[0022] In order to make the objectives, technical contents, features and effects achieved of the present invention more easily understandable, specific embodiments accompanied with the accompanying drawings will be described in detail below. [Brief explanation of the drawings]

[0023] [Figure 1] 1 is a cross-sectional view of a quartz crystal resonator structure having an etched-away region therein according to a first embodiment of the present invention. [Figure 2] 10 is a cross-sectional view of a quartz crystal resonator structure having an etched-away region therein according to a second embodiment of the present invention. FIG. [Figure 3] FIG. 10 is a cross-sectional view of a quartz crystal resonator structure having an etched-away region therein according to a third embodiment of the present invention. [Figure 4] 2 is a cross-sectional schematic diagram of a wafer level package structure based on the quartz crystal resonator shown in FIG. 1 according to the present invention. [Figure 5] FIG. 2 is a cross-sectional schematic view of an upper sealing ring in one embodiment of the present invention. [Figure 6] FIG. 2 is a cross-sectional schematic view of a lower sealing ring in one embodiment of the present invention. [Figure 7]3 is a cross-sectional schematic diagram of a wafer level package structure based on the quartz crystal resonator shown in FIG. 2 according to the present invention. [Figure 8] 4 is a cross-sectional schematic diagram of a wafer level package structure based on the quartz crystal resonator shown in FIG. 3 according to the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0024] The above detailed description of the present invention and the following embodiments are used to illustrate and explain the spirit and principles of the present invention and provide further interpretation of the claims of the present invention. Reference should be made in detail to the preferred embodiments of the present invention, examples of which are shown in the accompanying drawings. Wherever possible, the same or similar components are designated by the same reference numerals in the accompanying drawings and description of the present invention. It should be understood that in the accompanying drawings, the present invention may be exaggerated in shape and thickness for clarity and convenience, and that elements not specifically shown or described may take various forms known to those skilled in the art. Once the present invention is made public, these alternative and modified exemplary embodiments will become apparent to those skilled in the art.

[0025] The present invention is described below through a number of embodiments in order to explain the technical content and features of the present invention and enable those skilled in the art to understand, make and use the present invention. However, it should be noted that these embodiments are not used to limit the scope of the present invention. Therefore, any equivalent modifications or variations made based on the spirit of the present invention should be included in the protection scope of the present invention.

[0026] Unless otherwise specified, terms and phrases such as "may" and "might" are generally used to convey that embodiments of the invention "have" but may also be construed to include unnecessary features, elements, or steps. In other embodiments, these features, elements, or steps may be unnecessary.

[0027] In the embodiments of the present specification, the phrase "one embodiment" or "in one embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of "one embodiment" or "in one embodiment" in various places in the present specification do not necessarily refer to the same embodiment.

[0028] In the present description and claims, certain terms are used to refer to certain components. It should be understood that those skilled in the art may refer to the same component by different names. This application does not distinguish between components with different names but the same function. In this specification and claims, the word "including" is used in an open-ended manner and should be interpreted to mean "including, but not limited to." The term "connected to" is intended to include an indirect or direct connection. In other words, when this application discloses that a first device connects to a second device, it means that the first device can be connected to the second device directly or indirectly via electrical connection, wireless communication, optical communication, or other wired / wireless signal connection, or by other intermediate facilities or connection methods.

[0029] The present invention will be specifically described through the following embodiments, but these embodiments are merely illustrative. Those skilled in the art can easily make appropriate modifications and changes to the apparatus, method, etc. while maintaining the concepts taught by the present invention. Therefore, the disclosure of the present invention should be construed as limited only by the appended claims. Throughout the patent application and claims, unless expressly stated otherwise, the meanings of "a" and "the" include "one or at least one" of an element or component. Furthermore, throughout the patent application and claims, the singular also includes the description of a plurality of elements or components, unless the context clearly excludes the plural. Throughout the specification and claims, the meaning of "herein" includes the meaning of "in" or "wherein," unless the content clearly stipulates otherwise. Generally, the meaning of each term used in the claims and specification refers to the ordinary meaning known to those skilled in the art, unless a special note is added to indicate its meaning. Some terms used to describe the present invention are mentioned to guide those skilled in the art to understand the present invention. All examples in this specification cannot be used to limit the protection scope of the invention.

[0030] Terms such as "essentially," "about," "approximately," and "approximately" can refer to values ​​within 20%, preferably within 10%, of a certain value or range. Furthermore, quantities or numerical values ​​provided herein may be approximate and, unless otherwise specified, can be described by the above-mentioned terms. When quantities, densities, or other parameters include specified ranges, preferred ranges, or enumerated ideal values, those values ​​can be considered as any number within the specified range.

[0031] As mentioned in the background section above, in order to effectively manufacture a wafer-level package for a quartz crystal unit with excellent device characteristics while maintaining relatively low process complexity, the present invention has been improved in light of these deficiencies and aims to solve these existing problems by proposing a novel and innovative quartz crystal unit structure. A technical feature of the improved quartz crystal unit structure of the present invention is that at least one etched-away region is formed inside the quartz crystal unit. Simulation analysis has shown that a quartz crystal unit with an etched-away region formed inside it can have better internal thermal stress and further reduce frequency shift after packaging of the device. The specific configurations of the quartz crystal unit structure and its wafer-level package structure of the present invention are described in detail below through several modified embodiments for reference.

[0032] First, please refer to Figure 1, which is a cross-sectional view of a quartz crystal resonator structure having an etched-out region therein according to a first embodiment of the present invention. As shown in Figure 1, the quartz crystal structure of the quartz crystal resonator 11 mainly includes a main vibration region 210 (the region that mainly vibrates in the quartz crystal resonator 11), a first adjacent region 211, and a second adjacent region 212. Here, the main vibration region 210 has an upper surface 311 and a lower surface 312 opposite to the upper surface 311. The first adjacent region 211 is disposed adjacent to one side of the main vibration region 210, and the second adjacent region 212 is disposed adjacent to the other side of the main vibration region 210, corresponding to the first adjacent region 211. As shown in FIG. 1, the first adjacent region 211 and the second adjacent region 212 have an upper top surface 411 and a lower bottom surface 412, and the maximum thickness D12 of the first adjacent region 211 and the second adjacent region 212 is defined between the upper top surface 411 and the lower bottom surface 412. As can be clearly seen from FIG. 1, the maximum thickness D12 of the first adjacent region 211 and the second adjacent region 212 is greater than the crystal thickness D10 of the main vibration region 210, so that an upper cavity 71 is formed between the upper top surfaces 411 of the first adjacent region 211 and the second adjacent region 212 and the upper surface 311 of the main vibration region 210, and at the same time, a lower cavity 72 is formed between the lower bottom surfaces 412 of the first adjacent region 211 and the second adjacent region 212 and the lower surface 312 of the main vibration region 210. Furthermore, since the etched-away region 14A is formed between the main vibration region 210 and the adjacent first adjacent region 211, the main vibration region 210 is separated from the adjacent first adjacent region 211, and the etched-away region 14A separates the main vibration region 210 from the adjacent first adjacent region 211.

[0033] Similarly, the etched-away region 14B is formed between the main vibrating region 210 and the adjacent second adjacent region 212, separating the main vibrating region 210 from the adjacent second adjacent region 212. The quartz crystal unit 11 illustrated in the first embodiment of the present invention has two etched-away regions 14A and 14B formed simultaneously within the quartz crystal unit to explain the technical concept of the present invention. However, the present invention is not limited to this. One or more etched-away regions can be selectively arranged within the quartz crystal unit. A person skilled in the art of the present invention can appropriately modify and select the number, width, and arrangement of the etched-away regions formed within the quartz crystal unit according to actual design specifications and needs. In other words, any modifications or variations based on the spirit of the present invention are still considered to be within the scope of the present invention, and their modifications and equivalent embodiments are also encompassed by the present invention.

[0034] Specifically, the etched-away regions 14A and 14B formed by the design of the present invention extend from the upper surface 311 to the lower surface 312 of the quartz crystal unit 11, thereby forming a through-hole between the upper surface 311 and the lower surface 312. Generally, the etched-away regions 14A and 14B can be formed by, for example, a dry etching process or a wet etching process. Furthermore, the etched-away regions 14A and 14B designed and employed by the present invention can selectively adjust their etched-away widths. Taking the embodiment shown in FIG. 1 as an example, if the etched-away region 14A has a first etched-away width W1 and the etched-away region 14B has a second etched-away width W2, the first adjacent region 211 has a protrusion P1 on one side closer to the main vibrating region 210, and the second adjacent region 212 has a protrusion P2 on one side closer to the main vibrating region 210. These etched-away widths are adjustable. Please refer to FIG. 2, which is a cross-sectional view of a quartz crystal unit structure having an etched-away region therein according to a second embodiment of the present invention. 2, similar to the previous embodiment, the quartz crystal resonator 12 includes a main vibration region 210, a first adjacent region 211, a second adjacent region 212, an upper cavity 71, a lower cavity 72, and two etched-off regions 14A and 14B, but a description thereof will be omitted here. However, what differs from the previous embodiment is that in the second embodiment of the present invention, the etched-off region 14B may have another etched-off width W2' that is slightly wider than the etched-off width W2. In this case, the protrusion P2' of the second adjacent region 212 in the second embodiment is slightly shorter and has a shallower protrusion width than the protrusion P2 in the first embodiment (FIG. 1).

[0035] Furthermore, FIG. 3 shows a cross-sectional schematic diagram of a quartz crystal resonator structure having an internal etched-away region according to a third embodiment of the present invention. Similar to the first and second embodiments, the quartz crystal resonator 13 shown in FIG. 3 includes a primary vibrating region 210, a first adjacent region 211, a second adjacent region 212, an upper cavity 71, a lower cavity 72, and two etched-away regions 14A and 14B. However, in this third embodiment, the etched-away width W3 of the etched-away region 14B may be further widened so that one side of the second adjacent region 212 closest to the primary vibrating region 210 is linear (no protrusions are formed), which also achieves the same effects of the present invention. The above three embodiments fully illustrate various modifications of the present invention that can incorporate etched-away regions, and it is intended to be understood that the examples herein should not be used to limit the scope of protection of the present invention. Broadly speaking, the present invention improves the crystal structure of a quartz crystal resonator by forming an etched-away region within the quartz crystal resonator structure. In the following paragraphs, the wafer-level packaging structure of the improved crystal resonator structure will be described in detail, and relevant data obtained through simulation analysis and subsequent frequency measurement of the packaging structure will be provided as evidence to prove that the technical solution of the present invention is effective, and can solve the problems of existing technologies such as thermal stress and frequency shift on the wafer-level packaging structure of the crystal resonator, thereby achieving better device characteristics.

[0036] First, please refer to Figure 4, which is a cross-sectional schematic diagram of a wafer-level package structure based on the crystal unit shown in Figure 1 of the present invention. Such a crystal unit wafer-level package structure 616 includes a package base 10, a top cover 30, and the crystal unit 11 of the first embodiment described above. The package for the crystal unit 11 is completed by installing the package base 10 and the top cover 30. According to an embodiment of the present invention, the crystal unit 11 may be, for example, an AT-cut crystal unit, a tuning fork crystal unit, or any other mechanical resonance type unit.

[0037] According to an embodiment of the present invention, the package base 10 has an upper flat surface, the top cover 30 has a lower flat surface, the crystal unit 11 is disposed between the package base 10 and the top cover 30, and the crystal unit 11 contacts the upper flat surface of the package base 10 and the lower surface of the top cover 30. According to a first embodiment of the present invention, the crystal unit 11 mainly includes a main vibrating region 210, a first adjacent region 211, a second adjacent region 212, and one or more etched-out regions 14A and 14B formed therein. Referring to FIG. 1 , an upper cavity 71 is formed between upper top surfaces 411 of the first adjacent region 211 and the second adjacent region 212 and the upper surface 311 of the main vibrating region 210, and a lower cavity 72 is formed between lower bottom surfaces 412 of the first adjacent region 211 and the second adjacent region 212 and the lower surface 312 of the main vibrating region 210. Therefore, when packaging, the sealed upper cavity 71 is further formed between the upper surface 311 of the main vibrating region 210 and the lower plane of the upper cover 30, and at the same time, the sealed lower cavity 72 is formed between the lower surface 312 of the main vibrating region 210 and the upper plane of the package base 10. The internal environment of this sealed state may be, for example, a vacuum or a state filled with helium gas, and the lower plane of the upper cover 30 and the upper plane of the package base 10 are joined to the crystal unit 11 by direct bonding to complete the sealed state, thereby realizing packaging of the wafer-level package structure 616 of the crystal unit 11.

[0038] Generally, an upper electrode is formed on the upper surface of the crystal unit 11, and a lower electrode is formed on the lower surface as excitation electrodes. These electrodes are electrically connected to metal pads on the package base 10 via conductive bumps for exciting the crystal unit 11, thereby causing the crystal unit 11 to vibrate (described in detail later). In one embodiment, the conductive bumps may be, for example, a metal such as gold, copper, tin, silver, indium, or an alloy thereof, or a conductive paste made of silver particles and resin.

[0039] The upper sealing ring 42 is formed between the lower flat surface of the upper cover 30 and the upper top surface 411 of the quartz crystal unit 11, and the lower sealing ring 44 is formed between the upper flat surface of the package base 10 and the lower bottom surface 412 of the quartz crystal unit 11. The upper sealing ring 42 and the lower sealing ring 44 are each annularly disposed around the main vibration region 210 of the quartz crystal unit 11, so that the upper cover 30 and the package base 10 seal the quartz crystal unit 11 via the upper sealing ring 42 and the lower sealing ring 44. In this way, in the present invention, the upper sealing ring 42 of the upper cover 30 and the lower sealing ring 44 of the package base 10 are simultaneously used and bonded to the quartz crystal unit 11, thereby improving airtightness when sealing the quartz crystal unit 11. Furthermore, as shown in the figure, an upper excitation electrode 24 may be formed on the upper surface of the quartz crystal unit 11, and a lower excitation electrode 26 may be formed on the lower surface thereof, thereby vibrating the quartz crystal unit 11. That is, in the embodiment of the present invention shown in FIG. 4, the quartz crystal unit 11 is hermetically sealed by the upper sealing ring 42 and the lower sealing ring 44 using the upper cover 30 and the package base 10, and the internal environment may be, for example, a vacuum or filled with helium gas.

[0040] Based on existing technology, U.S. Patent No. 7,608,986, which deals with "quartz crystal resonators," proposes a wafer-level package configuration in which a sandwich structure is completed by anodic bonding of a blue plate glass top cover and bottom base to the quartz crystal. However, this sandwich structure generates thermal stress in the quartz crystal when the temperature changes due to the different thermal expansion coefficients of the substrate and the quartz crystal. This results in a temperature-dependent frequency shift of the piezoelectric oscillator. Therefore, the cut angle of the quartz crystal and the thermal expansion coefficients of the top cover and bottom base materials must be carefully selected. This issue can only be overcome through special design and consideration, but this significantly increases the labor and financial burden in terms of manufacturing and cost. Despite the aforementioned problems of the prior art, the current ceramic-based package remains plagued by the high product costs, unstable supply, and thermal stress caused by the sandwich structure, and the problem has yet to be effectively resolved. Therefore, in order to optimize the stress strength of the structure, the present invention selects the top cover 30 and the package base 10 having similar thermal expansion coefficients, and further aims to prevent thermal stress problems during hermetic sealing. In detail, the thermal expansion coefficients of the top cover 30 and the package base 10 selected in the present invention are, for example, 2×10 -7 / K to 9×10 -7 / K. Furthermore, in one embodiment of the present invention, in the disclosed wafer-level package structure for a crystal unit, quartz (crystal) can be selected as the material for all of the top cover 30, the crystal unit 11, and the package base 10, thereby achieving an optimal design for the package structure in terms of thermal stress.

[0041] Meanwhile, the upper excitation electrode 24 of the crystal unit 11 is disposed within the sealed upper cavity 71, the lower excitation electrode 26 of the crystal unit 11 is disposed within the sealed lower cavity 72, and a bottom metal layer 28 is formed on the lower surface of the package base 10. The present invention further includes at least one via hole formed through the package base 10, such that the bottom metal layer 28 extends upward and fills the via hole to form at least one metal pillar, thereby electrically connecting the upper excitation electrode 24, the lower excitation electrode 26, and the bottom metal layer 28 to enable signal input / output (I / O). In practice, the bottom metal layer 28 disposed in one embodiment of the present invention may be made of, for example, copper.

[0042] Regarding the installation options for the upper sealing ring 42 and the lower sealing ring 44, please refer to FIG. 5, which is a cross-sectional view of the upper sealing ring 42 according to an embodiment of the present invention, and FIG. 6, which is a cross-sectional view of the lower sealing ring 44 according to an embodiment of the present invention. One of the objectives of the present invention is to avoid the problem of interfacial diffusion between metals. Therefore, as shown in FIG. 5, the upper sealing ring 42 includes two interface metal layers 402 and one bonding metal layer 404. These two interface metal layers 402 are respectively connected to the upper cover 30 and the crystal unit 11. A diffusion barrier layer 406 is further provided between each interface metal layer 402 and the bonding metal layer 404. This diffusion barrier layer 406 is made of a material such as ruthenium, titanium, an alloy thereof, an organic polymer, or an oxide. 6 , the lower sealing ring 44 includes two interface metal layers 402 and one bonding metal layer 404, which are respectively connected to the package base 10 and the crystal unit 11. A diffusion barrier layer 406 is further provided between each interface metal layer 402 and the bonding metal layer 404. The diffusion barrier layer 406 is made of, for example, ruthenium, titanium, an alloy thereof, an organic polymer, or an oxide. The structural arrangement of the interface metal layers 402, the bonding metal layers 404, and the diffusion barrier layer 406 in the present invention can effectively prevent the interface diffusion problem between the upper sealing ring 42 and the lower sealing ring 44.

[0043] Specifically, according to an embodiment of the present invention, the material of the interface metal layer 402 is chromium, and the thickness thereof is, for example, 10 nm. The material of the bonding metal layer 404 is gold, tin, or an alloy thereof, and the thickness thereof is, for example, 30 nm to 70 nm. The thickness of the diffusion barrier layer 406 between the interface metal layer 402 and the bonding metal layer 404 is, for example, 10 nm. Those skilled in the art can adjust these thicknesses according to the actual needs of product manufacturing, but the present invention is not limited to this embodiment.

[0044] FIG. 7 is a cross-sectional view of a wafer-level package structure based on the crystal unit shown in FIG. 2 of the present invention. This crystal unit wafer-level package structure 717 includes a package base 10, a top cover 30, and the crystal unit 12 of the second embodiment described above. The package base 10 and top cover 30 are mounted to complete the packaging of the crystal unit 12. FIG. 8 is a cross-sectional view of a wafer-level package (WLP) structure based on the crystal unit shown in FIG. 3 of the present invention. This crystal unit wafer-level package structure 818 includes a package base 10, a top cover 30, and the crystal unit 13 of the third embodiment described above. The package base 10 and top cover 30 are mounted to complete the packaging of the crystal unit 13. Therefore, according to the technical concept taught by the present invention, a person skilled in the art may modify the design during actual implementation, and all modified designs are within the scope of the present invention. The purpose of illustrating several embodiments of the present invention described in the preceding paragraphs is to explain the main technical features of the present invention so that those skilled in the art can understand and implement it. The present invention is not limited to these exemplary embodiments.

[0045] In consideration of multiple embodiments of the present invention, thermal stress simulation analysis revealed that the internal thermal stress distribution of a wafer-level package structure can be effectively reduced from the conventional 10.99 MPa to 2.41 MPa. This indicates that a structure with an etched-away region formed inside the quartz crystal unit can have a better internal thermal stress distribution. Table 1 also provides a comparative analysis of 76.8 MHz frequency measurements between the prior art quartz crystal unit package structure and the package structure of the present invention formed using a quartz crystal unit with an etched-away region inside.

[0046] [Table 1]

[0047] Table 1 also shows that the structure in which an etched-away region is formed inside the crystal unit according to the technology of the present invention has better device characteristics, including lower impedance and better Q value. In addition, the wafer level package structure formed by the present invention can significantly reduce the problem of frequency shift caused by stress transmission due to external force during frequency measurement.

[0048] Therefore, it is clear that the quartz crystal resonator structure with an internal etched-away region and the wafer-level packaging structure for the quartz crystal resonator of the present invention overcome the manufacturing limitations of the prior art, which require a cavity on the surface of the package base. It also overcomes the limitations of the prior art, which limited the use of ceramic-based packages (including high product costs and unstable supply), and alleviates the thermal stress issues associated with sandwich packaging by selecting a top cover, quartz crystal resonator, and package base made of the same material. Compared to the prior art, the quartz crystal resonator structure with an internal etched-away region of the present invention has superior product device characteristics. Furthermore, by designing a diffusion barrier layer within the sealing ring, it is possible to avoid the drawbacks of interface diffusion in the prior art. Therefore, it is clear that the quartz crystal resonator wafer-level packaging structure of the present invention has excellent industrial applicability and competitiveness. It has also been confirmed that the technical features, method and means, and achieved effects of the present invention are significantly different from existing technical solutions and would not be easily achieved by a person skilled in the art.

[0049] The above-described embodiments are merely illustrative of the technical ideas and features of the present invention, and are intended to enable those skilled in the art to understand and practice the contents of the present invention, and are not intended to limit the patent scope of the present invention. Therefore, all equivalent changes and modifications made based on the spirit of the present invention are included within the patent protection scope of the present invention. [Explanation of symbols]

[0050] 10 package base 11 Crystal unit 12 Crystal unit 13 Crystal unit 14A, 14B Etched-out areas 24 Upper excitation electrode 26 Lower excitation electrode 28 Bottom metal layer 30 Upper lid 42 Upper sealing ring 44 Lower sealing ring 71 Upper cavity 72 Lower cavity 210 Main vibration area 211 First adjacent region 212 Second Adjacent Region 311 Upper surface 312 Bottom surface 402 Interfacial metal layer 404 Bonding metal layer 406 Diffusion Barrier Layer 411 Top surface 412 Bottom surface 616 616: Shion-class enclosure structure 717 Wafer Level Package Structure 818 Wafer Level Package Structure D12 Maximum Thickness D10 Chip Thickness W1, W2, W2', W3 Etching removal width P1, P2, P2' protrusion

Claims

1. a main vibration region, a first adjacent region, and a second adjacent region; the primary vibration region has an upper surface and a lower surface opposite to the upper surface, the first adjacent region is disposed adjacent to one side of the main vibration region, the second adjacent region corresponds to the first adjacent region, and the second adjacent region is disposed adjacent to the other side of the main vibration region; Since the maximum thicknesses of the first adjacent region and the second adjacent region are greater than the quartz thickness of the main vibration region, an upper cavity is formed between the upper top surfaces of the first adjacent region and the second adjacent region and the upper surface of the main vibration region, and a lower cavity is formed between the lower bottom surfaces of the first adjacent region and the second adjacent region and the lower surface of the main vibration region, and at least one etched-off (CUT-OFF) region is formed between the main vibration region and the first adjacent region or the second adjacent region adjacent to the main vibration region, thereby separating the main vibration region from the first adjacent region or the second adjacent region located on both sides of the main vibration region, in a quartz crystal resonator structure having an internal etched-off region.

2. 2. The quartz crystal resonator structure having an etched-away region therein according to claim 1, wherein the etched-away region is formed between the main vibration region and the first adjacent region, thereby separating the main vibration region from the first adjacent region.

3. 2. The quartz crystal resonator structure having an etched-away region therein according to claim 1, wherein the etched-away region is formed between the main vibration region and the second adjacent region, thereby separating the main vibration region from the second adjacent region.

4. 2. The quartz crystal resonator structure having an etched-away region therein according to claim 1, further comprising two etched-away regions, one of which is formed between the main vibration region and the first adjacent region, and the other of which is formed between the main vibration region and the second adjacent region, thereby forming a gap between the main vibration region and the first adjacent region and also between the main vibration region and the second adjacent region.

5. 2. The quartz crystal resonator structure having an etched-away region therein according to claim 1, wherein the at least one etched-away region is formed extending from the upper surface of the main vibration region to the lower surface of the main vibration region, thereby forming a through-hole between the upper surface and the lower surface.

6. 2. The quartz crystal resonator structure having an etched-away region therein according to claim 1, wherein an etched-away width of the at least one etched-away region is selectively adjustable, and when the at least one etched-away region has a first etched-away width, the first adjacent region or the second adjacent region has a protrusion on one side closer to the main vibration region.

7. 7. The quartz crystal resonator structure having an etched-away region therein according to claim 6, wherein when the at least one etched-away region has a second etched-away width, one side of the first adjacent region or the second adjacent region close to the main vibration region is linear.

8. 8. The quartz crystal resonator structure having an etched-away region therein according to claim 7, wherein the second etched-away width is greater than the first etched-away width.

9. 10. The quartz crystal resonator structure having an etched-away region therein according to claim 1, wherein the at least one etched-away region is formed by a dry etching process or a wet etching process.

10. 2. The quartz crystal resonator structure having an internally etched-away region according to claim 1, wherein the material of the quartz crystal resonator structure having an internally etched-away region is quartz.

11. The package includes a package base, an upper cover, and a crystal unit. the package base has a top planar surface; The upper cover has a lower flat surface, the crystal unit is disposed between the package base and the top cover, and the crystal unit is in contact with the upper flat surface of the package base and the lower surface of the top cover, the crystal unit including a main vibration region, a first adjacent region, and a second adjacent region; the primary vibration region has an upper surface and a lower surface opposite to the upper surface, the first adjacent region is disposed adjacent to one side of the main vibration region, the second adjacent region corresponds to the first adjacent region, and the second adjacent region is disposed adjacent to the other side of the main vibration region; and a lower cavity is formed between the lower bottom surfaces of the first adjacent region and the second adjacent region and the lower surface of the main vibration region, and at least one etched-away region is formed between the main vibration region and the first adjacent region or the second adjacent region adjacent to the main vibration region, thereby separating the main vibration region from the first adjacent region or the second adjacent region located on both sides of the main vibration region. The upper cavity is sealed between the upper surface of the main vibration region and the lower flat surface of the upper cover, and the lower cavity is sealed between the lower surface of the main vibration region and the upper flat surface of the package base, thereby completing the packaging of the crystal unit.

12. further comprising an upper sealing ring and a lower sealing ring; the upper sealing ring is formed between the lower flat surface of the upper cover and the upper top surfaces of the first adjacent region and the second adjacent region of the quartz crystal unit; the lower sealing ring is formed between the upper flat surface of the package base and the lower bottom surface of the first adjacent region and the second adjacent region of the crystal unit; 12. The wafer-level packaging structure for a quartz crystal unit according to claim 11, wherein the upper sealing ring and the lower sealing ring are respectively arranged in annular shapes around the main vibration region of the quartz crystal unit, whereby the upper cover and the package base seal the quartz crystal unit via the upper sealing ring and the lower sealing ring.

13. 13. The wafer-level packaging structure for a quartz crystal unit according to claim 12, wherein the upper sealing ring includes two interface metal layers and one bonding metal layer, the two interface metal layers respectively connecting the lower flat surface of the upper cover and the upper top surface of the first adjacent region or the second adjacent region of the quartz crystal unit, and further including a diffusion barrier layer between each of the interface metal layers and the bonding metal layer, the diffusion barrier layer being made of one of the materials of ruthenium, titanium, or an alloy thereof, an organic polymer, or an oxide.

14. 13. The wafer-level packaging structure for a quartz crystal unit according to claim 12, wherein the lower sealing ring comprises two interface metal layers and one bonding metal layer, the two interface metal layers respectively connecting the upper flat surface of the package base and the lower bottom surface of the first adjacent region or the second adjacent region of the quartz crystal unit, and further comprising a diffusion barrier layer between each interface metal layer and the bonding metal layer, the diffusion barrier layer being made of one of the materials of ruthenium, titanium, or an alloy thereof, an organic polymer, or an oxide.

15. 15. The wafer-level packaging structure for a quartz crystal unit according to claim 13 or 14, wherein the material of each of the interface metal layers is chromium.

16. 15. The wafer-level package structure for a quartz crystal unit according to claim 13 or 14, wherein the material of the bonding metal layer is gold, tin, or an alloy thereof.

17. 12. The wafer-level package structure of claim 11, wherein an upper excitation electrode is formed on the upper surface of the crystal unit, a lower excitation electrode is formed on the lower surface of the crystal unit, the upper excitation electrode is disposed in the sealed upper cavity, and the lower excitation electrode is disposed in the sealed lower cavity, respectively. A bottom metal layer is formed on a lower plane of the package base, and at least one via hole is provided through the package base, so that the bottom metal layer extends upward and fills the at least one via hole to form at least one metal pillar, and electrically connects the upper excitation electrode, the lower excitation electrode, and the bottom metal layer to input and output signals.

18. 18. The wafer-level packaging structure for a quartz crystal resonator as claimed in claim 17, wherein the material of the bottom metal layer is copper.

19. The thermal expansion coefficient of the top cover and the package base is 2×10 －７ / K to 9 x 10 －７ 12. The wafer-level package structure for a quartz crystal resonator according to claim 11, wherein the quartz crystal resonator has a capacitance of 1.5 kΩ or less.

20. 12. The wafer-level package structure for a crystal unit according to claim 11, wherein the upper cover, the crystal unit, and the package base are all made of quartz.

21. 12. The wafer-level package structure of claim 11, wherein the etching-removed region is formed between the main vibration region and the first adjacent region, thereby separating the main vibration region from the first adjacent region.

22. 12. The wafer-level package structure of claim 11, wherein the etching-removed region is formed between the main vibration region and the second adjacent region, thereby separating the main vibration region from the second adjacent region.

23. 12. The wafer-level package structure for a quartz crystal unit according to claim 11, wherein the quartz crystal unit includes two etched-away regions, one of which is formed between the main vibrating region and the first adjacent region, and the other of which is formed between the main vibrating region and the second adjacent region, thereby forming a gap between the main vibrating region and the first adjacent region and also between the main vibrating region and the second adjacent region.

24. 12. The wafer-level package structure for a quartz crystal unit according to claim 11, wherein the at least one etched-away region is formed extending from the upper surface of the main vibration region to the lower surface of the main vibration region, thereby forming a through-hole between the upper surface and the lower surface.

25. 12. The wafer-level packaging structure for a quartz crystal unit according to claim 11, wherein an etching width of the at least one etching-removed region is selectively adjustable, and when the at least one etching-removed region has a first etching width, the first adjacent region or the second adjacent region has a protrusion on one side closer to the main vibrating region.

26. 26. The wafer-level packaging structure for a quartz crystal unit according to claim 25, wherein when the at least one etched-away region has a second etched-away width, one side of the first adjacent region or the second adjacent region close to the main vibrating region is linear.

27. 27. The wafer-level packaging structure for a quartz crystal resonator according to claim 26, wherein the second etching width is greater than the first etching width.

28. 12. The wafer-level packaging structure of claim 11, wherein the at least one etching-removed area is formed by a dry etching process or a wet etching process.

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