Semiconductor device and method for manufacturing the same

The semiconductor device's embankment and non-embankment region design stabilizes the mounting material application, addressing ease of use and quality concerns while enabling miniaturization and high-density packaging.

JP2025165751APending Publication Date: 2025-11-05KK TOSHIBA +1
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Patent Information

Application Number
JP2024070039
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-04-23
Publication Date
2025-11-05

AI Technical Summary

Technical Problem

Existing semiconductor devices face challenges in easily and stably applying a mounting material to connect a semiconductor element to a metal substrate.

Method used

A semiconductor device design featuring a substrate with wall-like embankment portions and non-embankment regions allows for the stable application of a mounting material, where the material leaks from non-embankment regions and solidifies, reducing the need for precise adjustment and minimizing quality deterioration.

Benefits of technology

The design facilitates easier and more stable application of the mounting material, reduces the risk of quality issues, and enables miniaturization and high-density packaging of the semiconductor device.

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Abstract

To provide a semiconductor device in which a mounting material can be easily and stably applied.SOLUTION: A semiconductor device 100 includes a substrate 20, a mounting material 30 disposed on the substrate, and a semiconductor element 10 disposed on the mounting material. Along the periphery of the mounting material on the substrate, a wall-shaped embankment portion and a non-embankment region in which the embankment portion is not provided are formed. The mounting material 30 is made of, for example, one of Ag paste and solder, and a part of the mounting material 30 solidifies on a corner region 24 as a leakage portion 31 that has leaked from the non-embankment region to outside a placement region.SELECTED DRAWING: Figure 1A
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Description

[Technical Field]

[0001] The embodiments relate to a semiconductor device and a method for manufacturing the semiconductor device. [Background technology]

[0002] 2. Description of the Related Art In a common-drain LGA (Land Grid Array) semiconductor device or the like, a technique for connecting a semiconductor element to a metal substrate using a mounting material has been developed. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-109294 Summary of the Invention [Problem to be solved by the invention]

[0004] An embodiment of the present invention provides a semiconductor device that allows a mounting material to be easily and stably applied. [Means for solving the problem]

[0005] A semiconductor device according to an embodiment includes a substrate, a mounting material disposed on the substrate, and a semiconductor element disposed on the mounting material. A wall-like levee portion and a non-levee region where the levee portion is not provided are formed along the periphery of the mounting material on the substrate. [Brief explanation of the drawings]

[0006] [Figure 1A] 1 is a perspective view of a semiconductor device according to an embodiment; [Figure 1B] FIG. 2 is a perspective view of a substrate of the semiconductor device. [Figure 2] FIG. 1B is an enlarged cross-sectional view taken along line II-II in FIG. 1A. [Figure 3] FIG. 1 is a flow chart showing a method for manufacturing a semiconductor device. [Figure 4A] FIG. 2 is a perspective view of a substrate in a substrate processing step. [Figure 4B] FIG. 2 is a perspective view of a substrate in a substrate processing step. [Figure 5A] FIG. 10 is a perspective view of the substrate in a mounting material placement step. [Figure 5B] FIG. 1 is a perspective view of a semiconductor device in a semiconductor element placement step. [Figure 6A] FIG. 10 is a perspective view of a semiconductor device according to a modified example. [Figure 6B] FIG. 10 is a perspective view of a substrate of a semiconductor device according to a modified example. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The embodiments do not limit the present invention. The drawings are schematic or conceptual, and the proportions of each part are not necessarily the same as those in reality. In the specification and drawings, elements similar to those described above with reference to the previous drawings are designated by the same reference numerals, and detailed descriptions thereof will be omitted as appropriate.

[0008] Furthermore, terms used in this specification that specify shapes, geometric conditions, and the degree thereof, such as "parallel" and "same," will not be bound by their strict meanings, but will be interpreted to include the range of degrees to which similar functions can be expected.

[0009] <1. Embodiment> (1.1. Semiconductor Device 100) 1A to 2, a semiconductor device 100 according to this embodiment will be described. As shown in Fig. 1A, the semiconductor device 100 includes a substrate 20, a mounting material 30 disposed on the substrate 20, and a semiconductor element 10 disposed on the mounting material 30.

[0010] The semiconductor element 10 has a rectangular shape in a plan view, and is, for example, an IGBT. The type of the semiconductor element 10 is not particularly limited, and the semiconductor element 10 may be, for example, a MOSFET, an FRD, or the like.

[0011] FIG. 1B is a perspective view of the substrate 20. As shown in FIG. 1B, the substrate 20 includes an arrangement region 23 located in the center in a plan view and corner regions 24 located at each of the four corners in a plan view. As an example, the arrangement region 23 and the corner regions 24 are each rectangular in a plan view, and more preferably square in a plan view, but are not limited to this shape. In addition, in this embodiment, the area of ​​the substrate 20 in a plan view (i.e., the combined area of ​​the arrangement region 23 and the four corner regions 24) is smaller than the area of ​​the semiconductor element 10, but is not limited to this example.

[0012] A plurality of wall-shaped embankment portions 21 and a plurality of non-embankment regions 22 where the embankment portions 21 are not provided are formed along the periphery of the arrangement region 23. In this embodiment, the embankment portions 21 are bent portions of the substrate 20. As an example, the embankment portions 21 are provided on the four sides of the arrangement region 23 in a plan view, and have rectangular wall surfaces that stand upright in the vertical direction. It is preferable that the heights of the embankment portions 21 provided on the four sides are the same. The height H1 of the embankment portions 21 may be 0.17 times or more the thickness H2 of the substrate 20.

[0013] The non-levee regions 22 are located at the four corners of a rectangle that defines the placement region 23. As an example, the non-levee regions 22 are formed between one levee portion 21 and another levee portion 21 provided on each of the four sides of the placement region 23. It is preferable that the positions of the non-levee regions 22 are point-symmetrical with respect to the center of the placement region 23 in a plan view.

[0014] A mounting material 30 is placed in the placement region 23. The mounting material 30 is placed on the placement region 23 and fills the space formed between the bank portion 21 of the substrate 20 and the semiconductor element 10. The material of the mounting material 30 is, for example, Ag paste or solder. A portion of the mounting material 30 has solidified on the corner region 24 as a leakage portion 31 that has leaked from the non-bank region 22 to the outside of the placement region 23.

[0015] Fig. 2 is a cross-sectional view of the semiconductor device 100. As shown in Fig. 2, a mounting material 30 is interposed between the upper end 21a of the embankment 21 and the semiconductor element 10. Outside the upper end 21a of the embankment 21, a leaking portion 31 of the mounting material 30 that has leaked out to the outside of the placement region 23 has solidified.

[0016] (1.2. Manufacturing Method of Semiconductor Device 100) The manufacturing process of the semiconductor device 100 according to the embodiment will be described below. As shown in Fig. 3, the manufacturing process of the semiconductor device 100 includes a substrate processing step (S100), a mounting material placement step (S200), and a semiconductor element placement step (S300).

[0017] In the substrate processing step S100, a portion of the substrate 20 is bent to form a wall-like embankment portion 21 and a non-embankment region 22 where the embankment portion 21 is not provided, around the periphery of the placement region 23 where the mounting material 30 is to be placed. Specifically, as shown in FIG. 4A , a pair of slits 25 perpendicular to the sides of the substrate 20 are first formed on the four sides of the substrate 20 in a plan view. The length of the slits 25 can be set as appropriate. For example, the length L2 of the slits 25 may satisfy the relationship 0.1≧L2 / L1≧0.01, where L1 is the length of the side of the substrate 20. The length L3 between the pair of slits 25 on one side of the substrate 20 may satisfy the relationship 0.9≧L3 / L1≧0.7.

[0018] Next, a rectangular region 26 sandwiched between a pair of cuts 25 formed on the sides of the substrate 20 is made to stand up vertically. As a result, a vertically standing embankment portion 21 is formed, as shown in FIG. 4B. A non-embankment region 22 is formed between one embankment portion 21 and another embankment portion 21. Furthermore, a corner region 24 is formed on the outside of the non-embankment region 22 in a plan view.

[0019] In the mounting material placement process of step S200, as shown in FIG. 5A, the mounting material 30 is placed in the placement area 23 of the substrate 20. Note that in the example shown in FIG. 5A, the mounting material 30 is placed in a cylindrical shape, but this is merely a schematic diagram and is not limited to this example. For example, the mounting material 30 may be placed in a conical shape or in another shape. In a plan view, it is preferable that the area of ​​the mounting material 30 is approximately 100% of the area of ​​the placement area 23. Furthermore, the height H3 of the mounting material 30 is higher than the height H4 of the inner wall surface of the embankment portion 21, and for example, H3 / H4 may be set to 1.1.

[0020] In step S300, a semiconductor element placement process, a semiconductor element 10 is placed on a mounting material 30, as shown in FIG. 5B. By placing the semiconductor element 10 on the mounting material 30, the weight of the semiconductor element 10 spreads the mounting material 30. As a result, a portion of the mounting material 30 leaks from the non-bank region 22 to the corner region 24, which is on the outside in a plan view, and then solidifies. In this manner, a semiconductor device 100 is manufactured.

[0021] (1.3.Summary) According to the embodiment described above, the semiconductor device 100 includes a substrate 20, a mounting material 30 disposed on the substrate 20, and a semiconductor element 10 disposed on the mounting material 30. A wall-like embankment portion 21 and a non-embankment region 22 where the embankment portion 21 is not provided are formed along the periphery of the mounting material 30 on the substrate 20. This makes it easier to apply the mounting material stably.

[0022] That is, even if the amount of mounting material is too large for the space formed between the placement region 23 of the substrate 20, the bank portion 21, and the semiconductor element 10, in the semiconductor element placement step (S300), the mounting material 30 is spread by the weight of the semiconductor element 10 and leaks from the non-bank region 22 into the corner region 24 and solidifies, thereby reducing the impact on the manufacture of the semiconductor device 100. This eliminates the need to precisely adjust the amount of mounting material, making it easier to apply the mounting material stably.

[0023] In plan view, embankment portions 21 are provided on the four sides of a predetermined rectangle, and non-embankment areas 22 are located at the four corners of the rectangle. This ensures that a portion of the mounting material filled in the area surrounded by embankment portions 21 on the four sides of the rectangle flows out from the non-embankment areas at the four corners of the rectangle, making it easier to apply the mounting material stably.

[0024] Furthermore, in plan view, a portion of the mounting material 30 may be configured to leak outward from the non-embankment region 22 and solidify. This prevents the applied mounting material 30 from creeping up the side surface of the semiconductor element 10 and reaching the top surface of the semiconductor element 10, thereby preventing a deterioration in the quality of the semiconductor device 100.

[0025] Furthermore, a mounting material may be interposed between the upper end 21a of the bank portion 21 and the semiconductor element 10. This eliminates the need to precisely adjust the amount of mounting material 30 to be applied, making it easier to produce the semiconductor device 100.

[0026] Moreover, the bank portion 21 may be a bent portion of the substrate 20. In this way, the bank portion 21 can be provided using the substrate 20 as a single component, and therefore the number of components required for producing the semiconductor device 100 can be reduced.

[0027] Furthermore, in a plan view, the area of ​​the substrate 20 is smaller than the area of ​​the semiconductor element 10. This allows the semiconductor device 100 to be miniaturized and allows for high-density packaging.

[0028] Furthermore, in a plan view, the positions of the plurality of non-bank regions 22 are preferably point-symmetric with respect to the center of the arrangement region 23. This makes it easier for the mounting material leaking from the arrangement region 23 to leak evenly from each of the plurality of non-bank regions 22, thereby further reducing the impact of the leakage of the mounting material 30 on the semiconductor device 100.

[0029] (1.4. Variations) 6A and 6B, a semiconductor device 200 according to a modification of the present embodiment will be described, focusing on differences from the above embodiment. The semiconductor device 200 according to the modification differs from the above embodiment in that the bank portion 21 is a member attached to the substrate 20.

[0030] 6B, in this modification, embankment portions 21 are attached to the four sides of a central arrangement region 23 of a rectangular substrate 20 in a plan view. The embankment portions 21 are separate members from the substrate 20, and may be made of, for example, metal, plastic, rubber, ceramic, etc. Even with this configuration, the same effects as those of the above embodiment can be obtained.

[0031] <2. Other embodiments> Although the embodiments of the present disclosure have been described above, they are not limited to the above. For example, in the above embodiment, the mounting material 30 is interposed between the semiconductor element 10 and the upper end 21a of the embankment portion 21 provided on the substrate 20, but the present disclosure is not limited to this. In other words, the semiconductor element 10 may be in contact with the upper end 21a of the embankment portion 21.

[0032] In the above embodiment, the embankment portion 21 is provided on the four sides of a predetermined rectangle in a plan view, but this is not limiting. For example, the embankment portion 21 may be provided on the sides of a predetermined polygon other than a rectangle in a plan view. In this case, non-embankment regions 22 may be provided at one or more corners of the predetermined polygon. Alternatively, the embankment portion 21 may be provided on the circumference of a predetermined circle in a plan view. In this case, one or more non-embankment regions 22 may be provided at a portion of the circumference of the predetermined circle.

[0033] Although several embodiments of the present invention have been described above, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims.

[0034] The present invention includes the following aspects. (Appendix 1) A substrate; a mounting material disposed on the substrate; a semiconductor element disposed on the mounting material, A semiconductor device, wherein a wall-like bank portion and a non-bank region where the bank portion is not provided are formed along the periphery of the mounting material on the substrate. (Appendix 2) In a plan view, the bank portion is provided on four sides of a predetermined rectangle, 2. The semiconductor device according to claim 1, wherein the non-bank regions are located at four corners of the rectangle. (Appendix 3) 3. The semiconductor device according to claim 2, wherein, in a plan view, a portion of the mounting material has leaked outward from the non-embankment region and solidified. (Appendix 4) 2. The semiconductor device according to claim 1, wherein an upper end of the bank portion is in contact with the semiconductor element. (Appendix 5) 2. The semiconductor device according to claim 1, wherein the mounting material is interposed between an upper end of the bank portion and the semiconductor element. (Appendix 6) 2. The semiconductor device according to claim 1, wherein the bank portion is a bent portion of the substrate. (Appendix 7) 2. The semiconductor device according to claim 1, wherein the bank portion is a member attached to the substrate. (Appendix 8) 2. The semiconductor device according to claim 1, wherein, in a plan view, the area of ​​the substrate is smaller than the area of ​​the semiconductor element. (Appendix 9) A method for manufacturing a semiconductor device having a mounting material disposed on a substrate and a semiconductor element disposed on the mounting material, comprising: bending a portion of the substrate to form a wall-like bank portion and a non-bank portion where the bank portion is not provided around an arrangement area where the mounting material is arranged; placing the mounting material in the placement area; and disposing the semiconductor element on the mounting material. (Appendix 10) 10. The method for manufacturing a semiconductor device according to claim 9, wherein the positioning of the semiconductor element includes positioning the semiconductor element on the mounting material, spreading the mounting material by the weight of the semiconductor element, and causing a portion of the mounting material to leak out from the non-embankment area to the outside in a planar view. [Explanation of symbols]

[0035] 10: semiconductor element, 20: substrate, 21: bank portion, 21a: upper end, 22: non-bank region, 23: placement region, 24: corner region, 25: gap, 26: rectangular region, 30: mounting material, 31: leakage portion, 100: semiconductor device, 200: semiconductor device

Claims

1. A substrate; a mounting material disposed on the substrate; a semiconductor element disposed on the mounting material, A semiconductor device, wherein a wall-like bank portion and a non-bank region where the bank portion is not provided are formed along the periphery of the mounting material on the substrate.

2. In a plan view, the bank portion is provided on four sides of a predetermined rectangle, The semiconductor device according to claim 1 , wherein said non-bank regions are located at four corners of said rectangle.

3. 3. The semiconductor device according to claim 2, wherein, in plan view, a portion of said mounting material has leaked outward from said non-bank region and solidified.

4. The semiconductor device according to claim 1 , wherein an upper end of said bank portion is in contact with said semiconductor element.

5. 2. The semiconductor device according to claim 1, wherein the mounting material is interposed between the upper end of the bank portion and the semiconductor element.

6. The semiconductor device according to claim 1 , wherein the bank portion is a bent portion of the substrate.

7. The semiconductor device according to claim 1 , wherein said bank portion is a member attached to said substrate.

8. The semiconductor device according to claim 1 , wherein an area of ​​said substrate is smaller than an area of ​​said semiconductor element in a plan view.

9. A method for manufacturing a semiconductor device having a mounting material disposed on a substrate and a semiconductor element disposed on the mounting material, comprising: bending a portion of the substrate to form a wall-like bank portion and a non-bank portion where the bank portion is not provided around an arrangement area where the mounting material is arranged; placing the mounting material in the placement area; and disposing the semiconductor element on the mounting material.

10. 10. The method for manufacturing a semiconductor device according to claim 9, wherein the positioning of the semiconductor element includes positioning the semiconductor element on the mounting material, spreading the mounting material by the load of the semiconductor element, and causing a portion of the mounting material to leak out from the non-embankment region to the outside in a planar view.

Citation Information

Patent Citations

  • Power semiconductor device and method of manufacturing the same

    JP2015109294A