Pressure detection element and pressure sensor

Abstract

To provide a pressure detection element which improves detection accuracy of pressure, and a pressure sensor.SOLUTION: The pressure detection element comprises: a semiconductor substrate including a diaphragm part, and a frame part surrounding the diaphragm part in plan view; and a bridge circuit part including a plurality of piezoresistance parts each of which are arranged on the diaphragm part, first metal wiring electrically connecting the piezoresistance parts adjacent to each other in the plurality of piezoresistance parts, and diffusion wiring arranged between the piezoresistance parts and the first metal wiring. When in plan view, L1 denotes shortest distance between each piezoresistance part and an outer edge of the frame part and a first area denotes a plurality of virtual circular areas each having a radius length of 0.5 L1 or more and less than L1 from the center of each piezoresistance part, the first metal wiring is arranged on a residual area excluding the first area of the semiconductor substrate.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a pressure detection element and a pressure sensor. [Background technology]

[0002] There is provided a pressure detection element that detects pressure from a fluid based on changes in electrical resistance in a piezoresistance element provided in a diaphragm portion of a semiconductor substrate. Patent Document 1 discloses a configuration that includes a sensor chip made of semiconductor and having a diaphragm portion that displaces when pressure is applied, multiple strain gauges such as piezoresistance elements formed in the diaphragm portion, and a stress balance film that generates pressure so as to balance stress changes that occur at each position of the multiple strain gauges due to temperature changes. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 11-344402 Summary of the Invention [Problem to be solved by the invention]

[0004] The layout of the metal wiring that electrically connects multiple piezoresistor elements changes the stress distribution in the semiconductor substrate. Furthermore, the stress applied to the piezoresistor elements when they are not receiving pressure from a fluid, i.e., at the initial stage, can also change depending on the change in stress distribution in the semiconductor substrate. This can affect the output characteristics of the pressure detection signal when the diaphragm portion of the semiconductor substrate is subjected to pressure from a fluid and bends. A stress balance film alone may not be sufficient to sufficiently reduce the impact on the output characteristics of the pressure detection signal. Therefore, there is a demand for further improvement in pressure detection accuracy.

[0005] An object of the present invention is to provide a pressure detection element and a pressure sensor that improve the accuracy of pressure detection. [Means for solving the problem]

[0006] This pressure detection element is a semiconductor substrate having a diaphragm portion and a frame portion surrounding the diaphragm portion in a plan view; a bridge circuit section including a plurality of piezoresistors, each of which is disposed on the diaphragm section; first metal wiring that electrically connects adjacent piezoresistors among the plurality of piezoresistors; and a diffusion wiring that is disposed between the piezoresistors and the first metal wiring; Equipped with When viewed in a plane, the shortest distance between each piezoresistance portion and the outer edge of the frame portion is defined as L1, and the first region is defined as a region of multiple imaginary circles each having a radius of 0.5L1 or more and less than L1 from the center of each piezoresistance portion, the first metal wiring is arranged in the remaining region of the semiconductor substrate excluding the first region.

[0007] This pressure sensor is A pressure detection element; a fluid flow path connected to the pressure detection element; a measuring unit that acquires a pressure detection signal output from the pressure detection element in response to the pressure received from the fluid and measures the pressure; Equipped with The pressure detection element is a semiconductor substrate having a diaphragm portion and a frame portion surrounding the diaphragm portion in a plan view; a bridge circuit section including a plurality of piezoresistors, each of which is disposed on the diaphragm section; first metal wiring that electrically connects adjacent piezoresistors among the plurality of piezoresistors; and a diffusion wiring that is disposed between the piezoresistors and the first metal wiring; Equipped with When viewed in a plane, the shortest distance between each piezoresistance portion and the outer edge of the frame portion is defined as L1, and the first region is defined as a region of multiple imaginary circles each having a radius of 0.5L1 or more and less than L1 from the center of each piezoresistance portion, the first metal wiring is arranged in the remaining region of the semiconductor substrate excluding the first region. [Effects of the Invention]

[0008] According to the present invention, the accuracy of pressure detection can be improved. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is an exploded perspective view schematically illustrating an example of a pressure sensor according to an embodiment. [Figure 2] FIG. 2 is a block diagram showing an example of an equivalent circuit corresponding to a circuit configuration in a pressure detection element according to an embodiment. [Figure 3] 1 is a plan view schematically illustrating an example of the overall configuration of a pressure detection element according to an embodiment. [Figure 4] 4 is a partial cross-sectional view showing an example of a cross section of the pressure detection element taken along line IV-IV shown in FIG. 3. FIG. [Figure 5] 4 is a partial cross-sectional view showing an example of a cross section of the pressure detection element taken along line VV shown in FIG. 3. FIG. [Figure 6] 10 is a plan view schematically illustrating an example of a layout of metal wiring provided in a pressure detection element of a reference example. FIG. [Figure 7] FIG. 10 is a diagram showing an example of stress distribution in a semiconductor substrate of a reference example. [Figure 8] 4 is a schematic plan view showing an example of a region where no metal wiring is arranged in the pressure detection element according to the embodiment. FIG. [Figure 9] FIG. 10 is a plan view schematically illustrating an example of a plane of a pressure detection element according to a modified example. [Figure 10] FIG. 10 is a diagram showing an example of the relationship between the width of a first metal wiring and residual stress in an example. DETAILED DESCRIPTION OF THE INVENTION

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The following describes the preferred embodiments of the present invention with reference to the accompanying drawings. In the drawings, the same components are designated by the same reference numerals, and redundant explanations will be omitted where appropriate.

[0011] In the drawings, directions are expressed using a Cartesian coordinate system having an X-axis, a Y-axis, and a Z-axis. The X-axis, the Y-axis, and the Z-axis are perpendicular to one another. The direction along the X-axis is referred to as the X-axis direction. The direction along the Y-axis is referred to as the Y-axis direction. The direction along the Z-axis is referred to as the Z-axis direction. In addition, in the X-axis direction, the direction in which the arrow points is referred to as the +X direction or +X side, and the direction opposite to the +X direction is referred to as the -X direction or -X side. In the Y-axis direction, the direction in which the arrow points is referred to as the +Y direction or +Y side, and the direction opposite to the +Y direction is referred to as the -Y direction or -Y side. In the Z-axis direction, the direction in which the arrow points is referred to as the +Z direction or +Z side, and the direction opposite to the +Z direction is referred to as the -Z direction or -Z side. In this specification, the +Z direction or +Z side may be referred to as "up." In addition, the -Z direction or -Z side may be referred to as "down."

[0012] In this specification and claims, "along a direction" means that two axes or directions are parallel with a difference of ±5 degrees or less. Also, "orthogonal" includes angles in the range of 90 degrees ±5 degrees relative to any direction. However, these directional expressions do not limit the directions of the embodiments. The pressure detection element and pressure sensor may be oriented in any direction when in use.

[0013] [Embodiment] <Pressure sensor> An example of the overall configuration of a pressure sensor 1 according to an embodiment will be described with reference to Fig. 1. Fig. 1 is an exploded perspective view that schematically shows an example of a pressure sensor 1 according to an embodiment. In the following description, the electrical connection between object A and object B will simply be referred to as "connection."

[0014] The pressure sensor 1 shown in FIG. 1 includes a pressure detection element 10, a measurement unit 2, a substrate 3, and a cover 4. The pressure detection element 10 and the measurement unit 2 are mounted at different positions on the first surface 3a of the substrate 3. The cover 4 is provided on the first surface 3a side of the substrate 3 and covers the pressure detection element 10 and the measurement unit 2. A fluid flow path is provided inside the cover 4. The fluid flow path inside the cover 4 is connected to the pressure detection element 10.

[0015] An example of the configuration of the pressure detection element 10 will be described separately with reference to Figs. 2 to 5. The pressure detection element 10 and the measurement unit 2 are connected via a thin conductor wire such as a bonding wire. The pressure detection signal output from the pressure detection element 10 is transmitted to the measurement unit 2 via the thin conductor wire. However, the conductive member that forms the signal transmission path from the pressure detection element 10 to the measurement unit 2 is not limited to the thin conductor wire.

[0016] The measurement unit 2 acquires the pressure detection signal output from the pressure detection element 10. The measurement unit 2 includes a signal processing circuit 2a that converts the analog pressure detection signal acquired from the pressure detection element 10 into a digital signal. The signal processing circuit 2a processes the converted digital signal to measure the pressure. The signal processing circuit 2a includes electronic circuits such as an analog front end and a microcomputer.

[0017] The substrate 3 may be a wiring substrate having a first surface 3a and wiring therein. The wiring of the substrate 3 is connected to, for example, an external power supply circuit. The pressure detection element 10 and the measurement unit 2 are each connected to the external power supply circuit via wiring provided on the substrate 3. For example, the wiring provided on the substrate 3 is connected to the pressure detection element 10 and the measurement unit 2 via thin conductor wires. This allows the external power supply circuit to supply a power supply potential and a reference potential to the pressure detection element 10 and the measurement unit 2, respectively. However, the conductive members that form the paths that supply the power supply potential and the reference potential from the external power supply circuit to the pressure detection element 10 and the measurement unit 2, respectively, are not limited to thin conductor wires.

[0018] <Pressure detection element 10> Next, an example of the configuration of the pressure detection element 10 will be described with reference to FIGS. 2 to 5. FIG. 2 is a block diagram showing an example of an equivalent circuit corresponding to the circuit configuration within the pressure detection element 10. FIG. 3 is a plan view schematically showing an example of the overall configuration of the pressure detection element 10. FIG. 4 is a partial cross-sectional view showing an example of a cross section of the pressure detection element 10 taken along line IV-IV shown in FIG. 3. FIG. 5 is a partial cross-sectional view showing an example of a cross section of the pressure detection element 10 taken along line VV shown in FIG. 3. Note that, for convenience of explanation, FIG. 3 omits the surface oxide film, interlayer insulating film, and protective film of the semiconductor substrate provided in the pressure detection element 10. That is, for convenience of explanation, FIG. 3 shows the piezoresistance portion, diffused wiring, and various metal wiring provided in the pressure detection element 10 exposed from the upper surface of the semiconductor substrate.

[0019] As shown in FIG. 2, the pressure detection element 10 includes a semiconductor substrate 20 and a bridge circuit portion 30. The pressure detection element 10 may further include an amplifier 38 and various terminals, such as a power supply potential terminal 41, a first reference potential terminal 42, a second reference potential terminal 43, a first output terminal 44, and a second output terminal 45. The pressure detection element 10 may further include other circuit components in addition to the amplifier 38. An example of the other circuit components is a constant current supply circuit for supplying a constant current to the amplifier 38. However, the other circuit components are not limited to the constant current supply circuit. The first output terminal 44 and the second output terminal 45 are examples of "output terminals."

[0020] The pressure detection element 10 may further include metal wiring (metal wiring such as the second metal wiring, third metal wiring, fourth metal wiring, fifth metal wiring, and sixth metal wiring, which will be described separately) other than the metal wiring included in the bridge circuit portion 30 (the first metal wiring 32, which will be described separately).

[0021] (Semiconductor substrate 20) An example of the configuration of the semiconductor substrate 20 will be described. The semiconductor substrate 20 is formed, for example, using an SOI (Silicon On Insulator) substrate. The semiconductor substrate 20 formed using an SOI substrate includes, for example, a support layer 21a made of a semiconductor such as silicon (Si), a BOX (Buried Oxide) layer 21b made of an insulator such as silicon dioxide (SiO2), and an active layer 21c made of a semiconductor such as Si.

[0022] 3, the semiconductor substrate 20 has a substantially rectangular shape in a plan view. However, the shape of the semiconductor substrate 20 in a plan view is not limited to a substantially rectangular shape. The shape of the semiconductor substrate 20 in a plan view may be other shapes such as a substantially circular shape, a substantially elliptical shape, or a substantially polygonal shape.

[0023] In a plan view, the semiconductor substrate 20 has a diaphragm portion 23 disposed in a central region, and a frame portion 24 surrounding the diaphragm portion 23. The thickness of the diaphragm portion 23 is thinner than the thickness of the frame portion 24. The diaphragm portion 23 bends under pressure from a fluid. The frame portion 24 is continuous with an outer edge 231 of the diaphragm portion 23. Here, the outer edge 231 is a region in the diaphragm portion 23 where the active layer 21c is thicker than the region inside the outer edge 231. The frame portion 24 also supports the diaphragm portion 23. In the example shown in FIG. 3, the outer edge 241 of the frame portion 24 corresponds to the outer edge of the semiconductor substrate 20. The outer edge 241 of the frame portion 24 may be referred to as the "outer edge 241 of the semiconductor substrate 20."

[0024] As shown in FIGS. 4 and 5, the diaphragm portion 23 faces the -Z side surface of the support layer 21a, i.e., the recess 22 recessed from the -Z side surface of the semiconductor substrate 20 toward the +Z side. The recess 22 is formed by removing central regions of the support layer 21a and the BOX layer 21b of the semiconductor substrate 20 in a planar view using a processing method such as etching. The diaphragm portion 23 is composed of the active layer 21c of the semiconductor substrate 20. In the example shown in FIGS. 3 to 5, the frame portion 24 corresponds to the remaining region of the semiconductor substrate 20 excluding the diaphragm portion 23. As shown in FIGS. 4 and 5, the frame portion 24 is composed of the support layer 21a, the BOX layer 21b, and the active layer 21c of the semiconductor substrate 20. The diaphragm portion 23 and the frame portion 24 are structurally integrated. In addition, it is preferable that the thickness of the portion of the active layer 21c that forms the outer edge 231 of the diaphragm portion 23 and the portion that forms the frame portion 24 are approximately the same.

[0025] As shown in Figures 3 and 5, the diaphragm portion 23 may have a plurality of groove portions 232a, 232b, 232c, and 232d, each recessed toward the -Z side, and a plurality of beam portions 235a, 235b, 235c, and 235d arranged between the plurality of groove portions 232a, 232b, 232c, and 232d and protruding toward the +Z side from the groove portions 232a, 232b, 232c, and 232d.

[0026] In the diaphragm portion 23, the remaining area excluding the outer edge 231 and the beam portions 235a, 235b, 235c, and 235d corresponds to the areas of the groove portions 232a, 232b, 232c, and 232d. When the groove portions 232a, 232b, 232c, and 232d are not distinguished from one another, they are collectively referred to as the "groove portion 232." When the beam portions 235a, 235b, 235c, and 235d are not distinguished from one another, they are collectively referred to as the "beam portion 235." In the example shown in FIG. 3, the diaphragm portion 23 has four groove portions 232 and four beam portions 235. Two of the four groove portions 232 are adjacent to one another, separated by one beam portion 235. However, the number of grooves 232 and beams 235 that the diaphragm portion 23 has is not limited to this.

[0027] The multiple beam portions 235 extend in different directions from a center O of the diaphragm portion 23 in a plan view and are connected to the outer edge 231 of the diaphragm portion 23. Specifically, beam portion 235a extends from the center O toward the −X side and is connected to a region on the −X side of the outer edge 231. Beam portion 235b extends from the center O toward the −Y side and is connected to a region on the −Y side of the outer edge 231. Beam portion 235c extends from the center O toward the +X side and is connected to a region on the +X side of the outer edge 231. Beam portion 235d extends from the center O toward the +Y side and is connected to a region on the +Y side of the outer edge 231. In addition, in each beam portion 235, the end portion on the center O side is referred to as the “inner end.” In addition, in each beam portion 235, the end portion on the outer edge 231 side is referred to as the “outer end.”

[0028] Each beam portion 235 has a substantially diamond shape in plan view. That is, the width of each beam portion 235 is narrower in the regions at the inner end and outer end of each beam portion 235, and is widest in the intermediate region between the inner end and the outer end. However, the shape of each beam portion 235 in plan view is not limited to a substantially diamond shape. The shape of each beam portion 235 in plan view may be other shapes, such as a substantially rectangular shape or a substantially elliptical shape.

[0029] As shown in FIGS. 4 and 5 , the semiconductor substrate 20 preferably further includes a surface oxide film 26, an interlayer insulating film 27, and a protective film 28. The surface oxide film 26 is disposed on the active layer 21c. The surface oxide film 26 is, for example, a thermal oxide film formed on the surface of the active layer 21c when the semiconductor substrate 20 is heated. The interlayer insulating film 27 is disposed on the surface oxide film 26. Various metal wirings, such as a first metal wiring, a second metal wiring, a third metal wiring, a fourth metal wiring, a fifth metal wiring, and a sixth metal wiring, which will be described later, are disposed on the interlayer insulating film 27. For example, a plurality of interlayer insulating films 27 may be provided. Each of the plurality of interlayer insulating films 27 may be provided at a different position in the Z-axis direction, for example. To prevent short-circuiting between at least two of the first metal wiring, the second metal wiring, the third metal wiring, the fourth metal wiring, the fifth metal wiring, and the sixth metal wiring, the different metal wirings may be disposed at different positions in the Z-axis direction, for example, with a single interlayer insulating film 27 interposed therebetween. The protective film 28 is an insulating film disposed on the interlayer insulating film 27 and the metal wiring.

[0030] (Bridge circuit section 30) An example of the configuration of the bridge circuit unit 30 will be described. The bridge circuit unit 30 detects pressure received from a fluid and outputs a pressure detection signal. The bridge circuit unit 30 includes a plurality of piezoresistors 31a, 31b, 31c, and 31d, a plurality of first metal wirings 32a, 32b, 32c, and 32d, and a plurality of diffusion wirings 33a, 33b, 33c, 33d, 33e, 33f, 33g, and 33h. When the piezoresistors 31a, 31b, 31c, and 31d are described without distinction, they are collectively referred to as "piezoresistors 31." When the first metal wirings 32a, 32b, 32c, and 32d are described without distinction, they are collectively referred to as "first metal wirings 32." Furthermore, when the plurality of diffusion wirings 33a, 33b, 33c, 33d, 33e, 33f, 33g, and 33h are described without distinction, they will be collectively referred to as "diffusion wirings 33."

[0031] The multiple piezoresistance elements 31 are arranged on the diaphragm portion 23 of the semiconductor substrate 20. Each of the multiple piezoresistance elements 31 corresponds to an impurity diffusion region of a different conductivity type from that of the active layer 21c. For example, if the active layer 21c is made of an n-type semiconductor, the piezoresistance elements 31 correspond to a p-type impurity diffusion region. When the diaphragm portion 23 is bent by pressure from the fluid, each of the multiple piezoresistance elements 31 is distorted. As a result, the electrical resistance of each of the multiple piezoresistance elements 31 changes. The change in electrical resistance of the piezoresistance elements 31 due to pressure from the fluid is output to the outside as a pressure detection signal.

[0032] In the example shown in FIG. 3, the piezoresistor 31a is arranged at the outer end of the beam 235a. The piezoresistor 31b is arranged at the outer end of the beam 235b. The piezoresistor 31c is arranged at the outer end of the beam 235c. The piezoresistor 31d is arranged at the outer end of the beam 235d. By arranging the piezoresistors 31 at different outer ends of the beams 235, the pressure detection sensitivity of the bridge circuit 30 is improved and the detection range up to saturation of the pressure detection signal output from the bridge circuit 30 can be widened. In other words, the pressure detection accuracy of the bridge circuit 30 can be improved.

[0033] The multiple first metal wirings 32 connect adjacent piezoresistance portions 31 among the multiple piezoresistance portions 31. The multiple first metal wirings 32 are arranged at positions spaced apart from each other. For example, first metal wiring 32a connects piezoresistance portion 31a and piezoresistance portion 31d. First metal wiring 32b connects piezoresistance portion 31a and piezoresistance portion 31b. First metal wiring 32c connects piezoresistance portion 31b and piezoresistance portion 31c. First metal wiring 32d connects piezoresistance portion 31c and piezoresistance portion 31d.

[0034] Each of the multiple first metal wirings 32 is disposed on the frame portion 24. Each of the multiple first metal wirings 32 is, for example, aluminum (Al) wiring. However, the material constituting the first metal wirings 32 may be a metal material other than Al. In this specification, metal is considered to include alloys. Furthermore, metal materials are considered to include alloy materials. The same applies hereinafter to "metal" or "metal material." The first metal wirings 32 may partially contain a semiconductor material such as a diffusion wiring. In other words, the first metal wirings 32 do not have to be entirely made of metal. Similarly, other metal wirings such as the second metal wiring, third metal wiring, fourth metal wiring, fifth metal wiring, and sixth metal wiring may partially contain a semiconductor material such as a diffusion wiring.

[0035] The width of the first metal wiring 32 is preferably wider than the width of the other metal wirings such as the second metal wiring, the third metal wiring, the fourth metal wiring, the fifth metal wiring, and the sixth metal wiring. By making the width of the first metal wiring 32 wider than the width of these other metal wirings, the influence of the wiring resistance of the first metal wiring 32 on the pressure detection signal 10S can be reduced, thereby improving the pressure detection accuracy.

[0036] In Figure 3 and other figures, the first metal wiring 32 is represented as a generally band-shaped region defined by a set of lines extending parallel to each other and positioned so as to face the inside and outside. In contrast, the second metal wiring, third metal wiring, fourth metal wiring, fifth metal wiring, sixth metal wiring, etc., which will be described separately, are each represented by only a single line. However, this is for the sake of convenience of explanation, and the width of the line corresponding to each metal wiring shown in Figure 3 and other figures does not define the actual width of each metal wiring.

[0037] The plurality of diffusion wirings 33 are arranged at positions spaced apart from one another. The plurality of diffusion wirings 33 are arranged between the piezoresistance portion 31 and the first metal wiring 32. For example, the diffusion wiring 33a is arranged between the piezoresistance portion 31a and the first metal wiring 32a. The diffusion wiring 33b is arranged between the piezoresistance portion 31a and the first metal wiring 32b. The diffusion wiring 33c is arranged between the piezoresistance portion 31b and the first metal wiring 32b. The diffusion wiring 33d is arranged between the piezoresistance portion 31b and the first metal wiring 32c. The diffusion wiring 33e is arranged between the piezoresistance portion 31c and the first metal wiring 32c. The diffusion wiring 33f is arranged between the piezoresistance portion 31c and the first metal wiring 32d. The diffusion wiring 33g is arranged between the piezoresistance portion 31d and the first metal wiring 32d. The diffusion wiring 33h is disposed between the piezoresistance portion 31d and the first metal wiring 32a.

[0038] In a plan view, each diffusion wiring 33 extends outward from the piezoresistance portion 31. Each diffusion wiring 33 is disposed in the frame portion 24 of the semiconductor substrate 20. However, at least a portion of each diffusion wiring 33 may be disposed in the diaphragm portion 23.

[0039] As shown in FIGS. 3 and 4, the diffusion wiring 33 corresponds to an impurity diffusion region having a conductivity type different from that of the active layer 21c corresponding to the diaphragm portion 23. For example, if the active layer 21c is made of an n-type semiconductor, the diffusion wiring 33 corresponds to a p-type impurity diffusion region. The impurity concentration of the diffusion wiring 33 is higher than that of the piezoresistance portion 31. The diffusion wiring 33 has a higher conductivity than the piezoresistance portion 31. The diffusion wiring 33 is continuous with the piezoresistance portion 31. The diffusion wiring 33 may also be connected to the first metal wiring 32 via a conductive member such as a contact plug.

[0040] 3, the width of each diffusion wiring 33 increases from the end on the piezoresistance portion 31 side toward the end on the first metal wiring 32 side. This allows the diffusion wiring 33 to be connected to small piezoresistance portions 31, and also reduces the electrical resistance of the diffusion wiring 33. As a result, a signal indicating a change in the electrical resistance of the piezoresistance portion 31 when fluid pressure is applied can be stably transmitted to the first metal wiring 32. In other words, the accuracy of pressure detection by the bridge circuit portion 30 can be improved.

[0041] The plurality of piezoresistance elements 31 are bridge-connected via first metal wiring 32 and diffusion wiring 33. This forms a Wheatstone bridge circuit for detecting the pressure of a fluid. In other words, the bridge circuit unit 30 has a Wheatstone bridge circuit made up of the plurality of piezoresistance elements 31, the plurality of first metal wiring 32, and the plurality of diffusion wiring 33.

[0042] (Amplifier 38) An example of the configuration of the amplifier 38 will be described. The amplifier 38 amplifies the pressure detection signal 10S output from the bridge circuit section 30. The amplified pressure detection signal 10S is an example of an "amplified signal." Here, the pressure detection signal 10S includes a first voltage signal 10S1 corresponding to a first voltage between the piezoresistors 31a and 31b in the bridge circuit section 30, and a second voltage signal 10S2 corresponding to a second voltage between the piezoresistors 31c and 31d in the bridge circuit section 30.

[0043] The first voltage corresponds to a voltage between the power supply potential and the first reference potential, divided by the electrical resistance (resistance) of piezoresistance element 31a and the resistance of piezoresistance element 31b. The second voltage corresponds to a voltage between the power supply potential and the first reference potential, divided by the resistance of piezoresistance element 31c and the resistance of piezoresistance element 31d. First voltage signal 10S1 and second voltage signal 10S2 are amplified by amplifier 38 and then output to measurement unit 2 via first output terminal 44 and second output terminal 45, which will be described later. Measurement unit 2 calculates the differential voltage between the first voltage and the second voltage, and calculates the pressure according to the calculated differential voltage.

[0044] The amplifier 38 includes a first amplifier circuit 381 and a second amplifier circuit 382 for amplifying the first voltage signal 10S1 and the second voltage signal 10S2, respectively. The first amplifier circuit 381 and the second amplifier circuit 382 are connected via metal wiring 59. In the example shown in FIG. 3, the amplifier 38 is disposed along the edge region on the −Y side of the outer edge 241 of the frame portion 24. However, the position of the amplifier 38 is not limited to this.

[0045] The first amplifier circuit 381 amplifies the first voltage signal 10S1. The first amplifier circuit 381 outputs a signal corresponding to the amplified first voltage signal 10S1 to the first output terminal 44. The second amplifier circuit 382 amplifies the second voltage signal 10S2. The second amplifier circuit 382 outputs a signal corresponding to the amplified second voltage signal 10S2 to the second output terminal 45.

[0046] Each of the first amplifier circuit 381 and the second amplifier circuit 382 includes, for example, an operational amplifier and resistive elements such as an input resistor and a feedback resistor connected to the operational amplifier. Each of the first amplifier circuit 381 and the second amplifier circuit 382 may further include other circuit elements such as a capacitance.

[0047] To transmit the first voltage signal 10S1 output from the bridge circuit unit 30 to the first amplifier circuit 381, the first metal wiring 32b and the first amplifier circuit 381 are connected via the third metal wiring 53a. The first amplifier circuit 381 and the first output terminal 44 are connected via the fourth metal wiring 54a. As a result, the first voltage signal 10S1 output from the bridge circuit unit 30 is output to the measurement unit 2 via the third metal wiring 53a, the first amplifier circuit 381, the fourth metal wiring 54a, and the first output terminal 44. Note that in FIG. 3, the portion of the fourth metal wiring 54a that overlaps with other metal wiring in a plan view is indicated by a dashed line. However, this is for convenience of explanation, as it shows that the fourth metal wiring 54a and the other metal wiring that overlaps with the fourth metal wiring 54a in a plan view are not structurally connected. For example, the dashed line portion of the fourth metal wiring 54a shown in FIG. 3 may be a diffusion wiring, and the solid line portion and the dashed line portion may be connected in series by this diffusion wiring.

[0048] To transmit the second voltage signal 10S2 output from the bridge circuit unit 30 to the second amplifier circuit 382, ​​the first metal wiring 32d and the second amplifier circuit 382 are connected via the third metal wiring 53b. The second amplifier circuit 382 and the second output terminal 45 are connected via the fourth metal wiring 54b. As a result, the second voltage signal 10S2 output from the bridge circuit unit 30 is output to the measurement unit 2 via the third metal wiring 53b, the second amplifier circuit 382, ​​the fourth metal wiring 54b, and the second output terminal 45. In FIG. 3, the portion of the fourth metal wiring 54b that overlaps with other metal wiring in a plan view is indicated by a dashed line. However, this is for convenience of explanation, as it shows that the fourth metal wiring 54b and the other metal wiring that overlaps with the fourth metal wiring 54b in a plan view are not structurally connected. For example, the dashed line portion of the fourth metal wiring 54b shown in FIG. 3 may be a diffusion wiring, and the solid line portion and the dashed line portion may be connected in series by this diffusion wiring.

[0049] (Power potential terminal 41) An example of the configuration of the power supply potential terminal 41 will be described. The power supply potential terminal 41 is connected to an external power supply circuit. The power supply potential from the external power supply circuit is supplied to the bridge circuit unit 30 via the power supply potential terminal 41.

[0050] The power supply potential terminal 41 is, for example, a VDD terminal. The power supply potential terminal 41 is connected to the first metal wiring 32a of the bridge circuit unit 30 via the second metal wiring 52a. That is, the power supply potential from the power supply potential terminal 41 is supplied to the piezoresistance unit 31a via the second metal wiring 52a, the first metal wiring 32a, and the diffusion wiring 33a. The power supply potential from the power supply potential terminal 41 is also supplied to the piezoresistance unit 31d via the second metal wiring 52a, the first metal wiring 32a, and the diffusion wiring 33h.

[0051] The power supply potential terminal 41 is a conductor pattern made of a metal material such as Al. In the example shown in Fig. 3, the power supply potential terminal 41 is disposed near the edge on the +Y side of the outer edge 241 of the frame portion 24. However, the power supply potential terminal 41 may also be disposed near another edge of the outer edge 241 of the frame portion 24.

[0052] The power supply potential from the power supply potential terminal 41 may be supplied to the amplifier 38. In the example shown in FIG. 3, the power supply potential terminal 41 and the first amplifier circuit 381 are connected via a sixth metal wiring 56a. Here, the power supply potential terminal 41 and the first amplifier circuit 381 are respectively arranged near opposite edges of the frame portion 24. Therefore, the sixth metal wiring 56a has a wiring region along, for example, near the edge on the −X side of the outer edge 241 of the frame portion 24 so as to interconnect the power supply potential terminal 41 and the first amplifier circuit 381, which are arranged at separate positions. That is, as shown in FIG. 3, a wiring region occupying most of the sixth metal wiring 56a is arranged near the outer edge 241 of the frame portion 24.

[0053] The sixth metal wiring 56a has a wiring region extending along the outer edge 241 of the frame portion 24, allowing the sixth metal wiring 56a to be positioned relatively far from the piezoresistance portion 31. The sixth metal wiring 56a, which is made of a metal material such as aluminum, may experience residual stress due to thermal expansion during heat treatment or other processes during the manufacturing of the pressure detection element 10. By positioning the sixth metal wiring 56a and the piezoresistance portion 31 relatively far from each other, even if the stress distribution in the semiconductor substrate 20 changes due to the residual stress of the sixth metal wiring 56a, the difference in stress applied to each piezoresistance portion 31 can be reduced. This reduces the impact on the output characteristics of the pressure detection element 10 at the initial stage. In other words, the pressure detection accuracy can be improved. Note that "initial stage" refers to a period during which pressure from a fluid is not applied to the pressure detection element 10.

[0054] The sixth metal wiring 56a may be connected to, for example, other circuit components arranged on the frame portion 24. That is, the power supply potential from the power supply potential terminal 41 may be supplied to the other circuit components via the sixth metal wiring 56a. Having the sixth metal wiring 56a in a wiring area along the vicinity of the outer edge 241 of the frame portion 24 allows costs to be reduced without significantly increasing the wiring area for supplying the power supply potential to the other circuit components. Furthermore, because the metal wiring (sixth metal wiring 56a) that supplies the power supply potential to the other circuit components is spaced apart from the piezoresistance portions 31, even if the stress distribution in the semiconductor substrate 20 changes in response to the residual stress of the sixth metal wiring 56a, the difference in stress applied to each piezoresistance portion 31 can be reduced. This reduces the initial impact on the output characteristics of the pressure detection element 10. That is, the pressure detection accuracy can be improved.

[0055] The power supply potential terminal 41 and the second amplifier circuit 382 are connected via a sixth metal wiring 56b. Here, the power supply potential terminal 41 and the second amplifier circuit 382 are respectively disposed near opposite edges of the frame portion 24. Therefore, the sixth metal wiring 56b has wiring regions that extend along, for example, the +Y-side edge and the +X-side edge of the outer edge 241 of the frame portion 24 in order to interconnect the power supply potential terminal 41 and the second amplifier circuit 382, ​​which are disposed at separate positions. In other words, the wiring region that occupies the majority of the sixth metal wiring 56b is disposed near the outer edge 241 of the frame portion 24. Like the sixth metal wiring 56a, residual stress may also occur in the sixth metal wiring 56b due to thermal expansion during processes such as heat treatment during the manufacture of the pressure detection element 10. By arranging the sixth metal wiring 56b and the piezoresistance portions 31 at positions relatively distant from each other, even if the stress distribution in the semiconductor substrate 20 changes in accordance with the residual stress in the sixth metal wiring 56b, it is possible to reduce the difference in stress applied to each piezoresistance portion 31. This reduces the impact on the output characteristics of the pressure detection element 10 at the initial stage. In other words, it is possible to improve the pressure detection accuracy.

[0056] The sixth metal wiring 56b may be connected to, for example, other circuit components arranged on the frame portion 24. That is, the power supply potential from the power supply potential terminal 41 may be supplied to the other circuit components via the sixth metal wiring 56b. By providing the sixth metal wiring 56b with a wiring area along the vicinity of the outer edge 241 of the frame portion 24, costs can be reduced without significantly increasing the wiring area for supplying the power supply potential to the other circuit components. Furthermore, because the metal wiring (sixth metal wiring 56b) that supplies the power supply potential to the other circuit components is spaced apart from the piezoresistance portions 31, even if the stress distribution in the semiconductor substrate 20 changes in accordance with the residual stress of the sixth metal wiring 56b, the difference in stress applied to each piezoresistance portion 31 can be reduced. This reduces the initial impact on the output characteristics of the pressure detection element 10. That is, the pressure detection accuracy can be improved.

[0057] In the example shown in FIG. 3, the sixth metal wiring 56a and the sixth metal wiring 56b are structurally separate metal wirings. However, the sixth metal wiring 56a and the sixth metal wiring 56b may be structurally integrated (continuous) metal wiring. For example, the series of metal wirings consisting of the sixth metal wiring 56a and the sixth metal wiring 56b may have a substantially annular shape, starting from the power supply potential terminal 41, running along the outer edge 241 of the frame portion 24, and then returning to the power supply potential terminal 41. In this case, the sixth metal wiring 56a and the sixth metal wiring 56b may be connected to the first amplifier circuit 381 and the second amplifier circuit 382 via a branch portion branching from the series of metal wiring including the sixth metal wiring 56a and the sixth metal wiring 56b. The branch portion branching from the series of metal wirings may be made of a metal material such as Al.

[0058] (First reference potential terminal 42) An example of the configuration of the first reference potential terminal 42 will be described. The first reference potential from an external power supply circuit is supplied to the bridge circuit unit 30 via the first reference potential terminal 42. The first reference potential is not limited as long as it is a potential lower than the power supply potential. For example, the first reference potential is the ground potential.

[0059] The first reference potential terminal 42 is, for example, a COM terminal that supplies a low potential to the bridge circuit unit 30. The first reference potential terminal 42 is connected to the first metal wiring 32c via the second metal wiring 52b. That is, the first reference potential from the first reference potential terminal 42 is supplied to the piezoresistance unit 31b via the second metal wiring 52b, the first metal wiring 32c, and the diffusion wiring 33d. The first reference potential from the first reference potential terminal 42 is also supplied to the piezoresistance unit 31c via the second metal wiring 52b, the first metal wiring 32c, and the diffusion wiring 33e.

[0060] The first reference potential terminal 42 is a conductor pattern made of a metal material such as Al. In the example shown in Fig. 3, the first reference potential terminal 42 is disposed adjacent to the power supply potential terminal 41 near the edge on the +Y side of the outer edge 241 of the frame portion 24. The first reference potential terminal 42 is disposed adjacent to the power supply potential terminal 41 near one edge of the outer edge 241 of the frame portion 24, which facilitates wiring between the pressure detection element 10 and an external power supply circuit. However, the first reference potential terminal 42 may also be disposed near another edge of the outer edge 241 of the frame portion 24.

[0061] (Second reference potential terminal 43) An example of the configuration of the second reference potential terminal 43 will be described. The second reference potential terminal 43 is connected to an external power supply circuit. A second reference potential from the external power supply circuit is supplied to the amplifier 38 via the second reference potential terminal 43. The second reference potential is not limited as long as it is a potential lower than the power supply potential. Furthermore, the second reference potential may be the same potential as the first reference potential, or may be a different potential. For example, the second reference potential is the ground potential.

[0062] The second reference potential terminal 43 is, for example, a VSS terminal. The second reference potential terminal 43 is connected to the amplifier 38, i.e., the first amplifier circuit 381 and the second amplifier circuit 382, ​​via a fifth metal wiring 55. The second reference potential terminal 43 and the amplifier 38 are respectively disposed near opposite edges of the outer edge 241 of the frame portion 24. Therefore, the fifth metal wiring 55 preferably has, for example, an annular shape that follows the outer edge 241 of the frame portion 24 in a plan view so as to mutually connect the second reference potential terminal 43 and the amplifier 38, which are disposed at separate positions.

[0063] For example, the fifth metal wiring 55 may have, in a plan view, a ring path portion 55a arranged in a ring shape along the outer edge 241 of the frame portion 24, and multiple branch portions 55b branching from the ring path portion 55a. The multiple branch portions 55b extend from the ring path portion 55a to the first amplifier circuit 381, the second amplifier circuit 382, ​​and the second reference potential terminal 43, respectively. By providing the fifth metal wiring 55 with the ring path portion 55a and the branch portions 55b, it is possible to connect the second reference potential terminal 43 and the amplifier 38, which are located apart from each other, while reducing the area of ​​the wiring region corresponding to the fifth metal wiring 55. Similarly, residual stress may occur in the fifth metal wiring 55 due to thermal expansion during processes such as heat treatment during the manufacturing of the pressure detection element 10. By arranging the fifth metal wiring 55 and the piezoresistance portion 31 at positions apart from each other, it is possible to reduce the difference in stress applied to each piezoresistance portion even if the stress distribution in the semiconductor substrate 20 changes depending on the residual stress of the fifth metal wiring 55. This reduces the impact on the output characteristics of the pressure detection element 10 at the initial stage, thereby improving the pressure detection accuracy.

[0064] The sixth metal wiring 56a may also be arranged in a substantially circular shape along the outer edge 241 of the frame portion 24 in a plan view. For example, the sixth metal wiring 56a may be arranged in a substantially circular shape inside the loop portion 55a of the fifth metal wiring 55. As a result, a power supply potential can be stably supplied to each circuit component.

[0065] The fifth metal wiring 55 may be connected to, for example, other circuit components arranged on the frame portion 24. That is, the second reference potential from the second reference potential terminal 43 may be supplied to the other circuit components via the fifth metal wiring 55. The fifth metal wiring 55 includes the loop portion 55a and the branch portion 55b, which allows the second reference potential to be supplied to the other circuit components without significantly increasing the wiring area connected to the other circuit components. Furthermore, the fifth metal wiring 55 has a wiring area along the vicinity of the outer edge 241 of the frame portion 24, which allows costs to be reduced without significantly increasing the wiring area for supplying the second reference potential to the other circuit components. Furthermore, because the metal wiring (fifth metal wiring 55) supplying the second reference potential to the other circuit components is separated from the piezoresistance portions 31, even if the stress distribution in the semiconductor substrate 20 changes due to the residual stress of the fifth metal wiring 55, the difference in stress applied to the respective piezoresistance portions 31 can be reduced. This reduces the initial impact on the output characteristics of the pressure detection element 10. That is, the pressure detection accuracy can be improved.

[0066] The second reference potential terminal 43 is a conductor pattern made of a metal material such as Al. In the example shown in FIG. 3, the second reference potential terminal 43, like the power supply potential terminal 41 and the first reference potential terminal 42, is arranged near the edge on the +Y side of the outer edge 241 of the frame portion 24. That is, the power supply potential terminal 41, the first reference potential terminal 42, and the second reference potential terminal 43 are arranged near the same edge of the outer edge 241 of the frame portion 24. Arranging the power supply potential terminal 41, the first reference potential terminal 42, and the second reference potential terminal 43 near the same edge of the outer edge 241 of the frame portion 24 makes it easier to connect the pressure detection element 10 to the power supply circuit. However, the second reference potential terminal 43 may also be arranged near another edge of the outer edge 241 of the frame portion 24.

[0067] (First output terminal 44 and second output terminal 45) The following describes an example of the configuration of the first output terminal 44 and the second output terminal 45. Each of the first output terminal 44 and the second output terminal 45 outputs a pressure detection signal amplified by the amplifier 38 to the measurement unit 2, for example.

[0068] Each of the first output terminal 44 and the second output terminal is a conductor pattern made of a metal material such as Al. In the example shown in Fig. 3, the first output terminal 44 and the second output terminal 45 are arranged near the edge on the +Y side of the outer edge 241 of the frame portion 24, similar to the power supply potential terminal 41, the first reference potential terminal 42, and the second reference potential terminal 43. That is, the power supply potential terminal 41, the first reference potential terminal 42, the second reference potential terminal 43, the first output terminal 44, and the second output terminal 45 are arranged near the same edge of the outer edge 241 of the frame portion 24. Arranging the power supply potential terminal 41, the first reference potential terminal 42, the second reference potential terminal 43, the first output terminal 44, and the second output terminal 45 near the same edge of the outer edge 241 of the frame portion 24 makes it easier to connect the pressure detection element 10 to the power supply circuit and the measurement unit 2. However, the first output terminal 44 and the second output terminal may be disposed near other edges of the outer edge 241 of the frame portion 24, respectively.

[0069] (Influence of stress in semiconductor substrate 20) As described with reference to FIGS. 3 to 5 , the pressure detection element 10 includes various metal wirings (first metal wiring 32, second metal wirings 52a and 52b, third metal wirings 53a and 53b, fourth metal wirings 54a and 54b, fifth metal wiring 55, and sixth metal wirings 56a and 56b) primarily made of a metal material such as Al. These metal wirings thermally expand, for example, during a heat treatment process or other process during the manufacturing process of the pressure detection element 10. At this time, stress due to thermal expansion occurs in each metal wiring, and this stress may remain even after the temperature returns to room temperature. In other words, residual stress may occur in each metal wiring. Furthermore, the residual stress in the metal wirings causes the stress distribution in the semiconductor substrate 20 to vary depending on the position within the surface of the semiconductor substrate 20. This can result in significant differences in the stress applied to each piezoresistance portion 31, even in the initial stage when no pressure from a fluid is applied. This can affect the output characteristics of the pressure detection element 10.

[0070] In this embodiment, a region of the semiconductor substrate 20 where at least the first metal wiring 32 is not disposed is provided to reduce the impact on the output characteristics of the pressure detection element 10 due to the stress distribution in the semiconductor substrate 20. As a premise, an example of the stress distribution in the semiconductor substrate 20 in the pressure detection element according to Reference Example 10R will be described with reference to FIGS. 6 and 7. FIG. 6 is a plan view schematically illustrating an example of the layout of metal wiring provided in the semiconductor substrate 20 of Reference Example 10R. FIG. 7 is a diagram illustrating an example of the stress distribution in the semiconductor substrate 20R of Reference Example 10R. The layout of various metal wiring in Reference Example 10R differs from that of the embodiment. In FIG. 7, region D1 is a region where relatively high stress occurs. Region D1 is hereinafter referred to as the "high stress region D1." Placing metal wiring in the high stress region D1 likely fails to sufficiently reduce the impact on the output characteristics due to variations in the initial stress distribution, even if a metal thin film or the like is disposed in another location on the semiconductor substrate 20. Next, region D2 is a region where relatively low stress occurs. Region D2 will be referred to below as the "low stress region D2." Region D3 is a region where relatively high stress occurs, but where the stress is lower than the stress in high stress region D1. Region D3 will be referred to below as the "medium stress region D3." Region D4 is a region where relatively low stress occurs, where the stress is even lower than the stress in low stress region D2. Region D4 will be referred to below as the "low stress region D4."

[0071] Here, if metal wiring is placed in the medium stress region D3, there is a possibility that variations in stress distribution due to residual stress of the metal wiring will remain in the semiconductor substrate 20, but the effect on the output characteristics can be reduced by correcting the pressure detection signal output from the pressure detection element of Reference Example 10R. Furthermore, by placing metal wiring in the medium stress region D3 and further placing metal wiring in the low stress region D2 and low stress region D4, the effect on the output characteristics of the pressure detection element 10 or Reference Example 10R can be reduced.

[0072] As shown in FIG. 6, in Reference Example 10R, similar to the embodiment, a bridge circuit 30R including a piezoresistance element 31, a first metal wiring 32R, and a diffusion wiring 33R is provided on a semiconductor substrate 20. The first metal wiring 32R is made of a metal material such as Al. However, each diffusion wiring 33R in the bridge circuit 30R according to Reference Example 10R extends from each piezoresistance element 31R along the X-axis or Y-axis direction and toward the outer edge 241 of the frame portion 24 with approximately the same width in a plan view. Therefore, the distance between the piezoresistance element 31 and the first metal wiring 32R must be short to reduce the electrical resistance of the diffusion wiring 33R. As a result, the first metal wiring 32R in Reference Example 10R is located in the high-stress region D1 in FIG. 7. As a result, even in the initial stage when no pressure is applied from the fluid, the difference in stress applied to each piezoresistance element 31R becomes large, increasing the possibility that the characteristics of the pressure detection signal 10S output by the reference example 10R will change from the desired ones.

[0073] Next, an example of a region in which at least the first metal wiring 32 of the pressure detection element 10 according to the embodiment is not arranged will be described with reference to Fig. 8. Fig. 8 is a schematic plan view showing an example of a region in which no metal wiring is arranged of the pressure detection element 10 according to the embodiment.

[0074] 8, in this embodiment, a first region is defined as a region where at least the first metal wiring 32 is not arranged. Specifically, the first region corresponds to a region of a plurality of imaginary circles 70Fa, 70Fb, 70Fc, and 70Fd, each having a predetermined radius R1 from the center of each piezoresistance portion 31, in a planar view. That is, the first metal wiring 32 is arranged in the remaining region of the semiconductor substrate 20 excluding the plurality of imaginary circles 70Fa, 70Fb, 70Fc, and 70Fd. Note that the center of each piezoresistance portion 31 is, for example, the geometric center of gravity of the piezoresistance portion 31 in a planar view. Using the imaginary circles as the first region facilitates the arrangement of the metal wirings according to the layout rules.

[0075] The radii R1 of the imaginary circles 70Fa, 70Fb, 70Fc, and 70Fd may be the same or different. When the shortest distance between each piezoresistive portion 31 and the outer edge 241 of the frame portion 24 is L1, the radii R1 of the imaginary circles 70Fa, 70Fb, 70Fc, and 70Fd are preferably equal to or greater than 0.5L1 and less than L1. The regions overlapping the imaginary circles 70Fa, 70Fb, 70Fc, and 70Fd, each having a radius R1 of 0.5L1 or greater and less than L1, include the high-stress region D1 shown in FIG. 7. Therefore, by designating the regions overlapping the imaginary circles 70Fa, 70Fb, 70Fc, and 70Fd, each having a radius R1 of 0.5L1 or greater and less than L1, as the first regions, the influence on the output characteristics of the pressure detection element 10 can be reduced. Furthermore, it is more preferable that the radius R1 of each of the imaginary circles 70Fa, 70Fb, 70Fc, and 70Fd be equal to or greater than 0.5L1 and equal to or less than 0.85L1. By setting the radius R1 of the imaginary circles 70Fa, 70Fb, 70Fc, and 70Fd to be equal to or greater than 0.5L1 and equal to or less than 0.85L1, it is possible to arrange the metal wiring near the outer edge 241 of the frame portion 24, which is the outermost periphery of the semiconductor substrate 20. As a result, it is possible to effectively supply a power supply potential to the bridge circuit portion 30 and the like, while reducing variations in the stress distribution of the semiconductor substrate 20 due to residual stress in each metal wiring. 7 includes the medium stress region D3 shown in FIG. 7, and therefore, by designating the region overlapping with the imaginary circles 70Fa, 70Fb, 70Fc, and 70Fd having a radius R1 of 0.5L1 or more and 0.85L1 or less as the first region, it is possible to reduce variations in the stress distribution of the semiconductor substrate 20. In other words, it is possible to reduce the influence on the output characteristics of the pressure detection element 10.

[0076] Since the first metal wiring 32 is positioned so as not to overlap with the imaginary circles 70Fa, 70Fb, 70Fc, and 70Fd, the diffusion wiring 33 connected to one of the two piezoresistance elements 31 that face each other across the center O of the diaphragm portion 23 and the diffusion wiring 33 connected to the other of the two piezoresistance elements 31 extend obliquely with respect to a direction passing through these two piezoresistance elements 31 in a planar view. Specifically, the diffusion wirings 33a and 33b connected to the piezoresistance element 31a and the diffusion wirings 33e and 33f connected to the piezoresistance element 31c that face each other across the center O of the diaphragm portion 23 extend obliquely with respect to a first direction passing through the piezoresistance elements 31a and 31c in a planar view. The first direction is, for example, a direction parallel to the X-axis direction. In this case, adjacent diffusion wirings 33a and 33b do not intersect. Furthermore, adjacent diffusion wirings 33e and 33f do not intersect. Furthermore, the diffusion wirings 33c and 33d connected to the piezoresistance portion 31b and the diffusion wirings 33g and 33h connected to the piezoresistance portion 31d, which face each other across the center O of the diaphragm portion 23, extend obliquely with respect to a second direction passing through the piezoresistance portion 31b and the piezoresistance portion 31d in a plan view. The second direction is, for example, a direction parallel to the Y-axis direction. In this case, the diffusion wirings 33c and 33d do not intersect. Furthermore, the diffusion wirings 33g and 33h do not intersect.

[0077] By arranging the first metal wiring 32 in the remaining area of ​​the semiconductor substrate 20 excluding the imaginary circles 70Fa, 70Fb, 70Fc, and 70Fd defined by the radius R1 of these length ranges, it is possible to reduce variations in the stress distribution of the semiconductor substrate 20 due to residual stress in metal wiring such as the first metal wiring 32. Accordingly, it is possible to reduce differences in the stress applied to each piezoresistance portion 31. As a result, it is possible to reduce the impact on the output characteristics of the pressure detection element 10 at the initial stage. In other words, it is possible to improve the pressure detection accuracy.

[0078] Furthermore, the second metal wirings 52a and 52b, the third metal wirings 53a and 53b, the fourth metal wirings 54a and 54b, the fifth metal wiring 55, and the sixth metal wirings 56a and 56b are not arranged in the first region. That is, these metal wirings are arranged in the remaining region of the semiconductor substrate 20 excluding the imaginary circles 70Fa, 70Fb, 70Fc, and 70Fd. This reduces variations in the stress distribution of the semiconductor substrate 20 due to residual stress in each metal wiring. Accordingly, differences in the stress applied to each piezoresistance portion 31 can be reduced. As a result, the impact on the output characteristics of the pressure detection element 10 at the initial stage can be reduced. That is, the pressure detection accuracy can be improved.

[0079] <Modification> Next, a pressure detection element 10A according to a modified example of the embodiment will be described with reference to Fig. 9. Fig. 9 is a plan view schematically showing an example of a plane of the pressure detection element 10A according to the modified example. Note that in the modified example, components similar to those in the embodiment are denoted by the same reference numerals, and descriptions thereof will be omitted where appropriate.

[0080] As shown in Fig. 9, the pressure detection element 10A further includes a plurality of metal thin films 80a, 80b, 80c, and 80d made of a metal material such as Al. The number of metal thin films 80a, 80b, 80c, and 80d shown in Fig. 9 is four, but is not limited to this. Note that, when the metal thin films 80a, 80b, 80c, and 80d are described without distinction, they will hereinafter be referred to as "metal thin films 80."

[0081] The metal thin film 80 has a triangular shape in a planar view. However, the shape of the metal thin film 80 in a planar view is not limited to this. For example, the shape of the metal thin film 80 in a planar view may be a circle, an ellipse, a rectangle, or a polygon other than a triangle or a rectangle.

[0082] Each of the multiple metal thin films 80 is disposed on the frame portion 24 of the semiconductor substrate 20. For example, the metal thin film 80 is disposed in the low stress region D4 shown in FIG. 7. Furthermore, each of the multiple metal thin films 80 is preferably disposed near the multiple first metal wirings 32. In the example shown in FIG. 9, the metal thin film 80a is disposed near the first metal wiring 32a. The metal thin film 80b is disposed near the first metal wiring 32b. The metal thin film 80c is disposed near the first metal wiring 32c. The metal thin film 80d is disposed near the first metal wiring 32d.

[0083] By disposing multiple metal thin films 80 on the frame portion 24 of the semiconductor substrate 20, variations in stress distribution in the semiconductor substrate 20 are reduced. For example, if metal wiring is disposed in the medium stress region D3 shown in FIG. 7, variations in stress distribution due to residual stress in the metal wiring may not be sufficiently reduced. Therefore, by disposing the metal thin film 80 in the low stress region D4 shown in FIG. 7, a relatively low residual stress due to the metal thin film 80 is generated isotropically. As a result, the difference in stress applied to each piezoresistance element 31 can be reduced. As a result, the impact on the output characteristics of the pressure detection element 10 at the initial stage can be reduced. In other words, the pressure detection accuracy can be improved. In particular, the low stress region D4 is a region where the generated stress is relatively low, and is suitable as a region in which a metal material such as the metal thin film 80 is disposed to reduce variations in stress distribution in the semiconductor substrate 20.

[0084] <Example> Next, the pressure detection element 10 according to the embodiment will be described in more detail using examples, but the scope of the present invention is not limited to the examples.

[0085] The relationship between the width of the first metal wiring 32 included in the pressure detection element 10 and the total amount of residual stress (hereinafter simply referred to as "residual stress") generated in the semiconductor substrate 20 will be described. FIG. 10 is a diagram showing an example of the relationship between the width of the first metal wiring 32 and the residual stress. Specifically, FIG. 10 shows the relative residual stress (hereinafter simply referred to as "relative residual stress") in another example (Example 2) when the residual stress in Example 1, in which the width of the first metal wiring 32 is 5 μm, is set to "1." Note that when the width of the first metal wiring 32 is changed, the initial pressure value obtained by simulation is assumed to be the value of the residual stress. The vertical axis of FIG. 10 represents the relative residual stress, and the horizontal axis of FIG. 10 represents the width of the first metal wiring 32. As described above, the width of the first metal wiring 32 in Example 1 is 5 μm. Furthermore, the width of the first metal wiring 32 in Example 2 is 10 μm.

[0086] As shown in FIG. 10 , simulations have shown that increasing the width of the first metal wiring 32 reduces the residual stress. One possible reason for this is believed to be that a portion of the first metal wiring 32 is located in the low-stress region D4 in FIG. 7 . Specifically, the relative residual stress in Example 2 was 0.84. In other words, increasing the width of the first metal wiring 32 from 5 μm to 10 μm reduced the residual stress by approximately 16%. Furthermore, increasing the width of the first metal wiring 32 not only reduces the residual stress but also reduces the electrical resistance of the first metal wiring 32. In contrast, the relative residual stress in Reference Example 10R shown in FIGS. 6 and 7 was 2.75. That is, the residual stress in Reference Example 10R was 2.75 times that of Example 1. Since the residual stress decreases as the width of the first metal wiring 32 increases, it is expected that the width of the first metal wiring 32 will be the thickest of all the metal wirings included in the pressure detection element 10. That is, it is assumed that the width of the first metal wiring 32 will be greater than the widths of the second metal wiring 52 to the sixth metal wiring 56. By connecting the metal thin film 80 to the first metal wiring 32, which has a relatively large width, it is possible to reduce the residual stress in the semiconductor substrate 20 and improve the pressure detection accuracy.

[0087] Although the preferred embodiments of the present invention have been described in detail above, the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the present invention.

[0088] The aspects of the present invention are as follows, for example. <1> a semiconductor substrate having a diaphragm portion and a frame portion surrounding the diaphragm portion in a plan view; a bridge circuit section including a plurality of piezoresistors, each of which is disposed on the diaphragm section; first metal wiring that electrically connects adjacent piezoresistors among the plurality of piezoresistors; and a diffusion wiring that is disposed between the piezoresistors and the first metal wiring; Equipped with In a plan view, when the shortest distance between each of the piezoresistance portions and the outer edge of the frame portion is defined as L1, and when a plurality of imaginary circular regions each having a radius of 0.5L1 or more and less than L1 from the center of each of the piezoresistance portions are defined as first regions, the first metal wiring is disposed in a remaining region of the semiconductor substrate excluding the first regions. Pressure sensing element. <2> a power supply potential terminal for supplying a power supply potential to the bridge circuit unit; a first reference potential terminal that supplies a first reference potential to the bridge circuit unit; a second metal wiring that electrically connects the bridge circuit unit to the power supply potential terminal or the first reference potential terminal; Furthermore, the second metal wiring is disposed in a remaining region of the semiconductor substrate excluding the first region; The aforementioned <1> The pressure detection element according to claim 1. <3> an amplifier that amplifies the pressure detection signal output from the bridge circuit unit; a third metal wiring that electrically connects the bridge circuit unit and the amplifier; an output terminal for outputting an amplified signal output from the amplifier; a fourth metal wiring that electrically connects the amplifier and the output terminal; Furthermore, the third metal wiring and the fourth metal wiring are disposed in a remaining region of the semiconductor substrate excluding the first region; The aforementioned <2> The pressure detection element according to claim 1. <4> a second reference potential terminal for supplying a second reference potential to the amplifier; a fifth metal wiring that electrically connects the amplifier and the second reference potential terminal; Equipped with the fifth metal wiring is disposed in a remaining region of the semiconductor substrate excluding the first region; The aforementioned <3> The pressure detection element according to claim 1. <5> the power supply potential is supplied to the amplifier from the power supply potential terminal; a sixth metal wiring disposed between the power supply potential terminal and the amplifier; the sixth metal wiring is disposed in a remaining region of the semiconductor substrate excluding the first region; The aforementioned <4> The pressure detection element according to claim 1. <6> the width of the first metal wiring is greater than the width of the second metal wiring, the width of the third metal wiring, the width of the fourth metal wiring, the width of the fifth metal wiring, and the width of the sixth metal wiring; The aforementioned <5> The pressure detection element according to claim 1. <7> The diffusion wiring is provided in a plurality of positions spaced apart from each other, the diffusion wiring connected to one of the two piezoresistance elements facing each other across the center of the diaphragm portion and the diffusion wiring connected to the other extend obliquely with respect to a direction passing through the two piezoresistance elements in a plan view; The aforementioned <1> From the above <6> 10. The pressure detection element according to claim 9, wherein: <8> The width of each of the diffusion wirings increases from the end on the piezoresistance portion side toward the end on the first metal wiring side. The aforementioned <7> The pressure detection element according to claim 1. <9> Further comprising a plurality of thin metal films each disposed on the frame portion. The aforementioned <1> From the above <8> 10. The pressure detection element according to claim 9, wherein: <10> A pressure detection element; a fluid flow path connected to the pressure detection element; a measuring unit that acquires a pressure detection signal output from the pressure detection element in response to the pressure received from the fluid and measures the pressure; Equipped with The pressure detection element is a semiconductor substrate having a diaphragm portion and a frame portion surrounding the diaphragm portion in a plan view; a bridge circuit section including a plurality of piezoresistors, each of which is disposed on the diaphragm section; first metal wiring that electrically connects adjacent piezoresistors among the plurality of piezoresistors; and a diffusion wiring that is disposed between the piezoresistors and the first metal wiring; Equipped with In a plan view, when the shortest distance between each of the piezoresistance portions and the outer edge of the frame portion is defined as L1, and when a plurality of imaginary circular regions each having a radius of 0.5L1 or more and less than L1 from the center of each of the piezoresistance portions are defined as first regions, the first metal wiring is disposed in a remaining region of the semiconductor substrate excluding the first regions. Pressure sensor. [Explanation of symbols]

[0089] REFERENCE SIGNS LIST 1 pressure sensor, 2 measurement section, 3 substrate, 4 cover, 10, 10A pressure detection element, 20 semiconductor substrate, 23 diaphragm section, 24 frame section, 30 bridge circuit section, 31 piezoresistive section, 32 first metal wiring, 33 diffusion wiring, 38 amplifier, 41 power supply potential terminal, 42 first reference potential terminal, 43 second reference potential terminal, 44 first output terminal, 45 second output terminal, 52a, 52b second metal wiring, 53a, 53b third metal wiring, 54a, 54b fourth metal wiring, 55 fifth metal wiring, 56a, 56b sixth metal wiring, 80 thin metal film

Claims

1. a semiconductor substrate having a diaphragm portion and a frame portion surrounding the diaphragm portion in a plan view; a bridge circuit section including a plurality of piezoresistors, each of which is disposed on the diaphragm section; first metal wiring that electrically connects adjacent piezoresistors among the plurality of piezoresistors; and a diffusion wiring that is disposed between the piezoresistors and the first metal wiring; Equipped with In a plan view, when the shortest distance between each of the piezoresistance portions and the outer edge of the frame portion is defined as L1, and when a plurality of imaginary circular regions each having a radius of 0.5L1 or more and less than L1 from the center of each of the piezoresistance portions are defined as first regions, the first metal wiring is disposed in a remaining region of the semiconductor substrate excluding the first regions. Pressure sensing element.

2. a power supply potential terminal for supplying a power supply potential to the bridge circuit unit; a first reference potential terminal that supplies a first reference potential to the bridge circuit unit; a second metal wiring electrically connecting the bridge circuit portion to the power supply potential terminal or the first reference potential terminal; Furthermore, the second metal wiring is disposed in a remaining region of the semiconductor substrate excluding the first region; The pressure detection element according to claim 1 .

3. an amplifier that amplifies the pressure detection signal output from the bridge circuit unit; a third metal wiring that electrically connects the bridge circuit unit and the amplifier; an output terminal for outputting an amplified signal output from the amplifier; a fourth metal wiring electrically connecting the amplifier and the output terminal; Furthermore, the third metal wiring and the fourth metal wiring are disposed in a remaining region of the semiconductor substrate excluding the first region; The pressure detection element according to claim 2 .

4. a second reference potential terminal for supplying a second reference potential to the amplifier; a fifth metal wiring that electrically connects the amplifier and the second reference potential terminal; Equipped with the fifth metal wiring is disposed in a remaining region of the semiconductor substrate excluding the first region; The pressure detection element according to claim 3 .

5. the power supply potential is supplied to the amplifier from the power supply potential terminal; a sixth metal wiring disposed between the power supply potential terminal and the amplifier; the sixth metal wiring is disposed in a remaining region of the semiconductor substrate excluding the first region; The pressure detection element according to claim 4 .

6. the width of the first metal wiring is greater than the width of the second metal wiring, the width of the third metal wiring, the width of the fourth metal wiring, the width of the fifth metal wiring, and the width of the sixth metal wiring; The pressure detection element according to claim 5 .

7. The diffusion wiring is provided in a plurality of positions spaced apart from each other, the diffusion wiring connected to one of the two piezoresistance elements facing each other with the center of the diaphragm portion interposed therebetween extends obliquely with respect to a direction passing through the two piezoresistance elements in a plan view, and the diffusion wiring connected to the other of the two piezoresistance elements extends obliquely with respect to a direction passing through the two piezoresistance elements in a plan view. The pressure detection element according to claim 1 or 2.

8. the width of each of the diffusion wirings increases from the end on the piezoresistance portion side toward the end on the first metal wiring side; The pressure detection element according to claim 7 .

9. Further comprising a plurality of thin metal films each disposed on the frame portion. The pressure detection element according to claim 1 or 2.

10. A pressure detection element; a fluid flow path connected to the pressure detection element; a measuring unit that acquires a pressure detection signal output from the pressure detection element in response to the pressure received from the fluid and measures the pressure; Equipped with The pressure detection element is a semiconductor substrate having a diaphragm portion and a frame portion surrounding the diaphragm portion in a plan view; a bridge circuit section including a plurality of piezoresistors, each of which is disposed on the diaphragm section; first metal wiring that electrically connects adjacent piezoresistors among the plurality of piezoresistors; and a diffusion wiring that is disposed between the piezoresistors and the first metal wiring; Equipped with In a plan view, when the shortest distance between each of the piezoresistance portions and the outer edge of the frame portion is defined as L1, and when a plurality of imaginary circular regions each having a radius of 0.5L1 or more and less than L1 from the center of each of the piezoresistance portions are defined as first regions, the first metal wiring is disposed in a remaining region of the semiconductor substrate excluding the first regions. Pressure sensor.

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