Semiconductor wafer, method for processing semiconductor wafer and processing device
The semiconductor wafer with a circular cross-section and chamfered corners, combined with precise orientation detection and alignment, addresses the limitation of notch-based wafers, allowing for increased device formation.
Patent Information
- Application Number
- JP2024082623
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-05-21
- Publication Date
- 2025-12-04
AI Technical Summary
Wafers with notches or orientation flats have limitations on the number of devices that can be formed on the surface, necessitating improvements for increased device formation.
A semiconductor wafer with a circular horizontal cross-section and no notches, featuring chamfered corners and a straight side surface, along with a processing method that includes crystal orientation detection and precise wafer orientation during exposure to enhance device formation.
Enables the formation of more devices on the wafer surface by eliminating notch constraints and ensuring accurate alignment for pattern transfer.
Smart Images

Figure 2025176452000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a semiconductor wafer, a semiconductor wafer processing method, and a processing apparatus. [Background technology]
[0002] A wafer made of a semiconductor material has a notch, an orientation flat, or other notch formed on the periphery of the wafer as a mark indicating the crystal orientation of the wafer.
[0003] In the manufacturing process of semiconductor devices, notches and orientation flats are mainly used to roughly align the orientation of a semiconductor wafer with a pattern when a photosensitive layer formed on the semiconductor wafer is patterned using an exposure tool.
[0004] For this reason, a method of detecting a notch or the like has been conventionally used (see, for example, Patent Document 1). [Prior art documents] [Patent documents]
[0005] [Patent Document 1] Japanese Patent Publication No. 2022-072520 Summary of the Invention [Problem to be solved by the invention]
[0006] However, wafers with notches or orientation flats have a limit on the number of devices that can be formed on the surface, so improvements were desperately needed.
[0007] An object of the present invention is to provide a semiconductor wafer, a semiconductor wafer processing method, and a processing apparatus that can form more devices. [Means for solving the problem]
[0008] In order to solve the above-mentioned problems and achieve the object, the semiconductor wafer of the present invention is a semiconductor wafer having a first surface and a second surface behind the first surface, and is characterized in that the horizontal cross-sectional shape is circular and has no notch.
[0009] The wafer may have a side surface extending from the first surface to the second surface, the side surface being a straight line in a vertical cross section of the semiconductor wafer, and a first surface chamfered portion may be formed at a corner between the first surface and the side surface, and a second surface chamfered portion may be formed at a corner between the second surface and the side surface.
[0010] The semiconductor wafer processing method of the present invention is a semiconductor wafer processing method comprising: a wafer preparation step of preparing a semiconductor wafer having a circular horizontal cross section without any notches; a photosensitive agent layer formation step of applying a photosensitive agent to the semiconductor wafer to form a photosensitive agent layer; an exposure step of irradiating the photosensitive agent layer with light through a mask or an optical modulator to transfer a pattern onto the photosensitive agent layer; and a crystal orientation detection step of detecting the crystal orientation of the semiconductor wafer before carrying out the exposure step, wherein the semiconductor wafer is positioned in a predetermined orientation with respect to the pattern based on the crystal orientation of the semiconductor wafer in the exposure step.
[0011] The semiconductor wafer processing method may further include a wafer storing step, after performing the crystal orientation detection step and before performing the exposure step, of storing the semiconductor wafer in a wafer cassette so that the semiconductor wafer is oriented in a predetermined direction relative to the wafer cassette based on the crystal orientation detected in the crystal orientation detection step, wherein in the exposure step, the semiconductor wafer is transported from the wafer cassette to a stage and the light is irradiated onto the semiconductor wafer supported by the stage, and in the wafer storing step, the semiconductor wafer is stored in the wafer cassette in an orientation such that the semiconductor wafer is positioned in the predetermined direction relative to the pattern in the exposure step.
[0012] The processing apparatus of the present invention is a processing apparatus comprising: a cassette mounting table on which a wafer cassette is placed; a holding unit for holding semiconductor wafers; a crystal orientation detection unit for detecting the crystal orientation of the semiconductor wafer held by the holding unit; and a transport unit for transporting the semiconductor wafer between the cassette mounting table and the holding unit, wherein the transport unit stores the semiconductor wafer in the wafer cassette so that the semiconductor wafer is oriented in a predetermined direction relative to the wafer cassette based on the crystal orientation of the semiconductor wafer detected by the crystal orientation detection unit. [Effects of the Invention]
[0013] The present invention has the advantage that more devices can be formed. [Brief explanation of the drawings]
[0014] [Figure 1] FIG. 1 is a perspective view schematically showing a semiconductor wafer to be processed by the semiconductor wafer processing method according to the first embodiment. [Figure 2] FIG. 2 is a cross-sectional view taken along line II-II in FIG. [Figure 3] FIG. 3 is a flowchart showing the flow of the semiconductor wafer processing method according to the first embodiment. [Figure 4] FIG. 4 is a diagram schematically showing the photosensitive agent layer forming step of the semiconductor wafer processing method shown in FIG. [Figure 5] FIG. 5 is a perspective view schematically showing an example of the configuration of a processing apparatus that performs the crystal orientation detection step and the wafer accommodation step of the semiconductor wafer processing method shown in FIG. [Figure 6] FIG. 6 is a perspective view schematically showing the crystal orientation detection step of the semiconductor wafer processing method shown in FIG. [Figure 7] FIG. 7 is a side view schematically showing the crystal orientation detection step of the semiconductor wafer processing method shown in FIG. [Figure 8]FIG. 8 is a front view schematically showing a wafer cassette containing wafers in the wafer containing step of the semiconductor wafer processing method shown in FIG. [Figure 9] FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. [Figure 10] FIG. 10 is a side view schematically showing a state in which a semiconductor wafer is placed on a stage in the exposure step of the semiconductor wafer processing method shown in FIG. [Figure 11] FIG. 11 is a side view schematically showing a state in which a photosensitive agent layer on a semiconductor wafer placed on a stage is exposed in the exposure step of the semiconductor wafer processing method shown in FIG. [Figure 12] FIG. 12 is a side view schematically showing a state in which a photosensitive agent layer on a semiconductor wafer placed on a stage is developed in the exposure step of the semiconductor wafer processing method shown in FIG. [Figure 13] FIG. 13 is a perspective view showing a modification of the semiconductor wafer shown in FIG. DETAILED DESCRIPTION OF THE INVENTION
[0015] Modes (embodiments) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited to the contents described in the following embodiments. Furthermore, the components described below include those that can be easily imagined by a person skilled in the art and those that are substantially the same. Furthermore, the configurations described below can be combined as appropriate. Furthermore, various omissions, substitutions, or modifications of the configuration can be made within the scope of the gist of the present invention.
[0016] [Embodiment 1] A semiconductor wafer processing method according to a first embodiment of the present invention will be described with reference to the drawings. Fig. 1 is a perspective view schematically showing a semiconductor wafer to be processed by the semiconductor wafer processing method according to the first embodiment. Fig. 2 is a cross-sectional view taken along line II-II in Fig. 1. Fig. 3 is a flowchart showing the flow of the semiconductor wafer processing method according to the first embodiment.
[0017] (semiconductor wafers) The semiconductor wafer processing method according to the first embodiment is a method for processing a semiconductor wafer 1 shown in Fig. 1. In the first embodiment, the semiconductor wafer 1 to be processed in the semiconductor wafer processing method according to the first embodiment is made of silicon and is formed into a disk shape as a whole, as shown in Fig. 1. In the first embodiment, the semiconductor wafer 1 is made of single crystal silicon, which is a semiconductor material. Note that in the present invention, the semiconductor material constituting the semiconductor wafer 1 is not limited to silicon.
[0018] 1, the semiconductor wafer 1 has a circular first surface 2, a circular second surface 3 which is the back surface of the first surface 2, and a side surface 4 which extends from the outer edge of the first surface 2 to the outer edge of the second surface 3. The first surface 2 and the second surface 3 are each formed flat, have the same diameter, and are arranged parallel to each other.
[0019] In addition, in embodiment 1, as shown in Figure 2, the side surface 4 of the semiconductor wafer 1 consists of straight lines in a vertical cross section, which is a cross section passing through the axis of the semiconductor wafer 1, and a first surface side surface chamfered portion 5 is formed at the corner between the first surface 2 and the side surface 4, and a second surface side surface chamfered portion 6 is formed at the corner between the second surface 3 and the side surface 4.
[0020] In the first embodiment, as shown in FIG. 2 , the first-surface side chamfer 5 and the second-surface side chamfer 6 are each formed in an arc shape extending from the first surface 2 to the side surface 4 in a vertical cross section of the semiconductor wafer 1, and also formed in an arc shape extending from the second surface 3 to the side surface 4. In the first embodiment, the chamfers 5 and 6 are formed by R-chamfering with a radius of 0.2 mm or less. Note that in the present invention, the chamfers 5 and 6 may be formed as so-called C-chamfers, tapered in the vertical cross section of the semiconductor wafer 1 such that the diameter of the semiconductor wafer 1 decreases toward the first surface 2 or the second surface 3. In the first embodiment, the chamfers 5 and 6 may be formed by C-chamfering with a radius of 0.2 mm or less.
[0021] In the first embodiment, the semiconductor wafer 1 does not have any crystal orientation. That is, the semiconductor wafer 1 does not have an irregularly shaped portion (also called a cutout portion) such as a notch or orientation flat formed on its outer edge, that is, the semiconductor wafer 1 is formed in a disk shape without a cutout portion on its outer edge, and the horizontal cross-sectional shape parallel to the faces 2 and 3 is circular. In the first embodiment, the first face 2 is the (100) face of the semiconductor wafer 1.
[0022] (Semiconductor wafer processing method) The semiconductor wafer processing method according to the first embodiment includes a wafer preparation step 101, a photosensitive agent layer formation step 102, a crystal orientation detection step 103, a wafer accommodation step 104, and an exposure step 105, as shown in FIG.
[0023] (Wafer preparation step) Wafer preparation step 101 is a step of preparing the semiconductor wafer 1 having the above-described configuration, i.e., a circular horizontal cross section parallel to the faces 2 and 3. In embodiment 1, the semiconductor wafer 1 is prepared by, for example, separating a portion from an ingot made of cylindrical single crystal silicon.
[0024] (Photosensitive layer formation step) Fig. 4 is a diagram schematically showing the photosensitive agent layer forming step of the semiconductor wafer processing method shown in Fig. 3. The photosensitive agent layer forming step 102 is a step of applying a photosensitive agent 24 to the semiconductor wafer 1 to form a photosensitive agent layer (not shown).
[0025] 4 suction-holds the second surface 3 side of the semiconductor wafer 1 on the holding surface of the spinner table 21. In the photosensitive agent layer forming step 102 of the first embodiment, the spin coater 20 rotates the spinner table 21 around its axis and drops a liquid photosensitive agent 24 from a coating nozzle 23 onto the center of the first surface 2 side of the semiconductor wafer 1.
[0026] The dropped photosensitizer 24 flows from the center toward the periphery on the first surface 2 of the semiconductor wafer 1 due to centrifugal force generated by the rotation of the spinner table 21, and is coated over the entire surface of the first surface 2 of the semiconductor wafer 1 to form a photosensitizer layer. In the first embodiment, in the photosensitizer layer forming step 102, the spin coater 20 supplies the photosensitizer 24 for a predetermined time while rotating the spinner table 21 about its axis, thereby forming a photosensitizer layer on the first surface 2 of the semiconductor wafer 1. In the present invention, the amount of photosensitizer 24 dropped from the coating nozzle 23, the viscosity of the photosensitizer 24, and the rotation speed and rotation time of the spinner table 21 are set to values that prevent the photosensitizer 24 from spreading onto the side surface 4 of the semiconductor wafer 1. In addition, it is desirable to remove the photosensitizer layer adhering to the side surface 4 of the semiconductor wafer 1 from the side surface 4 of the semiconductor wafer 1.
[0027] (Processing device) The crystal orientation detection step 103 and the wafer accommodation step 104 are performed by a processing device 30 shown in Fig. 5. Next, the processing device 30 will be described. Fig. 5 is a perspective view that schematically shows an example of the configuration of a processing device that performs the crystal orientation detection step and the wafer accommodation step of the semiconductor wafer processing method shown in Fig. 3.
[0028] As described in Japanese Patent Laid-Open No. 11-014560, the processing device 30 detects the crystal orientation of the semiconductor wafer 1. As shown in Fig. 5, the processing device 30 includes an apparatus base 31, a pair of cassette mounting stages 32 mounted on the apparatus base 31, a holding unit 33 mounted on the apparatus base 31, a crystal orientation detection unit 34, a transport unit 35, and a control unit (not shown).
[0029] A wafer cassette 40 is placed on each cassette mounting stage 32. The wafer cassette 40 is a storage container that has multiple slots and stores multiple semiconductor wafers 1 at intervals in the vertical direction. The wafer cassette 40 stores multiple semiconductor wafers 1 before and after their crystal orientations are detected.
[0030] In the first embodiment, the cassette mounting stage 32 supports the wafer cassette 40 so that it can move up and down along the Z-axis direction. In the first embodiment, the pair of cassette mounting stages 32 mount the wafer cassettes 40 with their openings 41, through which the semiconductor wafers 1 are inserted and removed, facing each other. Of the pair of cassette mounting stages 32, the cassette mounting stage 32 on the front side in FIG. 4 (hereinafter indicated by reference numeral 321) mounts the wafer cassette 40 containing the semiconductor wafers 1 before the crystal orientation is detected. The cassette mounting stage 32 on the back side in FIG. 4 (hereinafter indicated by reference numeral 322) mounts the wafer cassette 40 containing the semiconductor wafers 1 after the crystal orientation has been detected.
[0031] The holding unit 33 and the crystal orientation detection unit 34 are provided between a pair of cassette mounting stages 321, 322 of the apparatus base 31. The holding unit 33 holds the semiconductor wafer 1 on an upper surface 331 formed flat along the horizontal direction. The holding unit 33 rotates around an axis parallel to the vertical direction and is formed in a disk shape with a smaller diameter than the semiconductor wafer 1. The holding unit 33 holds the semiconductor wafer 1 on the upper surface 331 by suction.
[0032] The crystal orientation detection unit 34 detects the crystal orientation of the semiconductor wafer 1 held by the holding unit 33. The crystal orientation detection unit 34 includes an X-ray irradiation means 341 that irradiates X-rays 36 (shown in FIG. 6) onto the side surface 4 of the semiconductor wafer 1 held by the holding unit 33, and an X-ray receiving means 342 that receives the reflected X-rays 36.
[0033] The transfer unit 35 transfers the semiconductor wafers 1 between the wafer cassettes 40 placed on the cassette placement stages 321, 322 and the holding unit 33. The transfer unit 35 transfers the semiconductor wafers 1, whose crystal orientations have not yet been detected, from the wafer cassette 40 placed on the cassette placement stage 321 to the holding unit 33, and transfers the semiconductor wafers 1, whose crystal orientations have been detected by the crystal orientation detection unit 34, from the holding unit 33 to the wafer cassette 40 placed on the cassette placement stage 322. In the first embodiment, the transfer unit 35 is, for example, a robot pick equipped with a U-shaped hand, and the U-shaped hand suction-holds and transfers the semiconductor wafers 1.
[0034] The control unit controls each component of the processing device 30 to cause the processing device 30 to perform an operation of detecting the crystal orientation of the semiconductor wafer 1. The control unit is a computer having an arithmetic processing device with a microprocessor such as a CPU (central processing unit), a storage device with memory such as a ROM (read only memory) or RAM (random access memory), and an input / output interface device. The arithmetic processing device of the control unit performs arithmetic processing in accordance with a computer program stored in the storage device, and outputs control signals for controlling the processing device 30 to each component of the processing device 30 via the input / output interface device.
[0035] The control unit is connected to a display unit (not shown) that is configured with a liquid crystal display device or the like that displays the status of the machining operation, images, etc., and an input unit (not shown) that the operator uses to register machining content information, etc. The input unit is configured with at least one of a touch panel provided on the display unit and an external input device such as a keyboard.
[0036] (Crystal orientation detection step) Next, the crystal orientation detection step 103 will be described. Fig. 6 is a perspective view that schematically shows the crystal orientation detection step of the semiconductor wafer processing method shown in Fig. 3. Fig. 7 is a side view that schematically shows the crystal orientation detection step of the semiconductor wafer processing method shown in Fig. 3. The crystal orientation detection step 103 is a step that detects the crystal orientation of the semiconductor wafer 1 before the exposure step 105 is performed.
[0037] In the first embodiment, in the crystal orientation detection step 103, the semiconductor wafer 1 is placed in the wafer cassette 40. At this time, the second surface 3 of the semiconductor wafer 1 is positioned downward, and the first surface 2 is exposed upward. In the first embodiment, in the crystal orientation detection step 103, the semiconductor wafer 1 having a photosensitive agent layer formed on the first surface 2 is placed in the wafer cassette 40.
[0038] In the first embodiment, in the crystal orientation detection step 103, a wafer cassette 40 containing semiconductor wafers 1 is placed on the cassette mounting table 321, and a wafer cassette 40 that does not contain semiconductor wafers 1, i.e., an empty wafer cassette 40, is placed on the cassette mounting table 322. In the first embodiment, in the crystal orientation detection step 103, an operator registers processing conditions in the control unit, and when the control unit receives an instruction from the operator to start the processing operation, the processing device 30 starts the operation of detecting the crystal orientation. Note that the processing conditions include the direction of the crystal orientation of the semiconductor wafers 1 contained in the wafer cassette 40 placed on the cassette mounting table 322.
[0039] In embodiment 1, in the crystal orientation detection step 103, the control unit of the processing device 30 causes the transport unit 35 to remove one semiconductor wafer 1 from the wafer cassette 40 placed on the cassette mounting table 321 and place it on the upper surface 331 of the holding unit 33.
[0040] In embodiment 1, in crystal orientation detection step 103, the control unit of processing device 30 suction-holds second side 3 of semiconductor wafer 1 on upper surface 331 of holding unit 33, and while rotating holding unit 33 around its axis, X-rays 36 from X-ray irradiation means 341 are incident on side surface 4 of semiconductor wafer 1 held by holding unit 33, and the reflected X-rays 36 are received by X-ray receiving means 342. In embodiment 1, in crystal orientation detection step 103, the control unit of processing device 30 detects the crystal orientation of semiconductor wafer 1 from the intensity of X-rays 36 received by X-ray receiving means 342.
[0041] In the present invention, the crystal orientation detection step 103 may be performed before the photosensitive agent layer formation step 102. In this case, the semiconductor wafer 1 is transported and processed in a constant manner from the time it is unloaded from the wafer cassette 40 in the photosensitive agent layer formation step 102 until the photosensitive agent layer is formed and the wafer is stored back in the wafer cassette 40, and it is desirable that the orientation of the semiconductor wafer 1 with respect to the wafer cassette 40 does not change before and after the photosensitive agent layer formation step 102.
[0042] (Wafer storage step) Fig. 8 is a front view schematically showing a wafer cassette containing wafers in the wafer containing step of the semiconductor wafer processing method shown in Fig. 3. Fig. 9 is a cross-sectional view taken along line IX-IX in Fig. 8. Wafer containing step 104 is a step in which, after performing crystal orientation detection step 103 and before performing exposure step 105, semiconductor wafer 1 is contained in wafer cassette 40 so that semiconductor wafer 1 is oriented in a predetermined direction relative to wafer cassette 40 based on the crystal orientation detected in crystal orientation detection step 103.
[0043] In the first embodiment, in the wafer storing step 104, the processing apparatus 30 stops the rotation of the holding unit 33 about its axis and the suction holding of the semiconductor wafer 1 on the upper surface 331, and causes the transfer unit 35 to carry the semiconductor wafer 1 from the upper surface 331 of the holding unit 33 into the wafer cassette 40 installed on the cassette mounting table 322. At this time, in the first embodiment, in the wafer storing step 104, the processing apparatus 30 causes the transfer unit 35 to carry the semiconductor wafer 1 into the wafer cassette 40 so that the (011) plane of the semiconductor wafer 1 is located in the center of the width direction of the semiconductor wafer 1 when viewed from the front of the opening 41 of the wafer cassette 40 through which the semiconductor wafer 1 is inserted and removed, as shown in, for example, FIGS.
[0044] Thus, in wafer storage step 104, the semiconductor wafer 1 is stored in the wafer cassette 40 with the (011) plane positioned in a predetermined direction relative to the wafer cassette 40, and the transport unit 35 stores the semiconductor wafer 1 in the wafer cassette 40 in an orientation such that the crystal orientation of the semiconductor wafer 1 is positioned in a predetermined direction with respect to the pattern, based on the crystal orientation of the semiconductor wafer 1 detected by the crystal orientation detection unit 34. Note that in the present invention, the predetermined orientation for storing the semiconductor wafer 1 in the wafer cassette 40 after crystal orientation detection is not limited to the orientation shown in FIGS.
[0045] (Exposure step) Fig. 10 is a side view schematically showing a state in which a semiconductor wafer is placed on a stage in the exposure step of the semiconductor wafer processing method shown in Fig. 3. Fig. 11 is a side view schematically showing a state in which a photosensitive agent layer on a semiconductor wafer placed on a stage is exposed in the exposure step of the semiconductor wafer processing method shown in Fig. 3. Fig. 12 is a side view schematically showing a state in which a photosensitive agent layer on a semiconductor wafer placed on a stage is developed in the exposure step of the semiconductor wafer processing method shown in Fig. 3.
[0046] The exposure step 105 is a step in which the photosensitive agent layer is irradiated with light 56 via a mask 53 or an optical modulator to transfer the pattern of the device to be formed on the first surface 2 onto the photosensitive agent layer. In the first embodiment, in the exposure step 105, the exposure apparatus 50 places the wafer cassette 40, which contains the semiconductor wafers 1 with their crystal orientations oriented in a predetermined direction in the wafer storage step 104, on a cassette storage table (not shown).
[0047] 10, in the exposure step 105, the exposure apparatus 50 places the semiconductor wafer 1 on the stage 51 in a state where the semiconductor wafer 1 is positioned relative to the pattern in a predetermined manner based on the crystal orientation of the semiconductor wafer 1 contained in the wafer cassette 40. Specifically, in the exposure step 105 in the embodiment 1, the transfer unit of the exposure apparatus 50 carries out the semiconductor wafer 1 from the wafer cassette 40 placed on a cassette placement table (not shown) with a constant movement, and places the semiconductor wafer 1 on the stage 51.
[0048] In this way, in the exposure step 105, the semiconductor wafer 1 is stored in the wafer cassette 40 in a predetermined orientation, so that the pattern of the mask 53 and the semiconductor wafer 1 are roughly aligned when the semiconductor wafer 1 is carried out onto the stage 51. In the first embodiment, the exposure apparatus 50 places the semiconductor wafer 1 on the stage 51 so that the (011) plane of the semiconductor wafer 1 is located in the center of the semiconductor wafer 1 in the width direction when viewed from the front of the stage 51, as shown in FIG.
[0049] In the first embodiment, in the exposure step 105, the exposure apparatus 50 irradiates a photosensitive agent layer on the semiconductor wafer 1 placed on the stage 51 with light 56 from a light source 55 through a condenser lens unit 52, a mask 53 corresponding to the pattern, and a projection lens unit 54, as shown in Fig. 11, thereby transferring the pattern to the photosensitive agent layer. Note that in the first embodiment, so-called maskless exposure may be performed in which the light 56 is irradiated via an optical modulator without using the mask 53. Thus, in the exposure step 105, the semiconductor wafer 1 is transported from the wafer cassette 40 to the stage 51, and the semiconductor wafer 1 supported by the stage 51 is irradiated with light 56.
[0050] 12, in the exposure step 105, the developing device 60 places the exposed second side 3 of the semiconductor wafer 1 on a table 61, sprays a developer from a developer supply nozzle 62 evenly onto the photosensitive agent layer, and supplies a rinse liquid from a rinse liquid supply nozzle 63, thereby forming a pattern on the first side 2 of the semiconductor wafer 1. Note that in the exposure step 105, if the photosensitive agent 24 is a positive resist, a pattern is formed in the areas not irradiated with light, and if the photosensitive agent 24 is a negative resist, a pattern is formed in the areas irradiated with light.
[0051] Thereafter, the semiconductor wafer 1 is repeatedly subjected to etching, removal of the photosensitive layer, formation of an insulating film, formation of an electrode layer, planarization, etc., to form devices on the first surface 2. The devices are, for example, integrated circuits such as ICs (Integrated Circuits) or LSIs (Large Scale Integrations), image sensors such as CCDs (Charge Coupled Devices) or CMOSs (Complementary Metal Oxide Semiconductors), or memories (semiconductor memory devices).
[0052] The semiconductor wafer 1 according to the first embodiment described above is formed in a disk shape without a notch on the outer edge, and therefore has the effect of enabling the formation of a larger number of devices.
[0053] Furthermore, the semiconductor wafer 1 according to the first embodiment has a side surface 4 that is a straight line in vertical cross section, which provides the effect of enabling more devices to be formed.
[0054] Furthermore, in the semiconductor wafer processing method according to the first embodiment, the semiconductor wafer 1 is positioned in a predetermined orientation relative to the pattern on the mask 53 in the exposure step 105 based on the crystal orientation detected in the crystal orientation detection step 103. Therefore, the semiconductor wafer processing method can transfer the pattern to the photosensitive agent layer in a predetermined orientation even if the semiconductor wafer 1 does not have a notch that indicates the crystal orientation.
[0055] In the present invention, the semiconductor wafer 1 may have a linear mirror surface 7 formed on the side surface 4 that indicates the crystal orientation, as shown in Fig. 13. Fig. 13 is a perspective view showing a modified example of the semiconductor wafer shown in Fig. 1, and the same parts as those in the first embodiment are designated by the same reference numerals and will not be described.
[0056] 13, the linear mirror surface portion 7 extends along the thickness direction of the semiconductor wafer 1 and is formed on the side surface 4 over the entire length in the thickness direction, but in the present invention, it is sufficient that the linear mirror surface portion 7 is formed on at least a portion in the thickness direction of the semiconductor wafer 1. Also, in the example shown in Fig. 13, the linear mirror surface portion 7 is formed along the (011) plane so as to be perpendicular to the crystal orientation
[0011] of the semiconductor wafer 1. The linear mirror surface portion 7 is formed on a mirror surface and has the highest light reflectance of any of the portions of the side surface 4.
[0057] 13, the width 8 of the linear mirror surface portion 7 (the chord length relative to the circle of the outer periphery of the semiconductor wafer 1) is 0.05 mm or more and 5 mm or less. The reason why the width 8 of the linear mirror surface portion 7 is 0.05 mm or more and 5 mm or less is that if it is less than 0.05 mm, the linear mirror surface portion 7 cannot be detected even by irradiating light and receiving reflected light, and if it exceeds 5 mm, there will be large variations in the timing of receiving reflected light, which will undesirably cause variations in the orientation of the semiconductor wafers 1 stored in the wafer cassette 40.
[0058] 13, the width 8 of the linear mirror surface portion 7 is 1 mm. When the semiconductor wafer 1 has the linear mirror surface portion 7 formed thereon as shown in FIG. 13, the crystal orientation may be detected by irradiating the side surface 4 with light in the crystal orientation detection step 103 and detecting the linear mirror surface portion 7 based on the amount of light reflected from the side surface 4.
[0059] The present invention is not limited to the above-described embodiment, and can be implemented in various modifications without departing from the gist of the present invention. [Explanation of symbols]
[0060] 1. Semiconductor wafer 2 Front page 3 Side 2 4 Sides 5. Chamfered side of first surface 6 Second surface side chamfer 24 Photosensitizer 30 Processing equipment 32,321,322 Cassette stand 33 Holding Unit 34 Crystal orientation detection unit 35 Transport unit 40 wafer cassettes 51 Stages 53 Mask 56 light 101 Wafer Preparation Steps 102 Photosensitive layer formation step 103 Crystal orientation detection step 104 Wafer storage step 105 exposure steps
Claims
1. A semiconductor wafer having a first surface and a second surface behind the first surface, A semiconductor wafer with a circular horizontal cross section that does not have any notches.
2. a side surface extending from the first surface to the second surface; 2. The semiconductor wafer according to claim 1, wherein the side surface is a straight line in a vertical cross section of the semiconductor wafer, a first-surface chamfer is formed at a corner between the first surface and the side surface, and a second-surface chamfer is formed at a corner between the second surface and the side surface.
3. A method for processing a semiconductor wafer, comprising: a wafer preparation step of preparing a semiconductor wafer having a circular horizontal cross section without a notch; a photosensitive layer forming step of applying a photosensitive agent to the semiconductor wafer to form a photosensitive agent layer; an exposure step of irradiating the photosensitive agent layer with light through a mask or a light modulator to transfer a pattern onto the photosensitive agent layer; a crystal orientation detection step of detecting a crystal orientation of the semiconductor wafer before the exposure step is performed, A method for processing a semiconductor wafer, wherein in the exposure step, the semiconductor wafer is positioned in a predetermined direction relative to the pattern based on the crystal orientation of the semiconductor wafer.
4. After the crystal orientation detection step is performed and before the exposure step is performed, a wafer storing step of storing the semiconductor wafer in the wafer cassette so that the semiconductor wafer is oriented in a predetermined direction relative to the wafer cassette based on the crystal orientation detected in the crystal orientation detecting step; In the exposure step, the semiconductor wafer is transported from the wafer cassette to a stage, and the semiconductor wafer supported by the stage is irradiated with the light; 4. The semiconductor wafer processing method according to claim 3, wherein in the wafer storing step, the semiconductor wafer is stored in the wafer cassette in an orientation such that the semiconductor wafer is positioned in the predetermined orientation with respect to the pattern in the exposure step.
5. A processing device, a cassette mounting table on which a wafer cassette is mounted; a holding unit that holds a semiconductor wafer; a crystal orientation detection unit that detects the crystal orientation of the semiconductor wafer held by the holding unit; a transport unit that transports the semiconductor wafer between the cassette mounting table and the holding unit, The transport unit stores the semiconductor wafer in the wafer cassette so that the semiconductor wafer is oriented in a predetermined direction relative to the wafer cassette based on the crystal orientation of the semiconductor wafer detected by the crystal orientation detection unit.
Citation Information
Patent Citations
Notch detection method
JP2022072520A