Mask, vapor deposition method and method for manufacturing device
The mask design with a silicon substrate, mask layer, and intermediate layers improves positional accuracy by addressing deformation issues, enabling precise deposition patterns.
Patent Information
- Application Number
- JP2024085085
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-05-24
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2044-05-24
AI Technical Summary
Deformation in the base material of a mask leads to shifts in the positions of the openings, affecting the positional accuracy of the mask layer.
A mask design incorporating a substrate made of silicon or a silicon compound, a mask layer with overlapping first regions and second regions, and an intermediate layer with silicon oxide or silicon nitride and metal layers to improve positional accuracy.
Enhances the positional accuracy of the mask layer, ensuring precise alignment and deposition patterns.
Smart Images

Figure 2025177923000001_ABST
Abstract
Description
[Technical Field]
[0001] SUMMARY OF THE DISCLOSURE Embodiments of the present disclosure relate to masks, deposition methods, and device manufacturing methods. [Background technology]
[0002] Vapor deposition is a known method for forming precise patterns. In vapor deposition, a mask having a plurality of openings formed therein is combined with a substrate. Then, a vapor deposition material is applied to the substrate through the openings in the mask. As a result, a vapor deposition layer containing the vapor deposition material is formed on the substrate in a pattern corresponding to the pattern of the openings in the mask. Vapor deposition is used, for example, as a method for forming pixels of an organic electroluminescence (EL) display device.
[0003] For example, Patent Document 1 discloses a deposition mask including a silicon-containing substrate and a mask layer having a plurality of openings formed therein. The combination of the silicon-containing substrate and the mask layer improves the shape and position accuracy of the through-holes in the mask layer. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] International Publication No. 2023 / 145951 Summary of the Invention [Problem to be solved by the invention]
[0005] When deformation such as distortion occurs in the base material, the positions of the plurality of openings in the mask layer are shifted from the ideal positions as a whole. [Means for solving the problem]
[0006] A mask according to an embodiment of the present disclosure may include a substrate including a first surface, a second surface opposite the first surface, and a plurality of first openings extending from the first surface to the second surface; a mask layer including a third surface opposite the second surface and a fourth surface opposite the third surface; and an intermediate layer positioned between the second surface of the substrate and the third surface of the mask layer. The substrate may include silicon or a silicon compound. The mask layer may include a plurality of first regions overlapping the first openings in a planar view and a second region positioned between the first regions and outside the first regions in a planar view. Each of the first regions may include an effective area including a plurality of second openings extending from the third surface to the fourth surface. The intermediate layer may include a first intermediate layer positioned on the second surface of the substrate and including silicon oxide or silicon nitride; and a second intermediate layer positioned between the first intermediate layer and the mask layer and including a metal. The second intermediate layer may include an exposed surface that overlaps the first opening but does not overlap the first intermediate layer in a plan view. [Effects of the Invention]
[0007] According to the embodiments of the present disclosure, the positional accuracy of the mask layer can be improved. [Brief explanation of the drawings]
[0008] [Figure 1] FIG. 1 is a cross-sectional view illustrating an example of an organic device. [Figure 2] FIG. 1 is a diagram showing an example of a vapor deposition apparatus equipped with a mask. [Figure 3] FIG. 2 is a plan view showing an example of a mask when viewed from the incident surface side. [Figure 4] FIG. 2 is a plan view showing an example of a mask when viewed from the exit surface side. [Figure 5] FIG. 4 is a cross-sectional view of the mask of FIG. 3 taken along line VV. [Figure 6] FIG. 2 is a cross-sectional view showing an example of an outer region of a base material and a frame. [Figure 7] 3 is a plan view showing an example of a first opening in a substrate and a first region in a mask layer. FIG. [Figure 8] FIG. 8 is a cross-sectional view of the mask of FIG. 7 taken along line VIII-VIII. [Figure 9] FIG. 2 is a cross-sectional view illustrating an example of an inner region of a substrate and a mask layer. [Figure 10] FIG. 2 is a cross-sectional view showing an example of an effective region of a mask layer. [Figure 11] FIG. 4 is a cross-sectional view showing an example of a step of forming a first intermediate layer. [Figure 12] FIG. 4 is a cross-sectional view showing an example of a step of forming a second intermediate layer. [Figure 13A] 5A to 5C are cross-sectional views showing an example of a step of forming a first resist layer. [Figure 13B] FIG. 10 is a plan view illustrating an example of a step of forming a first resist layer. [Figure 14] 10A to 10C are cross-sectional views showing an example of a step of forming a mask layer. [Figure 15] FIG. 10 is a cross-sectional view showing an example of a step of polishing a fourth surface of the mask layer. [Figure 16] 10A to 10C are cross-sectional views showing an example of a step of removing the first resist layer. [Figure 17] 5A to 5C are cross-sectional views showing an example of a step of forming a protective layer and a second resist layer. [Figure 18] 1A to 1C are cross-sectional views showing an example of a process for processing a substrate. [Figure 19] FIG. 10 is a cross-sectional view showing an example of a step of removing a part of the first intermediate layer. [Figure 20] FIG. 10 is a cross-sectional view showing an example of a step of forming a third resist layer partially on the second intermediate layer. [Figure 21] FIG. 10 is a cross-sectional view showing an example of a step of removing a part of the second intermediate layer. [Figure 22] 10A to 10C are cross-sectional views showing an example of a step of removing the second resist layer, the third resist layer, and the protective layer. [Figure 23] 10A and 10B are diagrams illustrating a heating step for heating a portion of a mask. [Figure 24A] FIG. 2 is a plan view showing an example of light irradiated onto a mask. [Figure 24B]FIG. 2 is a plan view showing an example of light irradiated onto a mask. [Figure 24C] FIG. 2 is a plan view showing an example of light irradiated onto a mask. [Figure 25] FIG. 10 is a plan view showing an example of a mask before a heating step is performed. [Figure 26] FIG. 10 is a plan view showing an example of a mask after a heating step has been performed. [Figure 27] FIG. 10 is a cross-sectional view showing a mask according to a modified example. DETAILED DESCRIPTION OF THE INVENTION
[0009] In this specification and drawings, unless otherwise specified, terms meaning the materials underlying a certain structure, such as "substrate," "sheet," and "film," are not to be distinguished from one another solely on the basis of differences in name.
[0010] In this specification and drawings, unless otherwise specified, terms that specify shapes, geometric conditions, and their degrees, such as "parallel" and "orthogonal," and values of lengths and angles, are not bound by strict meanings, but are interpreted to include a range within which similar functions can be expected.
[0011] In this specification and drawings, unless otherwise specified, when a certain component, such as a certain region, is referred to as "above" or "below," "upper" or "lower," or "upward" or "below" another component, such as another region, this includes cases where the component is in direct contact with the other component. It also includes cases where another component is contained between the component and the other component, i.e., cases where the components are in indirect contact. Furthermore, unless otherwise specified, the terms "above," "upper side," or "upper," or "under," "lower side," or "lower" may be used in the up-down direction.
[0012] In this specification, when multiple upper limit candidates and multiple lower limit candidate values are listed for a certain parameter, the numerical range of the parameter may be constructed by combining any one upper limit candidate with any one lower limit candidate. For example, consider a description that reads, "Parameter B is, for example, A1 or more, or may be A2 or more, or may be A3 or more. Parameter B is, for example, A4 or less, or may be A5 or less, or may be A6 or less." In this case, the numerical range of parameter B may be A1 or more and A4 or less, A1 or more and A5 or less, A1 or more and A6 or less, A2 or more and A4 or less, A2 or more and A5 or less, A2 or more and A6 or less, A3 or more and A4 or less, A3 or more and A5 or less, or A3 or more and A6 or less.
[0013] In this specification and drawings, unless otherwise specified, the state in which the face of element A is "opposed to" the face of element B includes not only the case in which the face of element A is in contact with the face of element B, but also the case in which element C is located between the faces of element A and element B. In other words, the term "opposed to" is a term that indicates the orientation of two faces.
[0014] In this specification and drawings, unless otherwise specified, the same or similar symbols are used to designate the same parts or parts having similar functions, and repeated explanations may be omitted. Furthermore, for the sake of convenience, the dimensional ratios of the drawings may differ from the actual ratios, and some components may be omitted from the drawings.
[0015] In this specification and drawings, unless otherwise specified, one embodiment of this specification may be combined with other examples to the extent that no contradiction occurs. In addition, other examples may also be combined with each other to the extent that no contradiction occurs.
[0016] Unless otherwise specified, in the present specification and drawings, when two or more steps or processes are disclosed in a method such as a manufacturing method, other steps or processes that are not disclosed may be performed between the disclosed steps or processes. In addition, the order of the disclosed steps or processes is arbitrary within the range that does not cause a contradiction.
[0017] In one embodiment of the present specification, an example will be described in which a mask is used to form an organic layer or an electrode on a substrate when manufacturing an organic electroluminescence (EL) display device. However, the use of the mask is not particularly limited, and this embodiment can be applied to masks used for various purposes. For example, the mask of this embodiment may be used to form electrodes of a device for displaying or projecting images or videos to express virtual reality (VR) or augmented reality (AR). The mask of this embodiment may also be used to form electrodes of a display device other than an organic electroluminescence (EL) display device, such as an electrode of a liquid crystal display device. The mask of this embodiment may also be used to form components of devices other than a display device, such as an electrode of a pressure sensor.
[0018] A first aspect of the present disclosure is a mask, comprising: a substrate including a first surface, a second surface opposite the first surface, and a plurality of first openings extending from the first surface to the second surface; a mask layer including a third surface facing the second surface and a fourth surface located on the opposite side of the third surface; an intermediate layer located between the second surface of the substrate and the third surface of the mask layer, the substrate comprises silicon or a silicon compound; the mask layer includes a plurality of first regions overlapping the first openings in a plan view, and a second region positioned between the plurality of first regions and outside the plurality of first regions in a plan view; each of the plurality of first regions includes an effective region including a plurality of second openings penetrating from the third surface to the fourth surface; the intermediate layer includes a first intermediate layer located on the second surface of the substrate and containing silicon oxide or silicon nitride, and a second intermediate layer located between the first intermediate layer and the mask layer and containing a metal; The second intermediate layer is a mask that includes an exposed surface that overlaps the first opening but does not overlap the first intermediate layer in a plan view.
[0019] A second aspect of the present disclosure may include the following aspect in the mask according to the first aspect described above: Each of the plurality of first regions may include a peripheral region surrounding the effective region in a plan view, and the second intermediate layer may extend to overlap the peripheral region of the first region and the second region of the mask layer in a plan view.
[0020] A third aspect of the present disclosure may include the following aspect in the mask according to the first or second aspect: The second intermediate layer may extend so as not to overlap the effective area of the first region of the mask layer in a plan view.
[0021] A fourth aspect of the present disclosure may be the mask according to any one of the first to third aspects described above, further comprising the following features: The first intermediate layer may have a thickness of 0.5 μm or more.
[0022] A fifth aspect of the present disclosure may be the mask according to any one of the first to fourth aspects described above, further comprising the following: The first intermediate layer may have a thickness greater than a thickness of the second intermediate layer.
[0023] A sixth aspect of the present disclosure may be the mask according to any one of the first to fifth aspects described above, further comprising the following: The second intermediate layer may include at least a layer made of aluminum or an aluminum alloy.
[0024] A seventh aspect of the present disclosure may be the mask according to any one of the first to sixth aspects described above, further comprising the following: The second intermediate layer may include at least a layer made of titanium or a titanium alloy.
[0025] An eighth aspect of the present disclosure may be the mask according to any one of the first to seventh aspects described above, further comprising the following: The second intermediate layer may include a first layer made of titanium or a titanium alloy, and a second layer located between the first layer and the mask layer and made of aluminum or an aluminum alloy.
[0026] A ninth aspect of the present disclosure may be the mask according to any one of the first to eighth aspects described above, further comprising the following: The base material may include an inner region located between the plurality of first openings in a plan view, and an outer region extending along an outer edge of the base material and surrounding the plurality of first openings and the inner region in a plan view, and the mask may include a frame connected to the outer region.
[0027] A tenth aspect of the present disclosure may include the following aspect in the mask according to the ninth aspect described above: The mask may include an adhesive layer located between the first surface of the outer region of the substrate and the frame.
[0028] An eleventh aspect of the present disclosure is a deposition method for forming a deposition layer on a substrate using a mask, comprising: The mask is a substrate including a first surface, a second surface opposite the first surface, and a plurality of first openings extending from the first surface to the second surface; a mask layer including a third surface facing the second surface and a fourth surface located on the opposite side of the third surface; an intermediate layer located between the second surface of the substrate and the third surface of the mask layer, the substrate comprises silicon or a silicon compound; the mask layer includes a plurality of first regions overlapping the first openings in a plan view, and a second region positioned between the plurality of first regions and outside the plurality of first regions in a plan view; each of the plurality of first regions includes an effective region including a plurality of second openings penetrating from the third surface to the fourth surface; The vapor deposition method includes: an alignment step of adjusting the position of the mask relative to the substrate; a deposition step in which the material that has passed through the first opening and the second opening is deposited on the substrate, thereby forming the deposition layer; The alignment step is a deposition method that includes a heating step of heating a portion of the mask.
[0029] A twelfth aspect of the present disclosure may be the vapor deposition method according to the eleventh aspect described above, further comprising the following aspect: The heating step may include an irradiation step of irradiating the portion of the mask with light.
[0030] A thirteenth aspect of the present disclosure may include the following aspect in the vapor deposition method according to the twelfth aspect described above: The intermediate layer may include a first intermediate layer located on the second surface of the substrate and containing silicon oxide, and a second intermediate layer located between the first intermediate layer and the mask layer and containing metal, the second intermediate layer may include an exposed surface that overlaps the first opening but does not overlap the first intermediate layer in a planar view, and in the irradiating step, light may be irradiated onto a portion of the exposed surface of the second intermediate layer.
[0031] A fourteenth aspect of the present disclosure may include the following aspect in the vapor deposition method according to the thirteenth aspect described above: Each of the plurality of first regions may include a peripheral region surrounding the effective region in a plan view, and the second intermediate layer may extend to overlap the peripheral region of the first region and the second region of the mask layer in a plan view.
[0032] A fifteenth aspect of the present disclosure may include the following aspect in the vapor deposition method according to the thirteenth or fourteenth aspect: The second intermediate layer may extend so as not to overlap the effective area of the first region of the mask layer in a plan view.
[0033] A sixteenth aspect of the present disclosure may be the vapor deposition method according to any one of the thirteenth to fifteenth aspects described above, further comprising the following: The second intermediate layer may include a first layer made of titanium or a titanium alloy, and a second layer made of aluminum or an aluminum alloy and positioned between the first layer and the mask layer, and in the irradiating step, light may be irradiated onto a portion of the exposed surface of the first layer of the second intermediate layer.
[0034] A seventeenth aspect of the present disclosure may be the vapor deposition method according to any one of the eleventh to sixteenth aspects described above, further comprising the following: The substrate may include an inner region located between the plurality of first openings in a plan view, and an outer region extending along an outer edge of the substrate and surrounding the plurality of first openings and the inner region in a plan view, and the mask may include a frame connected to the outer region.
[0035] An eighteenth aspect of the present disclosure may include the following aspect in the vapor deposition method according to the seventeenth aspect described above: The mask may include an adhesive layer located between the first surface of the outer region of the base and the frame, and a portion of the adhesive layer may deform to follow the portion of the mask heated in the heating step.
[0036] A nineteenth aspect of the present disclosure is a method for manufacturing a device, comprising: A method for manufacturing a device, comprising the step of forming the deposition layer on the substrate by the deposition method according to any one of the eleventh to eighteenth aspects described above.
[0037] An embodiment of the present disclosure will be described in detail with reference to the drawings. Note that the embodiment described below is an example of an embodiment of the present disclosure, and the present disclosure should not be interpreted as being limited to only these embodiments.
[0038] An organic device 100 including an organic layer formed by using a mask will be described. The organic device 100 includes an organic layer or an electrode formed by using a mask. Figure 1 is a cross-sectional view showing an example of the organic device 100.
[0039] The organic device 100 includes a substrate 110 and a plurality of elements 115 arranged along an in-plane direction of the substrate 110. The substrate 110 includes a first surface 111 and a second surface 112 located on the opposite side of the first surface 111. The elements 115 are located on the first surface 111. The elements 115 are, for example, pixels. The substrate 110 may include two or more types of elements 115. For example, the substrate 110 may include a first element 115A and a second element 115B. Although not shown, the substrate 110 may also include a third element. The first element 115A, the second element 115B, and the third element are, for example, a red pixel, a blue pixel, and a green pixel.
[0040] The element 115 may include a first electrode 120 , an organic layer 130 disposed on the first electrode 120 , and a second electrode 140 disposed on the organic layer 130 .
[0041] The organic device 100 may include an insulating layer 160 located between two adjacent first electrodes 120 in a planar view. The insulating layer 160 may contain, for example, polyimide. The insulating layer 160 may overlap an edge of the first electrode 120. "Planar view" means viewing an object along the normal direction to the surface of a plate-like member such as the substrate 110.
[0042] The substrate 110 may be made of an insulating material. Materials that can be used for the substrate 110 include, for example, inflexible materials such as silicon, quartz glass, Pyrex (registered trademark) glass, and synthetic quartz plates, as well as flexible materials such as resin films, optical resin plates, and thin glass. The substrate 110 may have a planar shape similar to that of silicon wafers used in semiconductor manufacturing. In this case, the substrate 110 can be processed using equipment for carrying out semiconductor manufacturing processes. For example, the first electrode 120, the insulating layer 160, and the like can be formed on the substrate 110 using equipment for carrying out semiconductor manufacturing processes.
[0043] The element 115 is configured to realize some function by applying a voltage between the first electrode 120 and the second electrode 140, or by causing a current to flow between the first electrode 120 and the second electrode 140. For example, if the element 115 is a pixel of an organic EL display device, the element 115 can emit light that forms an image.
[0044] The first electrode 120 includes a conductive material. For example, the first electrode 120 includes a metal, a conductive metal oxide, or another conductive inorganic material. The first electrode 120 may include a transparent and conductive metal oxide such as indium tin oxide.
[0045] The organic layer 130 includes an organic material. When a current is applied to the organic layer 130, the organic layer 130 can perform some function. Applying a current means that a voltage is applied to the organic layer 130 or that a current flows through the organic layer 130. The organic layer 130 may be, for example, a light-emitting layer that emits light when a current is applied, or a layer whose light transmittance or refractive index changes when a current is applied. The organic layer 130 may include an organic semiconductor material.
[0046] 1, the organic layer 130 may include a first organic layer 130A and a second organic layer 130B. The first organic layer 130A is included in the first element 115A. The second organic layer 130B is included in the second element 115B. Although not shown, the organic layer 130 may include a third organic layer included in a third element. The first organic layer 130A, the second organic layer 130B, and the third organic layer are, for example, a red light-emitting layer, a blue light-emitting layer, and a green light-emitting layer.
[0047] When a voltage is applied between the first electrode 120 and the second electrode 140, the organic layer 130 located therebetween is driven. If the organic layer 130 is an emitting layer, light is emitted from the organic layer 130 and extracted to the outside from the second electrode 140 side or the first electrode 120 side.
[0048] The organic layer 130 may further include a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, and the like.
[0049] The second electrode 140 may include a conductive material such as a metal. Examples of materials that can be used for the second electrode 140 include platinum, gold, silver, copper, iron, tin, chromium, aluminum, indium, lithium, sodium, potassium, calcium, magnesium, chromium, carbon, and alloys thereof. As shown in FIG. 1, the second electrode 140 may extend so as to overlap two adjacent organic layers 130 in a plan view.
[0050] Next, a method for forming the organic layer 130 on the substrate 110 by vapor deposition will be described. Fig. 2 is a diagram showing a vapor deposition apparatus 10. The vapor deposition apparatus 10 performs a vapor deposition process for depositing a vapor deposition material on a target object.
[0051] As shown in FIG. 2, the vapor deposition apparatus 10 may include therein a vapor deposition source 6, a heater 8, and a mask 20. The vapor deposition apparatus 10 may further include an exhaust means for creating a vacuum atmosphere inside the vapor deposition apparatus 10. The vapor deposition source 6 is, for example, a crucible. The vapor deposition source 6 contains a vapor deposition material 7 such as an organic material or a metal material. The heater 8 heats the vapor deposition source 6 to evaporate the vapor deposition material 7 under a vacuum atmosphere.
[0052] The mask 20 includes an incident surface 201, an exit surface 202, a plurality of first openings 31, and a plurality of second openings 41. The incident surface 201 faces the deposition source 6. The exit surface 202 is located on the opposite side of the incident surface 201. The exit surface 202 faces the first surface 111 of the substrate 110. The first opening 31 is located on the incident surface 201. The second opening 41 is located on the exit surface 202. The first opening 31 and the second opening 41 are connected in the thickness direction of the mask 20. The plurality of second openings 41 overlap one first opening 31 in a plan view. A portion of the deposition material 7 that enters the mask 20 from the exit surface 202 passes through the first openings 31 and the second openings 41 and exits from the exit surface 202. The deposition material 7 that exits from the exit surface 202 adheres to the first surface 111 of the substrate 110. The exit surface 202 of the mask 20 may be in contact with the first surface 111 of the substrate 110 .
[0053] As shown in FIG. 2 , the deposition apparatus 10 may include a magnet 5 disposed on the second surface 112 side of the substrate 110. When the mask 20 includes a magnetic material, the magnet 5 can attract the mask 20 toward the substrate 110 by magnetic force. This can reduce or eliminate the gap between the mask 20 and the substrate 110. This can suppress the occurrence of a shadow during the deposition process. In this application, the shadow refers to a phenomenon in which the thickness of the organic layer 130 formed near the wall surface of the second opening 41 is smaller than the thickness of the organic layer 130 formed at the center of the second opening 41. The shadow occurs when the deposition material 7 adheres to the wall surface of the mask 20 or when the deposition material 7 enters the gap between the mask 20 and the substrate 110.
[0054] The mask 20 may be supported by a frame 60. The frame 60 may be located at the incident surface 201 of the mask 20. The frame 60 includes a frame first surface 601 and a frame second surface 602. A portion of the frame second surface 602 faces the incident surface 201 of the mask 20. The frame first surface 601 is located on the opposite side of the frame second surface 602.
[0055] The frame 60 is formed with one third opening 61 penetrating from the frame first surface 601 to the frame second surface 602. The one third opening 61 overlaps with the multiple first openings 31 in a plan view. An apparatus including the mask 20 and the frame 60 is also referred to as a mask apparatus 15.
[0056] Next, the mask 20 and the mask device 15 will be described in detail. Fig. 3 is a plan view showing an example of the mask 20 and the mask device 15 when viewed from the side of the incident surface 201. Fig. 4 is a plan view showing an example of the mask 20 and the mask device 15 when viewed from the side of the exit surface 202. Fig. 5 is a cross-sectional view of the mask 20 and the mask device 15 taken along line VV in Fig. 3.
[0057] As shown in FIG. 5, the mask 20 includes a substrate 30 , a mask layer 40 , and an intermediate layer 50 .
[0058] The substrate 30 includes a first surface 301, a second surface 302, a plurality of first openings 31, and a plurality of first wall surfaces 32. The first surface 301 may constitute the incident surface 201. The second surface 302 is located on the opposite side of the first surface 301. The first wall surface 32 is located between the first surface 301 and the second surface 302.
[0059] The first opening 31 penetrates the substrate 30 from the first surface 301 to the second surface 302. As shown in FIG. 3 , the substrate 30 may include a plurality of first openings 31. The plurality of first openings 31 may be aligned in a first direction D1 and a second direction D2. The second direction D2 may be perpendicular to the first direction D1. The first direction D1 and the second direction D2 are directions parallel to the first surface 301.
[0060] One first opening 31 may correspond to one device. For example, one first opening 31 may correspond to one screen of an organic EL display device. A mask 20 including multiple first openings 31 can simultaneously form organic layer patterns corresponding to multiple screens on the substrate 110. As shown in FIG. 3 , the first opening 31 may have a rectangular outline in a plan view.
[0061] The first wall surface 32 faces the first opening 31. In the example shown in FIG.
[0062] 3 and 5, the region of the substrate 30 other than the first openings 31 may be divided into an outer region 35 and an inner region 36. The inner region 36 is a region of the substrate 30 located between two adjacent first openings 31 in a plan view. The outer region 35 is a region of the substrate 30 located between an outer edge 303 of the substrate 30 and the first openings 31 in a plan view. As shown in FIG. 3, the inner region 36 may extend in a first direction D1 and a second direction D2.
[0063] 3 and 4, the base material 30 may include an alignment mark 39. The alignment mark 39 is formed, for example, on the second surface 302. The alignment mark 39 may also be formed on the first surface 301. The alignment mark 39 is used, for example, to adjust the relative position of the substrate 110 with respect to the mask 20. If the substrate 110 has the property of transmitting visible light, the alignment mark 39 can be seen through the substrate 110.
[0064] 3 and 4, the alignment mark 39 may have a circular outline in a plan view. Although not shown, the alignment mark 39 may have an outline other than a circle, such as a rectangle or a cross. The alignment mark 39 may be located in the outer region 35 or the inner region 36.
[0065] The shape of the alignment mark 39 in the cross-sectional view is arbitrary. For example, the alignment mark 39 may include a recess located on the first surface 301 or the second surface 302. The alignment mark 39 may include a hole penetrating from the first surface 301 to the second surface 302. The recess and hole may be formed by etching the first surface 301 or the second surface 302. The recess and hole may be formed by irradiating the first surface 301 or the second surface 302 with a laser. For example, the alignment mark 39 may include a layer located on the first surface 301 or the second surface 302. The layer is formed of a material different from that of the substrate 30. The alignment mark 39 may be formed in a layer other than the substrate 30.
[0066] The substrate 30 includes silicon or a silicon compound. The substrate 30 is produced, for example, by processing a silicon wafer. As shown in FIG. 3, the outer edge 303 of the substrate 30 may include a linear portion. The linear portion is also referred to as an orientation flat. Although not shown, the outer edge 303 may have a notch formed therein. The notch is also referred to as a notch. The orientation flat and the notch represent the crystal orientation of the silicon wafer. The substrate 30 may have a property of transmitting light used in the heating process described below. The silicon compound is, for example, glass such as quartz glass.
[0067] The maximum dimension S1 of the substrate 30 in a plan view is, for example, 100 mm or more, or may be 150 mm or more, or may be 200 mm or more. The dimension S1 is, for example, 500 mm or less, or may be 400 mm or less, or may be 300 mm or less.
[0068] The dimension S2 of the first openings 31 in the direction in which the first openings 31 are arranged is, for example, 5 mm or more, or may be 10 mm or more, or may be 20 mm or more. The dimension S2 is, for example, 100 mm or less, or may be 50 mm or less, or may be 30 mm or less.
[0069] The distance S3 between two first openings 31 in the direction in which the first openings 31 are arranged is, for example, 0.1 mm or more, or may be 0.5 mm or more, or 1.0 mm or more. The distance S3 is, for example, 20 mm or less, or may be 15 mm or less, or may be 10 mm or less.
[0070] The thickness of the substrate 30 is defined as the maximum thickness T1 of the outer region 35. Thickness T1 is, for example, 50 μm or more, or may be 100 μm or more, or may be 200 μm or more. Thickness T1 is, for example, 1000 μm or less, or may be 800 μm or less, or may be 600 μm or less.
[0071] Next, the mask layer 40 will be described. As shown in Fig. 5, the mask layer 40 includes a third surface 401, a fourth surface 402, and a plurality of second openings 41. The third surface 401 faces the second surface 302 or the first openings 31 of the substrate 30. The fourth surface 402 is located on the opposite side of the third surface 401 in the thickness direction of the substrate 30. The fourth surface 402 may constitute the exit surface 202 of the mask 20.
[0072] The second openings 41 penetrate from the third surface 401 to the fourth surface 402. One second opening 41 corresponds to one vapor deposition layer. The vapor deposition layer is, for example, the organic layer 130. A group of the regularly arranged second openings 41 corresponds to one screen of the organic EL display device. As shown in FIGS. 3 and 4 , a group of the regularly arranged second openings 41 may overlap one first opening 31 in plan view.
[0073] 4 and 5, the mask layer 40 may include, in a plan view, a plurality of first regions 43 and a plurality of second regions 44. In other words, the mask layer 40 may be partitioned, in a plan view, into a plurality of first regions 43 and a plurality of second regions 44. The first regions 43 are regions of the mask layer 40 that overlap the first openings 31 in a plan view.
[0074] The second region 44 is a region located between the first regions 43 and outside the first regions 43 in a planar view. The "outside" is the side away from the center point of the mask 20 in a planar view. The "inside" is the side closer to the center point of the mask 20 in a planar view.
[0075] The intermediate layer 50 will now be described. The intermediate layer 50 is a layer located between the second surface 302 of the substrate 30 and the third surface 401 of the mask layer 40 in the thickness direction of the mask 20. The intermediate layer 50 is at least located in a position overlapping the inner region 36 of the substrate 30 in a plan view. A portion of the intermediate layer 50 may be located in a position overlapping the first opening 31 of the substrate 30.
[0076] The frame 60 will now be described. The frame 60 is a member connected to the mask 20 for the purpose of being held when handling the mask 20, for example, when moving the mask 20. Connecting the frame 60 to the mask 20 makes it easier to handle the mask 20.
[0077] 5 , the frame 60 is connected to the outer region 35 of the substrate 30. For example, the second frame surface 602 of the frame 60 may be connected to the first surface 301 of the outer region 35 of the substrate 30. An adhesive layer 70 may be disposed between the first surface 301 of the outer region 35 and the second frame surface 602 of the frame 60. That is, the frame 60 may be connected to the substrate 30 via the adhesive layer 70.
[0078] In a plan view, the frame 60 does not overlap the first opening 31 of the base material 30. Furthermore, in a plan view, at least a portion of the frame 60 extends to the outside of the outer edge 303 of the base material 30. This allows the frame 60 to expand the area for gripping the mask 20 when handling it. The frame 60 may include an area that extends circumferentially outside the outer edge 303 of the base material 30 in a plan view. The frame 60 may include an outer edge 603 that surrounds the outer edge 303 of the base material 30 in a plan view.
[0079] FIG. 6 is a cross-sectional view showing an example of the outer region 35 of the base material 30 and the frame 60. As shown in FIG. The distance S9 between the outer edge 603 of the frame 60 and the outer edge 303 of the base material 30 in the planar direction of the first surface 301 of the base material 30 is, for example, 5 mm or more, or may be 10 mm or more, or may be 15 mm or more. The distance S9 is, for example, 100 mm or less, or may be 60 mm or less, or may be 30 mm or less.
[0080] The frame 60 may include a glass material or a metal material. Examples of the glass material include quartz glass, borosilicate glass, alkali-free glass, and soda glass. Examples of the metal material include Invar and stainless steel such as SUS430 and SUS304. When the frame 60 includes these materials, the rigidity of the frame 60 can be made higher than the rigidity of the substrate 30. The material of the frame 60 may be determined so that the frame 60 has the required rigidity, taking into consideration the gripping strength of an operator or robot hand handling the mask device 15.
[0081] The linear thermal expansion coefficient of the frame 60 is preferably approximately the same as the linear thermal expansion coefficient of the base material 30. This makes it possible to prevent a difference in the elongation rate between the frame 60 and the base material 30 when the mask device 15 is heated. The absolute value of the difference between the linear thermal expansion coefficient of the frame 60 and the linear thermal expansion coefficient of the base material 30 is, for example, 15 ppm / °C or less, or may be 10 ppm / °C or less, or may be 5.0 ppm / °C or less.
[0082] The thickness T5 of the frame 60 is, for example, 500 μm or more, and may be 1 mm or more, or 5 mm or more. The thickness T5 is, for example, 30 mm or less, and may be 20 mm or less, or 10 mm or less.
[0083] The adhesive layer 70 fixes the frame 60 to the substrate 30. The adhesive layer 70 may include a surface in contact with the first surface 301 and a surface in contact with the frame second surface 602. Although not shown, the mask device 15 may include a layer located between the frame second surface 602 of the frame 60 and the adhesive layer 70. Although not shown, the mask device 15 may include a layer located between the first surface 301 of the substrate 30 and the adhesive layer 70.
[0084] The adhesive layer 70 may include a glass material, an inorganic material, a metal material, or a resin material. The adhesive layer 70 may be formed of glass frit, glass paste, solder paste, conductive paste, epoxy resin, polyimide, acrylic resin, or the like. To prevent outgassing from the adhesive layer 70 during the vapor deposition process in the vapor deposition apparatus 10, materials such as Aremcobond 526N, a high-heat-resistant epoxy adhesive manufactured by Aremco Products, or WORLDROCK® 5910 (product number) or WORLDROCK® 8723K9B (product number) UV-curable adhesives manufactured by Kyoritsu Chemical Industries Co., Ltd. may be used as the material for forming the adhesive layer 70. Using a highly solvent-resistant material for the adhesive layer 70 can prevent deformation of the adhesive layer 70 upon contact with cleaning fluids, which can cause the frame 60 to unintentionally separate from the mask 20 when the mask device 15 used in the vapor deposition process is cleaned to remove the vapor deposition material. For example, the ultraviolet curing adhesive "ThreeBond (registered trademark) 3026E (product name)" manufactured by ThreeBond Co., Ltd. can be used as the material for forming the adhesive layer 70.
[0085] The thickness T6 of the adhesive layer 70 is, for example, 0.05 μm or more, or may be 5 μm or more, or 10 μm or more. The thickness T6 of the adhesive layer 70 is, for example, 100 μm or less, or may be 50 μm or less, or may be 20 μm or less.
[0086] The dimension S10 of the adhesive layer 70 in the direction from the inner edge 604 toward the outer edge 603 of the frame 60 is, for example, 5 mm or more, or may be 10 mm or more, or 15 mm or more. The dimension S10 is, for example, 100 mm or less, or may be 60 mm or less, or may be 30 mm or less. The inner edge 604 of the frame 60 faces the third opening 61.
[0087] As will be described later, in this embodiment, a heating step is performed in which a portion of the mask 20 is heated during an alignment step for adjusting the position of the mask 20 relative to the substrate 110. When the heating step is performed while the mask 20 is connected to the frame 60 by the adhesive layer 70, the portion of the adhesive layer 70 may deform in response to the movement of the heated portion of the mask 20. For example, the portion of the adhesive layer 70 may deform in response to the thermal expansion of the heated portion of the mask 20. The frame 60 may remain stationary. The thickness T6 and dimension S10 of the adhesive layer 70 may be set to cause such deformation. The larger the thickness T6, the more easily the portion of the adhesive layer 70 deforms in response to the movement of the heated portion of the mask 20. The smaller the dimension S10, the more easily the portion of the adhesive layer 70 deforms in response to the movement of the heated portion of the mask 20.
[0088] The mask 20 will be described in detail. Fig. 7 is a plan view showing an example of the first openings 31 of the substrate 30 and the first regions 43 of the mask layer 40. Fig. 8 is a cross-sectional view of the mask 20 taken along line VIII-VIII of Fig. 7.
[0089] The inner region 36 of the base material 30 may include, in a plan view, a plurality of first bar regions 361 and a plurality of second bar regions 362. The first bar region 361 is a portion of the inner region 36 extending in the first direction D1. The second bar region 362 is a portion of the inner region 36 extending in the second direction D2. In a plan view, each of the plurality of first openings 31 is surrounded by two first bar regions 361 and two second bar regions 362. The region where the first bar region 361 and the second bar region 362 intersect is also referred to as an intersection region 363.
[0090] Each of the multiple first regions 43 may include an effective region 431 and a peripheral region 432. The effective region 431 is a portion of the first region 43 that includes the multiple second openings 41. The multiple second openings 41 located in the effective region 431 are regularly arranged in a planar view. For example, the multiple second openings 41 located in the effective region 431 are regularly arranged along the first direction D1 and the second direction D2. The peripheral region 432 is a portion of the first region 43 that surrounds the effective region 431 in a planar view. The effective region 431 and the peripheral region 432 are bounded by an envelope 433 that surrounds the regularly arranged multiple second openings 41 in a planar view.
[0091] As shown in FIG. 8 , the intermediate layer 50 includes at least a first intermediate layer 51 and a second intermediate layer 52. The first intermediate layer 51 is located on the second surface 302 of the inner region 36 of the substrate 30. The first intermediate layer 51 does not have to overlap the first opening 31 in a planar view. For example, the first intermediate layer 51 may include an inner edge 511 that coincides with the first wall surface 32 of the inner region 36 of the substrate 30. "Coinciding" means that the difference in position between the first wall surface 32 of the inner region 36 and the inner edge 511 of the first intermediate layer 51 in the planar direction of the second surface 302 of the substrate 30 is 1.0 μm or less.
[0092] The first intermediate layer 51 may also be located on the second surface 302 of the outer region 35 of the substrate 30. For example, the first intermediate layer 51 may extend to overlap the outer region 35 and the inner region 36 of the substrate 30.
[0093] The first intermediate layer 51 may be made of an insulating material. For example, the first intermediate layer 51 may contain an inorganic compound such as silicon oxide or silicon nitride. The first intermediate layer 51 has a lower thermal conductivity than the second intermediate layer 52. Therefore, heat conduction in the thickness direction of the first intermediate layer 51 is less likely to occur than heat conduction in the surface direction of the second intermediate layer 52. The first intermediate layer 51 may have a property of transmitting light used in the heating step described below.
[0094] The second intermediate layer 52 is located between the first intermediate layer 51 and the mask layer 40. The second intermediate layer 52 includes an exposed surface 522. The exposed surface 522 is a surface of the second intermediate layer 52 that overlaps the first opening 31 but does not overlap the first intermediate layer 51 in a plan view. The exposed surface 522 faces the first opening 31.
[0095] The second intermediate layer 52 may be made of a conductive material. For example, the second intermediate layer 52 may contain a metal. The second intermediate layer 52 has a higher thermal conductivity than the first intermediate layer 51. When light is irradiated onto the mask 20 in a heating process described below, the light energy is converted into heat at the exposed surface 522. The heat is transferred along the surface direction of the second intermediate layer 52, thereby heating the first and second bar regions 361 and 362 around the portion of the mask 20 irradiated with light. Thermal expansion due to heating occurs in the first and second bar regions 361 and 362 of a portion of the inner region 36, thereby partially adjusting the position of the mask 20 relative to the substrate 110. For example, the position of a portion of the first openings 31 of the mask 20 relative to the substrate 110 is adjusted.
[0096] The metal of the second intermediate layer 52 is, for example, nickel, copper, titanium, aluminum, iron, or an alloy thereof. For example, the second intermediate layer 52 may include at least a layer made of aluminum or an aluminum alloy. For example, the second intermediate layer 52 may include at least a layer made of titanium or a titanium alloy. For example, the second intermediate layer 52 may include at least a layer made of an iron alloy containing nickel. An example of an iron alloy containing nickel is permalloy. Permalloy is an iron alloy containing 35% to 80% by weight of nickel.
[0097] 7 and 8, the second intermediate layer 52 may extend so as to overlap, in a plan view, the peripheral region 432 of the first region 43 and the second region 44 of the mask layer 40. The energy of light received by the exposed surface 522 of the second intermediate layer 52 is transferred as heat to the portion of the second intermediate layer 52 that overlaps, in a plan view, the second region 44 and the inner region 36.
[0098] One second intermediate layer 52 may extend so as to overlap the peripheral regions 432 of multiple first regions 43. For example, one second intermediate layer 52 may extend so as to overlap the peripheral regions 432 of four or more first regions 43. By having one second intermediate layer 52 overlap multiple peripheral regions 432, the multiple first rail regions 361 and the multiple second rail regions 362 can be heated uniformly.
[0099] Although not shown, the second intermediate layer 52 may be divided so that the second intermediate layer 52 is not continuous across the entire area of the mask 20. For example, in one mask 20, the second intermediate layer 52 may be divided into at least four or more pieces. By dividing the second intermediate layer 52, the range through which heat is conducted by the second intermediate layer 52 is limited. This allows thermal expansion to occur preferentially only in a portion of the multiple first crosspiece regions 361 and the multiple second crosspiece regions 362.
[0100] 7 and 8, the second intermediate layer 52 may extend so as not to overlap the effective region 431 of the first region 43 of the mask layer 40 in a planar view. For example, the second intermediate layer 52 may include an inner edge 521 that surrounds the effective region 431 in a planar view. Since the second intermediate layer 52 does not overlap the effective region 431, it is possible to suppress a rise in the temperature of the effective region 431 in a heating step described below.
[0101] FIG. 9 is a cross-sectional view showing an example of the inner region 36 of the substrate 30 and the mask layer 40. FIG. 10 is a cross-sectional view showing an effective area 431 of the first region 43 of the mask layer 40. The mask layer 40 includes a second wall surface 42 facing the second opening 41. Symbol S6 represents the distance between the second wall surface 42 of the mask layer 40 and the first wall surface 32 of the substrate 30 in the surface direction of the substrate 30. The distance S6 is, for example, 1.0 μm or more, may be 2.0 μm or more, or may be 3.0 μm or more. The distance S6 is, for example, 10.0 μm or less, may be 7.0 μm or less, or may be 5.0 μm or less.
[0102] The symbol S7 represents the distance in the surface direction of the substrate 30 between the inner edge 521 of the second intermediate layer 52 and the first wall surface 32 of the substrate 30. The distance S7 may be smaller than the distance S6. The distance S7 is, for example, 1.0 μm or more, or may be 2.0 μm or more, or may be 3.0 μm or more. The distance S6 is, for example, 10.0 μm or less, or may be 7.0 μm or less, or may be 5.0 μm or less.
[0103] The first intermediate layer 51 has a thickness T3. The thickness T3 is, for example, 0.1 μm or more, and may be 0.3 μm or more, or 0.5 μm or more. The greater the thickness T3, the more the heat conduction from the second intermediate layer 52 to the substrate 30 in the thickness direction via the first intermediate layer 51 is suppressed. The thickness T3 is, for example, 5.0 μm or less, and may be 3.0 μm or less, or 1.0 μm or less.
[0104] The second intermediate layer 52 has a thickness T4. The thickness T4 is, for example, 0.01 μm or more, and may be 0.03 μm or more, or 0.05 μm or more. The greater the thickness T4, the more the heat conduction in the surface direction of the second intermediate layer 52 is promoted. The thickness T4 is, for example, 10.0 μm or less, and may be 1.0 μm or less, or 0.10 μm or less.
[0105] By suppressing heat conduction in the thickness direction through the first intermediate layer 51 and promoting heat conduction in the plane direction of the second intermediate layer 52, it is possible to suppress a local increase in temperature in the inner region 36 that overlaps the first intermediate layer 51 and the second intermediate layer 52 in a plan view. For example, it is possible to suppress a temperature increase in only a portion of one first rail region 361. For example, it is possible to increase the temperature of one first rail region 361 as a whole. Therefore, in the heating process described below, it is possible to adjust the position of a portion of the mask 20 by utilizing, for example, the thermal expansion of the first rail region 361.
[0106] The thickness T3 of the first intermediate layer 51 may be greater than the thickness T4 of the second intermediate layer 52. This can improve the temperature uniformity in one first crosspiece region 361 or one second crosspiece region 362. The larger the maximum dimension S1 of the base material 30, the greater the ratio T3 / T4, which is the ratio of thickness T3 to thickness T4. T3 / T4, which is the ratio of thickness T3 to thickness T4, is, for example, 1.10 or more, or may be 1.50 or more, or may be 2.00 or more. T3 / T4 is, for example, 5.00 or less, or may be 4.00 or less, or may be 3.00 or less.
[0107] The thickness T3 of the first intermediate layer 51 may be equal to or smaller than the thickness T4 of the second intermediate layer 52. The larger the maximum dimension S1 of the substrate 30, the smaller the ratio T3 / T4, which is the ratio of the thickness T3 to the thickness T4. T3 / T4 is, for example, less than 1.10, and may be 1.00 or less, or 0.80 or less.
[0108] In the heating step described below, thermal expansion may occur in the mask layer 40. If the thermal expansion occurring in the mask layer 40 differs from the thermal expansion occurring in the substrate 30, stress will occur between the mask layer 40 and the substrate 30 in the surface direction of the substrate 30. An intermediate layer 50 is disposed between the mask 20 and the substrate 30. The intermediate layer 50 can function to relieve stress caused by the difference in thermal expansion occurring in the mask layer 40 and the thermal expansion occurring in the substrate 30. In this embodiment, the intermediate layer 50 includes a first intermediate layer 51 and a second intermediate layer 52. Therefore, stress can be relieved more effectively than when the intermediate layer 50 consists of a single layer.
[0109] 9 , the second intermediate layer 52 may include a first layer 53 and a second layer 54. A portion of the first layer 53 that overlaps the first opening 31 in a plan view may constitute an exposed surface 522. A portion of the first layer 53 that does not overlap the first opening 31 in a plan view may be in contact with the first intermediate layer 51. The second layer 54 is located between the first layer 53 and the mask layer 40. The second layer 54 may be in contact with the first layer 53. The second layer 54 may be in contact with the mask layer 40.
[0110] The first layer 53 may be made of titanium or a titanium alloy. Titanium or a titanium alloy has the property of absorbing light. When the first layer 53 made of titanium or a titanium alloy forms the exposed surface 522, the energy of light irradiated on the mask 20 can be efficiently converted into heat.
[0111] The second layer 54 may be made of aluminum or an aluminum alloy. The aluminum alloy contains, for example, aluminum and neodymium. Aluminum or an aluminum alloy has a higher thermal conductivity than titanium or a titanium alloy. The heat generated in the first layer 53 is efficiently transferred in the surface direction of the substrate 30 by the second layer 54.
[0112] 10 is a cross-sectional view showing an example of an effective area 431 of the first region 43 of the mask layer 40. The effective area 431 includes a second wall surface 42 facing the second opening 41. The effective area 431 may include a metal layer. The effective area 431 may be composed of only a metal layer. The layer configuration of the surrounding region 432 and the second region 44 may be the same as the layer configuration of the effective area 431.
[0113] The symbol R1 represents the dimension of the second opening 41 at the third surface 401. The symbol R2 represents the dimension of the second opening 41 at the fourth surface 402. The dimension R1 is also referred to as the first dimension. The dimension R2 is also referred to as the second dimension. The dimension of the deposition layer formed on the substrate 110 by the deposition process using the mask 20 is determined by the second dimension R2.
[0114] The first dimension R1 may be greater than the second dimension R2. In other words, the second dimension R2 may be smaller than the first dimension R1. This makes it possible to prevent a shadow from occurring near the second wall surface 42. The first dimension R1 and the second dimension R2 are determined in the direction in which the second openings 41 are aligned.
[0115] 10, the second wall surface 42 may include a tapered surface 42a that widens away from the center of the second opening 41 as it moves from the fourth surface 402 toward the third surface 401. When the second wall surface 42 includes the tapered surface 42a, the dimension R1 can be made larger than the dimension R2.
[0116] 10, symbol S8 represents the width of tapered surface 42a in the direction in which second openings 41 are arranged. Width S8 is, for example, 0.2 μm or more, or may be 0.5 μm or more, or 1.0 μm or more. Width S8 is, for example, 25 μm or less, or may be 20 μm or less, or may be 10 μm or less.
[0117] 10, the symbol θ1 represents the angle formed between the second wall surface 42 and the fourth surface 402. The angle θ1 is, for example, 50° or more, may be 55° or more, or may be 60° or more. The angle θ1 is, for example, less than 90°, and may be 85° or less, or may be 80° or less.
[0118] The thickness T2 of the mask layer 40 in the effective region 431 is smaller than the thickness T1 of the substrate 30. The thickness T2 is, for example, 25.0 μm or less, and may be 10.0 μm or less, or 5.0 μm or less. This makes it possible to suppress the occurrence of shadows. The thickness T2 is, for example, 0.5 μm or more, and may be 1.0 μm or more, or 2.0 μm or more. This makes it possible to suppress the occurrence of defects such as pinholes, deformation, etc. in the effective region 431.
[0119] The distance S5 between the two second wall surfaces 42 in the direction in which the second openings 41 are arranged is, for example, 1.0 μm or more, or may be 2.0 μm or more, or 3.0 μm or more. The distance S5 is, for example, 25.0 μm or less, or may be 10.0 μm or less, or may be 5.0 μm or less.
[0120] The metal layer of the mask layer 40 may include a magnetic material such as nickel, iron, cobalt, or alloys thereof, or a non-magnetic material such as copper, aluminum, titanium, chromium, or alloys thereof.
[0121] The mask layer 40 may include a seed layer. The seed layer is a layer that carries charge to the plating solution when a metal layer is formed by electrolytic plating. The seed layer may include a metal. Examples of the metal include nickel, gold, copper, titanium, aluminum, iron, and alloys thereof. For example, the seed layer may include at least a layer made of an iron alloy containing nickel. An example of an iron alloy containing nickel is permalloy. The seed layer may be composed of one layer or multiple layers.
[0122] The thickness of the seed layer is, for example, 2.0 nm or more, optionally 10.0 nm or more, or 30.0 nm or more. The thickness of the seed layer is, for example, 5.0 μm or less, optionally 1.0 μm or less, or 150 nm or less.
[0123] The thickness of each layer, the dimensions of each component, the spacing, etc. are measured by observing an image of a cross section of the mask 20 using a scanning electron microscope.
[0124] Next, a method for manufacturing the mask 20 will be described. First, a substrate 30 is prepared. A silicon wafer may be used as the substrate 30. The first surface 301 and the second surface 302 of the substrate 30 may be polished to a mirror finish. The arithmetic mean roughness Ra of the first surface 301 and the second surface 302 may be 1.5 nm or less, or 1.0 nm or less. The surface orientation of the first surface 301 and the second surface 302 may be (100), (110), or the like.
[0125] 11, the first intermediate layer 51 is formed on the second surface 302 of the substrate 30. The first intermediate layer 51 may be formed on the entire second surface 302.
[0126] The first intermediate layer 51 may be formed by chemical vapor deposition. For example, when the first intermediate layer 51 contains silicon oxide, the first intermediate layer 51 may be formed by chemical vapor deposition using tetraethyl silicate Si(OC2H5)4 as a raw material. Tetraethyl silicate is also called TEOS. Examples of chemical vapor deposition include low-pressure chemical vapor deposition (CVD) and plasma-enhanced CVD.
[0127] The first intermediate layer 51 may be formed by a physical film formation method, such as sputtering, vapor deposition, or ion plating.
[0128] When the base material 30 is made of silicon, the first intermediate layer 51 may be formed by performing a thermal oxidation treatment or the like on the surface of the base material 30.
[0129] 12, a second intermediate layer 52 is formed on the first intermediate layer 51. The second intermediate layer 52 may be formed on the entire surface of the first intermediate layer 51. The second intermediate layer 52 may be formed by a physical film formation method such as a sputtering method, a vapor deposition method, or an ion plating method.
[0130] Next, a step of forming a first resist layer 55 on the second intermediate layer 52 is performed. For example, a dry film resist may be attached to the second intermediate layer 52. For example, a solution containing a resist material may be applied onto the second intermediate layer 52. The first resist layer 55 may contain a positive resist material or a negative resist material. When the first resist layer 55 contains an inorganic compound such as silicon oxide, the first resist layer 55 may be formed by a vapor deposition method such as CVD.
[0131] Next, a step of processing the first resist layer 55 is performed. Figures 13A and 13B are a cross-sectional view and a plan view showing the processed first resist layer 55. The first resist layer 55 includes a resist first surface 551 facing the second surface 302 of the substrate 30, and a resist second surface 552 located on the opposite side of the resist first surface 551.
[0132] The first resist layer 55 includes a plurality of island portions 573. The above-mentioned second openings 41 of the mask 20 are formed at the positions of the island portions 573.
[0133] The method for processing the first resist layer 55 is not particularly limited. For example, if the first resist layer 55 is photosensitive, the first resist layer 55 may be processed by exposing and developing the first resist layer 55. For example, if the first resist layer 55 contains a silicon compound, the first resist layer 55 may be processed by dry etching using an etching gas. The dry etching may be reactive ion etching.
[0134] Subsequently, a step of forming a mask layer 40 is performed. The mask layer 40 is formed in the gaps 574 between the plurality of island portions 573. The mask layer 40 is also formed outside the plurality of island portions 573.
[0135] FIG. 14 is a cross-sectional view showing the mask layer 40. The mask layer 40 may be formed by a plating process. In the plating process, a plating solution containing ions of the metal that constitutes the mask layer 40 is supplied to the gaps 574 in the first resist layer 55. The plating process may be an electrolytic plating process or an electroless plating process. When the electrolytic plating process is performed, a seed layer may be formed on the second intermediate layer 52. Alternatively, the second intermediate layer 52 may function as the seed layer.
[0136] The mask layer 40 may protrude above the second resist surface 552 of the first resist layer 55 in the thickness direction of the base material 30. That is, the upper surface of the mask layer 40 may be located above the second resist surface 552.
[0137] Subsequently, a polishing step may be performed. In the polishing step, the portion of the mask layer 40 that protrudes above the second resist surface 552 of the first resist layer 55 is polished. Fig. 15 is a cross-sectional view showing the polished mask layer 40. In the polishing step, the mask layer 40 may be polished by chemical mechanical polishing.
[0138] Next, as shown in Fig. 16, an insulating layer removing step is performed to remove the first resist layer 55. Next, a substrate processing step is performed to form first openings 31 in the substrate 30. In the substrate processing step, as shown in Fig. 17, a second resist layer 38 may be formed partially on the first surface 301. A resist opening 381 is formed in a portion of the second resist layer 38 corresponding to the first opening 31. As shown in Fig. 17, a protective layer 72 may be formed to cover the mask layer 40.
[0139] The second resist layer 38 may be a photoresist. In this case, the second resist layer 38 is formed on the first surface 301 by first coating a liquid resist material on the first surface 301. After coating, a step of heating the second resist layer 38 may be performed. Subsequently, a photolithography process is performed in which the second resist layer 38 is exposed and developed. This allows resist openings 381 to be formed in the second resist layer 38.
[0140] Although not shown, the second resist layer 38 may be a silicon oxide film partially formed on the first surface 301. The silicon oxide film is formed, for example, by partially performing a thermal oxidation treatment on the first surface 301. The silicon oxide film may be formed on the base material 30 before the intermediate layer 50 is laminated on the base material 30.
[0141] Subsequently, in the substrate processing step, as shown in FIG. 18, the substrate 30 is etched from the first surface 301 side to form a first opening 31 in the substrate 30. The etching may be dry etching using an etching gas. If the intermediate layer 50 has resistance to the etchant, the etching is prevented from progressing to the mask layer 40, as shown in FIG. 18. The etching gas is, for example, SF gas.
[0142] 19, a first intermediate layer removal step is performed to remove a portion of the first intermediate layer 51. The first intermediate layer removal step is performed by supplying an etchant for the first intermediate layer 51 to the first opening 31. This removes the first intermediate layer 51 that overlaps the first opening 31 in plan view. The removal of the first intermediate layer 51 may be performed by dry etching using an etching gas. The dry etching may be reactive ion etching.
[0143] 20, a third resist layer 58 is formed on a portion of the second intermediate layer 52 that overlaps the first opening 31 in a plan view. The third resist layer 58 is formed, for example, on a portion of the second intermediate layer 52 that overlaps the peripheral region 432 of the mask layer 40 in a plan view.
[0144] 21 , a second intermediate layer removal step is performed to remove a portion of the second intermediate layer 52. The second intermediate layer removal step is performed by supplying an etchant for the second intermediate layer 52 to the first opening 31. This removes the portion of the second intermediate layer 52 that overlaps the first opening 31 in plan view and that is not covered by the third resist layer 58. The removal of the second intermediate layer 52 may be performed by dry etching using a fluorine-based gas or the like, or by wet etching using an acidic etching solution.
[0145] Further, a step of removing the second resist layer 38, the third resist layer 58, and the protective layer 72 is carried out. As a result, the mask 20 is obtained. The order of these steps is not particularly limited. Figure 22 is a cross-sectional view showing the mask 20 in a state where the second resist layer 38, the third resist layer 58, and the protective layer 72 have been removed.
[0146] Subsequently, the frame 60 is connected to the mask 20. For example, the frame 60 is connected to the mask 20 by an adhesive layer 70. In this way, the mask device 15 is obtained.
[0147] Next, a deposition method for forming a deposition layer on the substrate 110 using the mask device 15 will be described.
[0148] As shown in FIG. 23 , the mask device 15 is placed inside the chamber of the deposition device 10. The frame 60 of the mask device 15 may be supported by a holder (not shown). Next, the substrate 110 is placed inside the chamber. Next, an alignment step is performed to adjust the position of the mask 20 relative to the substrate 110. The position of the mask 20 relative to the substrate 110 may be calculated based on a plurality of alignment marks 39 on the mask 20.
[0149] The alignment step may include a heating step in which a portion of the mask 20 is heated. The heating step is performed when the position of a portion of the mask 20 relative to the substrate 110 is deviated from an ideal position. The portion of the mask that is deviated from the ideal position is also referred to as a misaligned portion. The heated portion of the mask 20 may or may not include a misaligned portion. The heating step may include an irradiation step in which an irradiation device 80 irradiates a portion of the mask 20 with light L1, as shown in FIG. 23 . The irradiation device 80 emits light toward the incident surface 201 of the mask 20.
[0150] A portion of the mask 20 absorbs the energy of the light L1, thereby heating that portion of the mask 20. For example, when the light L1 is irradiated onto the exposed surface of the second intermediate layer 52 located in some of the first openings 31, the second intermediate layer 52 absorbs the light energy. The energy of the light L1 absorbed by the second intermediate layer 52 is conducted through the second intermediate layer 52 as heat. This increases the temperature of the portion of the second intermediate layer 52 irradiated with the light and the surrounding portion of the second intermediate layer 52. The heat of the second intermediate layer 52 is also conducted in the thickness direction of the mask 20. This also increases the temperature of the first intermediate layer 51 and the base material 30. The increase in temperature of some of the first bar regions 361 and some of the second bar regions 362 of the base material 30 causes thermal expansion of some of the first bar regions 361 and some of the second bar regions 362. This thermal expansion causes the misalignment portion of the mask 20 to move in the plane direction of the mask 20.
[0151] The amount and direction of movement of the misaligned portion of the mask 20 changes depending on the irradiation position, irradiation range, irradiation intensity, etc. of the light L1. By appropriately adjusting the irradiation position, irradiation range, irradiation intensity, etc. of the light L1, the position of the misaligned portion of the mask 20 can be brought closer to the ideal position.
[0152] The light irradiated onto the mask 20 may be infrared light. The wavelength of the light L1 is, for example, 1000 nm or more, and may be 1050 nm or more. The wavelength of the light L1 is, for example, 1200 nm or less, and may be 1150 nm or less.
[0153] 24A is a plan view showing an example of light irradiated onto the mask 20. The symbol L2 represents a spot on the surface of the mask 20 of the light irradiated onto the mask 20. As shown in FIG. 24A, the spot L2 may be located in a part of the inner region 36.
[0154] If the substrate 30 and the first intermediate layer 51 have a property of transmitting light, the light can reach the second intermediate layer 52. The second intermediate layer 52 absorbs the light energy, thereby heating the portion of the mask 20 around the spot L2.
[0155] 24B is a plan view showing an example of light irradiated onto the mask 20. The spot L2 may be located in a part of the inner region 36 and a part of the first opening 31. One spot L2 may overlap multiple first openings 31. The spot L2 in the first opening 31 may be formed on the exposed surface 522 of the second intermediate layer 52.
[0156] 24C is a plan view showing an example of light irradiated onto mask 20. Spot L2 may be located in a portion of one first opening 31. Spot L2 within first opening 31 may be formed on exposed surface 522 of second intermediate layer 52. That is, light may be irradiated onto a portion of exposed surface 522 of second intermediate layer 52.
[0157] An example of the alignment process will be described. FIG. 25 is a plan view showing an example of the mask 20 before the heating process is performed. In the alignment process, the coordinates of multiple reference points on the mask 20 may be calculated. The multiple reference points may be located in the inner region 36. In the example shown in FIG. 25, the coordinates of eight reference points P1 to P8 are calculated. The coordinates of the reference points P1 to P8 may be calculated based on the positions of multiple alignment marks 39, the position of an orientation flat, etc. Although not shown, an alignment mark may be formed at each of the reference points P1 to P8.
[0158] 25, the positions of reference points P2, P3, and P4 are shifted inward from their ideal positions. In this case, as shown in Fig. 25, light may be irradiated onto a portion of the region formed by connecting the reference points P2, P3, and P4 with the center point C1 of the mask 20. This causes thermal expansion of the first bar region 361 and the second bar region 362 of the inner region 36 in the region formed by connecting the reference points P2, P3, and P4 with the center point C1 of the mask 20.
[0159] 26 is a plan view showing an example of the mask 20 after the heating process has been performed. Thermal expansion of a portion of the first bar region 361 and the second bar region 362 allows the reference points P2, P3, and P4 to approach the ideal positions.
[0160] The deposition process may be performed while the temperature of a portion of the mask 20 is elevated. In the deposition process, the material that has passed through the first opening 31 and the second opening 41 adheres to the substrate 110, thereby forming a deposition layer on the substrate 110. Since the deposition process is performed while the reference points P2, P3, and P4 are close to their ideal positions or while they are at their ideal positions, the positional accuracy of the deposition layer is improved.
[0161] The above-described embodiment can be modified in various ways. Below, modified examples will be described with reference to the drawings as necessary. In the following description and the drawings used in the following description, parts that can be configured similarly to the above-described embodiment will be designated by the same reference numerals as those used for corresponding parts in the above-described embodiment. Duplicate descriptions will be omitted. Furthermore, if it is clear that the effects obtained in the above-described embodiment can also be obtained in modified examples, the description of those effects may be omitted.
[0162] In the above-described embodiment, an example has been shown in which the mask layer 40 overlaps the entire inner region 36 of the base material 30 in a plan view. Although not shown, the mask layer 40 does not have to overlap the entire inner region 36 of the base material 30 in a plan view. For example, the first resist layer 55 may remain in a part of the inner region 36.
[0163] 27 is a cross-sectional view showing a mask 20 according to one modification. The second intermediate layer 52 does not have to include an exposed surface 522. That is, the second intermediate layer 52 does not have to include a portion that overlaps with the first opening 31 in a plan view.
[0164] The inner edge 521 of the second intermediate layer 52 may coincide with the inner edge 511 of the first intermediate layer 51. The inner edge 521 of the second intermediate layer 52 may overlap the inner region 36 in a plan view.
[0165] If the substrate 30 and the first intermediate layer 51 have the property of transmitting light, the light irradiated onto the inner region 36 can reach the second intermediate layer 52. The second intermediate layer 52 absorbs the light energy, heating the portion of the mask 20 around the spot L2. The temperature of some of the first bar regions 361 and some of the second bar regions 362 of the substrate 30 increases, causing thermal expansion of some of the first bar regions 361 and some of the second bar regions 362. The thermal expansion causes the misalignment portion of the mask 20 to move in the plane direction of the mask 20. In this modified example as well, the position of the misalignment portion of the mask 20 can be brought closer to the ideal position.
Claims
1. A mask, a substrate including a first surface, a second surface opposite the first surface, and a plurality of first openings extending from the first surface to the second surface; a mask layer including a third surface facing the second surface and a fourth surface located on the opposite side of the third surface; an intermediate layer located between the second surface of the substrate and the third surface of the mask layer; the substrate comprises silicon or a silicon compound; the mask layer includes a plurality of first regions overlapping the first openings in a plan view, and a second region positioned between the plurality of first regions and outside the plurality of first regions in a plan view, each of the plurality of first regions includes an effective region including a plurality of second openings penetrating from the third surface to the fourth surface; the intermediate layer includes a first intermediate layer located on the second surface of the substrate and containing silicon oxide or silicon nitride, and a second intermediate layer located between the first intermediate layer and the mask layer and containing a metal; The second intermediate layer includes an exposed surface that overlaps the first opening but does not overlap the first intermediate layer in a plan view.
2. each of the plurality of first regions includes a peripheral region surrounding the effective region in a plan view; The mask according to claim 1 , wherein the second intermediate layer extends to overlap the surrounding region of the first region and the second region of the mask layer in a plan view.
3. The mask according to claim 2 , wherein the second intermediate layer extends so as not to overlap the effective area of the first region of the mask layer in a plan view.
4. 4. The mask according to claim 1, wherein the first intermediate layer has a thickness of 0.1 μm or more.
5. The mask according to any one of claims 1 to 3, wherein the thickness of the first intermediate layer is greater than the thickness of the second intermediate layer.
6. 4. The mask according to claim 1, wherein the second intermediate layer includes at least a layer made of aluminum or an aluminum alloy.
7. 4. The mask according to claim 1, wherein the second intermediate layer includes at least a layer made of titanium or a titanium alloy.
8. The mask of any one of claims 1 to 3, wherein the second intermediate layer includes a first layer made of titanium or a titanium alloy, and a second layer located between the first layer and the mask layer and made of aluminum or an aluminum alloy.
9. the base material includes an inner region located between the plurality of first openings in a plan view, and an outer region extending along an outer edge of the base material and surrounding the plurality of first openings and the inner region in a plan view, The mask according to any one of claims 1 to 3, wherein the mask comprises a frame connected to the outer region.
10. 10. The mask of claim 9, comprising an adhesive layer positioned between the first surface of the outer region of the substrate and the frame.
11. A deposition method for forming a deposition layer on a substrate using a mask, comprising: The mask is a substrate including a first surface, a second surface opposite the first surface, and a plurality of first openings extending from the first surface to the second surface; a mask layer including a third surface facing the second surface and a fourth surface located on the opposite side of the third surface; an intermediate layer located between the second surface of the substrate and the third surface of the mask layer; the substrate comprises silicon or a silicon compound; the mask layer includes a plurality of first regions overlapping the first openings in a plan view, and a second region positioned between the plurality of first regions and outside the plurality of first regions in a plan view, each of the plurality of first regions includes an effective region including a plurality of second openings penetrating from the third surface to the fourth surface; The vapor deposition method includes: an alignment step of adjusting the position of the mask relative to the substrate; a deposition step in which the material that has passed through the first opening and the second opening is deposited on the substrate, thereby forming the deposition layer; The evaporation method, wherein the alignment step includes a heating step of heating a portion of the mask.
12. The vapor deposition method according to claim 11 , wherein the heating step includes an irradiating step of irradiating the portion of the mask with light.
13. the intermediate layer includes a first intermediate layer located on the second surface of the substrate and containing silicon oxide, and a second intermediate layer located between the first intermediate layer and the mask layer and containing metal; the second intermediate layer includes an exposed surface that overlaps the first opening but does not overlap the first intermediate layer in a plan view; The vapor deposition method according to claim 12 , wherein in the irradiating step, light is irradiated onto a portion of the exposed surface of the second intermediate layer.
14. each of the plurality of first regions includes a peripheral region surrounding the effective region in a plan view; The vapor deposition method according to claim 13 , wherein the second intermediate layer extends so as to overlap the surrounding region of the first region and the second region of the mask layer in a plan view.
15. The vapor deposition method according to claim 14 , wherein the second intermediate layer extends so as not to overlap the effective area of the first region of the mask layer in a plan view.
16. the second intermediate layer includes a first layer made of titanium or a titanium alloy, and a second layer located between the first layer and the mask layer and made of aluminum or an aluminum alloy; The vapor deposition method according to any one of claims 13 to 15, wherein in the irradiating step, light is irradiated onto a part of the exposed surface of the first layer of the second intermediate layer.
17. the base material includes an inner region located between the plurality of first openings in a plan view, and an outer region extending along an outer edge of the base material and surrounding the plurality of first openings and the inner region in a plan view, The deposition method according to any one of claims 11 to 15, wherein the mask comprises a frame connected to the outer region.
18. the mask includes an adhesive layer positioned between the first surface of the outer region of the substrate and the frame; The vapor deposition method according to claim 17 , wherein a portion of the adhesive layer deforms to conform to the portion of the mask heated in the heating step.
19. A method of manufacturing a device, comprising: A method for manufacturing a device, comprising the step of forming the deposition layer on the substrate by the deposition method according to any one of claims 11 to 15.
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