Inspection system and method of assembling inspection system
The inspection system addresses scalability and cost issues by using a modular design with flexible interface sheets and relay units, allowing for cost-effective expansion and adaptation to changes in device numbers.
Patent Information
- Application Number
- JP2024087002
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-05-29
- Publication Date
- 2025-12-11
AI Technical Summary
Existing inspection systems face challenges in scalability and cost-effectiveness as they require replacing entire hardware sets when the number of devices under test increases, despite the trend towards smaller devices on a board.
An inspection system with a probe card, interface section, and module boards, utilizing flexible interface sheets and relay units to accommodate varying numbers of devices under test, allowing for modular expansion and cost-effective upgrades.
The system provides cost reduction and scalability by enabling flexible expansion of inspection capabilities without replacing the entire hardware set, adapting to changes in the number of devices under test.
Smart Images

Figure 2025179987000001_ABST
Abstract
Description
[Technical Field]
[0001] FIELD The present disclosure relates to an inspection system and a method for assembling an inspection system. [Background technology]
[0002] Patent Document 1 discloses an inspection system (wafer inspection device) equipped with multiple inspection cells (cells) for inspecting substrates. This type of inspection system is equipped with a tester for each inspection cell that actually inspects the substrate. For example, the tester is equipped with hardware such as a motherboard and modules for performing the inspection.
[0003] In recent years, there has been a trend toward smaller and smaller devices under test formed on a board. As this trend continues, the number of devices under test on a board may increase, or the spacing between devices may increase without changing the number. When the number of devices under test on a board increases, the tester typically needs to replace the entire hardware set to accommodate the increase. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] Japanese Patent Publication No. 2020-145446 Summary of the Invention [Problem to be solved by the invention]
[0005] The present disclosure provides a technology that can reduce costs by having scalability according to the device to be inspected. [Means for solving the problem]
[0006] According to one aspect of the present disclosure, there is provided an inspection system for inspecting a substrate having a plurality of devices under test, the inspection system including: a probe card having a plurality of contact probes connected to the plurality of devices under test; an interface section electrically connected to the probe card and having relay units equal to or greater than the number of the devices under test; a module board for inspecting devices under test equal to or less than the number of relay units of the interface section; and an interface sheet stacked between the interface section and the module board and / or between the plurality of module boards, wherein the interface section is capable of arranging the plurality of module boards on the surface opposite to the connection side of the probe card in a first direction perpendicular to the opposite surface or a second direction along the opposite surface, and the interface sheet electrically connects the plurality of relay units of the interface section to the module boards arranged in the interface section. [Effects of the Invention]
[0007] According to one aspect, the cost can be reduced by providing expandability according to the device to be inspected. [Brief explanation of the drawings]
[0008] [Figure 1] 1 is a diagram illustrating an overall configuration of an inspection system according to an embodiment of the present disclosure. [Figure 2] 2 is a schematic cross-sectional view of the inspection system of FIG. 1 taken along the horizontal direction. [Figure 3] FIG. 2 is a schematic enlarged vertical cross-sectional view showing an inspection cell. [Figure 4] Fig. 4(A) is a side view showing a schematic configuration of a tester in an inspection cell, and Fig. 4(B) is a diagram showing an example of the relationship between each relay unit of the interface section and each DUT on the wafer. [Figure 5] FIG. 2 is an exploded side view showing the interface unit and the test head. [Figure 6] 1 is a flowchart illustrating a method for assembling an inspection system according to an embodiment. [Figure 7] FIG. 10 is a longitudinal sectional view schematically illustrating a state of an inspection cell according to a second embodiment. [Figure 8] FIG. 10 is a longitudinal sectional view schematically illustrating a state of an inspection cell according to a third embodiment. [Figure 9] 9A and 9B are longitudinal sectional views showing an example of a stacked state of two module boards in an inspection cell according to the fourth embodiment, and FIG. 9B is a longitudinal sectional view showing an example of a stacked state of nine module boards in an inspection cell according to the fourth embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0009] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In the drawings, the same components are denoted by the same reference numerals, and redundant explanations may be omitted.
[0010] FIG. 1 is a diagram illustrating the overall configuration of an inspection system 100 according to an embodiment of the present disclosure. FIG. 2 is a schematic cross-sectional view of the inspection system 100 of FIG. 1 taken along the horizontal direction. As shown in FIGS. 1 and 2, the inspection system 100 is configured as a multi-inspection system capable of simultaneously inspecting multiple substrates using multiple inspection cells 10. An example of a substrate inspected by the inspection system 100 is a wafer W having multiple semiconductor devices, such as LSIs and semiconductor memories, that are devices under test (Device Under Test). Hereinafter, the devices under test on the wafer W will also be abbreviated as DUTs. Note that the substrate is not limited to the wafer W, and may be a carrier on which a DUT is arranged, a glass substrate, a single chip, an electronic circuit board, or the like.
[0011] For example, the inspection system 100 has a cell row in which six inspection cells 10 are arranged in the horizontal direction (X-axis direction), and four of these cell rows are stacked in the vertical direction (Z-axis direction), resulting in a total of 24 matrix-shaped inspection cells 10. It goes without saying that the number and arrangement of the inspection cells 10 are not limited. For example, the inspection system 100 may have a configuration in which multiple inspection cells 10 are arranged in the horizontal direction rather than stacked. Furthermore, the inspection system 100 may have expandability that allows the number of inspection cells 10 to be increased or decreased after the system is installed.
[0012] The inspection system 100 includes a housing 11 that houses the matrix-shaped inspection cells 10 together, forming a cell tower. The inspection system 100 also includes a control device 90 inside the housing 11 that controls the operation of the inspection system 100. The control device 90 may also be provided outside the housing 11.
[0013] The housing 11 of the inspection system 100 is divided into a loading / unloading area 12 for loading / unloading the wafer W, a transfer area 13 for transferring the wafer W, and an inspection area 14 having a plurality of inspection cells 10 for inspecting the wafer W.
[0014] The loading / unloading area 12 is provided with a load port 15, an aligner 16, etc. A container C, such as a FOUP (Front Opening Unified Pod) that can accommodate multiple wafers W, is set in the load port 15. Meanwhile, the aligner 16 adjusts the attitude of the wafer W (aligning the center position, circumferential position, etc.) before transferring the wafer W to the inspection cell 10. Note that the loading / unloading area 12 or the transfer area 13 may be provided with a loader device (not shown) or the like that transfers the wafer W into and out of the container C.
[0015] The transfer area 13 has one or more transfer devices 18 capable of transferring wafers W. The transfer device 18 includes a moving mechanism (not shown) that is movable in three dimensions (X-axis direction, Y-axis direction, and Z-axis direction), and moves between the transfer area 12 and the inspection area 14 in the housing 11 under the control of the control device 90.
[0016] The transfer device 18 holds the mounting table 18a at a standby position (not shown) of the mounting table 18a, places a wafer W from a container C on the load port 15 onto the mounting table 18a under the operation of a loader device, and transfers the wafer W to a target inspection cell 10 in the inspection area 14. The transfer device 18 also transfers the wafer W placed on the mounting table 18a from one inspection cell 10 to another inspection cell 10. Furthermore, the transfer device 18 transfers the wafer W after inspection from the inspection area 14 to the transfer area 12 and stores it in the container C. Note that the transfer device 18 may transfer the probe card 22 between the transfer area 12 and the inspection area 14 when replacing a probe card 22 in the inspection cell 10, which will be described later.
[0017] As described above, the inspection area 14 includes a plurality of inspection cells 10 and an imaging device 19 that captures an image of the wafer W to be transported to the inspection cell 10. For example, the imaging device 19 is provided for each of a plurality of cell rows and is configured to be movable in the horizontal direction. The imaging device 19 captures an image of the wafer W to be transported to the target inspection cell 10 under the control of the control device 90. The control device 90 adjusts the position of the wafer W relative to the inspection cell 10 using the imaging information of the imaging device 19.
[0018] 3 is a schematic enlarged vertical cross-sectional view of the inspection cell 10. As shown in FIG. 3, each inspection cell 10 has a tester 20 that controls the inspection of the wafer W and a probe card 22 that contacts the wafer W below the tester 20. The tester 20 is supported via a frame (not shown) within the housing 11. The probe card 22 is removably attached below the tester 20. The inspection cell 10 is capable of inspecting the wafer W by electrically connecting the tester 20 and the wafer W via the probe card 22.
[0019] The probe card 22 has a disk-shaped main body 221, a large number of electrodes 222 arranged on the upper surface of the main body 221, and a plurality of contact probes 223 connected to each electrode 222 and protruding downward from the lower surface of the main body 221. Each contact probe 223 electrically contacts the electrode pads and solder bumps of each DUT on the wafer W transported by the transport device 18. Each contact probe 223 can contact, for example, all of the DUTs on the wafer W at once, thereby enabling all of the DUTs to be tested simultaneously.
[0020] The tester 20 has an interface unit 21, a lower connection unit 23 that electrically connects the interface unit 21 and the probe card 22, and a test head 26 that is mounted on the interface unit 21. The interface unit 21 is a structural unit that electrically connects the lower connection unit 23 and the test head 26 and performs basic control of the tester 20. The interface unit 21 has a base body 211 and a motherboard 29 inside (or on) the base body 211. The configurations of the interface unit 21 and the test head 26 will be described in detail later.
[0021] The lower connection unit 23 has a fixed frame 231 and a pogo frame 232 supported by the fixed frame 231 and having a plurality of through holes 231h near the center. A pogo block 233 having a large number of pogo pins (not shown) is inserted into each through hole 231h. The upper surface of the pogo block 233 electrically connects each pogo pin to the interface unit 21. The lower surface of the pogo block 233 electrically connects each pogo pin to each electrode 222 of the probe card 22.
[0022] The lower connection portion 23 also includes a vacuum mechanism 25 that creates a vacuum between the mounting table 18a that has the wafer W. The vacuum mechanism 25 includes a flange 25a that engages with the pogo frame 232 so as to be movable up and down, a bellows 25b that encloses the space between the pogo frame 232 and the flange 25a, and seal members 25c and 25d that enclose the spaces between the fixed frame 231, the pogo frame 232, and the probe card 22. Furthermore, a contact member 25e that can airtightly contact the mounting table 18a on which the wafer W is mounted is provided on the lower end surface of the flange 25a. The vacuum mechanism 25 evacuates the space enclosed by the bellows 25b and the seal members 25c and 25d using a vacuum pump (not shown). This allows the vacuum mechanism 25 to fix the fixed frame 231 and the pogo frame 232 and to integrate the mounting table 18a, the probe card 22, and the pogo frame 232.
[0023] The motherboard 29 of each tester 20 is connected to each pogo pin of each pogo block 233. The motherboard 29 has a processor 29a, memory 29b, and computer electronic circuits including an input / output interface and a communication interface (not shown). The processor 29a is one or a combination of a central processing unit (CPU), a graphics processing unit (GPU), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), and a circuit made up of multiple discrete semiconductors. The memory 29b includes a main memory device and an auxiliary memory device and stores programs for operating each tester 20. The memory 29b also temporarily stores information required while the processor 29a is executing the program.
[0024] Furthermore, the motherboard 29 of the tester 20 and the control device 90 of the inspection system 100 are connected to each other so that they can communicate with each other. Upon receiving a control command from the control device 90, the motherboard 29 controls each component of the tester 20 to inspect the wafer W and transmits the inspection results to the control device 90.
[0025] The control device 90 of the inspection system 100 is a computer for controlling the entire inspection system 100, and has a processor 91, a memory 92, an input / output interface 93, and a communication interface 94. The processor 91 is one or a combination of a CPU, a GPU, an ASIC, an FPGA, a circuit made up of multiple discrete semiconductors, etc. The memory 92 includes a main memory device and an auxiliary memory device, and forms the storage unit of the control device 90.
[0026] The control device 90 is connected to each inspection cell 10, the load port 15, the aligner 16, the transport device 18, the imaging device 19, etc. via an input / output interface 93. The control device 90 is also connected to a user interface (not shown) provided in the housing 11 of the inspection system 100, etc. via the input / output interface 93. The user interface may be, for example, a monitor, a speaker, a keyboard, a mouse, or a touch panel. The control device 90 acquires information entered by a user via the user interface, and based on this information, outputs control commands to each component of the inspection system 100 to inspect the wafer W. When the control device 90 receives inspection results for the wafer W from each inspection cell 10, it notifies the user of the inspection results via the user interface.
[0027] The control device 90 of the inspection system 100 controls, for example, the transport device 18 to transport the wafer W and place the wafer W below the probe card 22 of the target inspection cell 10. Then, the control device 90 controls the vacuum mechanism 25 of the tester 20 to evacuate the space sealed by the bellows 25b, sealing members 25c and 25d, contact member 25e, etc., thereby holding the wafer W and the mounting table 18a on the lower connection portion 23. As a result of this holding, the electrode pads and solder bumps of each DUT on the wafer W come into contact with the contact probes 223 of the probe card 22. In this state, the tester 20 of each inspection cell 10 outputs power and signals from the interface portion 21 to each DUT on the wafer W, acquires signals returned from the wafer W, and performs electrical testing of the wafer W.
[0028] Fig. 4(A) is a side view schematically showing the configuration of the tester 20 of the inspection cell 10. Fig. 4(B) is a diagram illustrating the relationship between each relay unit 215 of the interface section 21 and each DUT of the wafer W. As shown in Fig. 4(A), the lower surface side of the interface section 21 is electrically connected to the lower connection section 23 via, for example, an interface sheet 24.
[0029] The interface sheet 24 is sandwiched between the base body 211 of the interface unit 21 and the fixing frame 231 of the lower connection unit 23. This interface sheet 24 electrically connects each pogo pin of the pogo block 233 that passes through the fixing frame 231 to the first conductive portion 212 of the interface unit 21. For example, the interface sheet 24 has a plurality of first pads on its lower surface that contact each pogo pin, a plurality of second pads on its upper surface that contact each first conductive portion 212, and wiring that connects each of the first pads to each of the second pads (all not shown). The first pads, second pads, and wiring are made of a conductive material such as copper. The first pads, second pads, and wiring are covered with an insulating material.
[0030] The interface sheet 24 is formed to be more flexible than the base body 211 of the interface unit 21 and the fixed frame 231 of the lower connection unit 23. For example, the interface sheet 24 has flexibility that allows it to be sandwiched between the base body 211 and the fixed frame 231 and to be deformed into an appropriate shape. This allows the tester 20 to have a degree of freedom in the connection between the interface unit 21 and the lower connection unit 23. However, the interface sheet 24 is not limited to a flexible configuration and may be rigid. Alternatively, the tester 20 may be configured so that the interface unit 21 and the lower connection unit 23 are directly connected, omitting the interface sheet 24.
[0031] As described above, the interface unit 21 includes the base body 211, which is provided with a plurality of first conductive parts 212 and a plurality of second conductive parts 213. The base body 211 is formed in a flat plate (block shape) with a certain thickness from an insulating resin material. The base body 211 has, for example, a rectangular shape in a plan view, and is rigid enough to maintain its shape when the lower connection part 23 and the test head 26 are mounted thereon. The interface unit 21 may include a supply part inside or on the outer surface of the base body 211 that supplies power and a clock to the wafer W via the interface sheet 24, the lower connection part 23, and the probe card 22.
[0032] Each first conductive portion 212 is provided on the surface (lower surface) of the base body 211 on the side where the probe card 22 is connected, and is electrically connected to the interface sheet 24 described above. Each second conductive portion 213 is provided on the surface (upper surface) of the base body 211 opposite the side where the probe card 22 is connected, and is electrically connected to an interface sheet 28 of the test head 26 described below. Each first conductive portion 212 and each second conductive portion 213 is formed, for example, in the shape of a pin that protrudes slightly from the base body 211. Wiring (not shown) that is connected to each first conductive portion 212 and each second conductive portion 213 is formed inside the interface unit 21. Each first conductive portion 212 is arranged at a position opposite to each second pad of the interface sheet 24, and comes into contact with each second pad as the interface sheet 24 is laminated.
[0033] When the test head 26 is mounted (stacked) on the upper surface of the interface section 21, the pads of the test head 26 (interface sheet 28) come into contact with each second conductive section 213 of the base body 211. The tester 20 executes a plurality of inspection processes (test resources) in the inspection of each DUT on the wafer W based on the operation of the test head 26 mounted on the interface section 21.
[0034] 4(B), the interface unit 21 includes a DUT relay unit 214 on the base body 211, which connects the test head 26 and the wafer W so that the test can be performed when testing the wafer W. In other words, the DUT relay unit 214 has the function of a DUT board that transmits signals required for testing between each DUT on the wafer W and the test head 26.
[0035] The DUT relay section 214 has a plurality of relay units 215 connected to each of the DUTs on the wafer W via the lower connection section 23 and the probe card 22. The relay unit 215 is the name given to a unit of the DUT relay section 214 that electrically connects one DUT to one test unit 275 and relays signal transmission between them, thereby enabling the test unit 275 to test the DUT. In other words, the DUT relay section 214 connects each of the plurality of DUTs on the wafer W to each of the plurality of test units 275 (see FIG. 5 ), which will be described later, provided on the test head 26 so that signals can be transmitted between them.
[0036] Each relay unit 215 may be formed as a connector (hardware) that simply connects each DUT and each test unit 275. For example, multiple relay units 215 are arranged in a matrix in the surface direction of the DUT relay section 214 and are electrically connected to each first conductive portion 212 of the base body 211. Each relay unit 215 is electrically connected to each second pad of the interface sheet 24 via each first conductive portion 212 and is further connected to all DUTs on the wafer W via the lower connection portion 23 (each pogo block 233) and the probe card 22. Alternatively, each relay unit 215 may form a connection between each DUT and each test unit 275 by operating software on the motherboard 29 in addition to a connector. The software has a function that allows the user to set the connection topology between each DUT and each test unit 275. This allows the user to easily create and modify the connection topology between each DUT and each test unit 275.
[0037] Furthermore, the interface section 21 includes a large number of interconnecting units 215 so that the number is equal to or greater than the number of DUTs on the wafer W to be inspected. That is, it is preferable to prepare a large number of interconnecting units 215 in advance, anticipating the number of DUTs that will increase when inspecting the DUTs on the wafer W in the future. In recent years, the miniaturization of each DUT has progressed, and the number of DUTs formed on a single wafer W tends to increase. For this reason, it is preferable that the interface section 21 not only include the number of interconnecting units 215 required to inspect each current DUT, but also include a number that anticipates an increase in the number of DUTs in the future. As an example, if the number of DUTs on the wafer W to be inspected currently is 64, it is possible to prepare at least twice (128) or four times (256) the number of interconnecting units 215.
[0038] FIG. 5 is an exploded side view of the interface section 21 and the test head 26. As shown in FIG. 5, the test head 26 is stacked on the upper surface of the interface section 21. With the interface section 21 and the test head 26 stacked, appropriate inspection units 275 of the test head 26 are connected to each of the multiple relay units 215 of the interface section 21. The test head 26 is a structural section for executing test resources for inspecting the wafer W. The test head 26 according to the embodiment is configured by combining one or more module boards 27 and one or more interface sheets 28. FIGS. 4(A) and 5 show a tester 20 in which two module boards 27 and two interface sheets 28 are stacked.
[0039] The module board 27 includes a module body 271, a plurality of conductive parts 272, and a plurality of signal transmission parts 273. The module body 271 is formed in a flat plate shape (block shape) having a certain thickness from an insulating resin material, similar to the base body 211 of the interface unit 21. The module body 271 has, for example, a rectangular shape in a plan view, and is formed thinner than the base body 211.
[0040] The size in the planar direction of the module body 271 is smaller than the size in the planar direction of the base body 211 of the interface unit 21. For example, the area of the module body 271 in a planar view is set to be smaller than half the area of the base body 211 in a planar view. As a result, the interface unit 21 according to the embodiment is configured so that two module boards 27 can be mounted in the planar direction of its upper surface. However, when multiple module boards 27 are stacked in the vertical direction (first direction), the area of the module boards 27 and the area of the interface unit 21 may be the same.
[0041] The module board 27 has a dedicated circuit (electronic circuit 274) including devices, electronic components, etc. for testing each DUT on the wafer W. The electronic circuit 274 of the module board 27 has multiple test units 275 that test each DUT using electronic components such as a processor (microcomputer) and discrete devices. Each of the multiple test units 275 has test resources capable of testing each of the multiple DUTs and has the same functions. In other words, one test unit 275 constitutes a unit test function section that tests one DUT. Therefore, the number of DUTs tested on the wafer W on the module board 27 is determined by the number of test units 275 installed. Each of the multiple test units 275 is individually (independently) connected to each of the multiple conductive sections 272. The multiple conductive sections 272 are individually (independently) connected to the multiple relay units 215 of the interface section 21 via the interface sheet 28.
[0042] Furthermore, the multiple signal transmitters 273 of the module board 27 are capable of transmitting electrical signals in the thickness direction, separately from the electronic circuit 274 including each test unit 275. As an example, each signal transmitter 273 is provided in a margin 276 around the electronic circuit 274 within the module main body 271. By being capable of transmitting electrical signals independently from the electronic circuit 274, each signal transmitter 273 is capable of transmitting signals between the interface unit 21 and a module board 27 that is arranged away from the interface unit 21 when multiple module boards 27 are stacked.
[0043] For example, each signal transmission section 273 is formed by a via that penetrates the module main body 271 and a conductive member that fits into the via and protrudes slightly from one side and the other side of the module main body 271 (both not shown). This conductive member electrically contacts pads (first pad, second pad) of the adjacent interface sheet 28, thereby realizing signal transmission in the thickness direction. Alternatively, the signal transmission section 273 may be formed by pads (first pad, second pad) provided on each of the one side and the other side of the module main body 271 and a plurality of wirings that respectively connect the multiple pads on one side to the multiple pads on the other side.
[0044] 4A and 5, the tester 20 has a plurality of module boards 27 of the test head 26 stacked in the vertical direction (first direction). Hereinafter, the module board 27 stacked adjacent to the interface section 21 will be referred to as the first module board 27A, and the module board 27 stacked on this first module board 27A and located away from the interface section 21 will be referred to as the second module board 27B. In detail, the first module board 27A is stacked on the interface section 21 with a first interface sheet 28A, which is the interface sheet 28, sandwiched therebetween. The second module board 27B is stacked on the first module board 27A with a second interface sheet 28B, which is also the interface sheet 28, sandwiched therebetween.
[0045] The first module board 27A can test the number of DUTs corresponding to the number of test units 275 included in the electronic circuit 274. Similarly, the second module board 27B can test the number of DUTs corresponding to the number of test units 275 included in the electronic circuit 274. For example, the number of test units 275 on the first module board 27A is less than the number of DUTs on the wafer W. In this case, the first module board 27A alone cannot test all of the DUTs on the wafer W. For this reason, the tester 20 can test all of the DUTs on the wafer W by using the second module board 27B in addition to the first module board 27A.
[0046] The first module board 27A and the second module board 27B can have the same configuration (having the same plurality of conductive sections 272, the same plurality of signal transmitting sections 273, and the same electronic circuit 274). The connection between each test unit 275 on the first module board 27A and each DUT on the wafer W, and the connection between each test unit 275 on the second module board 27B and each other DUT on the wafer W can be changed by the wiring on each interface sheet 28. This allows the first module board 27A and the second module board 27B to perform the same test on each DUT on the wafer W.
[0047] Alternatively, the first module board 27A and the second module board 27B may be configured to be capable of testing all of the DUTs on the wafer W using their respective test units 275 and to have mutually different tests (test resources). In other words, in this case, the first module board 27A and the second module board 27B are provided with test units 275 equal to or greater than the number of DUTs on the wafer W.
[0048] The interface sheet 28 applied to the test head 26 is formed in substantially the same manner as the interface sheet 24 described above. The interface sheet 28 has a plurality of first pads (not shown) provided on its lower surface, a plurality of second pads (not shown) provided on its upper surface, and wiring 281 connecting each of the first pads to each of the second pads. The first pads, second pads, and wiring 281 are formed of a conductive material such as copper. The first pads, second pads, and wiring 281 are also covered with an insulating material.
[0049] Like the interface sheet 24, the interface sheet 28 is preferably more flexible than the base body 211 of the interface unit 21 and the module main body 271 of the module board 27. For example, the interface sheet 28 has flexibility that allows it to be sandwiched between the base body 211 and the module main body 271 and to deform into an appropriate shape. This allows the interface sheet 28 to provide a degree of freedom in the connection between the interface unit 21 and the module main body 271, and between the two module main bodies 271. However, the interface sheet 28 is not limited to a flexible configuration and may also be rigid.
[0050] Of the multiple interface sheets 28, first interface sheet 28A electrically connects each second pad on the upper surface of interface section 21 to conductive sections 272 and / or signal transmission sections 273 of first module board 27A. In detail, wiring 281 of first interface sheet 28A has main wiring 282 connecting each of the multiple second pads to each of the multiple conductive sections 272, and sub-wiring 283 connecting each of the other multiple second pads to each of the multiple signal transmission sections 273.
[0051] That is, the main wiring 282 is connected to each of the inspection units 275 of the first module board 27A. As a result, each of the inspection units 275 of the first module board 27A is connected to each of the relay units 215 of the interface section 21. On the other hand, the sub-wiring 283 is connected to the second interface sheet 28B via each of the signal transmission units 273 of the first module board 27A. This sub-wiring 283 enables signals to be transmitted from some of the relay units 215 of the interface section 21 to the second interface sheet 28B and the second module board 27B via each of the signal transmission units 273 of the first module board 27A.
[0052] Further, second interface sheet 28B of the multiple interface sheets 28 electrically connects each signal transmission section 273 on the upper surface of first module board 27A to each conductive section 272 of second module board 27B. More specifically, wiring 281 of second interface sheet 28B has bypass wiring 284 that connects each signal transmission section 273 of first module board 27A to each conductive section 272 of second module board 27B.
[0053] In other words, bypass wiring 284 connects each signal transmission section 273 of first module board 27A to each inspection unit 275 of second module board 27B. As a result, each inspection unit 275 of second module board 27B is connected to each relay unit 215 of interface section 21 via second interface sheet 28B, first module board 27A, and first interface sheet 28A.
[0054] 4(A), the tester 20 preferably includes a fixing mechanism 30 for fixing one or more module boards 27 and one or more interface sheets 28 to the interface section 21. An example of this fixing mechanism 30 is a mechanical mechanism 31 that mechanically engages the interface section 21 with one or more module boards 27. The mechanical mechanism 31 fixes the module board 27 to the interface section 21 in a manner that presses the module board 27 against the interface section 21, thereby fixing the module board 27 and the interface sheet 28 together. For example, the mechanical mechanism 31 may be configured to be expandable and contractible in the stacking direction, thereby enabling multiple module boards 27 and multiple interface sheets 28 to be fixed together.
[0055] The fixing mechanism 30 is not particularly limited to the above-described mechanical mechanism 31. For example, the fixing mechanism 30 may be a suction mechanism that applies the suction force of a suction pump via the interface unit 21 to vacuum-suck one or more module boards 27 and one or more interface sheets 28.
[0056] The inspection system 100 according to the embodiment is basically configured as described above, and a method for assembling the inspection system 100 (the tester 20 of the inspection cell 10) will be described below with reference to Fig. 6. Fig. 6 is a flowchart showing the method for assembling the inspection system 100 according to the embodiment.
[0057] In the method of assembling the inspection system 100, first, the module boards 27 and interface sheets 28 required for inspecting the wafer W are provided (step S101). For example, the user (or manufacturer) of the inspection system 100 manufactures, purchases, etc. the module boards 27 and interface sheets 28 based on the number of DUTs on the wafer W and the inspection details of each DUT. At this time, the user also prepares an appropriate number of module boards 27 and interface sheets 28 to be installed for each tester 20 of each inspection cell 10. However, the interface sheet 28 can be manufactured inexpensively because it has a simple configuration including first pads, second pads, and wiring 281. Furthermore, multiple module boards 27 having the same configuration (specifications) can be used, thereby reducing costs.
[0058] Next, the user removes the tester 20 to be assembled from the cell tower to expose the top surface of the interface unit 21 that has been installed in advance inside the tester 20 (step S102). This puts the tester 20 in a state where the module board 27 and the interface sheet 28 can be stacked on the interface unit 21.
[0059] The user then first stacks first interface sheet 28A on interface unit 21, and then mounts first module board 27A on interface unit 21 via first interface sheet 28A (step S103). When mounting first module board 27A, first module board 27A is engaged with interface unit 21 by fixing mechanism 30.
[0060] When the first module board 27A is mounted, each relay unit 215 of the interface section 21 is electrically connected to each test unit 275 of the first module board 27A via the first interface sheet 28A. This makes it possible to test each DUT on the wafer W using the first module board 27A.
[0061] The user determines whether all of the DUTs on the wafer W can be tested using the module board 27 mounted on the interface section 21 (step S104). For example, the user determines whether the first module board 27A has test units 275 corresponding to the number of DUTs when only the first module board 27A is mounted on the interface section 21. Of course, this determination may be made before assembly, and the required number of module boards 27 and interface sheets 28 may be prepared. In the assembly method, if it is not possible to test all of the DUTs (step S104: NO), the process proceeds to step S105.
[0062] In step S105, the user mounts another module board 27 on top of the stacked module boards 27 with interface sheets 28 interposed between them. For example, the user stacks second interface sheet 28B on first module board 27A, and then stacks second module board 27B on second interface sheet 28B. The user then uses fixing mechanism 30 to fix second module board 27B so as to press it against interface unit 21. As a result, tester 20 is assembled in a state in which, from the interface unit 21 side, first interface sheet 28A, first module board 27A, second interface sheet 28B, and second module board 27B are stacked.
[0063] In this assembled state, each relay unit 215 of interface section 21 and each test unit 275 of second module board 27B are electrically connected via first interface sheet 28A, first module board 27A, and second interface sheet 28B. This makes it possible to test each DUT on wafer W using second module board 27B. The assembly method returns to step S104 after step S105 above, and the determination of step S104 is repeated again.
[0064] If all DUTs can be tested in step S104 (step S104: YES), this means that the module boards 27 required for testing have been mounted on the interface unit 21. Therefore, in the assembly method, the assembly of one tester 20 (test head 26) is completed (step S106). In the assembly method, by performing the above assembly method for all inspection cells 10 of the inspection system 100, the testers 20 of all inspection cells 10 become capable of testing wafers W. Note that even if the number of testable DUTs is less than the number of DUTs on the wafer W, the inspection system 100 can also test all DUTs on the wafer W by performing multiple contacts. Therefore, in step S104, it may be determined that the target number of DUTs can be tested, and based on this, the mounting or suspension of the module boards 27 may be switched.
[0065] Furthermore, in the inspection system 100, when the number of DUTs on the wafer W to be inspected changes, the module boards 27 and the interface sheets 28 can be added or removed using the above assembly method. In this case, the inspection system 100 can reuse the module boards 27 while replacing only the inexpensive interface sheet 28. This allows the inspection system 100 to reduce the cost impact associated with the change. Alternatively, when the inspection content of the wafer W changes, the inspection system 100 replaces the module boards 27 and the interface sheets 28 using the above assembly method. In this case, if the number of DUTs on the wafer W does not change, the module boards 27 may be replaced while the interface sheets 28 may be reused. In this case, the inspection system 100 can also reduce the cost impact associated with the change.
[0066] In the above assembly method, an example has been described in which the user assembles each module board 27 and each interface sheet 28. However, the assembly method is not limited to this, and some or all of the steps may be automated rather than manually performed by the user. For example, a configuration may be adopted in which the module boards 27 and the interface sheets 28 are transported by a transport device (not shown) and assembled by stacking them on the interface unit 21. Furthermore, the module boards 27 and the interface sheets 28 may be reassembled on the interface unit 21 or removed and applied to another device. Furthermore, the assembly method may include a procedure in which partially or fully assembled module boards 27 and interface sheets 28 are transported and replaced. In short, the assembly method is not limited to the above, and the module boards 27 and the interface sheets 28 can be assembled using various procedures.
[0067] The inspection system 100 and the inspection method are not limited to the above embodiment and may take various modifications. For example, in the above embodiment, the test head 26 is described as having two module boards 27 and two interface sheets 28 stacked in the vertical direction (first direction). However, the test head 26 is not limited to this, and three or more module boards 27 and three or more interface sheets 28 may be stacked depending on the number of DUTs on the wafer W, the inspection content, etc. Conversely, the test head 26 may be configured as having only one module board 27 and one interface sheet 28 stacked depending on the number of DUTs on the wafer W, the inspection content, etc.
[0068] Furthermore, in the assembly method of the inspection system 100, the first module board 27A and the first interface sheet 28A are first stacked on the interface section 21, and then the second module board 27B and the second interface sheet 28B are stacked. However, the assembly method is not limited to this, and a configuration in which the first module board 27A and the second module board 27B are first assembled to form a stack of the test head 26, and this test head 26 is then stacked on the interface section 21. In this case, the user may form a stack of the first interface sheet 28A, the first module board 27A, the second interface sheet 28B, and the second module board 27B, and then mount this stack on the interface section 21. Alternatively, the user may form a stack of the first module board 27A, the second interface sheet 28B, and the second module board 27B, and then mount this stack on the interface section 21 in which the first interface sheet 28A is arranged.
[0069] Furthermore, the inspection system 100 may directly connect the interface unit 21 and the module board 27. In this case, the interface sheet 28 may not be formed in a sheet shape, but may be in the shape of a thick board or block. In other words, the expression "interface sheet" in this disclosure includes the concepts of a board, a block, etc. in addition to the concept of a sheet. In a structure in which the interface unit 21 and the module board 27 are directly connected, the interface sheet 28 may be a structural part having only a fixing mechanism 30 that fixes the module board 27 to the interface unit 21 or the module board 27 to be stacked.
[0070] Furthermore, the inspection system 100 is not limited to a multi-inspection system having a plurality of inspection cells 10 (testers), but may be a single inspection system having one tester 20.
[0071] 7 is a longitudinal cross-sectional view schematically illustrating the state of the inspection cell 10A according to the second embodiment. The tester 20 of the inspection cell 10A according to the second embodiment differs from the inspection cell 10 according to the first embodiment in that two module boards 27 and two interface sheets 28 are mounted side by side in the surface direction (horizontal direction: second direction) of the interface section 21.
[0072] Specifically, the first module board 27A is stacked on the left side of the interface section 21 via a first interface sheet 28A. The first module board 27A has inspection units 275 (see FIG. 5) equal to or less than the number of DUTs on the wafer W. Meanwhile, the second module board 27B is stacked on the right side of the first module board 27A via a second interface sheet 28B. The second module board 27B also has inspection units 275 (see FIG. 5) equal to or less than the number of DUTs on the wafer W. Furthermore, in the inspection cell 10A, the total number of the inspection units 275 on the first module board 27A and the second module board 27B is set to be equal to or less than the number of relay units 215 (see FIG. 5) in the interface section 21.
[0073] The first pads of first interface sheet 28A are electrically connected to each relay unit 215 via second conductive portions 213 of interface section 21. The second pads of first interface sheet 28A are electrically connected to each test unit 275 via conductive portions 272 of first module board 27A. This allows first module board 27A to test each DUT on wafer W via first interface sheet 28A, interface section 21, lower connection portion 23, and probe card 22.
[0074] Similarly, the first pads of second interface sheet 28B are electrically connected to each relay unit 215 via second conductive portions 213 of interface section 21. The second pads of second interface sheet 28B are electrically connected to each test unit 275 via conductive portions 272 of second module board 27B. This allows second module board 27B to also test each DUT on wafer W via second interface sheet 28B, interface section 21, lower connection portion 23, and probe card 22.
[0075] As described above, the tester 20 of the inspection cell 10A can test all of the DUTs on the wafer W even if the first module board 27A and the second module board 27B are mounted adjacent to each other in the planar direction of the upper surface of the interface section 21. In particular, by arranging the first module board 27A and the second module board 27B in the planar direction of the upper surface of the interface section 21, it is possible to prevent the tester 20 from becoming taller (larger).
[0076] The number of module boards 27 mounted in the planar direction on the upper surface of the interface unit 21 is not limited to two and may be three or more. Furthermore, when multiple module boards 27 are arranged in the planar direction on the upper surface of the interface unit 21, a single, continuous interface sheet 28 may be applied along this planar direction to electrically connect the multiple module boards 27 to the interface unit 21. Therefore, the number of module boards 27 and the number of interface sheets 28 do not have to match.
[0077] 8 is a longitudinal cross-sectional view schematically illustrating the state of an inspection cell 10B according to the third embodiment. The tester 20 of the inspection cell 10B according to the third embodiment differs from the inspection cells 10 and 10A described above in that four module boards 27 and four interface sheets 28 are mounted in the stacking direction (first direction) and the surface direction (second direction) of the interface section 21.
[0078] For example, first module board 27A is stacked on the left side of interface section 21 with first interface sheet 28A interposed therebetween. Second module board 27B is stacked on the right side of interface section 21 with second interface sheet 28B interposed therebetween. Third module board 27C is stacked on first module board 27A with third interface sheet 28C interposed therebetween. Fourth module board 27D is stacked on second module board 27B with fourth interface sheet 28D interposed therebetween. Furthermore, the total number of inspection units 275 on first module board 27A, second module board 27B, third module board 27C, and fourth module board 27D is set to be equal to or less than the number of relay units 215 in interface section 21.
[0079] First interface sheet 28A provides electrical continuity between each inspection unit 275 of first module board 27A and each relay unit 215 of interface section 21. First interface sheet 28A is also connected to signal transmission section 273 of first module board 27A, providing electrical continuity between each relay unit 215 of interface section 21 and third interface sheet 28C. As a result, third interface sheet 28C provides electrical continuity between each inspection unit 275 of third module board 27C and each relay unit 215 of interface section 21.
[0080] On the other hand, second interface sheet 28B provides electrical continuity between each inspection unit 275 of second module board 27B and each relay unit 215 of interface section 21. Second interface sheet 28B is also connected to signal transmission section 273 of second module board 27B, providing electrical continuity between each relay unit 215 of interface section 21 and fourth interface sheet 28D. As a result, fourth interface sheet 28D provides electrical continuity between each inspection unit 275 of fourth module board 27D and each relay unit 215 of interface section 21.
[0081] The tester 20 of the above-described inspection cell 10B can appropriately connect each inspection unit 275 of the first module board 27A to the fourth module board 27D to each relay unit 215 of the interface section 21. Therefore, the first module board 27A to the fourth module board 27D can inspect each DUT on the wafer W via the interface section 21, the lower connection section 23, and the probe card 22.
[0082] 9A is a longitudinal cross-sectional view showing an example of a stacked state of two module boards 27 in an inspection cell 10C according to the fourth embodiment. FIG. 9B is a longitudinal cross-sectional view showing an example of a stacked state of nine module boards 27 in the inspection cell 10C according to the fourth embodiment. The inspection cell 10C according to the fourth embodiment differs from the inspection cells 10, 10A, and 10B described above in that three module boards 27 can be arranged along the surface direction of the interface section 21 and three levels of module boards 27 can be stacked in the stacking direction.
[0083] In this case, interface sheets 28 are also prepared corresponding to the number of module boards 27, and are laminated between the interface unit 21 and the module board 27, and / or between multiple module boards 27. Each interface sheet 28 electrically connects each relay unit 215 of the interface unit 21 to the module board 27.
[0084] In short, the inspection system 100 is not particularly limited in the number of module boards 27 and the number of interface sheets 28, and the number of module boards 27 and interface sheets 28 can be increased or decreased depending on the number of DUTs on the wafer W to be inspected and the inspection content. For example, if the number of DUTs on the wafer W is small, the number of module boards 27 and interface sheets 28 can be reduced, and if the number of DUTs on the wafer W is large, the number of module boards 27 and interface sheets 28 can be increased.
[0085] Furthermore, for example, if different tests (test resources) are to be performed on each DUT on the wafer W, multiple types of module boards 27 capable of performing different tests may be mounted. For example, in the configuration shown in Fig. 9(B), a first test may be performed using three module boards 27 on the first row adjacent to the interface section 21, a second test may be performed using three module boards 27 on the second row, and a third test may be performed using three module boards 27 on the third row. In this way, the tester 20 can easily perform a desired test on the wafer W by designing the number of module boards 27, the number of interface sheets 28, and the stacking state thereof according to the number of DUTs on the wafer W and the test content.
[0086] The technical ideas and effects of the present disclosure explained in the above embodiments will be described below.
[0087] A first aspect of the present disclosure is an inspection system 100 for inspecting a substrate (wafer W) having a plurality of devices under test (DUT), comprising: a probe card 22 having a plurality of contact probes 223 connected to the plurality of devices under test; an interface section 21 electrically connected to the probe card 22 and having relay units 215 equal to or greater than the number of the devices under test; a module board 27 for inspecting devices under test equal to or less than the number of relay units 215 of the interface section 21; and an interface sheet 28 stacked between the interface section 21 and the module board 27 and / or between the plurality of module boards 27, wherein the interface section 21 is capable of arranging the plurality of module boards 27 on the surface opposite the connection side of the probe card 22 in a first direction perpendicular to the opposite surface or a second direction along the opposite surface, and the interface sheet 28 electrically connects the plurality of relay units 215 of the interface section 21 to the module boards 27 arranged on the interface section 21.
[0088] As described above, the inspection system 100 has high scalability, allowing the number of module boards 27 to be increased or decreased depending on the DUTs on the substrate (wafer W) by stacking and electrically connecting the module boards 27 and interface sheets 28 to the interface section 21. For example, if the number of DUTs is large, the inspection unit 275 for inspecting the DUTs can be easily increased by adding module boards 27 and interface sheets 28 mounted on the interface section 21, thereby enabling inspection of the substrate. In this way, even if the number of DUTs on the substrate changes, the inspection system 100 does not require changes to the basic configuration of the interface section 21, etc., thereby reducing costs. Furthermore, the inspection system 100 has a scalable configuration in which the module boards 27 can be easily added or removed, thereby improving compatibility with the number of DUTs on the current wafer W and the number of DUTs on future wafers W, thereby enabling long-term operation of the system.
[0089] The multiple module boards 27 include a first module board 27A stacked on the interface section 21 and a second module board 27B stacked on the first module board 27A, and the interface sheet 28 includes a first interface sheet 28A disposed between the interface section 21 and the first module board 27A, and a second interface sheet 28B disposed between the first module board 27A and the second module board 27B. This allows the test system 100 to increase the number of module boards 27 in the stacking direction. As a result, the horizontal size of the tester 20 can be reduced, and the entire test system 100 can also be made more compact.
[0090] Furthermore, first module board 27A and second module board 27B have a plurality of test units 275 that are connected to a plurality of devices under test (DUTs) to perform tests, respectively, and the total number of the test units 275 on first module board 27A and the number of the test units 275 on second module board 27B is equal to or less than the number of relay units 215 in interface section 21. This allows each test unit 275 on first module board 27A and each test unit 275 on second module board 27B to be stably connected to each DUT via each relay unit 215, making it possible to perform good testing of wafer W.
[0091] Furthermore, the multiple module boards 27 include a first module board 27A stacked on the interface section 21 and a second module board 27B adjacent to the first module board 27A and stacked on the interface section 21, and the interface sheet 28 includes a first interface sheet 28A arranged between the interface section 21 and the first module board 27A and a second interface sheet 28B arranged between the interface section 21 and the second module board 27B. This allows the inspection system 100 to increase the number of module boards 27 in the plane direction of the interface section 21, and prevents the tester 20 from becoming larger in the vertical direction.
[0092] Furthermore, first module board 27A and second module board 27B have a plurality of test units 275 that are connected to a plurality of devices under test (DUTs) to perform tests, respectively, and the total number of the test units 275 on first module board 27A and the number of the test units 275 on second module board 27B is equal to or less than the number of relay units 215 in interface section 21. Even in this case, test system 100 allows each test unit 275 on first module board 27A and each test unit 275 on second module board 27B to be stably connected to each DUT via each relay unit 215. Therefore, test system 100 can perform a good test of the board.
[0093] The multiple module boards 27 include a first module board 27A stacked on the interface section 21, a second module board 27B adjacent to the first module board 27A and stacked on the interface section 21, a third module board 27C stacked on the first module board 27A, and a fourth module board 27D stacked on the second module board 27B, and the interface sheets 28 include a first interface sheet 28A arranged between the interface section 21 and the first module board 27A, a second interface sheet 28B arranged between the interface section 21 and the second module board 27B, a third interface sheet 28C arranged between the first module board 27A and the third module board 27C, and a fourth interface sheet 28D arranged between the second module board 27B and the fourth module board 27D. This allows the inspection system 100 to mount many module boards 27 on the interface section 21, further increasing its expandability.
[0094] Furthermore, first module board 27A, second module board 27B, third module board 27C, and fourth module board 27D have a plurality of test units 275 connected to each of a plurality of devices under test (DUTs) to perform the test, and the total number of the plurality of test units 275 on first module board 27A, the number of the plurality of test units 275 on second module board 27B, the number of the plurality of test units 275 on third module board 27C, and the number of the plurality of test units 275 on fourth module board 27D is less than or equal to the number of relay units 215 in interface section 21. This allows test system 100 to stably connect each of the test units 275 on each module board 27 to each DUT via each relay unit 215, making it possible to successfully perform board testing.
[0095] Furthermore, the module board 27 has a plurality of signal transmission units 273 that connect, in a signal-transmitting manner, the interface sheet 28 laminated on one side of the module board 27 to the interface sheet 28 laminated on the other side of the module board 27. As a result, even in a configuration in which the module boards 27 are stacked, the inspection system 100 can easily establish an electrical connection between the interface unit 21 and the module board 27 by connecting the interface sheets 28 to each other via the signal transmission units 273.
[0096] Furthermore, when the module boards 27 are stacked in the first direction, the interface sheet 28 has main wiring 282 that electrically connects the multiple relay units 215 of the interface section 21 to the multiple inspection units 275 of the module board 27, and sub-wiring 283 that electrically connects the multiple relay units 215 of the interface section 21 to the multiple signal transmission sections 273 of the module board 27. This allows the inspection system 100 to easily connect each relay unit 215 to each inspection unit 275 using the interface sheet 28 even when a configuration in which multiple module boards 27 are stacked is used.
[0097] The inspection system 100 also includes a fixing mechanism 30 that fixes the module board 27 and the interface sheet 28 together to the interface section 21. This allows the inspection system 100 to reliably fix the multiple module boards 27 and the multiple interface sheets 28 to the interface section 21 and maintain the connection configuration.
[0098] Furthermore, the interface sheet 28 is flexible, while the module board 27 is formed to be harder than the interface sheet 28. This allows the user of the inspection system 100 to easily connect the module board 27 and the interface sheet 28 when mounting the module board 27.
[0099] Furthermore, the multiple module boards 27 arranged in the interface unit 21 can perform the same test on multiple devices under test (DUTs) on the substrate (wafer W). As a result, the test system 100 can successfully perform the same test on each DUT by increasing the number of module boards 27 corresponding to the number of DUTs.
[0100] Furthermore, the multiple module boards 27 arranged in the interface unit 21 can perform different tests on multiple devices under test (DUTs) on the substrate (wafer W). As a result, by increasing the number of module boards 27, the test system 100 can effectively perform different tests on each DUT.
[0101] A second aspect of the present disclosure is a method for assembling an inspection system 100 for inspecting a substrate (wafer W) having a plurality of devices under test (DUTs), the inspection system 100 including a probe card 22 having a plurality of contact probes 223 connected to the plurality of devices under test, and an interface section 21 electrically connected to the probe card 22 and having relay units 215 equal to or greater than the number of the devices under test, the assembly method including the steps of: (A) connecting an interface 21 to the surface of the interface section 21 opposite to the connection side of the probe card 22 via an interface sheet 28; and (B) stacking another module board 27 via an interface sheet 28 on the opposite surface of the interface section 21 in the stacking direction of the module boards 27 stacked in step (A) or in a direction parallel to the module boards 27, and electrically connecting the other module board 27 to the multiple relay units 215 of the interface section 21. Even in this case, the assembly method has expandability according to the number of devices to be tested on the board, thereby reducing costs.
[0102] The inspection system 100 and the method for assembling the inspection system 100 according to the presently disclosed embodiments are illustrative in all respects and are not limiting. The embodiments may be modified and improved in various ways without departing from the spirit and scope of the appended claims. The features described in the above embodiments may be configured differently and may be combined within a consistent range. [Explanation of symbols]
[0103] 21 Interface section 215 Relay unit 22 Probe Card 223 Contact Probe 27 Module Board 28 Interface Sheet 100 Inspection Systems W wafer
Claims
1. 1. An inspection system for inspecting a substrate having a plurality of devices under test, comprising: a probe card having a plurality of contact probes connected to the plurality of devices under test; an interface section electrically connected to the probe card and having a number of relay units equal to or greater than the number of the plurality of devices to be tested; a module board for testing devices to be tested that is equal to or less than the number of the relay units of the interface section; an interface sheet laminated between the interface unit and the module board and / or between a plurality of the module boards, the interface unit is capable of arranging the plurality of module boards on a surface opposite to the connection side of the probe card in a first direction perpendicular to the opposite surface or in a second direction along the opposite surface, the interface sheet electrically connects the plurality of relay units of the interface section to the module board arranged in the interface section. Inspection system.
2. The plurality of module boards include: a first module board stacked on the interface unit; and a second module board stacked on the first module board, The interface sheet includes: a first interface sheet disposed between the interface section and the first module board, and a second interface sheet disposed between the first module board and the second module board, The inspection system of claim 1 .
3. the first module board and the second module board each have a plurality of test units connected to each of the plurality of devices under test to perform testing; the sum of the number of the plurality of test units of the first module board and the number of the plurality of test units of the second module board is equal to or less than the number of the relay units of the interface section; The inspection system of claim 2 .
4. The plurality of module boards include: a first module board stacked on the interface section; and a second module board adjacent to the first module board and stacked on the interface section, The interface sheet includes: a first interface sheet disposed between the interface section and the first module board, and a second interface sheet disposed between the interface section and the second module board; The inspection system of claim 1 .
5. the first module board and the second module board each have a plurality of test units connected to each of the plurality of devices under test to perform testing; the sum of the number of the plurality of test units of the first module board and the number of the plurality of test units of the second module board is equal to or less than the number of the relay units of the interface section; The inspection system of claim 4 .
6. The plurality of module boards include: a first module board stacked on the interface section, a second module board adjacent to the first module board and stacked on the interface section, a third module board stacked on the first module board, and a fourth module board stacked on the second module board, The interface sheet includes: a first interface sheet disposed between the interface section and the first module board, a second interface sheet disposed between the interface section and the second module board, a third interface sheet disposed between the first module board and the third module board, and a fourth interface sheet disposed between the second module board and the fourth module board, The inspection system of claim 1 .
7. the first module board, the second module board, the third module board, and the fourth module board each have a plurality of test units connected to each of the plurality of devices under test to perform testing; the total number of the plurality of inspection units on the first module board, the plurality of inspection units on the second module board, the plurality of inspection units on the third module board, and the plurality of inspection units on the fourth module board is equal to or less than the number of the relay units of the interface section. The inspection system of claim 6 .
8. the module board has a plurality of signal transmission sections that connect the interface sheet stacked on one side of the module board to the interface sheet stacked on the other side of the module board so as to be able to transmit signals; The inspection system according to any one of claims 1 to 7.
9. When the module boards are stacked in the first direction, the interface sheet has main wiring that electrically connects the plurality of relay units of the interface section to the plurality of inspection units of the module board, respectively, and sub-wiring that electrically connects the plurality of relay units of the interface section to the plurality of signal transmission units of the module board. The inspection system of claim 8 .
10. a fixing mechanism for fixing the module board and the interface sheet together to the interface section; The inspection system according to any one of claims 1 to 7.
11. The interface sheet is flexible, while the module board is formed to have greater rigidity than the interface sheet; The inspection system according to any one of claims 1 to 7.
12. the plurality of module boards arranged in the interface section are capable of performing the same test on the plurality of devices under test on the board; The inspection system according to any one of claims 1 to 7.
13. the plurality of module boards arranged in the interface section are capable of performing different tests on the plurality of devices under test on the board; The inspection system according to any one of claims 1 to 7.
14. 1. A method for assembling an inspection system for inspecting a substrate having a plurality of devices under test, comprising: The inspection system includes: a probe card having a plurality of contact probes connected to the plurality of devices under test; an interface unit electrically connected to the probe card and having a number of relay units equal to or greater than the number of the plurality of devices to be tested; In the assembly method, (A) stacking module boards for testing devices to be tested, the number of which is equal to or less than the number of relay units of the interface unit, on a surface of the interface unit opposite to the connection side of the probe card via an interface sheet, and electrically connecting the module boards and the plurality of relay units of the interface unit; (B) stacking another module board via the interface sheet on the opposite surface of the interface section in the stacking direction of the module boards stacked in step (A) or in a direction parallel to the module boards, thereby electrically connecting the other module board and the multiple relay units of the interface section. How to assemble an inspection system.
Citation Information
Patent Citations
Wafer inspection apparatus
JP2020145446A