Radio frequency low noise amplifier circuit and radio frequency chip

Abstract

The present invention provides a radio frequency low noise amplifier circuit and radio frequency chip, comprising a signal input terminal, an input matching circuit, an amplifier circuit, an output matching circuit and a signal output terminal connected in sequence, and further comprising a gain adjustment circuit connected in parallel with the amplifier circuit, the gain adjustment circuit including a tenth transistor, an eleventh transistor, a twelfth transistor, a first resistor, a second resistor, a third resistor and a fourth capacitor, the source of the tenth transistor, the source of the eleventh transistor and the source of the twelfth transistor are connected to each other and grounded, the drain of the tenth transistor is connected to the first end of the first resistor, the drain of the eleventh transistor is connected to the first end of the second resistor, the drain of the twelfth transistor is connected to the first end of the third resistor, and the second end of the first resistor, the second end of the second resistor and the second end of the third resistor are all connected to the first end of the fourth capacitor. The radio frequency low noise amplifier circuit and chip of the present invention have a flexible and adjustable gain and high safety.

Description

[Technical field]

[0001] The present invention relates to the field of wireless communication technology, in particular to a radio frequency low noise amplifier circuit and a radio frequency chip. [Background technology]

[0002] With the information age of mankind, wireless communication technologies such as mobile phones, wireless LANs, and Bluetooth have developed rapidly and become indispensable to social life and development. The progress of wireless communication technology is inseparable from the development of radio frequency circuits and microwave technology. At present, radio frequency amplifiers are one of the important components in wireless transmission and reception systems.

[0003] Traditional radio frequency low noise amplifiers have a fixed gain, and the gain of the radio frequency receiving link is adjusted by the rear variable gain amplifier to adapt to input signals of different power levels. In the 5G NR (New Radio) radio frequency system platform, it is necessary to realize adjustable gain for the front-end low noise amplifier as well in order to achieve a wider input dynamic range and at the same time reduce the complexity of the subsequent intermediate frequency amplifier circuit.

[0004] However, the radio frequency low noise amplifier circuit of the prior art has a poor gain adjustment effect, a low adaptation rate and a narrow adaptation range. Summary of the Invention [Problem to be solved by the invention]

[0005] In view of the above shortcomings in the prior art, the present invention provides a radio frequency low noise amplifier circuit and radio frequency chip with flexibly adjustable gain, small return loss, and high safety, in order to solve the above technical problems. [Means for solving the problem]

[0006] In order to solve the above technical problems, the present invention adopts the following technical solutions.

[0007] In a first aspect, an embodiment of the present invention provides a radio frequency low noise amplifier circuit, comprising a signal input terminal, an input matching circuit, an amplifier circuit, an output matching circuit, and a signal output terminal, connected in sequence; a gain adjustment circuit connected in parallel with the amplifier circuit, the gain adjustment circuit including a tenth transistor, an eleventh transistor, a twelfth transistor, a first resistor, a second resistor, a third resistor, and a fourth capacitor; a source of the tenth transistor, a source of the eleventh transistor, and a source of the twelfth transistor are connected to each other and grounded, a drain of the tenth transistor is connected to a first end of the first resistor, a drain of the eleventh transistor is connected to a first end of the second resistor, and a drain of the twelfth transistor is connected to a first end of the third resistor; The second end of the first resistor, the second end of the second resistor, and the second end of the third resistor are all connected to the first end of the fourth capacitor, and the second end of the fourth capacitor is connected to the amplifier circuit as an input end of the gain adjustment circuit.

[0008] Preferably, the amplifier circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor; a source of the first transistor, a source of the second transistor, and a source of the third transistor are connected to each other to form a common-source input structure and are connected to the input matching circuit; a drain of the first transistor, a drain of the second transistor, and a drain of the third transistor are connected to a source of the fourth transistor, a source of the fifth transistor, and a source of the sixth transistor, respectively; a gate of the first transistor, a gate of the second transistor, and a gate of the third transistor are connected to each other and are connected to the input matching circuit; The drain of the fourth transistor, the drain of the fifth transistor, and the drain of the sixth transistor are connected to each other, and then connected to the input end of the output matching circuit and the input end of the gain adjustment circuit, respectively.

[0009] Preferably, the amplifier circuit further includes a seventh transistor, the source of the seventh transistor being connected to the drain of the fourth transistor, and the drain of the seventh transistor being connected to the input end of the output matching circuit.

[0010] Preferably, the output matching circuit includes a first inductor, a first capacitor, and a second capacitor; a first end of the first inductor is connected to a power supply voltage, and a second end of the first inductor is connected to a drain of the seventh transistor as an input end of the output matching circuit; the first capacitor and the first inductor are connected in parallel; A first end of the second capacitor is connected to the second end of the first inductor, and a second end of the second capacitor is connected to the signal output terminal.

[0011] Preferably, the input matching circuit includes a first input matching network and a second input matching network, an input end of the first input matching network is connected to the signal input end, an output end of the first input matching network is connected to the gate of the first transistor, an output end of the second input matching network is grounded, and an input end of the second input matching network is connected to the source of the first transistor.

[0012] Preferably, the first input matching network includes a second inductor and a third capacitor, a first end of the second inductor is connected to the signal input end as an input end of the first input matching network, a second end of the second inductor is connected to a first end of the third capacitor, and a second end of the third capacitor is connected to a gate of the first transistor.

[0013] Preferably, the second input matching network includes an eighth transistor, a ninth transistor, a third inductor, and a fourth inductor, a source of the eighth transistor and a source of the ninth transistor are connected to each other and grounded, a drain of the ninth transistor is connected to a first end of the third inductor, a drain of the eighth transistor is connected to a second end of the third inductor, a first end of the fourth inductor is connected to a second end of the third inductor, and a second end of the fourth inductor is connected to the source of the second transistor.

[0014] Preferably, the third inductor and the fourth inductor are connected in series to form a source inductor of the second transistor.

[0015] In a second aspect, an embodiment of the present invention further provides a radio frequency chip comprising the above-mentioned radio frequency low noise amplifier circuit. Effect of the Invention

[0016] Compared with the related art, in the embodiment of the present invention, an input signal input from a signal input terminal is input to an amplifier circuit through an input matching circuit, the input signal is amplified to an output matching circuit through the amplifier circuit, the amplified signal output from the amplifier circuit is output through the output matching circuit, one end of a gain adjustment circuit is connected to the other end of the amplifier circuit and used to adjust the gain of the amplified signal, the other end of the gain adjustment circuit is grounded, the source of the tenth transistor, the source of the eleventh transistor, and the source of the twelfth transistor of the gain adjustment circuit are connected to each other and grounded, the drain of the tenth transistor is connected to the first end of the first resistor, the drain of the eleventh transistor is connected to the first end of the second resistor, the drain of the twelfth transistor is connected to the first end of the third resistor, the second end of the first resistor, the second end of the second resistor, and the second end of the third resistor are all connected to the first end of the fourth capacitor, and the second end of the fourth capacitor is connected to the amplifier circuit as the input end of the gain adjustment circuit. Since the input signal is amplified through the amplifier circuit, the larger the total current, the higher the gain; since the 10th transistor, the 11th transistor, and the 12th transistor of the gain adjustment circuit form attenuation branch circuits with the 1st resistor, the 2nd resistor, and the 3rd resistor respectively, the more conductive branch circuits, the lower the gain. Thus, the gain of the radio frequency low noise amplifier circuit is adjustable, and the arrangement adjustment of the gain size can be realized to adapt to radio frequency input signals of different power levels. [Brief description of the drawings]

[0017] The present invention will now be described in detail with reference to the drawings. The above and other aspects of the present invention will become more clear and easier to understand from the detailed description taken in conjunction with the following drawings. [Figure 1] FIG. 2 is a module diagram of a radio frequency low noise amplifier circuit according to an embodiment of the present invention. [Diagram 2] 1 is a schematic diagram of the structure of a radio frequency low noise amplifier circuit according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application belongs, and the terms used herein in the specification of this application are intended only to describe specific embodiments and are not intended to limit this application. The terms "comprise" and "have" and variations thereof in the specification and claims of this application and the above description of the drawings are intended to include non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of this application or the above drawings are used to distinguish different objects, not to describe a particular order.

[0019] Reference to an "embodiment" in this specification means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it intended that separate or alternative embodiments are mutually exclusive with other embodiments. Those skilled in the art will understand, either explicitly or implicitly, that the embodiments described herein may be combined with other embodiments.

[0020] In the following, the technical solutions of the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings of the embodiments of the present invention. Of course, the embodiments described herein are only a part, not all, of the embodiments of the present invention. All other embodiments that a person skilled in the art can obtain based on the embodiments of the present invention without creative work should be included in the protection scope of the present invention.

[0021] <Example 1> As shown in Figures 1 and 2, the radio frequency low noise amplifier circuit 100 provided by the embodiment of the present invention includes a signal input terminal 1, an input matching circuit 2, an amplifier circuit 3, an output matching circuit 4, a gain adjustment circuit 5, and a signal output terminal 6, which are connected in order.

[0022] Signal input 1 is used to connect a single-ended input signal, The input matching circuit 2 has one end connected to the signal input terminal 1 and is used to match and output the input signal. The input matching circuit 2 performs matching processing on the received input signal to obtain a matching signal, and transmits the matching signal to one end of the amplifier circuit 3.

[0023] The amplifier circuit 3 has one end connected in series with the other end of the input matching circuit 2 and is used to amplify the input signal. The gain of the chip is increased by amplifying the matching signal output by the input matching circuit 2.

[0024] The output matching circuit 4 has one end connected to the other end of the amplifier circuit 3 and is used to output the amplified signal output by the amplifier circuit 3.

[0025] One end of the gain adjustment circuit 5 is connected to the other end of the amplifier circuit 3 and is used to perform gain attenuation adjustment on the amplified signal, and the other end of the gain adjustment circuit 5 is grounded. By connecting to the other end of the amplifier circuit 3, the output amplified signal is attenuated and the gain is reduced, which can facilitate adjustment of the gain size of the chip.

[0026] The signal output terminal 6 is connected to the other terminal of the output matching circuit 4 and is used to output a signal.

[0027] Specifically, the input signal input from the signal input terminal 1 is matched through the input matching circuit 2 and output to the amplifier circuit 3, the input signal is amplified through the amplifier circuit 3 to the output matching circuit 4, one end of the output matching circuit 4 is connected to the other end of the amplifier circuit 3, and is used to output the amplified signal output by the amplifier circuit 3, one end of the gain adjustment circuit 5 is connected to the other end of the amplifier circuit 3, and is used to adjust the gain of the amplified signal, the other end of the gain adjustment circuit 5 is grounded, and the signal output terminal 6 is connected to the other end of the output matching circuit 4, and is used to output the signal. Since the input signal is amplified through the amplifier circuit 3, the larger the total current is, the higher the gain is, and since the gain adjustment circuit 5 forms an attenuation branch circuit for the amplifier circuit 3, the gain is lower, so that the gain of the radio frequency low noise amplifier circuit 100 is adjustable, and the arrangement adjustment of the gain size can be realized to adapt to radio frequency input signals of different power levels.

[0028] In this embodiment, the gain adjustment circuit 5 includes a tenth transistor M10, an eleventh transistor M11, a twelfth transistor M12, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth capacitor C4, the drain of the tenth transistor M10 is connected to the first end of the first resistor R1, the drain of the eleventh transistor M11 is connected to the first end of the second resistor R2, the drain of the twelfth transistor M12 is connected to the first end of the third resistor R3, the source of the tenth transistor M10, the source of the eleventh transistor M11, and the source of the twelfth transistor M12 are connected to each other and grounded, the second end of the first resistor R1, the second end of the second resistor R2, and the second end of the third resistor R3 are all connected to the first end of the fourth capacitor C4, and the second end of the fourth capacitor C4 is connected to the amplifier circuit 3 as an input end of the gain adjustment circuit 5. By connecting the gates of the tenth transistor M10, the eleventh transistor M11, and the twelfth transistor M12 to the digital control logic circuit, the conduction or blocking of the tenth transistor M10, the eleventh transistor M11, and the twelfth transistor M12 can be effectively controlled, and the gain size can be further controlled, and the control effect is good.

[0029] Specifically, by connecting the second end of the fourth capacitor C4 to the source of the seventh transistor M7, the second end of the fourth capacitor C4 is connected in series with the tenth transistor M10, the eleventh transistor M11, and the twelfth transistor M12 via the first resistor R1, the second resistor R2, and the third resistor R3, respectively, and is grounded, so that when the tenth transistor M10, the eleventh transistor M11, and the twelfth transistor M12 are conductive, a portion of the small signal current is bypassed to ground, and the gain can be adjusted to be reduced. In this way, the gain can be adjusted by changing the number of amplifier tubes, the inductance value, and the resistance value.

[0030] In this embodiment, the amplifier circuit 3 includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, and a sixth transistor M6. The source of the first transistor M1, the source of the second transistor M2, and the source of the third transistor M3 are connected to each other to form a common-source input structure and are connected to the input matching circuit 2, the drain of the first transistor M1, the drain of the second transistor M2, and the drain of the third transistor M3 are connected in series to the source of the fourth transistor M4, the source of the fifth transistor M5, and the source of the sixth transistor M6, respectively, the gate of the first transistor M1, the gate of the second transistor M2, and the gate of the third transistor M3 are connected to each other and connected to the input matching circuit 2, and the drain of the fourth transistor M4, the drain of the fifth transistor M5, and the drain of the sixth transistor M6 are connected to the input end of the output matching circuit 4 and the input end of the gain adjustment circuit 5, respectively, after being connected.

[0031] Here, the first transistor M1, the second transistor M2, and the third transistor M3 are all input source common amplifying transistors, and the first transistor M1, the second transistor M2, and the third transistor M3 are controlled by the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6, respectively, to realize the adjustment of the amplifying branch circuit.

[0032] Specifically, the input signal output by the input matching circuit 2 is transmitted to the gates of the first transistor M1, the second transistor M2, and the third transistor M3. The first transistor M1, the second transistor M2, and the third transistor M3 amplify the three conductive branch circuit signal. The amplification is controlled by the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 connected to the first transistor M1, the second transistor M2, and the third transistor M3, respectively. The more conductive branch circuits there are, the larger the total current of the amplifier and the higher the gain.

[0033] Preferably, the above-mentioned conductive branch circuit can be not only a three-branch circuit, but also a single-branch circuit, a two-branch circuit, a four-branch circuit, etc. The more the branch circuits, the larger the total current of the amplifier and the higher the gain. The specific selection can be made according to the actual situation, so we will not describe them one by one here.

[0034] In this embodiment, the amplifier circuit 3 further includes a seventh transistor M7, the source of the seventh transistor M7 is connected to the drain of the fourth transistor M4, the drain of the fifth transistor M5, and the drain of the sixth transistor M6, respectively, and the drain of the seventh transistor M7 is connected to the input terminal of the output matching circuit 4.

[0035] Here, the seventh transistor M7 is a common-gate amplifier tube, the source of the seventh transistor M7 is connected to the drain of the fourth transistor M4, the drain of the fifth transistor M5, and the drain of the sixth transistor M6, respectively, and the drain of the seventh transistor M7 is connected to one end of the output matching circuit 4, thereby performing the roles of voltage division and input / output isolation, and improving safety.

[0036] In this embodiment, the output matching circuit 4 includes a first inductor Ld, and a first capacitor C1 and a second capacitor C2 connected in parallel to the first inductor Ld, a second end of the first inductor Ld and the first capacitor C1 after the parallel connection is connected to a power supply voltage VDD, one ends of the first inductor Ld and the first capacitor C1 are connected to the drain of the seventh transistor M7, a first end of the second capacitor C2 is connected to a first end of the first capacitor C1, and a second end of the second capacitor C2 is connected to the signal output end 6.

[0037] Here, the first inductor Ld is a choke inductor, and is used for functions such as filtering, oscillation, current stabilization, and suppression of electromagnetic interference. The first inductor Ld is combined with the first capacitor C1 to form an LC filter circuit, which provides filtering and interference prevention effects.

[0038] Preferably, the output matching circuit 4 is used to match the output impedance of the amplifier to 50 ohms matched load, and has strong anti-interference performance.

[0039] Specifically, the amplified signal is transmitted to the first end of the first inductor Ld and the first capacitor C1 through the seventh transistor M7, and the first inductor Ld and the first capacitor C1 are connected in parallel, so that the resonance of the first inductor Ld and the first capacitor C1 is within the operating frequency band, and can play a role in frequency selection. The second capacitor C2 is used to block the output DC signal, achieving a DC blocking effect.

[0040] In this embodiment, the input matching circuit 2 includes a first input matching network 21 and a second input matching network 22, an input end of the first input matching network 21 is connected to the signal input end 1, an output end of the first input matching network 21 is connected to the gate of the first transistor M1, an output end of the second input matching network 22 is grounded, and an input end of the second input matching network 22 is connected to the source of the first transistor M1. An input signal is matched to the amplifier circuit 3 through the first input matching network 21, and the second input matching network 22 is used to control the source switching of the first transistor M1, the second transistor M2, and the third transistor M3, which facilitates gain level switching.

[0041] In this embodiment, the first input matching network 21 includes a second inductor Lg and a third capacitor C3 connected in series with the second inductor Lg, a first end of the second inductor Lg is connected to the signal input terminal 1 as an input terminal of the first input matching network 21, a second end of the second inductor Lg is connected to a first end of the third capacitor C3, and a second end of the third capacitor C3 is connected to the gate of the first transistor M1. An input signal is input to the second inductor Lg through the signal input terminal 1 and output to the third capacitor C3 through the second inductor Lg, the third capacitor C3 isolates the DC signal, and the AC signal is output to the gates of the first transistor M1, the second transistor M2, and the third transistor M3, the input signal is amplified by the first transistor M1, the second transistor M2, and the third transistor M3, and is output to the output matching circuit 4 from the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6, respectively. At the same time, the second inductor Lg and the third capacitor at the gate of the first transistor M1 are connected in series, so that the first input matching network 21 resonates at the operating frequency point and realizes low-noise input matching of the amplifier.

[0042] In this embodiment, the second input matching network 22 includes an eighth transistor M8, a ninth transistor M9, a third inductor Ls1, and a fourth inductor Ls0, a source of the eighth transistor M8 and a source of the ninth transistor M9 are connected to each other and grounded, a drain of the ninth transistor M9 is connected to a first end of the third inductor Ls1, a drain of the eighth transistor M8 is connected to a second end of the third inductor Ls1 and then to a first end of the fourth inductor Ls0, and a second end of the fourth inductor Ls0 is connected to the source of the second transistor M2.

[0043] In this embodiment, the fourth inductor Ls0 and the third inductor Ls1 are source inductors.

[0044] Specifically, the fourth inductor Ls0 and the third inductor Ls1 are source inductors, which provide a real part impedance for input matching. When at a high gain level, the eighth transistor M8 is turned on, the ninth transistor M9 is turned off, and only the fourth inductor Ls0 works. When at a low gain level, the eighth transistor M8 is turned off, and the ninth transistor M9 is turned on, and the source total inductance is the total inductance value of the fourth inductor Ls0 and the third inductor Ls1 connected in series, which not only achieves the effect of reducing the gain, but also compensates for the reduction in the real part of the input impedance caused by the reduction in the mutual conductance of the transistors in the low gain level state, and the purpose that it can have a relatively good input return loss performance even at a low gain level is achieved. The gain level is flexible and adjustable, and at the same time, it meets the requirements of no deterioration of input and output return loss at each gain level and high safety.

[0045] <Example 2> The embodiment of the present invention also provides a radio frequency chip, which includes the radio frequency low noise amplifier circuit 100 of the above embodiment 1. According to the above radio frequency low noise amplifier circuit 100, the chip can realize adaptive adjustment of gain size to adapt to radio frequency input signals of different power levels.

[0046] It should be noted that the embodiments described with reference to the accompanying drawings are only used to explain the present invention, and do not limit the scope of the present invention. Those skilled in the art should understand that any modifications or equivalent replacements made to the present invention without departing from the spirit and scope of the present invention should be included within the scope of the present invention. In addition, unless otherwise required by the context, words appearing in the singular form include the plural form, and vice versa. Furthermore, unless otherwise specified, the whole or part of any embodiment can be used in combination with the whole or part of any other embodiment. [Explanation of symbols]

[0047] 100 radio frequency low noise amplifier circuit, 1 signal input terminal, 2 input matching circuit, 21 first input matching network, 22 second input matching network, 3 amplifier circuit, 4 output matching circuit, 5 gain adjustment circuit, 6 signal output terminal.

Claims

1. A radio frequency low noise amplifier circuit including a signal input terminal, an input matching circuit, an amplifier circuit, an output matching circuit, and a signal output terminal, which are connected in this order, a gain adjustment circuit connected in parallel with the amplifier circuit, the gain adjustment circuit includes a tenth transistor, an eleventh transistor, a twelfth transistor, a first resistor, a second resistor, a third resistor, and a fourth capacitor; a source of the tenth transistor, a source of the eleventh transistor, and a source of the twelfth transistor are connected to each other and grounded, a drain of the tenth transistor is connected to a first end of the first resistor, a drain of the eleventh transistor is connected to a first end of the second resistor, and a drain of the twelfth transistor is connected to a first end of the third resistor; a second end of the first resistor, a second end of the second resistor, and a second end of the third resistor are all connected to a first end of the fourth capacitor, and the second end of the fourth capacitor is connected to the amplifier circuit as an input end of the gain adjustment circuit.

2. the amplifier circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor; a source of the first transistor, a source of the second transistor, and a source of the third transistor are connected to each other to form a common-source input structure and are connected to the input matching circuit; a drain of the first transistor, a drain of the second transistor, and a drain of the third transistor are connected to a source of the fourth transistor, a source of the fifth transistor, and a source of the sixth transistor, respectively; a gate of the first transistor, a gate of the second transistor, and a gate of the third transistor are connected to each other and are connected to the input matching circuit; 2. The radio frequency low noise amplifier circuit according to claim 1, wherein the drain of the fourth transistor, the drain of the fifth transistor, and the drain of the sixth transistor are connected to each other and then connected to the input end of the output matching circuit and the input end of the gain adjustment circuit, respectively.

3. 3. The radio frequency low noise amplifier circuit according to claim 2, wherein the amplifier circuit further includes a seventh transistor, the source of the seventh transistor being connected to the drain of the fourth transistor, and the drain of the seventh transistor being connected to the input end of the output matching circuit.

4. the output matching circuit includes a first inductor, a first capacitor, and a second capacitor; a first end of the first inductor is connected to a power supply voltage, and a second end of the first inductor is connected to a drain of the seventh transistor as an input end of the output matching circuit; the first capacitor and the first inductor are connected in parallel; 4. The radio frequency low noise amplifier circuit according to claim 3, wherein a first end of the second capacitor is connected to the second end of the first inductor, and a second end of the second capacitor is connected to the signal output terminal.

5. 3. The radio frequency low-noise amplifier circuit according to claim 2, wherein the input matching circuit includes a first input matching network and a second input matching network, an input end of the first input matching network is connected to the signal input end, an output end of the first input matching network is connected to the gate of the first transistor, an output end of the second input matching network is grounded, and an input end of the second input matching network is connected to the source of the first transistor.

6. 6. The radio frequency low-noise amplifier circuit according to claim 5, wherein the first input matching network includes a second inductor and a third capacitor, a first end of the second inductor is connected to the signal input end as an input end of the first input matching network, a second end of the second inductor is connected to a first end of the third capacitor, and a second end of the third capacitor is connected to a gate of the first transistor.

7. 6. The radio frequency low-noise amplifier circuit according to claim 5, wherein the second input matching network includes an eighth transistor, a ninth transistor, a third inductor, and a fourth inductor, a source of the eighth transistor and a source of the ninth transistor are connected to each other and grounded, a drain of the ninth transistor is connected to a first end of the third inductor, a drain of the eighth transistor is connected to a second end of the third inductor, a first end of the fourth inductor is connected to a second end of the third inductor, and a second end of the fourth inductor is connected to the source of the second transistor.

8. 8. The radio frequency low noise amplifier circuit according to claim 7, wherein the third inductor and the fourth inductor are connected in series to form a source inductor of the second transistor.

9. A radio frequency chip comprising the radio frequency low noise amplifier circuit according to any one of claims 1 to 8.

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