Selective thin film resistor and method for making same

Abstract

The present disclosure includes methods for making selective thin film resistors, as well as thin film resistors comprising a dielectric core with thin film resistor material disposed between copper conductors, but without thin film resistor material disposed below the copper conductors. Embodiments of the present disclosure provide methods for fabricating selective thin film resistors ("STFR") that have thin film resistor material ("TERM") located only on selected areas on the core, as opposed to having TERM present over the entire core and below the copper conductors.

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Provisional Patent Application No. 63 / 434,836, filed December 22, 2022, the entire contents of which are incorporated herein by reference. [Background technology]

[0002] Resistors are standard components in many semiconductor integrated circuits. For example, resistors are typically used to control the resistance of various other electronic components in an integrated circuit, such as radio frequency (RF) circuits (e.g., oscillators, phase shift circuits, filters, converters, etc.), memory (e.g., dynamic random access memory (DRAM), static random access memory (SRAM), etc.), and various analog / mixed-signal circuits. Many integrated circuit devices incorporate thin-film resistors (TFRs), which offer various advantages over other types of resistors. For example, TFRs can be highly accurate and can be fine-tuned to exhibit very precise resistance values. For another example, TFRs typically have low parasitics, which provides advantageous high-frequency behavior. In addition, TFRs typically have a low temperature coefficient of resistance (TCR), for example, after an appropriate annealing process to "tune" the TCR to a customer-specified near-zero value, which can provide stable operation over a wide operating temperature range. However, a need remains for more efficient and accurate thin-film resistors. Summary of the Invention

[0003] Embodiments of the present disclosure include methods of making selective thin film resistors, as well as thin film resistors comprising a dielectric core having thin film resistor material disposed between copper conductors, but no thin film resistor material disposed below the copper conductors. [Brief explanation of the drawings]

[0004] [Figure 1]Figure 1 shows a related art diagram of a thin film resistor (TFR). Often there is a copper layer, then a thin film resistor layer on a core material (i.e., a dielectric material), then another thin film resistor layer, and finally another copper layer. [Figure 2] 2A and 2B illustrate a comparison of non-selective and selective thin film resistor circuit formation. FIG. 2A illustrates conventional circuit formation using TFR, referred to as "non-selective" because the film resistor material is disposed underneath the copper material. This contrasts with "selective" circuit formation, which indicates that the thin film resistor material (TFRM) is not disposed underneath the copper material (shown in FIG. 2B), but instead is disposed in selected desired areas on the core. FIG. 2B illustrates the selective TFR of the present disclosure, which indicates that in selective TFR, the thin film resistor material (3) is disposed only on the desired areas of the core material (2), but is not disposed underneath the copper film (4). [Figure 3A] Figure 3A illustrates the initial build-up process. The thin film resistor material (TFRM) layer (3) and copper foil (4a) can be provided by a supplier and then adhered to the core (HF dielectric material) (2). Alternatively, the complete build-up can be provided by a laminate supplier. Alternatively, the thin film resistor material (TFRM) layer (3) can be applied to the core (HF dielectric material) (2). The first copper foil layer (4a) is then applied over the TFRM (3) using known methods. [Figure 3B] 3B illustrates a copper etch-down process. A first copper foil layer (4a) disposed on the thin-film resistor layer may be etched to produce a first thin copper layer (4b), since thinner copper layers provide better feature resolution. Alternatively, instead of etching down the starting copper foil layer, a thinner starting copper foil layer may be used to achieve similar results. [Figure 3C] FIG. 3C shows the lamination of a photosensitive resist material (4c). [Figure 3D] Figure 3D illustrates the next step: a photoresist material is exposed over the desired thin film resistor areas (5). The exposed areas polymerize and therefore cannot be developed away. [Figure 4] Figure 4 shows that the unexposed photoresist material has been developed away, leaving exposed resist material (5b) in the desired location on the first thin copper layer (4b) overlying the thin film resistor material (3). The exposed resist material (5b) covers the thin film resistor in the desired areas, marking the beginning of the process for defining selective thin film resistors. [Figure 5] FIG. 5 shows the resulting structure after the etchant has removed the areas of the first thin copper layer (4b) and the thin film resistor material TFRM (3) that were not protected by the exposed resist material (5b), leaving only a "sandwich structure" (15) comprising the TFRM layer (3), the first thin copper layer (4b) and the exposed resist material (5b) disposed on the core (2). [Figure 6] Figure 6 shows the resulting TFR structure after the exposed resist material (5b) is stripped from the sandwich structure. This figure shows that the TFRM has been removed from areas other than those located under the copper layer, thus leaving a sandwich structure (16) comprising a TFRM layer (3) and a first thin copper layer (4b). By removing the thin film resistor layer formed in the core (other than the TFRM in the sandwich structure (16)), adhesion challenges for subsequent metal formation (the "metallization step") are overcome. [Figure 7] 7 illustrates the formation of a thin layer of seed copper (6) in preparation for semi-additive plating (SAP). A thin layer of seed copper (6) is formed on the core and sandwich structure (16) using methods and materials known in the art. [Figure 8] FIG. 8 illustrates the formation of a second layer of photosensitive resist material (7) as a step in preparation for semi-additive plating (SAP). [Figure 9]9 shows a second photosensitive resist material (9) exposed to mask the seed copper layer (6) and sandwich structure (16) (metallization bus layer) prior to development to open the resistor features (16) and their associated connections. The exposure is based on a UV light source and may be a direct write technique or photolithography. [Figure 10] 10 shows the exposed second photosensitive resist material layer (9) being developed in preparation for semi-additive plating (SAP), with only the unexposed second photosensitive resist material layer being developed away. [Figure 11] Figure 11 shows a circuit build-up using SAP pattern plating. Electrolytic copper is used to build up the circuit. An electrolytic copper layer (8) is applied (using known deposition and lithographic methods) in the desired locations, while an exposed second layer of photosensitive resist material (9) is still present. [Figure 12] Figure 12 illustrates the removal of the exposed second layer of photosensitive resist material in preparation for circuit definition. The exposed second layer of photosensitive resist material (9) is stripped using NaOH or other chemicals prior to differential etching. [Figure 13] Figure 13 shows the differential etch for feature definition: the seed copper (6) is removed to define the circuitry. [Figure 14] FIG. 14 shows the third photosensitive resist material layer (11) formed. [Figure 15] FIG. 15 shows that the exposure of the third layer of photosensitive resist material (11) promotes high resolution resistor definition. [Figure 16]Figure 16 illustrates the resist material development process and copper selective etching process to create resistors. The third photosensitive resist material layer (11) is developed to expose the copper (17) underneath the third photosensitive resist material layer (11). The underlying copper (17) is then etched away to expose the selective thin film resistors (20). The remaining third photosensitive resist layer (11) is stripped using NaOH or other chemicals. [Figure 17] FIG. 17 is a diagram illustrating a selective thin film resistor. DETAILED DESCRIPTION OF THE INVENTION

[0005] Embodiments of the present disclosure provide methods for fabricating selective thin film resistors ("STFR") that have thin film resistor material ("TFRM") located only on selected areas on the core, as opposed to having TFRM present over the entire core and underneath the copper conductor. In other words, the TFRM is not present underneath the copper film.

[0006] FIG. 1 shows a general overview of a thin-film resistor (TFR) buildup. As shown, the overall buildup includes a top copper layer having a constant thickness, which may be, for example, 18 μm, 35 μm, or another thickness. Beneath the top copper layer is a TFRM having a predetermined resistivity. Beneath the TFRM is a high-frequency (HF) dielectric material, which may be provided in various thicknesses. Beneath this layer is another TFRM layer, followed by a bottom copper layer. As shown in FIG. 1, each layer may be pre-laminated or may be laminated by applying an adhesive between at least the TFRM layer and the dielectric layer. To complete the circuit formation, a photosensitive resist material for selective plating or etching is applied to each copper layer. FIG. 2A shows a typical thin-film resistor structure having a TFRM (3) disposed over a core (2) and also disposed under an adjacent copper film (4). Figure 2B shows an STFR (1) in which a TFRM (3) is located above the core (2), but not underneath the adjacent copper film (4) area. By having the TFRM only in the desired location on the core, and not underneath the copper film, the STFR exhibits less "skin effect" and therefore has lower signal loss than conventional thin film resistors (TFRs).

[0007] TFRs typically have a core material (often referred to herein as the HF dielectric core) that is a high frequency dielectric, typically polytetrafluoroethylene (PTFE) or a composite containing PTFE. TFRMs are typically NiCr (nickel-chromium) "nichrome" alloys or tantalum nitride (TAN).

[0008] Figure 3A shows the initial buildup of the process for making a selective thin film resistor (STFR): a first copper foil layer (4a) is formed on top of a thin film resistor material (3) which is formed on top of an HF dielectric core (2).

[0009] FIG. 3B illustrates a copper etch-down process, in which a pre-formed first copper foil layer (4) is thinned and etched to obtain a thin first copper layer (4b). For example, the copper foil layer may be etched down from approximately 18 μm to between 2-4 μm using an acid etch. Conventional acid etch materials can be used in this etching process. Alternatively, instead of etching down the starting copper foil layer, a thinner starting copper foil layer can be used to achieve similar results. A thinner copper layer allows for better feature resolution during etching.

[0010] Figure 3C shows the lamination step: a photosensitive resist material (4c) is applied on top of the first thin copper layer (4b). Figure 3D shows the next step, in which a photosensitive resist material (4c) is exposed over the desired thin film resistor area (5). The exposed desired thin film resistor area (5) polymerizes and therefore cannot be developed away. The exposure is based on a UV light source and can be a direct write technique, or photolithography can be used.

[0011] Figure 4 shows that the unexposed photosensitive resist material is then developed away. Known developers can be used. This leaves exposed resist material (5b) in the desired locations on the first thin copper layer (4b) overlying the thin film resistor material (3). The exposed resist material (5b) covers the areas that will become the desired thin film resistors, marking the beginning of the process for defining selective thin film resistors.

[0012] The resistor material can be any known and useful material that "protects" the copper film from the acid etchant used to remove the desired areas of the copper film and thin film resistor material (TFRM) (3) not protected by the resist material. Known materials can be used to remove the copper layer not protected by the resist material. Typically, a slightly alkaline etchant is applied to remove the copper film not protected by the resist material. The TFRM (3) not protected by the resist material is then removed using materials and processes applicable to TFRM removal. Figure 5 shows the resulting product. This figure shows the "sandwich structure" (15) remaining after the etching process discussed above, comprising the TFRM layer (3) disposed over the core (2), the first thin copper layer (4b), and the exposed resist material (5b).

[0013] The next step is removal of the exposed resist material (5b). NaOH or other chemicals can be used to strip the exposed resist material (5b). The resulting structure is shown in FIG. 6. FIG. 6 shows the product obtained after the exposed resist material (5b) has been removed, thereby leaving a sandwich structure (16) comprising the TFRM layer (3) and the first thin copper layer (4b). By removing the thin film resistor material deposited on the core (2) (other than the desired areas, such as the TFRM, within the sandwich structure (16)), adhesion challenges for subsequent metal formation ("metallization step") are overcome. For example, high frequency dielectrics pose adhesion challenges for subsequent metallization steps. Removing the thin film resistor layer overcomes this.

[0014] The next step in the process of making a selective thin film resistor ("STFR") involves applying a thin layer of seed copper (6) onto the sandwich structure (16) as well as onto the core material (2) using known copper deposition methods, as shown in Figure 7. This application of a low-deposition electroless copper metallization process allows for highly detailed and dense circuitry.

[0015] Next, a second photosensitive resist material layer (7) is formed in the desired position. As shown in Figure 8, the second photosensitive resist material layer (7) is placed on the sandwich structure (16) and the seed copper layer (6). The second photosensitive resist material layer (7) can be formed using a cut sheet laminator.

[0016] The second photosensitive resist material layer (7) is exposed to light to produce an exposed second photosensitive resist layer (9). This layer is used to protect the unreinforced sandwich structure (16) and the seed copper (6) as an etch protection for acid copper plating. That is, the second photosensitive resist material layer is selectively exposed in specific areas to produce an exposed second photosensitive resist layer (9) for protecting the resistor area and the seed copper. The exposure is based on a UV light source and may be a direct write technique or a photolithography method.

[0017] Figure 10 shows the exposed second photosensitive resist material layer (9) being developed in preparation for semi-additive plating (SAP). Known photosensitive resist layer materials, whether wet or dry, can be used with known development processes. Only the unexposed resist will be developed away.

[0018] Figure 11 shows a circuit build-up using SAP pattern plating. Electrolytic copper is used to build up the circuit. An electrolytic copper layer (8) is applied (using known deposition and lithographic methods) in the desired locations, while an exposed second layer of photosensitive resist material (9) is still present.

[0019] Figure 12 shows the removal of the exposed second photosensitive resist material layer in preparation for circuit definition. The exposed second photosensitive resist material layer (9) is stripped using NaOH or other chemicals prior to differential etching.

[0020] Figure 13 shows the differential etch process used for feature definition: the seed copper (6) is removed to define the circuitry. Next, a third photosensitive resist material layer (11) is formed, as shown in Figure 14. As shown in Figure 15, the third photosensitive resist material layer (11) is exposed to light to promote high-resolution resistor definition. The exposure is based on a UV light source and may be a direct write technique or photolithography. As shown in Figure 15, desired sections are masked to provide unexposed areas (12) of the third photosensitive resist material layer.

[0021] FIG. 16 illustrates the resist material development process and copper selective etching process to create resistors. The third photosensitive resist material layer (11) is developed to expose the copper (17) underneath the third photosensitive resist material layer (11). The underlying copper (17) is then etched away to expose the selective thin-film resistors (20). As shown in FIG. 17, the remaining third photosensitive resist layer (11) is stripped using NaOH or other chemicals. FIG. 17 illustrates the resulting selective thin-film resistors (20) between the copper conductors. Notably, there is no thin-film resistor material disposed underneath the copper conductors.

Claims

1. 1. A method of making a selective thin film resistor, comprising: a) providing a substrate comprising a high frequency dielectric material core having a layer of thin film resistor material (TFRM) and a first copper foil layer on the thin film resistor material; b) etching down a first copper foil layer disposed on the thin film resistor layer to produce a first thin copper layer; c) laminating the first thin copper layer with a first photosensitive resist material; d) exposing the first photosensitive resist material at desired locations in areas corresponding to areas where selective thin film resistors will be located; e) developing away the unexposed areas of the first photosensitive resist material; f) removing the first thin copper layer and the areas of the thin film resistor material not located under the exposed first photosensitive resist material using an etchant; g) stripping the exposed areas of the first photosensitive resist material layer to leave a "sandwich structure" on the high frequency dielectric material core, the "sandwich structure" comprising the thin film resistor layer and the first thin copper layer; h) applying a thin layer of seed copper over the sandwich structure and core; i) applying a second layer of photosensitive resist material over the thin layer of seed copper; j) exposing the second photosensitive resist material layer in desired areas; k) developing the second photosensitive resist material layer to remove unexposed portions of the second photosensitive resist material layer; l) adding an electrolytic copper layer at the desired locations while the exposed second layer of photosensitive resist material is still present; m) removing the exposed second photosensitive resist material layer; n) removing a desired peripheral area of ​​a thin seed copper layer disposed on a high frequency dielectric material core; o) applying a third layer of photosensitive resist material; p) exposing a portion of the third photosensitive resist material layer to light; q) developing the unexposed portions of the third layer of photosensitive resist material; r) etching the copper layer that was under the developed unexposed portions of the third layer of photosensitive resist material to expose the thin film resistor material; s) removing exposed portions of the third layer of photosensitive resist material to create selective thin film resistors disposed between the copper conductors; A method comprising:

2. A thin film resistor prepared by the method of claim 1.

3. A thin film resistor in which the thin film resistor material is disposed between the copper conductors and there is no thin film resistor material disposed below the copper conductors.

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