Boron-coated backside-illuminated image sensor with fluoride-based antireflection coating

Abstract

A back-illuminated image sensor (150) for detecting short-wavelength radiation (e.g., deep ultraviolet (DUV) and vacuum ultraviolet (VUV) light) includes a semiconductor film (160), circuit elements (171) formed on a front surface (161) of the semiconductor film, and a pure boron coating (180) on a back surface (162) of the semiconductor film. A two-part anti-reflective coating (181) is formed on the pure boron coating (180) and includes a thin oxide or nitride protective layer (182) disposed between the pure boron coating (180) and a fluoride-based anti-reflective layer (185). A method for fabricating the image sensor includes performing a plasma-enhanced atomic layer deposition (plasma-enhanced ALD) process to sequentially form the pure boron coating (180), the oxide / nitride protective layer (182), and then the fluoride-based anti-reflective layer (185). The image sensor may be configured as a charge-coupled device (CCD), a complementary metal-oxide semiconductor (CMOS) sensor, or as a photodiode, and may be arranged as a two-dimensional (2D) area sensor or a one-dimensional (1D) array sensor.

Description

[Technical Field]

[0001] Related Applications This application claims priority to U.S. Provisional Patent Application No. 63 / 438,788, filed January 12, 2023, and entitled "METHODS OF IMPLEMENTING FLUORIDE-BASED ANTI-REFLECTION COATINGS ON BACK-ILLUMINATED SENSOR WITH BORON LAYER."

[0002] This application relates to image sensors suitable for detecting deep ultraviolet (DUV) and vacuum ultraviolet (VUV) radiation, and methods for manufacturing / producing such image sensors. Some sensor embodiments are suitable for detecting electrons and other charged particles. All of these sensors are suitable for use in photomask inspection systems, reticle inspection systems, or wafer inspection systems. [Background technology]

[0003] The integrated circuit industry requires inspection tools with increasingly higher resolution to resolve smaller and smaller features on integrated circuits, photomasks, reticles, solar cells, charge-coupled devices, etc., and to detect defects on the order of or smaller than the size of those features.

[0004] Inspection systems operating at short wavelengths, e.g., wavelengths shorter than approximately 250 nm, can often provide such resolution. In other cases, other charged particles, such as electrons or helium (He) nuclei (i.e., alpha particles), can be used. Specifically, for photomask or reticle inspection, the phase shift of the inspection light caused by the pattern is the same as or very similar to that caused during lithography, so it is desirable to inspect using wavelengths identical to or close to those used in lithography, i.e., wavelengths close to 193.4 nm for current-generation lithography and 13.5 nm for future EUV lithography. When inspecting semiconductor patterned wafers, inspection systems operating over a relatively wide range of wavelengths, such as wavelength ranges including wavelengths in the near-UV, deep UV, and / or vult-ultraviolet (VUV) ranges, can be advantageous because a wide range of wavelengths can reduce sensitivity to small changes in layer thickness or pattern dimensions that can cause large changes in reflectivity at individual wavelengths.

[0005] A high signal-to-noise ratio is required to detect small defects or particles on photomasks, reticles, and semiconductor wafers. Because the statistical variation in the number of detected photons (Poisson noise) is a fundamental limit on the signal-to-noise ratio, a high photon or particle flux density is required to ensure a high signal-to-noise ratio when inspecting at high speeds. Often, approximately 100,000 or more photons per pixel are required. Because inspection systems are typically used 24 hours a day with only short outages, detectors are exposed to large amounts of radiation after only a few months of operation.

[0006] Photons with a vacuum wavelength of 250 nm have an energy of approximately 5 eV. The band gap of silicon dioxide is approximately 10 eV. While it may seem that photons of such wavelengths cannot be absorbed by silicon dioxide, silicon dioxide grown on a silicon surface must have some dangling bonds at the interface with the silicon because the structure of silicon dioxide cannot perfectly match that of the silicon crystal. Furthermore, because silicon dioxide is amorphous, some dangling bonds are likely to exist within the material as well. In fact, there is a significant density of defects and impurities within the oxide and at the interface with the underlying semiconductor that can absorb photons with deep-ultraviolet wavelengths, especially photons with wavelengths shorter than approximately 250 nm. Furthermore, under high irradiance, two high-energy photons can arrive near the same location within a very short time interval (nanoseconds or picoseconds), which can result in electrons being excited into the conduction band of silicon dioxide by two absorption events in rapid succession or by two-photon absorption.

[0007] A further requirement for sensors used in inspection, metrology, and related applications is high sensitivity. As explained above, a high signal-to-noise ratio is required. If a sensor does not convert a large percentage of incident photons into a signal, a more intense light source is required to maintain the same inspection or measurement speed compared to an inspection or metrology system with a more efficient sensor. A more intense light source exposes the instrument optics and the sample being inspected or measured to higher light intensities, which can cause damage or degradation over time. Higher intensity light sources also tend to be more expensive or may not be available, especially at deep UV and VUV wavelengths. Silicon reflects a high percentage of deep UV and VUV light incident on it. For example, at wavelengths around 193 nm, silicon with a 2 nm oxide layer (e.g., native oxide layer) on its surface reflects approximately 65% ​​of the light incident on the silicon. Growing an approximately 21 nm oxide layer on the silicon surface reduces reflectivity to nearly 40% for wavelengths around 193 nm. A detector with 40% reflectivity is significantly more efficient than a detector with 65% reflectivity, but lower reflectivity, and therefore higher efficiency, is desirable.

[0008] Anti-reflection (AR) coatings (also known as anti-reflection, anti-reflective, or antiglare coatings) are commonly used on optical elements such as lenses and mirrors to increase their efficiency by reducing their reflectivity. However, many AR coating materials and processes commonly used for optical elements are often incompatible with silicon-based sensors. For example, electron- and ion-assisted deposition techniques are commonly used to produce AR and other optical coatings. However, such coating processes generally cannot be used to coat semiconductor devices because electrons or ions can deposit sufficient charge on the surface of the semiconductor device to cause electrical breakdown and consequent damage to the circuitry fabricated on the semiconductor.

[0009] Deep UV and VUV wavelengths are strongly absorbed by silicon. These wavelengths can be mostly absorbed within about 10 nm or even tens of nm of the silicon's surface. The efficiency of a sensor operating at deep UV or VUV wavelengths depends on how well it can collect the electrons generated by absorbed photons before they recombine. Silicon dioxide can form a high-quality interface with silicon, which has a low defect density. Most other materials, including many commonly used for anti-reflective coatings, are deposited directly on silicon, resulting in a very high density of electrical defects at the silicon's surface. The high density of electrical defects on the silicon's surface may not be a problem for sensors intended to operate at visible wavelengths, because such wavelengths can typically travel about 100 nm or more into silicon before being absorbed and therefore may be largely unaffected by electrical defects on the silicon surface. However, because deep UV and VUV wavelengths are absorbed very close to the silicon surface, electrical defects on the surface and / or trapped charges in layers on the surface can result in a significant percentage of electrons being lost to recombination at or near the silicon surface, resulting in a low-efficiency sensor.

[0010] U.S. Patent Nos. 9,496,425, 9,818,887, and 10,121,914 describe boron-coated back-illuminated image sensors and methods for fabricating the image sensors, including at least one boron layer deposited on at least the exposed back (light-receiving) surface of the image sensor, which functions to enhance the durability and quantum efficiency of the image sensor. Different temperature ranges for depositing boron are disclosed, including a range of about 400-450°C and a range of about 700-800°C. The inventors have discovered that one advantage of higher deposition temperatures for boron, such as a deposition temperature of about 600°C to about 900°C, is that at such temperatures, boron diffuses into silicon to provide a very thin, highly p-type doped silicon layer on the photosensitive back surface. This p-type doped silicon layer is important for ensuring high quantum efficiency for DUV and VUV radiation because it generates an electrostatic field near the surface that accelerates electrons into the silicon layer away from the surface. P-type silicon also increases the conductivity of the backside of the silicon, which is important for high-speed operation of the image sensor because a return path is needed for ground currents induced by switching signals on electrodes on the front side of the sensor. U.S. Pat. No. 11,114,491 describes an image sensor structure with very thin, low-temperature (below 450° C.) epitaxial silicon grown on a thinned surface of the backside of the silicon sensor before a low-temperature (below 450° C.) boron coating to achieve high quantum efficiency for DUV and VUV radiation, since it can also generate an electrostatic field near the surface that accelerates electrons into the silicon layer away from the surface. In all of these boron-coated backside-illuminated image sensors, the boron coating improves the durability of the image sensor by protecting it from degradation caused by high-energy radiation, such as DUV and / or VUV radiation.

[0011] As mentioned above, silicon-based backside-illuminated image sensors utilized for high-energy wafer inspection applications (i.e., using wavelengths below 193 nm) require both a boron layer and an anti-reflective coating. While the boron layer can improve the durability of these image sensors, an anti-reflective coating is required on top of the boron layer to improve the image sensor's quantum efficiency by increasing the amount of incident radiation received by the sensor (i.e., by reducing the amount of radiation reflected from the silicon surface before it reaches the sensor's sensing element). An ideal anti-reflective coating for such boron-coated image sensors would be one that can be safely formed on top of the boron layer and is transparent to wavelengths below 193 nm. Oxide-based anti-reflective coatings are used on boron-coated image sensors utilized to detect wavelengths above 193 nm, but oxide-based materials absorb radiation increasingly at wavelengths below 193 nm. Absorption of radiation by oxide-based anti-reflective coatings is very high at VUV wavelengths, such as below 150 nm, because the photon energy at these wavelengths equals or exceeds the band gap of the oxide material. Fluoride-based materials, such as magnesium fluoride (MgF2) and calcium fluoride (CaF2), are utilized to form anti-reflective coatings on optical elements used at wavelengths below 193 nm due to their higher band gaps (i.e., compared to oxides). However, using such fluoride-based anti-reflective coatings on boron-coated image sensors is problematic because the fluoride atoms, ions, and free radicals involved in the fluoride-based material deposition procedure migrate into the boron layer, damaging it and thereby reducing the durability of the image sensor. Other materials, such as metals, can be safely deposited on the boron layer without reducing the durability of the image sensor, but are not transparent to wavelengths below 193 nm. [Prior art documents] [Patent documents]

[0012] [Patent Document 1] U.S. Patent No. 9,496,425 [Patent Document 2] U.S. Patent No. 9,818,887 [Patent Document 3] U.S. Patent No. 10,121,914 [Patent Document 4] U.S. Patent No. 11,114,491 Summary of the Invention [Problem to be solved by the invention]

[0013] Therefore, there is a need for back-illuminated image sensors that are both durable and also capable of detecting UV and / or VUV radiation with high quantum efficiency. In particular, what is needed is a method for producing back-illuminated image sensors that combine both the durability provided by pure boron coatings and the low reflectivity to UV / VUV radiation exhibited by fluoride-based antireflective coatings that overcome some or all of the problems of fluoride-on-boron described above. [Means for solving the problem]

[0014] The present invention is directed to a backside-illuminated image sensor for deep ultraviolet (DUV) and vacuum ultraviolet (VUV) radiation, the backside-illuminated image sensor including a pure boron coating disposed on a backside surface of a semiconductor film (e.g., an epitaxial silicon layer), a protective layer disposed on the pure boron coating, and a two-part anti-reflective coating including a fluoride-based coating disposed on the protective layer. According to one embodiment, the protective layer includes at least one of a thin oxide film (e.g., one or more of Al2O3, MgO, La2O3, Li2O, CaO, BeO, and HfO2) and / or a thin nitride film (e.g., one or more of AlN, Li3N, LaN, Mg3N2, HfN, and Ca3N2), wherein the total thickness of the oxide / nitride film(s) is in the range of 0.5 nm to 10 nm. Implementing the protective layer using an oxide / nitride film meeting these specifications offers several advantages over other possible protective layer materials. First, when formed to a thickness of at least 0.5 nm, such oxide / nitride protective layers can be made thick enough to act as a diffusion barrier capable of preventing the migration of fluoride ions / atoms / radicals from any fluoride-based material (e.g., one of AlF3, MgF2, CaF2, LaF3, LiF, and HfF4) subsequently deposited / formed thereon to the boron coating, thus facilitating optimization of the antireflection properties of the fluoride-based AR coating while avoiding the fluoride-on-boron problem discussed above. Second, limiting the total thickness of the oxide / nitride film to 10 nm minimizes any parasitic absorption of DUV and / or VUV radiation in the oxide / nitride protective layer. Third, such oxide / nitride thin films can be safely and reliably formed with high precision on pure boron coatings using several established semiconductor manufacturing processes, including physical vapor deposition (PVD) methods such as thermal evaporation and electron beam evaporation, chemical vapor deposition (CVD) methods such as atmospheric pressure chemical vapor deposition (APCVD), plasma-assisted chemical vapor deposition (PECVD), and low-pressure chemical vapor deposition (LPCVD), atomic layer deposition (ALD), which can also be thermally or plasma-assisted, or molecular beam epitaxy (MBE).Fourth, such oxide / nitride thin films provide superior protection for the underlying pure boron coating, thereby facilitating the use of thinner pure boron coatings while increasing production yields and the operational lifetime of the image sensor. Thus, the two-part antireflective coating provides a back-illuminated image sensor that has both the durability of a pure boron coating and the low reflectivity to UV / VUV radiation of a fluoride-based antireflective coating, while solving some or all of the fluoride-on-boron problems discussed above.

[0015] In a currently preferred embodiment, the oxide / nitride protective layer comprises either an Al2O3 or AlN thin film with a thickness of 0.5 nm to 5 nm (more preferably 2 nm or less, as long as the process allows) formed on top of the pure boron coating, and a fluoride-based antireflective layer is formed on the Al2O3 or AlN protective layer. The advantage of utilizing Al2O3 and AlN in forming the oxide / nitride protective layer is that both of these materials can be deposited with high precision (i.e., atomic control of thickness) using well-established ALD processes. Furthermore, the scalability and production value of these materials, especially Al2O3, on large-area wafers is very well known. While the deposition of other oxide / nitride materials using ALD is less common, research literature indicates that these materials can be fabricated with sufficient precision on a smaller (laboratory) scale and may therefore be practical for future production. In embodiments utilizing an Al2O3 and / or AlN protective layer, of the various materials listed herein for forming a fluoride-based antireflective layer, MgF2 is currently preferred, followed by CaF2, and then other fluoride-based material options.

[0016] In a generalized embodiment, a method for fabricating the above-described back-illuminated image sensor includes forming a front-side circuit structure on a front (first) surface of a semiconductor film, forming a pure boron coating on a back (second) surface of the semiconductor film, forming an oxide / nitride protective layer on the pure boron coating to an initial thickness in the range of 0.5 nm to 50 nm, and then forming a fluoride-based anti-reflective coating on the protective layer. By forming the oxide / nitride protective layer between the pure boron coating and the fluoride-based anti-reflective coating, this method facilitates the production of back-illuminated image sensors that exhibit both the durability of the pure boron coating and the low reflectivity to UV / VUV radiation exhibited by the fluoride-based anti-reflective coating, while solving some or all of the above-described problems of fluoride-on-boron.

[0017] In some embodiments, the step of forming a pure boron coating includes depositing amorphous boron on the backside surface until a total thickness in the range of 2 nm to 20 nm is achieved. In some embodiments, a high temperature deposition process is utilized to form the pure boron coating with a suitably high quality, which requires the completion of front-end circuitry (e.g., forming metal interconnects over previously formed front-end circuit structures) after the boron formation process. In other embodiments, the pure boron coating can be formed with a suitably high quality using a high temperature deposition process, thereby facilitating the completion of front-end circuitry prior to the boron formation process.

[0018] In some embodiments, the step of forming the protective layer includes depositing one or more of Al2O3, MgO, La2O3, Li2O, CaO, BeO, HfO2, AlN, Li3N, LaN, Mg3N2, HfN, and / or Ca3N2 directly on the pure boron coating. In alternative specific embodiments, the oxide / nitride deposition process includes performing one of PVD, CVD, ALD, or MBE deposition processes. The initial thickness of the protective layer (i.e., immediately after deposition and before the formation of the fluoride-based antireflective coating) is determined by the process utilized to form the fluoride-based antireflective coating. In some embodiments, the fluoride-based antireflective coating is formed by depositing a fluoride-based material (e.g., AlF3, MgF2, CaF2, LaF3, LiF, and / or HfF4) on the protective layer using, for example, a PVD, CVD, ALD, or MBE deposition process. In these cases, the thickness of the protective layer does not change significantly during the formation of the fluoride-based antireflective coating, so the protective layer is formed with a relatively thin initial thickness (e.g., in the range of 0.5 nm to 10 nm). In other embodiments, the fluoride-based antireflective coating is formed using a fluorination process in which the protective layer is exposed to one or more fluorine-containing gases (e.g., one or more of F2, HF, XeF2, CH3F, SF6, CF4, NbF5, and WF6) under conditions that convert the upper region (e.g., the top layer) of the protective layer from an oxide / nitride material to a fluoride-based material (i.e., causing the upper portion of the protective layer to be used / converted to form the fluoride-based antireflective coating). In these cases, the thickness of the protective layer decreases significantly during the formation of the fluoride-based antireflective coating, so the protective layer is formed with a relatively thick initial thickness (e.g., in the range of 10 nm to 50 nm), depending on the desired final thickness of the protective layer and the desired final thickness of the fluoride-based antireflective coating. In some embodiments, the fluorination process is carried out in a plasma chamber to assist the conversion process.

[0019] The fabrication methods described herein can be incorporated into manufacturing flows associated with several types of boron-coated backside-illuminated image sensors. For example, the front-side circuit elements may be configured to implement charge-coupled devices (CCDs), complementary metal-oxide-semiconductor (CMOS) imagers and / or photodiodes, and may include other semiconductor devices such as transistors, diodes, resistors, and capacitors that collectively perform the image sensor operations. The fabrication methods can be used in combination with image sensor fabrication processes in which the silicon layer or SOI structure is partially or fully backside thinned and through-silicon vias are formed prior to the formation of the pure boron layer.

[0020] By utilizing any of the fabrication methods referenced above and / or described in more detail below, the present invention provides a backside-illuminated image sensor capable of sensing DUV and VUV radiation (e.g., radiation below 193 nm) that exhibits both a longer operational lifetime (i.e., due to the pure boron coating) and high quantum efficiency (i.e., due to the fluoride-based AR coating), while overcoming the fluoride-on-boron problems noted above (i.e., due to the oxide / nitride protective layer). The present invention is also directed to backside-illuminated image sensors incorporating at least one fluorine-based anti-reflective coating disposed on at least one pure boron layer, and to inspection systems utilizing such backside-illuminated image sensors.

[0021] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not necessarily restrictive of the invention as claimed. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the general description, serve to explain the principles of the invention. [Brief explanation of the drawings]

[0022] [Figure 1] 1 is a flow chart illustrating a simplified backside illuminated image sensor and associated manufacturing method according to an embodiment of the present invention. [Figure 2] 1 is a flow chart illustrating a simplified backside illuminated image sensor and associated high temperature boron fabrication method in accordance with certain embodiments of the present invention. [Figure 3] 1 is a flow chart illustrating a simplified backside illuminated image sensor and associated low temperature boron fabrication method in accordance with certain embodiments of the present invention. [Figure 4A] FIG. 1 shows a first exemplary cross section of a sensor backside illustrating the formation of a fluoride-based anti-reflective coating over an oxide / nitride protective layer and a pure boron coating, according to another embodiment. [Figure 4B] FIG. 10 shows a second exemplary cross section of the sensor backside illustrating the formation of a fluoride-based anti-reflective coating over an oxide / nitride protective layer and a pure boron coating according to another embodiment. [Figure 4C] FIG. 10 shows a third exemplary cross section of the sensor backside, illustrating the formation of a fluoride-based anti-reflective coating over an oxide / nitride protective layer and a pure boron coating, according to another embodiment. [Figure 5A] 1A-1C show another set of first exemplary cross sections of the sensor backside, illustrating the formation of a fluoride-based anti-reflective layer by partially fluorinating the top of an oxide / nitride protective layer, according to another embodiment of the present invention. [Figure 5B] 10A-10C show another set of second exemplary cross sections of the sensor backside, illustrating the formation of a fluoride-based anti-reflective layer by partially fluorinating the top of an oxide / nitride protective layer, according to another embodiment of the present invention. [Figure 5C] 10A-10C show another set of third exemplary cross sections of the sensor backside, illustrating the formation of a fluoride-based anti-reflective layer by partially fluorinating the top of an oxide / nitride protective layer, according to another embodiment of the present invention. [Figure 6A] FIG. 1 is a cross-sectional view illustrating a simplified exemplary plasma-enabled ALD deposition chamber utilized during at least a fluoride-based AR coating deposition process, according to another embodiment of the present invention. [Figure 6B]FIG. 1B is a cross-sectional view illustrating another simplified exemplary plasma-enabled ALD deposition chamber utilized during at least a fluoride-based AR coating deposition process, in accordance with another embodiment of the present invention. [Figure 7A] 1 is a cross-sectional side view illustrating a backside thinned film image sensor fabricated on a silicon substrate using partial wafer thinning, according to a related embodiment of the present invention. [Figure 7B] 1 is a cross-sectional side view of another backside thinned film image sensor fabricated on a silicon substrate using partial wafer thinning, according to a related embodiment of the present invention. [Figure 8] FIG. 1C is a cross-sectional side view illustrating a backside thinned image sensor fabricated on an SOI substrate using full wafer thinning, according to another embodiment of the present invention. [Figure 9] FIG. 9 is a simplified schematic diagram illustrating an inspection system utilizing any of the back-illuminated image sensors described with reference to FIGS. 1-8, according to another embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0023] Although the claimed subject matter is described in terms of specific embodiments, other embodiments, including embodiments that do not provide all of the advantages and features described herein, are within the scope of this disclosure. Various structural, logical, process step, and electronic changes may be made without departing from the scope of the disclosure. Accordingly, the scope of the disclosure is defined solely by reference to the appended claims.

[0024] The following description is presented to enable one skilled in the art to make and use the present disclosure as provided in the context of a particular application and its requirements. As used herein, directional terms such as "top," "bottom," "front," "frontside," "backside," "over," "under," "upper," "upward," and "lower" are intended to provide relative positions for descriptive purposes and are not intended to specify an absolute frame of reference. Various modifications to the preferred embodiment will be apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments. Thus, the present disclosure is not intended to be limited to the embodiments shown and described, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0025] 1 is a flow diagram illustrating a method 100 of producing an image sensor 150 configured to sense DUV / VUV radiation, according to a generalized embodiment of the present invention. Image sensor 150 is shown in simplified form at the bottom of FIG. 1 for reference. Additional details and options related to method 100 and image sensor 150 are described below with reference to FIGS. 2-8.

[0026] Referring to block 101 at the top of FIG. 1 and image sensor 150 at the bottom of FIG. 1, front-end circuit structures 171 are produced on front surface 161 of semiconductor film 160 using well-known integrated circuit (IC) fabrication processes such as lithography, deposition, ion implantation, annealing, and etching. As known in the art, these well-known IC fabrication processes typically include front-end processes in which non-metallic structures are produced in and on semiconductor material layers (e.g., the surface of a silicon substrate or epitaxial silicon layer), and back-end processes that include the formation of metal interconnects and other back-end circuit structures. As used herein, the phrase "semiconductor film" refers to one or more semiconductor material layers (e.g., a monolithic silicon substrate and / or one or more stacked epitaxial silicon layers), and the phrase "front-end circuit structures" refers to typical non-metallic structures produced in and on the semiconductor film during the front-end portion of a typical IC fabrication process. In contrast, the phrase "front-side circuit elements" refers to a completed circuit structure that includes both front-end circuit structures and back-end circuit structures (e.g., metal interconnects and other structures formed during the back-end portion of a typical IC manufacturing process) that collectively perform image sensor operations. When completed, the front-side circuit elements include photosensitive devices such as charge-coupled devices (CCDs), complementary metal-oxide semiconductor (CMOS) imagers and photodiodes, as well as other semiconductor devices such as transistors, diodes, resistors, and capacitors that collectively perform image sensor operations when image sensor 150 is implemented in an inspection system. As described in specific embodiments below with reference to FIGS. 2 and 3, in some cases, only the front-end circuit structures are produced during the processing of block 101, and in other cases, the front-end circuit structures are produced together with the back-end circuit structures to provide the completed front-side circuit elements. Thus, during the processing of block 101, at least the front-end circuit structures of the front-side circuit elements are formed.After front-side processing is complete, film 160 is typically thoroughly cleaned using standard cleans RCA1 and RCA2, along with a dilute HF or BHF dip, to remove surface contaminants and surface oxides from the surface and ensure that only silicon or hydrogenated silicon surfaces are exposed during subsequent processing, as described below. An optional layer can be formed over front-end circuit structure 171 for protection during subsequent processing.

[0027] Next, a pure boron coating 180 is formed on the back (second) surface 162 of the semiconductor film 160 at a location opposite the active sensor area defined by at least the location of the front-end circuit structure 171 (block 110). The pure boron coating 180 includes a boron concentration of 80% or more, with interdiffused silicon and oxygen atoms primarily comprising the remaining 20% ​​or less. In one embodiment, the formation of the pure boron coating 180 is performed such that the pure boron coating 180 has a total thickness T in the range of 2 nm to 20 nm. 180 depositing one or more amorphous layers of pure boron on the exposed backside surface 162 until the pure boron layer 180 has a thickness of 0.01 mm. In alternative embodiments, the pure boron layer 180 can be formed using one of a physical vapor deposition (PVD) method such as thermal evaporation or electron beam evaporation, a chemical vapor deposition (CVD) method such as atmospheric pressure (APCVD), plasma-assisted (PECVD), or low pressure (LPCVD), an atomic layer deposition (ALD) method, which can be thermal or plasma-assisted, or molecular beam epitaxy (MBE). In some embodiments, the pure boron coating 180 is formed using a multi-cycle plasma-assisted ALD boron deposition process in which multiple plasma-assisted ALD cycles are performed to sequentially produce boron nanolayers that collectively form the pure boron coating 180. This multi-cycle plasma ALD boron deposition process is described in commonly owned, co-pending U.S. Patent Application Publication No. 2022 / 0254829, entitled "Back Illuminated Sensor with Boron Layer Deposited Using Plasma Atomic Layer Deposition," which is incorporated herein by reference.

[0028] A protective layer 182 is then formed on the pure boron coating 180 (i.e., the pure boron coating 180 is between the protective layer 182 and the semiconductor film 160, block 120), and then a fluoride-based anti-reflective (AR) coating 185 is formed on the protective layer 182 (i.e., the protective layer 182 is between the fluoride-based AR coating 185 and the pure boron coating 180, block 130), thereby providing a two-part anti-reflective coating 181 on the pure boron coating 180.

[0029] Referring to block 120, forming the protective layer 182 includes forming one of an oxide film and a nitride film on the pure boron coating 180, the oxide / nitride film having a minimum thickness T of about 0.5 nm. 182 (i.e., when properly fabricated, an oxide / nitride film having this minimum thickness can substantially prevent the migration of fluoride ions from the subsequently formed fluoride-based AR coating 185 to the pure boron layer 180, thereby protecting the pure boron coating 180 from the subsequently formed fluoride-based AR coating 185.) In one embodiment, the protective layer 182 is formed by depositing at least one of Al2O3, MgO, La2O3, Li2O, CaO, BeO, HfO2, AlN, Li3N, LaN, Mg3N2, HfN, and Ca3N2 onto the upper surface 180U of the pure boron coating 180 using one of the PVD, CVD, ALD, or MBE methods described above. 182 is preferably limited to 10 nm or less to minimize absorption of DUV / VUV radiation by the selected oxide / nitride material. In some embodiments, for example, when the fluoride-based AR layer 185 is formed using the fluorination process described below with reference to FIGS. 5A-5C, the protective layer 182 is formed such that the fluorination process results in a final protective layer thickness T , preferably in the range of 0.5 nm to 10 nm. 182The two-part antireflective coating 181 may be formed with an initial thickness of up to 50 nm, provided that it converts a sufficient amount of the oxide / nitride film to produce a fluoride-based antireflective coating 185. For some higher wavelength DUV applications (e.g., above 170 nm), absorption by the oxide / nitride material may be negligible, allowing for thicknesses up to 50 nm. That is, when the two-part antireflective coating 181 is designed for DUV or the long-wavelength end of the VUV (e.g., wavelengths from about 170 nm to about 250 nm), the optical properties of a thicker oxide / nitride protective layer 182 (e.g., up to 50 nm) can be utilized to further reduce reflectivity (i.e., in combination with a fluoride-based antireflective coating 185).

[0030] Referring to block 130, in alternative exemplary embodiments, forming the fluoride-based AR coating 185 includes either depositing a fluoride-based material or converting an oxide / nitride material to a fluoride-based material using a fluorine-containing gas. In some embodiments (e.g., as described below with reference to FIGS. 4A-4C), the fluoride-based AR coating 185 is formed by depositing a selected fluoride-based material (e.g., at least one of AlF, MgF, CaF, LaF, LiF, and HfF) on the protective layer 182. In other embodiments (e.g., as described below with reference to FIGS. 5A-5C), the fluoride-based material is formed by converting an upper region portion of the oxide / nitride material forming the protective layer 182 to a fluoride using a fluorination process (e.g., by exposing the oxide / nitride material to one or more fluorine-containing gases, such as F, HF, XeF, CHF, SF, CF, NbF, or WF). In either case, the fluoride-based AR coating 185 has a final thickness T 185 is formed to minimize reflection from the image sensor 150 at the DUV / VUV wavelengths of interest (eg, in the range of 2 nm to 40 nm).

[0031] After completing the formation of the pure boron coating 180 and the two-part antireflective coating 181, additional processing (block 140) is performed to complete the fabrication and packaging of the image sensor 150. For example, as illustrated by the image sensor 150A shown at the bottom of FIG. 2, in some embodiments, additional processing may include completing the fabrication of the front-end circuit elements 170A by forming back-end interconnects 172A on the front-end circuit structure 171A. FIGS. 2 and 3 include flow diagrams illustrating the image sensor fabrication method 100 (FIG. 1) in further detail, with FIG. 2 illustrating a first alternative method 100A utilizing a high-temperature boron formation process and FIG. 3 illustrating a method 100B utilizing a low-temperature boron formation process. Note that similar reference numbers are utilized to indicate similar processes and features in these figures, with the suffixes "A" and "B" added to the end of the reference numbers to identify the particular process / feature under consideration. Similar numbering schemes are utilized in additional embodiments described below with reference to FIGS. 4A-8.

[0032] Referring to the top portion of FIG. 2, method 100A generally begins by forming a front-side circuit structure 171A on a front-side surface 161A of a semiconductor film 160A using standard semiconductor processing steps, including lithography, deposition, ion implantation, annealing, and etching. Referring to image sensor 150A, semiconductor film 160A includes a silicon epitaxial (epi) layer 163A and a single-crystalline or polycrystalline silicon substrate 165A, with the downward-facing surface of epi layer 163A defining front-side surface 161A of semiconductor film 160A and the upward-facing surface of substrate 165A defining back-side surface 162A of semiconductor film 160A. In alternative embodiments, front-side circuit structure 171A is configured to implement either CCD or CMOS sensor elements and devices. In one embodiment, epi layer 163A has a thickness of approximately 10 μm to 40 μm. In a preferred embodiment, both epi layer 163A and substrate 165A are doped with a p-type dopant (e.g., boron), with epi layer 163A having a much lower dopant concentration than substrate 165A (e.g., epi layer 163A has a resistivity in the range of 10-2000 Ω cm, and substrate 165A has a resistivity of less than about 1 Ω cm). Note that only front-side circuit structures 171A (e.g., polysilicon interconnects) are formed at this stage, and that metal interconnects 172A required to complete front-end circuit elements 170A are not formed at this point because subsequent high-temperature processing steps would damage the metal.

[0033] A protective layer is then formed over front-side surface 161A (block 102A). In one embodiment, the protective layer (not shown) may be formed by depositing one or more protective materials over front-side circuit structure 171A. The one or more protective materials may include silicon dioxide, silicon nitride, or other materials.

[0034] In some embodiments, the wafer including membrane 160A is thinned from the backside to expose epitaxial layer 163A in at least the active sensor area (block 104A). This step may include polishing, etching, or both. In some embodiments, the entire wafer is backside thinned using known techniques. In other embodiments, only the active sensor area is thinned all the way down to the epitaxial layer.

[0035] Next, the backside surface is cleaned and prepared for boron deposition / formation (block 108A). During this cleaning process, native oxide and any contaminants, including organics and metals, should be removed from the exposed backside surface (i.e., the surface exposed during the thinning process of block 104A). In one embodiment, this cleaning can be performed using a dilute HF solution or an RCA cleaning process. After cleaning, the wafer can be dried using a Marangoni drying technique or similar technique to leave the surface dry and blemish-free. In a preferred embodiment, the wafer is protected in a controlled environment (e.g., in a vacuum environment or an environment purged with a dry inert gas such as nitrogen) during the thinning and cleaning / preparation process to minimize native oxide regrowth after cleaning.

[0036] An amorphous layer of pure boron is then deposited on the exposed backside surface using a high-temperature boron deposition process (block 110A). In a preferred embodiment, this deposition can be performed using a mixture of diborane and hydrogen gases at a temperature of approximately 700-800°C to form a high-purity amorphous boron layer. In a preferred embodiment, the amorphous boron layer has a thickness of 2-20 nm. The minimum thinness is generally limited by a compromise between the need for a uniform, pinhole-free film and the absorption of target photons by boron. In a preferred embodiment, prior to boron deposition, the wafer can be held at high temperature for several minutes in a reducing environment, such as diluted or low-pressure hydrogen gas, to remove any native oxide layer that may have regrown after the backside thinning process while the wafer is maintained in the same chamber used for boron deposition. In a preferred embodiment, the temperature is approximately 800°C for less than 5 minutes, and the boron deposition process is immediately performed in the same chamber.

[0037] A two-part AR coating 181A is then formed on the pure boron coating 180A using any of the processes described above with reference to blocks 120 and 130 (FIG. 1): an oxide / nitride protective layer 182A is formed on the pure boron coating 180A (block 120A), and then a fluoride-based AR coating 185A is formed in or on the protective layer 182A (block 130A).

[0038] Next, processing associated with completing the image sensor 150 occurs (block 141A). In one embodiment, these processes include removing or patterning a front-side protective layer to facilitate fabrication of metal interconnects 172A on the front-side circuit structure 171A. In some embodiments, this removal / patterning may include various wet and dry etching processes and photolithographic patterning steps. The metal interconnects 172A may be formed using one or more of Al, Cu, or another metal. After interconnect fabrication is complete, a passivation layer may be deposited on the front-side surface to protect the completed image sensor 150A.

[0039] In some embodiments, the protective layer formation process (block 120A) and the image sensor completion (block 141A) may be performed after the fluoride-based AR coating formation process (block 130A) in the order shown in Figure 2. In alternative embodiments, the protective layer formation process (block 120A) and the fluoride-based AR coating formation process (block 130A) may be performed after the image sensor completion (block 141A). In other alternative embodiments, the image sensor completion (block 141A) may be performed after the protective layer formation process (block 120A), and then the fluoride-based AR coating formation process (block 130A) may be performed after the image sensor completion (block 141A).

[0040] After completing the front-end circuitry 170A, the image sensor 150A is packaged. This packaging process can include flip-chip bonding or wire bonding of the chip to a substrate. The package can include a window that is transparent to the wavelengths of interest, or can include a flange or seal for interfacing with a vacuum seal.

[0041] 3 illustrates a method 100B for producing an image sensor 150B (see the bottom of FIG. 3) on a semiconductor film 160B using a low-temperature (i.e., at or below 450° C.) boron layer formation process according to another embodiment. Referring to image sensor 150B, semiconductor film 160B includes a lightly doped epilayer 163B defining a front-side surface 161B and a heavily p-doped epilayer 165B defining a back-side surface 162B. Other structural features and resistivity of film 160B are similar to those described above with reference to film 160A (FIG. 2).

[0042] Next, as shown in block 101B, standard semiconductor processing steps such as lithography, deposition, ion implantation, annealing, and etching are used to create the complete front-end circuit elements 170B (i.e., both the front-end circuit structures 171B and the metal interconnects 172B) on the front-side surface 161B of the p-epi layer 163B. Charge-coupled device (CCD) and / or CMOS sensor elements and devices may also be created during the fabrication of the front-end circuit elements 170B. Note that at this point, both the front-side circuit structures 171A (e.g., polysilicon interconnects) and the metal interconnects 172A may be formed because subsequent low-temperature processing will not damage the metal interconnects.

[0043] In some embodiments, one or more protective layers (e.g., silicon dioxide, silicon nitride, or other materials) are then deposited on the front-end circuit elements 170B (block 102B). This protection may include attaching the wafer including the membrane 160B to a handling wafer (not shown), such as a silicon wafer, a quartz wafer, or a wafer made of other materials. The handling wafer may include through-wafer vias for connecting to the circuit elements.

[0044] The wafer is then thinned from the backside to expose the epitaxial layer at least in the active sensor area. This process can include polishing, etching, or both. In some embodiments, the entire wafer is backside thinned. In other embodiments, only the active sensor area is thinned all the way down to the epitaxial layer.

[0045] Next, film 160B is cleaned and prepared for the formation of pure boron coating 180B. During this cleaning / preparation process, native oxide and any contaminants, including organics and metals, should be removed from the backside surface. In one embodiment, this cleaning can be performed using a dilute HF solution or an RCA cleaning process. After cleaning, the wafer can be dried using a Marangoni drying technique or similar technique to leave the surface dry and blemish-free. In a preferred embodiment, the wafer is protected in a controlled environment (e.g., in a vacuum environment or an environment purged with a dry, inert gas such as nitrogen) during the backside thinning and cleaning / preparation process to minimize native oxide regrowth after cleaning.

[0046] A pure boron coating 180B is then formed by depositing an amorphous layer of pure boron on the exposed backside surface using a low-temperature boron deposition process (block 110B). In some embodiments, a p+ (second) epilayer 165B is formed on the p-epilayer 163B by growing epitaxial silicon on the exposed backside surface using a low-temperature epitaxial growth process while doping the second epitaxial silicon layer with boron during the epitaxial growth process. An amorphous layer of pure boron is then deposited on the second epitaxial layer 165B. In a preferred embodiment, the second epitaxial silicon layer 165B and the amorphous boron layer are deposited at or below 450°C to avoid damaging the front-side metal contact. In a preferred embodiment, the thicknesses of the second boron-doped epilayer and the amorphous boron layer are in the range of 2 to 20 nm.

[0047] A two-part AR coating 181B is then formed on the pure boron coating 180B using any of the processes described above with reference to blocks 120 and 130 (FIG. 1). That is, an oxide / nitride protective layer 182B is formed on the pure boron coating 180B (block 120B), and then a fluoride-based AR coating 185B is formed in or on the protective layer 182B (block 130B). After the two-part AR coating 181B is formed as described above, the front-side protective layer is removed, the wafer is diced, and the individual image sensors 150B are then packaged for operation using known techniques (block 145B). Packaging can include flip-chip bonding or wire bonding of the chip to a substrate. The package can include a window that is transparent to the wavelength of interest or can include a flange or seal for interfacing with a vacuum seal or a seal for a purge gas.

[0048] 4A-4C illustrate the relevant manufacturing stages involved in producing an image sensor 150C, in which a fluoride-based AR coating 185C is formed by depositing one or more boron material layers on an oxide / nitride protective layer 182C. The layer thicknesses shown in FIGS. 4A-4C are not drawn to scale and are provided for illustrative purposes only. In these figures, the interface is shown as flat to illustrate the concepts involved; however, in sensors, the Si surface can be roughened on the nm-to-micron scale, and the oxide or nitride protective layer and the fluoride-based AR layer can be deposited in a similar manner. In some embodiments, depicted in FIG. 4B, the interface between the protective layer and the fluoride layer can have some layers of mixed oxyfluoride- or nitrofluoride-type compounds due to intermixing of the oxide or nitride layer with the fluoride layer during the fluoride deposition process.

[0049] FIG. 4A shows image sensor 150C at time T10 after a pure boron coating 180C has been formed on backside (second) surface 162C of film 160C, which includes a very lightly p-doped bulk epitaxial silicon layer 163C and a heavily p-doped layer 165C. In some embodiments, silicon layer 165C is formed after boron deposition by an annealing step that heavily p-dopes a portion of the epitaxial silicon disposed adjacent backside surface 162C with boron atoms. In another embodiment, silicon layer 165C represents a low-temperature heavily p-doped epitaxial silicon layer grown prior to forming pure boron coating 180C using a low-temperature boron deposition process. The heavily p-doped material forming silicon layer 165C may be crystalline or polycrystalline and may have a thickness ranging from a few nanometers to approximately 100 nanometers. The boron material 503C used to form the pure boron layer 180C can be deposited using a high temperature process (e.g., above 450° C.) or a low temperature process (e.g., below 450° C.) and has a total thickness T in the range of 2 nm to 20 nm. 180C The amorphous boron layer may include one or more amorphous boron layers having

[0050] 4B shows image sensor 150C at time T11 after depositing oxide and / or nitride material 513C on pure boron layer 185C to form protective layer 182C. In some embodiments, oxide / nitride protective layer 182C is formed by forming a thin film including one or more of Al2O3, MgO, La2O3, Li2O, CaO, BeO, HfO2, AlN, Li3N, LaN, Mg3N2, HfN, and Ca3N2. In some embodiments, the oxide / nitride thin film is formed using one of a variety of deposition methods, including, but not limited to, physical vapor deposition (PVD) methods such as thermal evaporation or electron beam evaporation; chemical vapor deposition (CVD) methods such as atmospheric pressure (APCVD), plasma-assisted (PECVD), or low pressure (LPCVD); atomic layer deposition (ALD), which can be thermal or plasma-assisted; or molecular beam epitaxy (MBE). In this embodiment, the protective layer 182C has a total thickness T in the range of 2 nm to 10 nm.182C(T11) In a preferred embodiment, protective layer 182D is formed by depositing Al2O3 using an ALD process for the required atomic-level control of oxide thickness. As mentioned above, oxide / nitride protective layer 183C serves to protect pure boron coating 180C during the subsequent fluoride anti-reflective coating process, thereby preventing boron loss and pinhole formation.

[0051] FIG. 4C shows image sensor 150C at time T12 after depositing fluoride material 513C to produce fluoride-based AR layer 185C on oxide / nitride protective layer 182C. In some embodiments, the fluoride deposition process is performed using one or more of AlF3, MgF2, LaF2, LiF, or CaF2 and one of a variety of deposition methods, including, but not limited to, physical vapor deposition (PVD) methods such as thermal evaporation or electron beam evaporation; chemical vapor deposition (CVD) methods such as atmospheric pressure (APCVD), plasma-assisted (PECVD), or low pressure (LPCVD); atomic layer deposition (ALD), which can be thermal or plasma-assisted; or molecular beam epitaxy (MBE). In preferred embodiments, the fluoride-based layer is deposited by atomic layer deposition or ion beam sputtering deposition at a temperature of 450° C. or less. The fluorination process reduces the total thickness T of the resulting fluoride-based AR coating 185C. 185C is performed until the thickness corresponds to the reflection-minimizing thickness for the DUV / VUV wavelength of interest.

[0052] 5A-5C illustrate the relevant fabrication stages involved in producing an image sensor 150D that utilizes a fluorination process to convert the upper region of a protective layer 182D to produce a fluoride-based AR coating 185D. The layer thicknesses shown in FIGS. 5A-5C are not drawn to scale and are provided for illustrative purposes only. In these figures, the interface is shown as flat to illustrate the concepts involved; however, in sensors, the Si surface can be roughened on the nm-to-micron scale, and the oxide or nitride protective layer and the fluoride-based AR layer can be deposited in a similar manner. In some embodiments, depicted in FIG. 5B, the interface between the protective layer and the fluoride layer can have several layers of mixed oxyfluoride- or nitrofluoride-type compounds due to intermixing of the oxide or nitride layer with the fluoride layer during the fluorination process.

[0053] FIG. 5A shows image sensor 150D at time T20 after a pure boron coating 180D has been formed on backside (second) surface 162D of film 160D, which includes a very lightly p-doped bulk epitaxial silicon layer 163D and a heavily p-doped layer 165D. In some embodiments, silicon layer 165D is formed after boron deposition by an annealing step that heavily p-dopes a portion of the epitaxial silicon disposed adjacent backside surface 162D with boron atoms. In another embodiment, silicon layer 165D represents a low-temperature, heavily p-doped epitaxial silicon layer that is grown prior to forming pure boron coating 180D using a low-temperature boron deposition process. The heavily p-doped material forming silicon layer 165D may be crystalline or polycrystalline and may have a thickness ranging from a few nanometers to approximately 100 nanometers. The boron material 503D used to form the pure boron layer 180D can be deposited using a high temperature process (e.g., above 450° C.) or a low temperature process (e.g., below 450° C.) and has a total thickness T in the range of 2 nm to 20 nm. 180D The amorphous boron layer may include one or more amorphous boron layers having

[0054] 5B shows image sensor 150D at time T21 after depositing oxide and / or nitride material 513D on pure boron layer 185D to form protective layer 182D. In some embodiments, oxide / nitride protective layer 182D is formed by forming a thin film including one or more of Al2O3, MgO, La2O3, Li2O, CaO, BeO, HfO2, AlN, Li3N, LaN, Mg3N2, HfN, and Ca3N2. In some embodiments, the oxide / nitride thin film is formed using one of a variety of deposition methods, including, but not limited to, physical vapor deposition (PVD) methods such as thermal evaporation or electron beam evaporation; chemical vapor deposition (CVD) methods such as atmospheric pressure (APCVD), plasma-assisted (PECVD), or low pressure (LPCVD); atomic layer deposition (ALD), which can be thermal or plasma-assisted; or molecular beam epitaxy (MBE). In this embodiment, the upper region of the oxide / nitride thin film is converted by a fluorination treatment (e.g., as described below with reference to FIG. 5C), so that the protective layer 182C has a total thickness T 182C(T21) (i.e., to ensure that an oxide / nitride layer of adequate thickness is retained after the fluorination process is completed). In a preferred embodiment, protective layer 182D is formed by depositing Al2O3 using an ALD process for the required atomic level control of oxide thickness.

[0055] FIG. 5C shows image sensor 150D at time T22 after a fluorination process has been utilized to convert the upper region of protective layer 182D to a fluoride-based AR coating layer 185D. In some embodiments, the fluorination process is achieved by exposing the oxide / nitride material forming protective layer 182D to a fluorine-containing gas 523D, such as F2, HF, XeF2, CH3F, SF6, CF4, NbF5, or WF6. In some embodiments, the fluorine-containing gas may be mixed with other gases, such as O2, Ar, or N2, to facilitate the fluorination process. In some embodiments, the fluorination process may include a plasma process, such as described below with reference to FIGS. 6A and 6B, to generate a fluorine-containing plasma to facilitate the reaction at a relatively lower temperature than without the plasma. In all cases, exposure of protective layer 182F to gas 523D causes a substantially uniform top-down diffusion / migration of fluoride into the oxide / nitride material (i.e., the fluorination process proceeds gradually along the -Y axis, thereby converting the upper regions of protective layer 182F from oxide / nitride to the fluoride-based material). The time and temperature of the fluorination process are selected so that the thermal history of the image sensor circuitry's behavior does not deviate from expected behavior beyond acceptable limits determined by the application. For example, when method 100B (FIG. 3) is utilized, because the fluorination process is performed after front-end metallization, the maximum temperature utilized during the fluorination process is preferably 450°C or less. Typical temperatures for performing the fluorination process are less than 500°C. The duration of the fluorination process depends on the selected process conditions, the rate at which the selected oxide / nitride material converts to fluoride, and the target thickness T of the resulting fluoride-based AR coating 185D. 185D , and the desired final thickness T of the oxide / nitride layer that forms the protective layer 182D. 182D(T22) The target thickness T of the resulting fluoride-based AR coating 185D is determined by various factors such as 185D is preferably selected to coincide with the reflection-minimizing thickness for the DUV / VUV wavelengths of interest.

[0056] Figures 6A and 6B illustrate exemplary deposition systems 600E and 600F, respectively, that may be utilized to perform the fluorination process described above with reference to Figure 5C using a plasma process. The exemplary systems 600E and 600F are greatly simplified and provided for illustrative purposes only, and the features described below are not intended to be limiting unless specifically recited in the claims. That is, one skilled in the art will recognize that a plasma-capable deposition chamber suitable for performing a fluorination process may include features other than those shown in Figures 6A and 6B.

[0057] 6A, system 600E includes a plasma-enabled deposition chamber 610E, a gas flow system 620E, and a plasma generation system 630E. Deposition chamber 610E includes a chamber wall 611E surrounding a processing region 612E. Gas flow system 620E includes a gas delivery controller 621E configured to control the flow of plasma gas and fluorine-containing gas into processing region 612E. Plasma generation system 630E includes a plasma generator 631E connected to a plasma controller 635E via a conductor 633E. To perform the fluorination process, partially formed image sensor 150E is placed in deposition chamber 610E with film 160E mounted on a stage (support structure) 613E, first surface 161E facing downward (i.e., circuit structure 171E is positioned between film 160E and stage 613E), and second surface 162E facing upward toward plasma generator 631E. In some embodiments, the pure boron coating 180E and the oxide / nitride protective layer 182E are pre-formed on the second surface 162E before the film 160E is placed on the stage 613E. In other embodiments, the film 160E is placed on the stage 613E after the circuit structure 171E is fabricated, and the system 600E can be used to clean and form the pure boron coating 180E and the protective layer 182E before starting the fluorination process. The fluorination process begins by utilizing a gas delivery system 620E to generate a gas flow 623E through a gas inlet 614E (indicated by a dashed arrow) and a plasma generation system 630E to generate a plasma on the protective layer 182E using a plasma gas contained in the gas flow 623E. In some embodiments, the gas flow 623E also includes a fluorine-containing gas; in other embodiments, a fluorine-containing gas may also be introduced into the processing region 612E using an optional gas inlet 615E to facilitate optimization of the fluorination recipe. In some embodiments, the stage 613E rotates under the resulting plasma and is grounded or biased to some voltage to adjust the plasma fluorination recipe.The plasma and gas flow are maintained until a sufficient amount of the oxide / nitride material forming the protective layer 182E is fluorinated (converted to the fluoride-based AR coating 185E), but the fluorination process is terminated before the protective layer 182E is completely consumed (i.e., such that after the fluorination process is complete, an oxide / nitride protective layer 182E of an appropriate thickness separates the pure boron layer 180E from the fluoride-based AR coating 185E).

[0058] 6B shows a second exemplary chamber 600F including a plasma-enabled deposition chamber 610F surrounding a processing region 612E, which houses a stage (substrate holder) 613F upon which a partially formed image sensor 150F is mounted in the manner described above. To perform the fluorination process, a gas delivery controller 621E controls the flow of plasma gas and fluorine-containing gas into the processing region 612E through one or more openings formed in an electrode 631F, and a plasma controller 635F controls a voltage (e.g., plasma voltage V) applied to the electrode 631F relative to the stage 613F, which acts as a second electrode. P The film 160F is biased (using a bias current) to generate a capacitively coupled plasma 637F above the film 160F. In some embodiments, the stage 613F rotates the film 160F under the plasma 637F, and / or a fluorine-containing gas can be mixed with Ar, O, and N for plasma generation and / or fluorination process purposes. The plasma and gas flow are maintained until a fluoride-based AR coating 185F of appropriate thickness is formed, separated from the pure boron layer 180F by a thin oxide / nitride protective layer 182F.

[0059] 7A and 7B show cross-sectional schematic views of partially backside thinned image sensors 150G and 150H fabricated in accordance with additional alternative embodiments.

[0060] 7A, an image sensor 150G is fabricated on a film 160G including a lightly p-doped (p-) epitaxial silicon layer 163G formed directly on a monocrystalline or polycrystalline silicon substrate 167G. A front-end circuit structure 171G is fabricated on the front surface 161G of the epitaxial layer 163G and then covered by a protective layer (not shown). The portion of the silicon substrate 167G disposed above the active sensor area is then back-thinned to expose a portion of the p-doped epitaxial silicon layer 163G, with the exposed portion of the p-doped epitaxial silicon layer 163G forming the back (second) surface 162G of the semiconductor film 160G. A pure boron coating 180G is then formed on the backside surface 162G, an oxide / nitride protective layer 182G is then formed on the pure boron coating 180C, and a high-temperature drive-in process is then performed to create a heavily boron-doped (p+) backside (second) epitaxial region 165G, thereby providing high backside conductivity. Metal interconnects 172G are then formed on the front-end circuit structure 171G to complete the front-end circuit element 170G, and a fluoride-based anti-reflective coating 185G is then formed on the oxide / nitride protective layer 182G to reduce reflection and therefore increase the quantum efficiency of the image sensor 150G for DUV and VUV wavelengths. Further details regarding the formation of the image sensor 150G are described in U.S. Pat. No. 9,496,425 to Chern et al., "Back-Illuminated Sensor With Boron Coating," which is incorporated herein by reference.

[0061] Referring to FIG. 7B, the image sensor 150H is fabricated on a silicon-on-insulator (SOI) structure using low-temperature fabrication methods. Low-temperature processing is used during subsequent processing, resulting in the complete front-end circuitry 170H (i.e., both the front-end circuit structure 171H and the metal interconnects 172H) being formed on the front surface 161H of a lightly p-doped epitaxial layer 163H grown on a thin upper silicon substrate 165H of the SOI. Note that the upper silicon substrate 165H is heavily boron-doped to achieve high backside conductivity before growing the p-epitaxial layer 163H. Partial backside thinning of the SOI handle substrate 167H and oxide layer 169H is then performed to expose a portion of the backside surface 162H of the upper silicon substrate 165H. A pure boron coating 180H is then formed on the exposed backside surface 162H using a low-temperature (<450°C) plasma-enhanced ALD boron coating formation process to achieve a long exposure lifetime. An oxide / nitride protective layer 182J is then formed on the pure boron coating 180D, followed by a fluoride-based anti-reflective coating 185D to enhance quantum efficiency. Sensor 150H differs from sensor 150G (FIG. 7A) primarily in that sensor 150H retains a portion of the oxide layer 169H of the original SOI structure between the retained portion of the handle silicon substrate 167H and the p+ silicon substrate 165H. That is, the p-epitaxial layer 163H and the p+ silicon substrate 165H form the active semiconductor film 160H of image sensor 150H, and the retained oxide portion 169H and the retained handle substrate portion 167H are attached to film 160H over the inactive sensor area. Further details for manufacturing sensor 150H are provided, for example, in U.S. Pat. No. 11,848,350 to Haddidi et al., "Back-Illuminated Sensor And A Method Of Manufacturing A Sensor Using A Silicon On Insulator Wafer," which is incorporated herein by reference in its entirety.

[0062] FIG. 8 illustrates another image sensor 150J having a pure plasma ALD boron coating 180J formed on an SOI substrate using a low-temperature fabrication method according to another specific embodiment. Similar to the example described above with reference to FIG. 7B, an SOI top silicon substrate 165J is heavily boron-doped to achieve high backside conductivity, and then a lightly p-doped epitaxial layer 163J is grown thereon. Complete front-end circuit elements 170J (i.e., both front-end circuit structures 171J and metal interconnects 172J) are formed on the front-side surface 161J of the epitaxial layer 163J. In this embodiment, through-silicon vias 198J are formed in the p+ top silicon substrate 165J and the p-epi layer 163J to provide electrical connection between the backside surface 162J and the front-end circuit elements 170J. A full-wafer thinning process is then performed to remove the entire SOI handle substrate and oxide layer (not shown), so that the semiconductor membrane 160J of the image sensor 150J is formed by the p-epitaxial layer 163J and the p+ silicon substrate 165J. Because the image sensor 150J is fabricated using full-wafer thinning, the method includes bonding a handle substrate 195J to the front surface after fabrication of the front-end circuit elements 170J and after forming a protective layer 197J over the circuit elements 170J. The handle substrate 195J and protective layer 197J are removed after completing backside processing, which includes forming a pure boron coating 180J on the heavily p-doped epitaxial layer 163J using a low-temperature (<450°C) plasma-enhanced ALD boron layer formation process, then forming an oxide / nitride protective layer 182J on the pure boron coating 180E, and then forming a fluoride-based anti-reflective coating layer 185J for long-term stability and higher quantum efficiency at DUV and VUV wavelengths. In some embodiments, portions of the pure boron coating 180J and the heavily p-doped epitaxial layer 163J are etched / removed to expose the bottom ends of the through-silicon vias 198J, thereby facilitating frontside / backside connections.Details of additional fabrication procedures used to form image sensor 150J on an SOI substrate are described, for example, in the above-referenced U.S. Patent No. 11,848,350. Alternatively, sensor 150J can be formed on a silicon substrate using details provided, for example, in the above-referenced U.S. Patent No. 9,496,425.

[0063] 9 illustrates an exemplary inspection or metrology system 900 configured to inspect or measure a semiconductor manufacturing-related specimen 908, such as a silicon wafer, reticle, or photomask, using an image sensor 150 configured in accordance with the present invention. System 900 generally includes an illumination (light) source 902, a detector assembly 904, and a stage 912.

[0064] The illumination source 902 preferably emits deep ultraviolet (DUV) and / or vacuum ultraviolet (VUV) incident light (radiation) L having a wavelength in the range of 100 nm to 300 nm. IN , but may also be configured to generate light having wavelengths less than 100 nm (e.g., 13.5 nm for future EUV lithography) or greater than 300 nm. In some embodiments, illumination source 902 utilizes one or more light sources LS and one or more optical components (e.g., frequency converters) to generate incident light L INIn one embodiment, illumination source 902 can include a continuous light source such as an arc lamp, a laser-produced plasma light source, or a continuous wave (CW) laser. In another embodiment, illumination source 902 can include a pulsed light source such as a mode-locked laser, a Q-switched laser, or a plasma light source excited by a mode-locked or Q-switched laser. Suitable light sources that can be included in illumination source 902 are described in U.S. Pat. No. 7,705,331 to Kirk et al., entitled "Methods and systems for providing illumination of a specimen for a process performed on the specimen," U.S. Pat. No. 9,723,703 to Bezel et al., entitled "System and method for transverse pumping of laser-sustained plasma," and U.S. Pat. No. 9,865,447 to Chuang et al., entitled "High brightness laser-sustained plasma broadband source." These patents are incorporated herein by reference.

[0065] The stage 912 is adapted to receive the sample 908 and to facilitate movement of the sample 908 relative to the optical system 903 (i.e., to allow the optical system 903 to receive the incident light L IN The stage 912 can include an XY stage or an R-θ stage. In one embodiment, the stage 912 can adjust the height of the sample 908 to maintain focus during inspection. In another embodiment, the optical system 903 can be adjusted to maintain focus.

[0066] The optical system 903 receives incident light L IN is focused onto the sample 908, and the reflected (including scattered) light L R / S9 includes a plurality of optical components and other optical components configured to direct incident light L from the illumination source 902 to the detector assembly 904. Exemplary optical components of the optical system 903 shown in FIG. 9 include an illumination tube lens 903-1, an objective lens 903-2, a collection tube lens 903-3, a collection lens 903-4, and a beam splitter 903-5. During operation of the system 900, incident light L exits the illumination source 902. IN is directed by condenser lens 903-4 and illumination tube lens 903-1 to beam splitter 903-5, which splits the incident light L IN The reflected / scattered light L is directed downward and guided onto the sample 908 through the objective lens 903-2. R / S is reflected and / or scattered by surface features of the sample 908 upward into the objective lens 903-2 and directed by the objective lens 903-2 and the collection tube lens 903-3 to the detector assembly 904. IN Represents a part of.

[0067] The detector assembly 904 includes one or more of the image sensors 150 fabricated using any of the methods described herein. In alternative embodiments, the sensor 150 includes an electron-bombarded image sensor incorporating a back-illuminated CCD sensor, a back-illuminated CMOS sensor, and a back-thinned solid-state image sensor. The image sensor 150 can comprise a two-dimensional array sensor or a one-dimensional line sensor. In one embodiment, the output of the detector assembly 904 is provided to a computing system 914 that analyzes the output. The computing system 914 can be configured by program instructions 918, which can be stored on a carrier medium 916. In some embodiments of the inspection system 900 incorporating a Q-switched laser, the image sensor 150 or sensors 150 in the detector assembly 904 are synchronized to the laser pulse. In such embodiments, the image sensor 150 can operate in TDI mode during the laser pulse and then read out data via multiple outputs on either side of the sensor between laser pulses. Some embodiments of the inspection system illuminate a line on the sample and collect scattered and / or reflected light in one or more dark-field and / or bright-field collection channels. In such embodiments, image sensor 150 may be a line sensor or an electron-bombarded line sensor. Some embodiments of the inspection system illuminate multiple spots on the specimen and collect scattered and / or reflected light in one or more dark-field and / or bright-field collection channels. In such embodiments, image sensor 150 may be a two-dimensional array sensor or an electron-bombarded two-dimensional array sensor.

[0068] Additional details of various embodiments of the inspection or metrology system 900 can be found in U.S. Pat. No. 9,891,177 to Vazhaeparambil et al., entitled "TDI Sensor in a Darkfield System," U.S. Pat. No. 9,279,774 to Romanovsky et al., entitled "Wafer inspection," U.S. Pat. No. 7,957,066 to Armstrong et al., entitled "Split field inspection system using small catadioptric objectives," U.S. Pat. No. 7,817,260 to Chuang et al., entitled "Beam delivery system for laser dark-field illumination in a catadioptric optical system," U.S. Pat. No. 5,999,310 to Shafer et al., entitled "Ultra-broadband UV microscope imaging system with wide range zoom capability," U.S. Pat. No. 7,525,649 to Leong et al., entitled "Surface inspection system using laser line illumination with two dimensional imaging," and U.S. Pat. No. 7,525,649 to Kandel et al., entitled "Metrology systems and No. 9,080,971 to Chuang et al. entitled "Broadband objective having improved lateral color performance," U.S. Pat. No. 7,474,461 to Chuang et al. entitled "Optical metrology with reduced sensitivity to grating anomalies," U.S. Pat. No. 9,470,639 to Zhuang et al. entitled "Optical metrology with reduced sensitivity to grating anomalies," U.S. Pat. No. 9,228,971 to Wang et al. entitled "Dynamically Adjustable Semiconductor Metrology System," U.S. Pat.No. 943, Piwonka-Corle et al., entitled "Focused Beam Spectroscopic Ellipsometry Method and System," issued March 4, 1997; and Rosencwaig et al., entitled "Apparatus for Analyzing Multi-Layer Thin Film Stacks on Semiconductors," issued October 2, 2001, U.S. Pat. No. 6,297,880, Rosencwaig et al., entitled "Apparatus for Analyzing Multi-Layer Thin Film Stacks on Semiconductors," all of which are incorporated herein by reference.

[0069] The various embodiments of the structures and methods of this invention described above are merely illustrative of the principles of the invention and are not intended to limit the scope of the invention to the described embodiments. For example, additional steps may be added or the order of steps may be changed from that shown in the flowcharts of Figures 1, 2, and 3. Accordingly, the present invention is limited only by the following claims and their equivalents.

Claims

1. 1. A backside illuminated image sensor configured to sense at least one of deep ultraviolet (DUV) radiation and vacuum ultraviolet (VUV) radiation, the image sensor comprising: a semiconductor film having a front surface and an opposite back surface; a front-end circuit structure disposed on the front surface; a pure boron coating disposed on the backside surface; a protective layer disposed on the pure boron coating; a fluoride-based antireflective coating disposed on the protective layer; Equipped with The back-illuminated image sensor, wherein the protective layer comprises one of an oxide film or a nitride film having a thickness in the range of 0.5 nm to 10 nm.

2. 10. The image sensor of claim 1, wherein the semiconductor film comprises an epitaxial layer having a thickness in the range of 10 μm to 100 μm.

3. 2. The image sensor of claim 1, wherein the pure boron coating has a thickness in the range of 2 nm to 20 nm.

4. The protective layer is Al ２ O ３ , MgO, La ２ O ３ , Li ２ O, CaO, BeO, HfO ２ , AlN, Li ３ N, LaN, Mg ３ N ２ , HfN and Ca ３ N ２ 4. The image sensor of claim 3, comprising one of:

5. The protective layer is Al ２ O ３ 5. The image sensor of claim 4, comprising one of AlN and AlN, and having a thickness in the range of 0.5 nm to 5 nm.

6. The fluoride-based anti-reflective coating is AlF ３ , MgF ２ , CaF ２ , LaF ３ , LiF, and HfF ４ 5. The image sensor of claim 4, comprising one of:

7. 1. A method of manufacturing an image sensor configured to sense at least one of deep ultraviolet (DUV) radiation and vacuum ultraviolet (VUV) radiation, the method comprising: forming a front-end circuit structure on a first surface of the semiconductor film; forming a pure boron coating on a second surface of the semiconductor film; forming a protective layer on the pure boron coating; forming a fluoride-based anti-reflective coating on the protective layer; Including, The method, wherein the protective layer comprises one of an oxide film and a nitride film and has a thickness in the range of 0.5 nm to 50 nm.

8. 8. The method of claim 7, wherein forming the pure boron coating comprises depositing one or more amorphous boron layers on the second surface until the pure boron coating has a total thickness in the range of 2 nm to 20 nm.

9. forming the pure boron coating includes utilizing a high temperature deposition process; 10. The method of claim 8, wherein the method further comprises forming a metal interconnect on the front-end circuit structure after forming the pure boron coating.

10. the method further comprising forming a metal interconnect on the front-end circuit structure prior to forming the pure boron coating; The method of claim 8 , wherein forming the pure boron coating comprises utilizing a low temperature deposition process.

11. The step of forming the protective layer comprises depositing Al on the top surface of the pure boron coating. ２ O ３ , MgO, La ２ O ３ , Li ２ O, CaO, BeO, HfO ２ , AlN, Li ３ N, LaN, Mg ３ N ２ , HfN and Ca ３ N ２ The method of claim 7 , comprising depositing at least one of:

12. the step of forming the protective layer includes depositing the one of the oxide film and the nitride film to a thickness within a range of 0.5 nm to 10 nm; The method of claim 7 , wherein the step of forming the fluoride-based antireflective coating comprises depositing one or more fluoride-based materials onto the protective layer.

13. Depositing one or more fluoride-based materials includes depositing AlF ３ , MgF ２ , CaF ２ , LaF ３ , LiF and HfF ４ The method of claim 12 , comprising depositing at least one of:

14. forming the protective layer includes depositing the one of the oxide film and the nitride film to a total thickness in the range of 10 nm to 50 nm; 8. The method of claim 7, wherein the step of forming the fluoride-based antireflective coating comprises converting an upper region of the protective layer to the fluoride-based antireflective coating using a fluorination process.

15. 15. The method of claim 14, wherein utilizing the fluorination process comprises exposing the protective layer to at least one fluorine-containing gas.

16. The method of claim 15 , wherein utilizing the fluorination process comprises using a plasma process.

17. 8. The method of claim 7, wherein the semiconductor film comprises a p-doped epitaxial silicon layer disposed on a silicon substrate, the method further comprising thinning a backside of at least a portion of the silicon substrate to expose at least a portion of the p-doped epitaxial silicon layer, the exposed portion of the p-doped epitaxial silicon layer forming the second surface of the semiconductor film.

18. the semiconductor film includes a p-doped epitaxial silicon layer formed on an upper silicon substrate of a silicon-on-insulator (SOI) structure, the p-doped epitaxial silicon layer having a first p-type doping concentration, and the upper silicon substrate having a second p-type doping concentration higher than the first p-type doping concentration; forming the front-end circuit structure on the first surface of the semiconductor film includes forming the front-end circuit structure on the p-doped epitaxial silicon layer; forming the pure boron coating on the second surface of the semiconductor film; removing at least a portion of the handle substrate and oxide layer of the SOI structure to expose one or more surface portions of the top silicon substrate; and forming said pure boron coating on said exposed surface portion; The method of claim 7, comprising:

19. 20. The method of claim 18, wherein the method further comprises forming a through silicon via in the semiconductor film before forming the pure boron coating.

20. 1. An inspection system comprising: an illumination source; and an optical system set including an objective lens configured to direct and focus incident light from the illumination source onto a sample, and to collect and focus reflected / scattered light from the sample onto a detector assembly, wherein the detector includes one or more image sensors configured to sense at least one of deep ultraviolet (DUV) radiation and vacuum ultraviolet (VUV) radiation; each said image sensor comprising: a semiconductor film; a circuit element formed on a first surface of said semiconductor film; at least one pure boron layer formed on a second surface of said semiconductor film; a protective layer formed on said pure boron layer; and a fluoride-based anti-reflective coating disposed on said protective layer; The inspection system, wherein the protective layer comprises one of an oxide and a nitride and has a thickness in the range of 0.5 nm to 10 nm.

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