Semiconductor Module

Abstract

To provide a semiconductor module with a structure that can further reduce inductance.SOLUTION: A first metal member 20a and a second metal member 20b are provided between a positive plate 10 and a connection plate 11 and between an output plate 12 and a negative plate 13. This allows the magnetic flux outside a semiconductor module 4 to be cancelled out in the induced current paths formed in heat sinks 15a and 10b. In addition, the induced current paths formed in the first metal member 20a and the second metal member 20b can cancel the magnetic flux inside the semiconductor module 4.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to a semiconductor module including a semiconductor chip on which a semiconductor element is formed, and a terminal made of a conductor electrically connected to the semiconductor chip. [Background technology]

[0002] As a method for reducing the inductance of a semiconductor module, a structure is known that utilizes the principle of bringing opposing currents close to each other and canceling out the magnetic flux generated based on each current. For example, Patent Document 1 discloses a structure in which the metal part of the cooler is disposed outside the semiconductor module. In such a structure, it is possible to cancel out the magnetic flux generated based on the current of the main path through which the main current, which is a large current in the semiconductor module, flows and the induced current that flows on the surface of the metal part of the cooler based on that current. This makes it possible to reduce the inductance of the semiconductor module.

[0003] In order to cancel out the magnetic flux, the current paths must be close to each other. For this reason, a direct bonded copper (DBC) substrate made of metal, ceramic substrate and metal is used to form the main path with one metal, while insulating the metal that forms the main path from the induced current path made of the other metal with a ceramic substrate. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2011-9462 A Summary of the Invention [Problem to be solved by the invention]

[0005] However, the conductors constituting the main path and the conductors constituting the induced current path must be insulated, and increasing the proximity between them reduces the insulation. Furthermore, even if the proximity between them is increased, there is a limit to the effect of reducing inductance, and it reaches a plateau.

[0006] Furthermore, in a structure in which an induced current path is provided outside the main path, the magnetic fluxes generated by the main current and the induced current based on the right-handed screw rule are in opposite directions outside the main path beyond the induced current path, and so they cancel each other out. However, between the main path and the induced current path and in the normal direction of the semiconductor chip, in other words, in the thickness direction of the semiconductor module (hereinafter simply referred to as the thickness direction), the magnetic fluxes are not canceled out and remain as inductance. For this reason, a structure that can further reduce inductance is desired.

[0007] In view of the above, an object of the present invention is to provide a semiconductor module having a structure capable of further reducing inductance. [Means for solving the problem]

[0008] In order to achieve the above object, claims 1, 3-5 and 7 In the invention described in the above, a single or multiple semiconductor chips (8, 8a, 8b) having a front surface and a back surface and on which a semiconductor element (6, 7) is formed, a first conductor plate (10, 12) connected to the back surface side of the semiconductor chip and connected to the positive electrode side of the semiconductor element, tableThe semiconductor chip has a first conductive plate (11, 13) connected to the first surface side and a second conductive plate (13) connected to the negative side of the semiconductor element, a resin sealing portion (16) that seals the semiconductor chip, the first conductive plate, and the second conductive plate, a metal member (20, 20a, 20b) arranged between the first conductive plate and the second conductive plate in the resin sealing portion, and an insulating film (21) that insulates the metal member from the semiconductor chip, the first conductive plate, and the second conductive plate, and when a main current flows through the semiconductor element, the main current flows between the first conductive plate and the second conductive plate in a direction perpendicular to the surface of the semiconductor chip, and the main current flows within the first conductive plate and the second conductor plate in a direction parallel to the surface of the semiconductor chip, forming an induced current path within the metal member through which an induced current flows.

[0009] In this way, when a main current flows through the semiconductor element, the main current flows between the first and second conductor plates in a direction perpendicular to the surface of the semiconductor chip, and the main current flows in the first and second conductor plates in a direction parallel to the surface of the semiconductor chip. Accordingly, an induced current path through which an induced current flows is formed in the metal member. With this configuration, the magnetic flux generated by the main current and the induced current flowing through the metal member based on the right-handed screw rule is in the opposite direction, so that the induced current and the magnetic flux on the opposite side of the main current path through which the main current flows cancel each other out. This reduces inductance.

[0010] The reference symbols in parentheses attached to each component indicate an example of the correspondence between the component and specific components described in the embodiments described below. [Brief description of the drawings]

[0011] [Figure 1] 1 is a circuit diagram of an inverter to which a semiconductor module according to a first embodiment is applied. [Diagram 2] 1 is a perspective view showing a state in which a semiconductor module according to a first embodiment is installed in a cooler. [Diagram 3] 1 is a schematic cross-sectional view showing a semiconductor module and a current path according to a first embodiment. [Figure 4] 1 is a cross-sectional view of a semiconductor module according to a first embodiment. [Figure 5A] 3A to 3C are diagrams illustrating a manufacturing process of the semiconductor module according to the first embodiment. [Figure 5B] 5B is a diagram showing a manufacturing process of the semiconductor module subsequent to FIG. 5A. [Figure 5C] 5C is a diagram showing a manufacturing process of the semiconductor module subsequent to FIG. 5B. [Figure 5D] 5D is a diagram showing a manufacturing process of the semiconductor module subsequent to FIG. 5C. [Figure 5E] FIG. 5E is a diagram showing a manufacturing process of the semiconductor module subsequent to FIG. 5D. [Figure 6] FIG. 11 is a cross-sectional view of a semiconductor module according to a second embodiment. [Figure 7A] 10A to 10C are diagrams illustrating a manufacturing process of the semiconductor module according to the second embodiment. [Figure 7B] 7B is a diagram showing a manufacturing process of the semiconductor module subsequent to FIG. 7A. [Figure 7C] FIG. 7C is a diagram showing a manufacturing process of the semiconductor module subsequent to FIG. 7B. [Figure 8] FIG. 11 is a schematic cross-sectional view showing a semiconductor module and a current path according to a third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other will be denoted by the same reference numerals.

[0013] (First embodiment) A first embodiment will be described. In this embodiment, a case where a semiconductor module is applied as a component of an inverter having a cooler will be described as an example. First, the semiconductor module according to this embodiment will be described with reference to Figs. 1 to 3.

[0014] As shown in Fig. 1, an inverter 1 is used to drive a three-phase motor 3, which is a load, with AC power based on a DC power source 2. The inverter 1 is configured with upper and lower arms connected in series and connected in parallel for three phases, and applies an intermediate potential between the upper and lower arms to each of the U, V, and W phases of the three-phase motor 3 while switching between them in order. One phase of the upper and lower arms in this inverter 1 is made into one semiconductor module 4, and the inverter 1 is configured by arranging three semiconductor modules 4 in a cooler 5, as shown in Fig. 2.

[0015] As shown in Fig. 1, each upper arm and each lower arm is composed of a switching element 6 and a free wheel diode (hereinafter referred to as FWD) 7, which are semiconductor power elements. In this embodiment, the switching element 6 is an IGBT, but it can also be a MOSFET. In this embodiment, the switching element 6 and the FWD 7 are formed in the same semiconductor chip 8 shown in Fig. 3. Also, the anode and cathode of the FWD 7 are electrically connected to the emitter, which is the front electrode, and the collector, which is the back electrode, of the switching element 6, respectively.

[0016] 2, a positive terminal P, a negative terminal N, and an output terminal O made of conductors are extended so as to protrude from the semiconductor module 4 to the outside. The positive terminal P, the negative terminal N, and the output terminal O are connected to the positive and negative poles of the DC power supply 2 and the three-phase motor 3, respectively, to form the circuit configuration shown in FIG.

[0017] As shown in FIG. 2, each semiconductor module 4 is plate-shaped, and the front and back surfaces are sandwiched and fixed in the cooler 5. The cooler 5 is made of a metal such as aluminum having high thermal conductivity, and is composed of a plurality of plates 5a, a coolant inlet port 5b, a coolant outlet port 5c, and the like, as shown in FIG. 2. The plurality of plates 5a incorporate fins (not shown), and are assembled in pairs by brazing or the like to form a coolant passage through which a coolant such as cooling water flows. The coolant passages formed by the plates 5a are connected by the coolant inlet port 5b and the coolant outlet port 5c. As a result, the coolant introduced from the coolant inlet port 5b passes through each coolant passage and is then discharged through the coolant outlet port 5c.

[0018] A gap is provided between each pair of two plates 5a in the cooler 5 configured in this manner, and each semiconductor module 4 is sandwiched in the gap and fixed via grease or the like. This configures the inverter 1 having three semiconductor modules 4, that is, three phases. In this embodiment, the exposed surface of the heat sink 15, which is exposed on the outer side surface of the semiconductor module 4 and will be described later, is insulated from the switching element 6 and FWD 7 configured inside the semiconductor module 4. For this reason, the semiconductor module 4 is fixed to the cooler 5 via grease or the like. However, there may be a structure in which the components constituting the inverter circuit are exposed and are not insulated from the switching element 6 and FWD 7 configured inside the semiconductor module 4. In that case, a ceramic substrate serving as an insulating member is sandwiched between the plate 5a and the semiconductor module 4 via grease, so that the semiconductor module 4 and the plate 5a are insulated from each other.

[0019] Next, the detailed structure of the semiconductor module 4 provided in the inverter 1 thus configured will be described with reference to Fig. 3, Fig. 4, and Fig. 5A to Fig. 5F. The semiconductor modules 4 are provided for three arms for three phases to form an inverter circuit, but the structure of each semiconductor module 4 is the same. Fig. 4 corresponds to a cross-sectional view taken along line IV-IV in Fig. 5F. Fig. 3 is a simplified view of Fig. 4, and the flow of current in the semiconductor module 4 is also indicated by arrows. Figs. 5A to 5E show the state of the semiconductor module 4 during the manufacturing process as viewed from the top side of Fig. 4.

[0020] 3, 4, and 5A to 5E, the semiconductor module 4 includes a semiconductor chip 8 and a conductor block 9. The semiconductor module 4 also includes a positive electrode plate 10 connected to a positive electrode terminal P, a connection plate 11, an output plate 12 connected to an output terminal O, a negative electrode plate 13 connected to a negative electrode terminal N, signal terminals 14 including a gate terminal, and a heat sink 15. These components are then resin-sealed by a resin sealing portion 16 as shown in FIG. 3 to form the semiconductor module 4 having an integrated structure.

[0021] The semiconductor chip 8 is a chip on which the switching element 6 and the FWD 7 are formed, and two semiconductor chips 8 are provided. Specifically, the two semiconductor chips 8 constitute upper and lower arms in each of the three phases. One semiconductor chip 8a has the switching element 6 and the FWD 7 connected in parallel that constitute the upper arm in each of the three phases formed therein. The other semiconductor chip 8b has the switching element 6 and the FWD 7 connected in parallel that constitute the lower arm formed therein. That is, the semiconductor module 4 of this embodiment has a 2-in-1 structure in which the two semiconductor chips 8 that constitute the upper and lower arms of each phase are resin-sealed and integrated with the resin sealing portion 16. The two semiconductor chips 8a and 8b correspond to the first semiconductor chip and the second semiconductor chip, respectively.

[0022] Each semiconductor chip 8 has the same structure in which a switching element 6 and an FWD 7 are formed. The switching element 6 and the FWD 7 formed in each semiconductor chip 8 are configured as vertical elements that pass a current in a direction perpendicular to the substrate. The semiconductor chip 8 has a front surface and a back surface, and in Fig. 3, each semiconductor chip 8 is arranged with the front surface facing upward. In other words, the front surface and the back surface of each semiconductor chip 8a are arranged facing the same direction.

[0023] Although not shown, pads electrically connected to the emitter of the switching element 6 and the anode of the FWD 7 and pads connected to the gate of the switching element 6 are formed on the front side of the semiconductor chip 8. The central region of the semiconductor chip 8 is an active region in which a large current flows when the switching element 6 is turned on or a return current flows through the FWD 7, and the periphery is an outer peripheral region provided with a voltage-resistant structure such as a guard ring. The pads connected to the gate are drawn out and arranged on the outer peripheral region side, and are connected to the gate terminal on the outer edge side of the semiconductor chip 8. As shown in FIG. 5A and the like, various signal terminals 14 are provided adjacent to the semiconductor chip 8, and some of these signal terminals 14 are gate terminals. Although not shown, pads electrically connected to the collector of the switching element 6 and the cathode of the FWD 7 are formed on the entire back side of the semiconductor chip 8.

[0024] The conductor block 9 is formed of a metal block such as a copper block, and is provided for each semiconductor chip 8. The conductor block 9a provided for the semiconductor chip 8a on the upper arm is connected to the emitter of the switching element 6 and the anode of the FWD 7 of the semiconductor chip 8a. The conductor block 9b provided for the semiconductor chip 8b on the lower arm is connected to the emitter of the switching element 6 and the anode of the FWD 7 of the semiconductor chip 8b. The conductor block 9 has the same area as the active region of the semiconductor chip 8, for example, and is connected via solder or the like to pads that are electrically connected to the emitters of the switching elements 6 and the anodes of the FWDs 7.

[0025] The semiconductor chip 8a on the upper arm side is connected to a positive plate 10 connected to a positive terminal P on the back side, and is connected to a connection plate 11 via a conductor block 9a on the front side. The semiconductor chip 8b on the lower arm side is connected to an output plate 12 connected to an output terminal O on the back side, and is connected to a negative plate 13 connected to a negative terminal N via a conductor block 9b on the front side. The connection plate 11 and the output plate 12 are electrically and physically connected via a first connection portion 17. As a result, the emitter of the switching element 6 of the semiconductor chip 8a on the upper arm and the anode of the FWD 7, and the collector of the switching element 6 of the semiconductor chip 8b on the lower arm and the cathode of the FWD 7 are connected to the output terminal O. For this reason, as shown in FIG. 3, a current path passing through the positive plate 10, the semiconductor chip 8a, the conductor block 9a, the connection plate 11, the first connection portion 17, the output plate 12, the semiconductor chip 8b, the conductor block 9b, and the negative plate 13 in this order, that is, a connection form constituting an N-shaped current path.

[0026] The positive electrode plate 10 is disposed on the back surface side of the semiconductor chip 8a, and is connected to the collector of the switching element 6 and the cathode of the FWD 7 formed on the semiconductor chip 8a. As shown in FIG. 5A, the positive electrode plate 10 has a substantially rectangular shape, and a positive electrode terminal P is connected to one side of the rectangular shape. In FIG. 5A, a support portion 10a protrudes from the positive electrode plate 10 on the side opposite to the positive electrode terminal P, so that the positive electrode plate 10 can be supported in each process when manufacturing the semiconductor module 4. The support portion 10a is eventually cut and removed, and therefore does not exist in the manufactured semiconductor module 4.

[0027] The connection plate 11 is disposed on the opposite side of the semiconductor chip 8a from the positive plate 10, and is disposed opposite the positive plate 10. Specifically, the connection plate 11 is disposed on the front surface side of the semiconductor chip 8a, and is connected to the conductor block 9a, and is connected to the emitter of the switching element 6 and the anode of the FWD 7 formed on the semiconductor chip 8a via the conductor block 9a. As shown in FIG. 5E, the connection plate 11 is rectangular, and is disposed so as to overlap the positive plate 10 when viewed from the normal direction to the front surface of the semiconductor chip 8a, and is disposed side by side with a gap between them and the negative plate 13. A part of one side of the connection plate 11 facing the negative plate 13, specifically, the part below the paper surface in FIG. 5E, is a connection area 11a protruding toward the negative plate 13, and is connected to the first connection portion 17 at this connection area 11a. Note that the connection area 11a referred to here corresponds to the first connection area.

[0028] The output plate 12 is disposed on the same side as the positive electrode plate 10 with respect to the semiconductor chip 8a and the semiconductor chip 8b, and is disposed side by side with the positive electrode plate 10. Specifically, the output plate 12 is disposed on the back side of the semiconductor chip 8b, and is connected to the collector of the switching element 6 and the cathode of the FWD 7 formed on the semiconductor chip 8b. As shown in FIG. 5A, the output plate 12 is substantially rectangular, and the output terminal O is connected to one side of the rectangular shape. In FIG. 5A, a support portion 12a protrudes from the output plate 12 on the side opposite to the output terminal O, so that the output plate 12 can be supported in each process when manufacturing the semiconductor module 4. This support portion 12a is also eventually cut and removed, and therefore does not exist in the manufactured semiconductor module 4.

[0029] The negative electrode plate 13 is disposed on the opposite side of the output plate 12 across the semiconductor chip 8b, and is disposed opposite the output plate 12. The negative electrode plate 13 is disposed on the same side as the connection plate 11 with respect to the semiconductor chips 8a and 8b, and is disposed side by side with the connection plate 11. Specifically, the negative electrode plate 13 is disposed on the front side of the semiconductor chip 8b, and is connected to the conductor block 9b, and is connected to the emitter of the switching element 6 and the anode of the FWD 7 formed on the semiconductor chip 8b via the conductor block 9b. As shown in FIG. 5E, the negative electrode plate 13 is rectangular, and is disposed so as to overlap the output plate 12 when viewed from the normal direction to the front side of the semiconductor chip 8b, and is disposed side by side with the connection plate 11 at a distance. A part of one side of the negative electrode plate 13 facing the connection plate 11, specifically, the upper part of the paper in FIG. 5E, is a connection area 13a protruding toward the connection plate 11, and is connected to the negative terminal N at this connection area 13a. The connection area 13a here corresponds to the second connection area.

[0030] The positive electrode terminal P is disposed so as to protrude from one side of the positive electrode plate 10. The positive electrode terminal P is exposed from the resin sealing portion 16 and can be electrically connected to a wiring or the like connected to an external DC power source 2.

[0031] The output terminal O is disposed so as to protrude from one side of the output plate 12. The output terminal O is also exposed from the resin sealing portion 16 and can be electrically connected to wiring leading to the external three-phase motor 3, etc.

[0032] The negative electrode terminal N is disposed between the positive electrode terminal P and the output terminal O, and is disposed so as to protrude in the same direction as the positive electrode terminal P and the output terminal O from a position corresponding to the connection area 13a in the negative electrode plate 13. The negative electrode terminal N is connected to the connection area 13a via a second connection portion 18 shown in FIG. 5A and the like, and is thereby connected to the negative electrode plate 13. The negative electrode terminal N is covered in the resin sealing portion 16 at a location connected to the second connection portion 18, and the other portion is exposed from the resin sealing portion 16, and is therefore electrically connectable to an external grounding wiring or the like.

[0033] The signal terminal 14 is made of a conductor and has a signal terminal 14a for the upper arm and a signal terminal 14b for the lower arm as shown in FIG. 5A. The signal terminal 14 includes a gate terminal and a sense terminal for sensing the potential of a predetermined portion in the semiconductor chip 8. Although not shown, the gate terminal of the signal terminal 14 is electrically connected to a gate pad connected to the gate of the switching element 6 in the semiconductor chips 8a and 8b of the upper arm and the lower arm via a bonding wire or the like. In addition, other terminals such as the sense terminal of the signal terminal 14 are also electrically connected to pads connected to each portion of the switching element 6 in the semiconductor chips 8a and 8b of the upper arm and the lower arm via a bonding wire or the like.

[0034] The heat sink 15 is made of a metal with high thermal conductivity, such as copper, and serves to transfer heat generated by the semiconductor chip 8 to the cooler 5. It is disposed on the opposite side of each semiconductor chip 8 via an insulating film 19 made of a silicon nitride film or the like. In the present embodiment, two heat sinks 15 are provided to sandwich each semiconductor chip 8. One heat sink 15a is bonded to the positive electrode plate 10 and the output plate 12 via an insulating film 19a. The other heat sink 15b is bonded to the negative electrode plate 13 and the connection plate 11 via an insulating film 19b. The heat sink 15a and the insulating film 19a correspond to the first heat sink and the first insulating film, respectively, and the heat sink 15b and the insulating film 19b correspond to the second heat sink and the second insulating film, respectively.

[0035] Although not shown, each heat sink 15 is formed of a plate-like member having a rectangular shape when viewed from above, for example, made of a rectangular metal in this case. A positive electrode plate 10, a connection plate 11, an output plate 12, and a negative electrode plate 13 are arranged within the rectangle formed by each heat sink 15. A positive electrode terminal P, a negative electrode terminal N, and an output terminal O are drawn out so as to protrude from one side of the rectangle formed by each heat sink 15, and a signal terminal 14 is drawn out from the other opposing side.

[0036] The above is the basic structure constituting the circuit of the inverter 1 in the semiconductor module 4. Furthermore, the semiconductor module 4 of this embodiment is provided with a metal member 20 for forming an induced current path in order to further reduce inductance, and in addition, an insulating film 21 is provided so that the metal member 20 is insulated from each part constituting the circuit of the inverter 1.

[0037] 3, metal members 20 are provided between the positive plate 10 and the connection plate 11 and between the output plate 12 and the negative plate 13. More specifically, metal members 20 are provided not only in the portions between the positive plate 10 and the connection plate 11 and between the output plate 12 and the negative plate 13 that are located between the conductor blocks 9a and 9b, but also in positions outside the portions between the conductor blocks 9a and 9b.

[0038] In this embodiment, the metal member 20 is made up of two members, a first metal member 20a and a second metal member 20b, as shown in FIG. 5C.

[0039] The first metal member 20a is disposed over almost the entire area of ​​the positive electrode plate 10 so as to surround the semiconductor chip 8a, and is also disposed so as to surround the first connection portion 17. The second metal member 20b is disposed over almost the entire area of ​​the output plate 12 so as to surround the semiconductor chip 8b, and is also disposed so as to surround the connection area 12b and the second connection portion 18.

[0040] The insulating film 21 is arranged so as to insulate the first metal member 20a and the second metal member 20b from each part constituting the circuit of the inverter 1, and in this embodiment, is formed so as to cover the entire periphery of the first metal member 20a and the second metal member 20b. The insulating film 21 is formed in a plurality of layers. The entire periphery of the first metal member 20a and the second metal member 20b is covered by the entire plurality of layers.

[0041] Each part configured in this manner is resin-sealed by the resin sealing part 16. Specifically, in addition to each part configuring the circuit of the inverter 1, the metal member 20 and the insulating film 21 are arranged as shown in FIG. 3 and placed in a mold (not shown), and the molding resin is injected into the mold to resin-seal. Then, on one side of the semiconductor module 4, one surface of the resin sealing part 16 is flush with the heat dissipation surface of the heat sink 15a on the opposite side to the positive electrode plate 10 and the output plate 12, so that the heat dissipation surface of the heat sink 15a is exposed. Also, on the other side of the semiconductor module 4, one surface of the resin sealing part 16 is flush with the heat dissipation surface of the heat sink 15b on the opposite side to the connection plate 11 and the negative electrode plate 13, so that the heat dissipation surface of the heat sink 15b is exposed. Also, the positive electrode terminal P, the negative electrode terminal N, and the output terminal O are drawn out from one side of the resin sealing part 16, and the signal terminal 14 such as the gate terminal is drawn out from the side opposite to the side. The semiconductor module 4 is configured in this manner. The semiconductor module 4 thus configured is assembled to a cooler 5 as shown in FIG.

[0042] In the semiconductor module 4 configured in this manner, the positive terminal P is connected to the positive electrode of the DC power supply 2, the output terminal O is connected to the three-phase motor 3, and the negative terminal N is connected to the negative electrode of the DC power supply 2. Then, based on application of a gate voltage to the gate of the switching element 6, the switching element 6 of the upper arm of one phase is turned on and the switching element 6 of the lower arm of the other phase is turned on. Also, the remaining switching elements 6 are turned off. Such operations are repeated in order. As a result, a current supply path to the three-phase motor 3 is formed, and AC current is supplied to the three-phase motor 3.

[0043] Specifically, by turning on the switching element 6 of the upper arm, a path is formed for supplying current from the positive terminal P to the three-phase motor 3 through the positive electrode plate 10 → semiconductor chip 8a → conductor block 9a → connection plate 11 → first connection portion 17 → output plate 12 → output terminal O. Also, by turning on the switching element 6 of the lower arm, a path is formed for flowing current from the three-phase motor 3 through the output terminal O, output plate 12 → semiconductor chip 8b → conductor block 9b → negative electrode plate 13 → second connection portion 18 → negative terminal N. When performing such an operation, the semiconductor chips 8a and 8b in the semiconductor module 4 generate heat as a large current flows through the switching element 6 and the FWD 7. However, this heat is dissipated through the heat sinks 15a and 10b and is cooled by the cooler 5, so that the semiconductor chips 8a and 8b can be prevented from overheating.

[0044] Next, a method for manufacturing the semiconductor module 4 of this embodiment configured as above will be described with reference to FIGS. 5A to 5E.

[0045] [Step shown in FIG. 5A] First, prepare the positive electrode plate 10 to which the positive electrode terminal P is connected, the output plate 12 to which the output terminal O is connected, the signal terminal 14, and the negative electrode terminal N. Although not shown, these are integrated as a lead frame surrounded by an outer frame, and these can be prepared by preparing the lead frame.

[0046] Then, the semiconductor chip 8a is mounted at a desired position on the positive electrode plate 10, and the semiconductor chip 8b is mounted at a desired position on the output plate 12. Furthermore, a part of the insulating film 21 is formed on the outer edge of the semiconductor chips 8a and 8b. Also, a part of the insulating film 21 is formed around the connection area 12b and the negative electrode terminal N at a place connected to the connection area 13a. The insulating film 21 may be formed by any method such as coating or spraying. Although FIGS. 5A to 5E are not cross-sectional views, the part that is to be the insulating film 21 is hatched to facilitate understanding.

[0047] Thereafter, conductive block 9a is joined to the inner periphery of semiconductor chip 8a, and conductive block 9b is joined to the inner periphery of semiconductor chip 8b. Also, first connection portion 17 is joined to connection area 12b, and second connection portion 18 is joined to the negative terminal N at a location connected to connection area 13a.

[0048] [Step shown in FIG. 5B] A part of the insulating film 21 is also formed on the surrounding areas of the semiconductor chips 8a, 8b of the positive electrode plate 10 and the output plate 12. In this case, the insulating film 21 may be formed by any method such as coating or spraying.

[0049] [Step shown in FIG. 5C] A first metal member 20a is disposed on the positive electrode plate 10 so as to surround the semiconductor chip 8a, and a second metal member 20b is disposed on the output plate 12 so as to surround the semiconductor chip 8b. At this time, since the surfaces of the positive electrode plate 10 and the output plate 12 are covered with a part of the insulating film 21, the positive electrode plate 10 and the first metal member 20a are insulated, and the output plate 12 and the second metal member 20b are also insulated.

[0050] [Step shown in FIG. 5D] A part of the insulating film 21 is further formed so as to cover the conductor blocks 9a, 9b and the first and second connection portions 17 and 18 of the positive electrode plate 10 and the output plate 12, including the first metal member 20a and the second metal member 20b. In this case, the insulating film 21 may be formed by any method, such as coating or spraying.

[0051] [Step shown in FIG. 5E] The connection plate 11 and the negative electrode plate 13 are joined. Specifically, the connection plate 11 and the conductor block 9a are joined, and the connection area 11a of the connection plate 11 is joined to the first connection portion 17. The negative electrode plate 13 is joined to the conductor block 9b, and the connection area 13a of the negative electrode plate 13 is joined to the second connection portion 18. This completes the cross-sectional structure shown in FIG. 6, that is, a structure in which the portion of the semiconductor module 4 that constitutes the circuit of the inverter 1 is provided with the first metal member 20a and the second metal member 20b covered with the insulating film 21 inside.

[0052] Although the subsequent steps are not shown, heat sink 15a is attached to the rear side of positive plate 10 and output plate 12 via insulating film 19a, and heat sink 15b is attached to the rear side of connection plate 11 and negative plate 13 via insulating film 19b. After this is placed in a molding die, resin is filled into the molding die and solidified, completing semiconductor module 4 that is resin-sealed at resin sealing portion 16.

[0053] In this manner, the semiconductor module 4 of this embodiment is manufactured. Next, the effects of the semiconductor module 4 of this embodiment will be described.

[0054] First, in the semiconductor module 4 of this embodiment, a large current (hereinafter referred to as a main current) A1 flows through a current path as shown by an arrow in FIG. 3 in a portion that constitutes the circuit of the inverter 1.

[0055] At this time, since the heat sink 15b is arranged opposite the positive plate 10 and the output plate 12, and the heat sink 15a is arranged opposite the connection plate 11 and the negative plate 13, when the main current A1 flows, the induced current A2 flows through the heat sinks 15a and 15b. In other words, the heat sinks 15a and 15b become the induced current path, so that the induced current A2 flows in the opposite direction to the main current A1. Then, the magnetic flux generated by the main current A1 and the induced current A2 based on the right-handed screw rule is in the opposite direction. Therefore, the induced current A2 acts to cancel each other out on the opposite side of the main current path through which the main current A1 flows, that is, outside the heat sinks 15a and 15b, with respect to the induced current path through which the induced current A2 flows. Therefore, the inductance can be reduced.

[0056] Furthermore, in this embodiment, the first metal member 20a and the second metal member 20b are disposed between the positive electrode plate 10 and the connection plate 11 and between the output plate 12 and the negative electrode plate 13 along the current path of the main current A1. As a result, when the main current A1 flows, the induced current A3 also flows through the first metal member 20a and the second metal member 20b. In other words, the first metal member 20a and the second metal member 20b also become an induced current path through which the induced current A3 flows, so that the induced current A3 flows in the opposite direction to the main current A1. Then, the magnetic fluxes generated by the main current A1 and the induced current A3 based on the right-handed screw rule are in the opposite directions, so that the induced currents act to cancel each other out on the opposite side of the main current path through which the main current A1 flows, with respect to the induced current path through which the induced current A3 flows. Therefore, the magnetic flux can be canceled out even inside the semiconductor module 4, and the inductance can be further reduced.

[0057] As described above, according to the semiconductor module 4 of this embodiment, the first metal member 20a and the second metal member 20b are provided between the positive electrode plate 10 and the connection plate 11 and between the output plate 12 and the negative electrode plate 13. Therefore, the magnetic flux outside the semiconductor module 4 can be cancelled by the induced current path formed in the heat sinks 15a, 10b. In addition, the magnetic flux inside the semiconductor module 4 can be cancelled by the induced current path formed in the first metal member 20a and the second metal member 20b. This allows the semiconductor module 4 to have a further reduced inductance.

[0058] Second embodiment The second embodiment will be described. This embodiment is different from the first embodiment in that the configuration of the metal member 20 is changed, and other points are the same as those in the first embodiment, so only the points that are different from the first embodiment will be described.

[0059] 6 and 7A to 7C, the metal member 20 is configured as a single sheet, and a first metal member 20a located between the positive electrode plate 10 and the connection plate 11 is connected to a second metal member 20b located between the output plate 12 and the negative electrode plate 13. Specifically, a connecting portion 20c of the metal member 20 is provided so as to cover the gap between the positive electrode plate 10 and the output plate 12, including the gap between the first connection portion 17 and the second connection portion 18, and the first metal member 20a and the second metal member 20b are connected at this connecting portion 20c.

[0060] In this way, by forming the metal member 20 from a single sheet and arranging the connecting portion 20c between the first metal member 20a and the second metal member 20b, an induced current path can be formed in this portion as well. This makes it possible to form an induced current path in almost the entire interior of the semiconductor module 4, making it possible to further reduce inductance.

[0061] Third embodiment The third embodiment will be described. This embodiment is the same as the first and second embodiments except for the orientation of the semiconductor chips 8a and 8b. Therefore, only the differences from the first and second embodiments will be described. Note that, although the second embodiment is described here by taking an example in which the orientation of the semiconductor chips 8a and 8b is changed, a similar structure can also be applied to the first embodiment.

[0062] 8, the semiconductor module 4 of this embodiment is structured such that the front surface of the semiconductor chip 8a on the upper arm side faces upward in the plane of the drawing, and the front surface of the semiconductor chip 8b on the lower arm side faces downward in the plane of the drawing. In other words, the semiconductor chip 8a and the semiconductor chip 8b are arranged with their front surfaces facing opposite each other.

[0063] The semiconductor chip 8a has a back side connected to a positive plate 10 connected to a positive terminal P, and a front side connected to an output plate 12 connected to an output terminal O via a conductor block 9a. The semiconductor chip 8b on the lower arm side has a back side connected to the output plate 12, and a front side connected to a negative plate 13 connected to a negative terminal N via a conductor block 9b. In this embodiment, the connection plate 11 is not provided, and the output plate 12 is provided so as to straddle both the semiconductor chip 8a and the semiconductor chip 8b, and the positive plate 10 and the negative plate 13 are arranged on the same side of the semiconductor chip 8a and the semiconductor chip 8b. For this reason, as shown in FIG. 8, a current path passing through the positive plate 10, the semiconductor chip 8a, the conductor block 9a, the output plate 12, the semiconductor chip 8b, the conductor block 9b, and the negative plate 13 in this order, that is, a connection form constituting a U-shaped current path.

[0064] In this way, even in the structure forming a U-shaped current path, the first metal member 20a and the second metal member 20b are provided between the positive electrode plate 10 and the output plate 12 and between the output plate 12 and the negative electrode plate 13. This makes it possible to form an induced current path through which the induced current A3 flows in the metal member 20, and it is possible to cancel the magnetic flux inside the semiconductor module 4. This allows the semiconductor module 4 to have a further reduced inductance.

[0065] (Other embodiments) Although the present disclosure has been described based on the above-described embodiment, it is not limited to the embodiment, and includes various modifications and modifications within the equivalent range. In addition, various combinations and forms, and other combinations and forms including only one element, more than one element, or less than one element, are also within the scope and concept of the present disclosure.

[0066] For example, the configurations of the positive electrode terminal P, the output terminal O, and the negative electrode terminal N can be changed as appropriate. For example, a structure in which the negative electrode plate 13 is directly connected to the negative electrode terminal N without the second connection portion 18 being interposed therebetween may be used.

[0067] In addition, in each of the above embodiments, the semiconductor module 4 having a 2-in-1 structure has been described as an example, but the number of semiconductor chips 8 can be changed as appropriate, such as a 1-in-1 structure in which only one semiconductor chip 8 is provided in the semiconductor module 4, or a 4-in-1 structure in which four semiconductor chips 8 are provided. In either case, a first conductor plate connected to the positive electrode side of the semiconductor element formed in the semiconductor chip 8 and a second conductor plate connected to the negative electrode side are arranged, and the first conductor plate and the second conductor plate are resin-sealed together with the semiconductor chip. In addition, a metal member is arranged between the first conductor plate and the second conductor plate. Then, when a main current flows through the semiconductor element, the main current flows between the first conductor plate and the second conductor plate in a direction perpendicular to the surface of the semiconductor chip, and a current flows in the first conductor plate and the second conductor plate parallel to the surface of the semiconductor chip. In such a structure, if an induced current path is formed in which an induced current flows through the metal member when a main current flows, the effects shown in each of the above embodiments can be obtained.

[0068] In the first and second embodiments, the positive plate 10 and the output plate 12 correspond to the first conductor plate, and the connection plate 11 and the negative plate 13 correspond to the second conductor plate. In the third embodiment, the positive plate 10 corresponds to the first conductor plate, the negative plate 13 corresponds to the second conductor plate, the portion of the output plate 12 facing the negative plate 13 corresponds to the first conductor plate, and the portion facing the positive plate corresponds to the second conductor plate.

[0069] In addition, in each of the above embodiments, a structure in which the semiconductor module 4 is cooled by the cooler 5 is exemplified. And, the plate 5a constituting a part of the cooler 5 is exemplified as another metal body arranged opposite to and insulated from the first conductor plate in the semiconductor module 4. However, this is also merely an example, and the semiconductor module 4 may be fixed to a structure different from the cooler 5, and an induced current path may be configured by using another metal body as a part of the fixing target.

[0070] Furthermore, in each of the above embodiments, an IGBT has been described as an example of the switching element 6 formed on the semiconductor chip 8, but a vertical MOSFET may be used, or a semiconductor element other than the switching element 6 may be provided. In addition to silicon being usable as the semiconductor material, other semiconductor materials, for example, compound semiconductors such as SiC, may also be used.

[0071] In each of the above embodiments, it goes without saying that the elements constituting the embodiment are not necessarily essential, except when it is specifically stated that they are essential or when it is clearly considered essential in principle. In addition, in each of the above embodiments, when the numbers, values, amounts, ranges, etc. of the components of the embodiment are mentioned, they are not limited to the specific numbers, except when it is specifically stated that they are essential or when it is clearly limited to a specific number in principle. In addition, in each of the above embodiments, when the shapes, positional relationships, etc. of the components are mentioned, they are not limited to the shapes, positional relationships, etc., except when it is specifically stated that they are essential or when it is clearly limited to a specific shape, positional relationship, etc. in principle. [Explanation of symbols]

[0072] 4. Semiconductor Module 6 Switching elements 8. Semiconductor Chips 10 Positive electrode plate 11 Connection plate 12 Output board 13 Negative plate P positive terminal O Output terminal N negative terminal

Claims

1. A single or multiple semiconductor chips (8, 8a, 8b) having a front surface and a back surface and on which a semiconductor element (6, 7) is formed; A first conductor plate (10, 12) connected to the rear surface side of the semiconductor chip and connected to the positive electrode side of the semiconductor element, and a second conductor plate (11, 13) connected to the front surface side of the semiconductor chip and connected to the negative electrode side of the semiconductor element, a resin sealing portion (16) that seals the semiconductor chip, the first conductive plate, and the second conductive plate; a metal member (20, 20a, 20b) disposed between the first conductive plate and the second conductive plate in the resin sealing portion; an insulating film (21) that insulates the metal member from the semiconductor chip, the first conductive plate, and the second conductive plate; When a main current flows through the semiconductor element, the main current flows between the first conductor plate and the second conductor plate in a direction perpendicular to a surface of the semiconductor chip, and the main current flows within the first conductor plate and the second conductor plate in a direction parallel to the surface of the semiconductor chip, thereby forming an induced current path through which an induced current flows within the metal member; The first conductive plate is disposed opposite another metal body (5a) insulated from the first conductive plate via an insulating member, The second conductor plate is also disposed opposite another metal body (5a) insulated from the second conductor plate via an insulating member, A semiconductor module, wherein when a main current flows through the semiconductor chip, the other metal body arranged opposite the first conductor plate and the other metal body arranged opposite the second conductor plate also form an induced current path through which an induced current flows.

2. 2. The semiconductor module according to claim 1, wherein the other metal body arranged opposite the first conductor plate and the other metal body arranged opposite the second conductor plate constitute part of a cooler (5).

3. A single or multiple semiconductor chips (8, 8a, 8b) having a front surface and a back surface and on which a semiconductor element (6, 7) is formed; A first conductor plate (10, 12) connected to the rear surface side of the semiconductor chip and connected to the positive electrode side of the semiconductor element, and a second conductor plate (11, 13) connected to the front surface side of the semiconductor chip and connected to the negative electrode side of the semiconductor element, a resin sealing portion (16) that seals the semiconductor chip, the first conductive plate, and the second conductive plate; a metal member (20, 20a, 20b) disposed between the first conductive plate and the second conductive plate in the resin sealing portion; an insulating film (21) that insulates the metal member from the semiconductor chip, the first conductive plate, and the second conductive plate; When a main current flows through the semiconductor element, the main current flows between the first conductor plate and the second conductor plate in a direction perpendicular to a surface of the semiconductor chip, and the main current flows within the first conductor plate and the second conductor plate in a direction parallel to the surface of the semiconductor chip, thereby forming an induced current path through which an induced current flows within the metal member; a first heat sink (15a) disposed opposite the first conductive plate; a first insulating film (19a) for insulating the first conductive plate from the first heat sink; a second heat sink (15b) disposed opposite the second conductive plate; a second insulating film (19b) for insulating the second conductor plate from the second heat sink; a semiconductor module having a structure in which the first heat sink, the first insulating film, the second heat sink and the second insulating film are sealed in the resin sealing portion such that one side of the first heat sink opposite the first conductive plate is exposed and one side of the second heat sink opposite the second conductive plate is exposed.

4. A single or multiple semiconductor chips (8, 8a, 8b) having a front surface and a back surface and on which a semiconductor element (6, 7) is formed; A first conductor plate (10, 12) connected to the rear surface side of the semiconductor chip and connected to the positive electrode side of the semiconductor element, and a second conductor plate (11, 13) connected to the front surface side of the semiconductor chip and connected to the negative electrode side of the semiconductor element, a resin sealing portion (16) that seals the semiconductor chip, the first conductive plate, and the second conductive plate; a metal member (20, 20a, 20b) disposed between the first conductive plate and the second conductive plate in the resin sealing portion; an insulating film (21) that insulates the metal member from the semiconductor chip, the first conductive plate, and the second conductive plate; When a main current flows through the semiconductor element, the main current flows between the first conductor plate and the second conductor plate in a direction perpendicular to a surface of the semiconductor chip, and the main current flows within the first conductor plate and the second conductor plate in a direction parallel to the surface of the semiconductor chip, thereby forming an induced current path through which an induced current flows within the metal member; The metal member surrounds the semiconductor chip.

5. A single or multiple semiconductor chips (8, 8a, 8b) having a front surface and a back surface and on which a semiconductor element (6, 7) is formed; A first conductor plate (10, 12) connected to the rear surface side of the semiconductor chip and connected to the positive electrode side of the semiconductor element, and a second conductor plate (11, 13) connected to the front surface side of the semiconductor chip and connected to the negative electrode side of the semiconductor element, a resin sealing portion (16) that seals the semiconductor chip, the first conductive plate, and the second conductive plate; a metal member (20, 20a, 20b) disposed between the first conductive plate and the second conductive plate in the resin sealing portion; an insulating film (21) that insulates the metal member from the semiconductor chip, the first conductive plate, and the second conductive plate; When a main current flows through the semiconductor element, the main current flows between the first conductor plate and the second conductor plate in a direction perpendicular to a surface of the semiconductor chip, and the main current flows within the first conductor plate and the second conductor plate in a direction parallel to the surface of the semiconductor chip, thereby forming an induced current path through which an induced current flows within the metal member; The semiconductor chip has a first semiconductor chip (8 a) and a second semiconductor chip (8 a), and the first semiconductor chip and the second semiconductor chip are both arranged with their surfaces facing the same side, The first conductor plate includes a positive electrode plate (10) to which the positive electrode of the first semiconductor chip is connected and a positive electrode terminal (P) is connected, and an output plate (12) arranged next to the positive electrode plate, to which the positive electrode of the second semiconductor chip is connected and an output terminal (O) is connected, The second conductor plate includes a connection plate (11) disposed opposite the positive electrode plate, to which the negative electrode of the first semiconductor chip is connected and which is connected to the output plate via a first connection portion (17) in a first connection area (11a), and a negative electrode plate (12) disposed opposite the output plate and arranged side by side with the connection plate, to which the negative electrode of the second semiconductor chip is connected and to which a negative electrode terminal (N) is connected via a second connection portion (18) in a second connection area (13a), The metal member includes a first metal member (20a) disposed between the positive electrode plate and the connection plate, and a second metal member (20b) disposed between the output plate and the negative electrode plate, the first metal member surrounds the first semiconductor chip and the first connection portion, The second metal member surrounds the second semiconductor chip and the second connection portion.

6. The semiconductor module according to claim 5, wherein the metal member has a connecting portion (20c) that covers the gap between the positive electrode plate and the output plate, and the first metal member and the second metal member are connected at the connecting portion.

7. A single or multiple semiconductor chips (8, 8a, 8b) having a front surface and a back surface and on which a semiconductor element (6, 7) is formed; A first conductor plate (10, 12) connected to the rear surface side of the semiconductor chip and connected to the positive electrode side of the semiconductor element, and a second conductor plate (11, 13) connected to the front surface side of the semiconductor chip and connected to the negative electrode side of the semiconductor element, a resin sealing portion (16) that seals the semiconductor chip, the first conductive plate, and the second conductive plate; a metal member (20, 20a, 20b) disposed between the first conductive plate and the second conductive plate in the resin sealing portion; an insulating film (21) that insulates the metal member from the semiconductor chip, the first conductive plate, and the second conductive plate; When a main current flows through the semiconductor element, the main current flows between the first conductor plate and the second conductor plate in a direction perpendicular to a surface of the semiconductor chip, and the main current flows within the first conductor plate and the second conductor plate in a direction parallel to the surface of the semiconductor chip, thereby forming an induced current path through which an induced current flows within the metal member; The semiconductor chip has a first semiconductor chip (8a) and a second semiconductor chip (8a), and the first semiconductor chip and the second semiconductor chip are arranged with their respective surfaces facing opposite each other, The first conductor plate includes a positive electrode plate (10) to which the positive electrode of the first semiconductor chip is connected and to which a positive electrode terminal (P) is connected, and an output plate (12) to which the positive electrode of the second semiconductor chip is connected and to which an output terminal (O) is connected, The second conductor plate includes a negative electrode plate (13) to which a negative electrode of the second semiconductor chip is connected and a negative electrode terminal (N) is connected, and the output plate extends to a position opposite to the positive electrode plate, The metal member includes a first metal member (20a) disposed between the positive electrode plate and the output plate, and a second metal member (20b) disposed between the output plate and the negative electrode plate, the first metal member surrounds the first semiconductor chip, The second metal member surrounds the second semiconductor chip.

8. The semiconductor module according to claim 7, wherein the metal member has a connecting portion (20c) that covers the gap portion between the positive electrode plate and the negative electrode plate, and the first metal member and the second metal member are connected at the connecting portion.

Images