Low power consumption circuit using current change for multiple data transmission

Abstract

The present invention provides a low-power electrical circuit that uses current changes for multiple data transmission, which has the effect of making it possible to increase the amount of data that can be transmitted without increasing the frequency, thereby making it possible to address the predicted further increase in data volume on a global level in the future, the problem of power supply shortages, and the problem of CO2 emissions that are directly linked to global warming. [Solution] The waveform output unit has a low current high-level voltage output circuit and a high current high-level voltage output circuit, and the waveform input unit has a first waveform detection unit, a second waveform detection unit, and a differentiation circuit, and the waveform output unit and waveform input unit are connected by a transmission path to utilize current changes, making it possible to transmit a large amount of data on voltage changes and current changes simultaneously.

Description

[Technical field]

[0001] The present invention relates to a low power consumption electric circuit that utilizes a change in current. [Background technology]

[0002] Currently, the transmission methods used in semiconductors and computers use the high and low levels of waveform voltage as a basis for determining whether data is 01 (zero one), and in order to transmit large amounts of data, it is necessary to increase the data frequency.However, increasing the frequency brings with it issues such as the generation of high-frequency noise, increased power consumption, and increased CO2 emissions.

[0003] To solve these problems, the voltage of the waveform being transmitted has been reduced, and the voltage level has been reduced from 5 V to 3.3 V, from 3.3 V to 1.8 V, and from 1.8 V to 1.5 V. However, lowering the voltage level has also given rise to the issue that it becomes more susceptible to the effects of electromagnetic noise from the surroundings.

[0004] Furthermore, even if such high-frequency and low-voltage technologies are used, it is believed that they are insufficient to address the predicted future increases in data volumes worldwide, the problem of power supply shortages, and the problem of CO2 emissions that are directly linked to global warming. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent Publication No. 2024-36808 Summary of the Invention [Problem to be solved by the invention]

[0006] The above-mentioned Patent Document 1 proposes a structure that takes into consideration output voltage adjustment, but does not disclose configurations related to a waveform output method or waveform input method for achieving low power consumption. [Means for solving the problem]

[0007] The present invention is a low power consumption circuit using multiple data transmission utilizing current changes, in which a waveform output section has a low current high level voltage output circuit and a high current high level voltage output circuit, and a waveform input section has a first waveform detection section, a second waveform detection section, and a differentiation circuit, and the waveform output section and the waveform input section are connected by a transmission line, wherein the waveform output section outputs a low current high level voltage from the low current high level voltage output circuit and outputs a high current high level voltage from the high current high level voltage output circuit, transmits the output waveforms to the waveform input section through the transmission line, detects the waveform by the first waveform detection section, and detects the waveform in the differentiation circuit by the second waveform detection section. Effect of the Invention

[0008] The present invention is a low power consumption circuit using multiple data transmission utilizing current changes, in which a waveform output section has a low current high level voltage output circuit and a high current high level voltage output circuit, and a waveform input section has a first waveform detection section, a second waveform detection section, and a differentiation circuit, and the waveform output section and the waveform input section are connected by a transmission line, wherein the waveform output section outputs a low current high level voltage from the low current high level voltage output circuit and outputs a high current high level voltage from the high current high level voltage output circuit, transmits the output waveforms to the waveform input section through the transmission line, detects the waveform by the first waveform detection section, and detects the waveform in the differentiation circuit by the second waveform detection section.

[0009] In this way, conventional transmission methods for semiconductors, computers, etc. judge whether the data is 01 (zero one) based on the high / low voltage of the waveform, and only transmit the high / low voltage changes during one degree or one cycle of waveform transmission. However, in this invention, in addition to that, the high and low levels of the waveform current are transmitted and received, and the current changes are converted into voltage to make it possible to judge the data. Since it is possible to detect changes in current as well as voltage during one degree or one cycle, it becomes possible to send and receive multiple waveform data. Since it is possible to increase the amount of data that can be transmitted without increasing the frequency, it has the effect of making it possible to address the predicted further increases in data volume on a global level in the future, the problem of power supply shortages, and the problem of CO2 emissions that are directly linked to global warming. [Brief description of the drawings]

[0010] [Figure 1] Circuit configuration diagram of one embodiment of the present invention. [Diagram 2] Circuit component layout diagram for one embodiment of the present invention [Diagram 3] Simulation waveforms relating to one embodiment of the present invention [Figure 4] Simulation waveforms relating to one embodiment of the present invention [Diagram 5] Simulation waveforms relating to one embodiment of the present invention [Figure 6] Simulation waveforms relating to one embodiment of the present invention [Figure 7] Simulation waveforms relating to one embodiment of the present invention [Figure 8] Simulation waveforms relating to one embodiment of the present invention [Figure 9] Circuit configuration diagram of one embodiment of the present invention. [Figure 10] Circuit configuration diagram of one embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, an embodiment will be described with reference to the drawings.

[0012] In the description of the drawings, the same elements are given the same reference numerals and redundant description will be omitted. In addition, the drawings are for the purpose of understanding, and the actual dimensional ratios do not necessarily correspond to the actual ones.

[0013] FIG. 1 is a circuit diagram of an embodiment of the present invention.

[0014] Here, the waveform output unit 1 has a low current high level voltage output circuit 3 and a high current high level voltage output circuit 4, the waveform input unit 2 has a first waveform detection unit 6, a second waveform detection unit 7 and a differentiation circuit 8, and the waveform output unit 1 and the waveform input unit 2 are connected by a transmission line 5.

[0015] 2, the first resistive component 16 in FIG. 2 and the second PMOS 17 in FIG. 2 are assigned as a circuit having the function of the low-current high-level voltage output circuit 3 in FIG. 1, the first PMOS 15 in FIG. 2 is assigned as a circuit having the function of the high-current high-level voltage output circuit 4 in FIG. 1, and the capacitive component 21 in FIG. 2 and the second resistive component 22 in FIG. 2 are assigned as the differentiation circuit 8 in FIG. 1.

[0016] Further, in FIG. 2 , the waveform output section 1 has a first power supply section 11, a ground 12, a waveform supply section 13, a selector circuit 14, a first PMOS 15, a first resistance component 16, a second PMOS 17, an NMOS 18, and a waveform output terminal 19.

[0017] At this time, the source part of the first PMOS 15 and one terminal of the first resistance component 16 are connected to the first power supply unit 11, the waveform supply unit 13 is connected to the input terminal of the selector circuit 14 and the gate part of the NMOS 18, one output terminal of the selector circuit 14 is connected to the gate part of the first PMOS 15, the other output terminal of the selector circuit 14 is connected to the gate part of the second PMOS 17, the other terminal of the first resistance component 16 is connected to the source part of the second PMOS 17, the source part of the NMOS 18 is connected to ground 12, and the drain part of the first PMOS 15, the drain part of the second PMOS 17, and the drain part of the NMOS 18 are connected to the waveform output terminal 19.

[0018] Moreover, the waveform input section 2 has a first waveform detection section 6, a second waveform detection section 7, a second power supply section 20, a capacitive component 21, and a second resistive component 22.

[0019] At this time, one terminal of the second resistive component 22 is connected to the second power supply unit 20, the other terminal of the second resistive component 22 and one terminal of the capacitive component 21 are connected to the second waveform detection unit 7, and the other terminal of the capacitive component 21 is connected to the first waveform detection unit 6.

[0020] Furthermore, waveform output terminal 19 of waveform detection unit 1 is connected to one terminal of transmission line 5 , and first waveform detection unit 6 of waveform input unit 2 is connected to the other terminal of transmission line 5 .

[0021] At this time, a case will be considered in which a falling waveform is supplied from the waveform supply unit 13 to the input terminal of the selector circuit 14 and the gate unit of the NMOS 18 in FIG.

[0022] Here, when the waveform of the waveform supply unit 13 is supplied from the selector circuit 14 to the gate of the first PMOS 15 connected to one output terminal of the selector circuit 14, the first PMOS 15 is turned ON by the falling waveform at the gate, and a rising waveform is output from the drain of the first PMOS 15. The change in current output at this time is assumed to be X (A / sec). At the same time, the NMOS 18 is turned OFF.

[0023] 2, when a falling waveform is supplied from the waveform supply unit 13 to the input terminal of the selector circuit 14 and the gate of the NMOS 18, and when the waveform of the waveform supply unit 13 is supplied from the selector circuit 14 to the gate of the second PMOS 17 connected to the other output terminal of the selector circuit 14, the second PMOS 17 is turned ON by the falling waveform at the gate, and a rising waveform is output from the drain of the second PMOS 17. The change in current output at this time is assumed to be Y (A / sec). At the same time, the NMOS 18 is turned OFF.

[0024] Assuming that the first PMOS 15 and the second PMOS 17 are PMOS with equivalent performance, the first resistance component 16 and the second PMOS 17 form the function of the low-current high-level voltage output circuit 3, but since the resistance component is larger than that of the high-current high-level voltage output circuit 4 formed by the first PMOS 15, the current change in the rising waveform at the drain when the PMOS is turned on is smaller. Therefore, when comparing current change X and current change Y, X > Y.

[0025] Moreover, the waveform input section 2 has a first waveform detection section 6, a second waveform detection section 7, a second power supply section 20, a capacitive component 21, and a second resistive component 22.

[0026] At this time, one terminal of the second resistive component 22 is connected to the second power supply unit 20, the other terminal of the second resistive component 22 and one terminal of the capacitive component 21 are connected to the second waveform detection unit 7, and the other terminal of the capacitive component 21 is connected to the first waveform detection unit 6.

[0027] Here, a differential circuit is formed by a capacitive component 21 and a second resistive component 22.

[0028] Furthermore, waveform output terminal 19 of waveform output section 1 is connected to one terminal of transmission line 5 , and first waveform detection section 6 of waveform input section 2 is connected to the other terminal of transmission line 5 .

[0029] In order to verify these overall waveforms, we will quantitatively explain the waveforms using LTspice simulation.

[0030] In FIG. 2, the first power supply section 11 of the waveform output section 1 is set to 5V, the first PMOS 15 and the second PMOS 17 of the waveform output section 1 are set to a SPICE model of RSD160P05 manufactured by ROHM, the NMOS 18 of the waveform output section 1 is set to a SPICE model of RSR025N03 manufactured by ROHM, the first resistance component 16 of the waveform output section 1 is set to 5Ω, and the waveform supply section 13 of the waveform output section 1 is set to a waveform with a high side of 5V and a low side of 0V and a fall time of 1ns.

[0031] Further, in FIG. 2, the parameters of the transmission line 5 are set to a delay time of 5 ns and a characteristic impedance of 50 Ω.

[0032] Furthermore, in FIG. 2, the second power supply section 20 of the waveform input section 2 is set to 2.5 V, the second resistive component 22 to 500 Ω, and the capacitive component 21 to 10 pF.

[0033] In this case, consider the first case where the waveform of waveform supply unit 13 is supplied from selector circuit 14 to the gate of first PMOS 15 connected to one output terminal of selector circuit 14. First PMOS 15 is turned ON by the falling waveform at the gate, a rising waveform is output from the drain of first PMOS 15, NMOS 18 is turned OFF, and the waveform reaches first waveform detection unit 6 of waveform input unit 2 from waveform output terminal 19 through transmission path 5.

[0034] FIG. 3 shows the waveform at this time, where the vertical axis represents voltage as the voltage at first waveform detection section 6 and the horizontal axis represents time.

[0035] FIG. 4 shows a waveform of a current flowing between the other terminal of the transmission line 5 and the other terminal of the capacitive component 21, with the vertical axis representing current and the horizontal axis representing time.

[0036] Here, a differential circuit is formed by a capacitive component 21 and a second resistive component 22, and FIG. 5 shows a waveform of the voltage at the second waveform detection unit 7 located between these two components, with the vertical axis representing voltage and the horizontal axis representing time.

[0037] In this case, if the low level of the waveform in Figure 3 is 0V and the high level is 5V, the 20% to 80% level of the voltage amplitude is 1V to 4V, and it can be seen from the simulation waveform in Figure 3 that the transition time from 1V to 4V is approximately 4.0ns.

[0038] In addition, in Fig. 4, the peak value is 6.27 mA. At 0.1 mA it is 121.56 nsec, and at 6.27 mA it is 130.00 nsec, and the current change during this period is 0.73 mA / nsec.

[0039] Furthermore, in FIG. 5, the peak voltage of the waveform is 5.63V.

[0040] Next, as a second case, consider a case where the waveform of waveform supply unit 13 is supplied from selector circuit 14 to the gate of second PMOS 17 connected to the other output terminal of selector circuit 14. Second PMOS 17 is turned ON by the falling waveform at its gate, a rising waveform is output from the drain of second PMOS 17, NMOS 18 is turned OFF, and the waveform reaches first waveform detection unit 6 of waveform input unit 2 from waveform output terminal 19 through transmission path 5.

[0041] FIG. 6 shows the waveform at this time, where the vertical axis represents voltage as the voltage at first waveform detection section 6 and the horizontal axis represents time.

[0042] FIG. 7 shows a waveform of a current flowing between the other terminal of the transmission line 5 and the other terminal of the capacitive component 21, with the vertical axis representing current and the horizontal axis representing time.

[0043] Here, a differential circuit is formed by a capacitive component 21 and a second resistive component 22, and FIG. 8 shows a waveform of the voltage at the second waveform detection unit 7 located between these two components, with the vertical axis representing voltage and the horizontal axis representing time.

[0044] In this case, if the low level of the waveform in Figure 6 is 0V and the high level is 5V, the 20% to 80% level of the voltage amplitude is 1V to 4V, and it can be seen from the simulation waveform in Figure 6 that the transition time from 1V to 4V is approximately 6.6ns.

[0045] 7, the peak value is 3.80 mA. It is 126.35 nsec at 0.1 mA and 132.66 nsec at 3.80 mA, and the current change during this period is 0.59 mA / nsec.

[0046] Furthermore, in FIG. 8, the peak voltage of the waveform is 4.40V.

[0047] Here, let us consider the waveform at waveform input section 2 in the first and second cases.

[0048] In the first case, the first waveform detection unit 6 detects a waveform that changes from low to high with a low level of 0V and a high level of 5V, and the second waveform detection unit 7 detects a peak voltage of 5.63V.

[0049] In the second case, the first waveform detection unit 6 detects a waveform that changes from low to high with a low level of 0 V and a high level of 5 V, and the second waveform detection unit 7 detects a peak voltage of 4.40 V.

[0050] In one waveform transmission or one cycle, the first waveform detector 6 detects a voltage change between low and high in both the first and second cases. The second waveform detector 7 detects a waveform with a peak voltage of 5.63V in the first case and a peak voltage of 4.40V in the second case.

[0051] Here, if the threshold voltage of the waveform in the second waveform detection unit 7 is assumed to be 5.00 V, which is approximately the midpoint between the peak voltage of 5.63 V in the first case and the peak voltage of 4.40 V in the second case, the second waveform detection unit 7 can detect the first and second cases as different data.

[0052] As described above, by selecting the first PMOS 15 or the second PMOS 17 by the selector circuit 14 in the waveform output unit 1, it becomes possible to transmit a plurality of waveform data during one waveform transmission or one period.

[0053] By providing a differentiation circuit, such as one formed by a capacitive component 21 and a second resistive component 22, in the waveform input unit 2, it becomes possible to receive multiple waveform data during one waveform transmission or one period, just as if the waveforms were detected by the first waveform detection unit 6 and the second waveform detection unit 7.

[0054] In this explanation, a specific configuration is described, but other variations will be described.

[0055] In the waveform output section 1, the configuration of the first PMOS 15, the first resistive component 16 and the second PMOS 17 for transmitting the waveform from the waveform output terminal 19 has been described, but it is also possible to use multiple PMOSs with different characteristics or to use an NPN transistor instead of a PMOS.

[0056] In addition, in the waveform output section 1, the configuration of the first resistive component 16 for transmitting a waveform from the waveform output terminal 19 has been described, but it is also possible to incorporate a single or multiple capacitive components, a single or multiple resistive components, and a single or multiple inductor components in series or in parallel.

[0057] Furthermore, although a configuration of a single DC power supply has been described as the first power supply unit 11 of the waveform output unit 1, a variable DC power supply or an AC power supply can also be applied.

[0058] Although the transmission line 5 has been described as having a characteristic impedance and a delay time, it may be replaced by a material other than a metal transmission line, such as carbon, as long as it can transmit an electrical waveform.

[0059] In the waveform input section 2, the configuration of the capacitive component 21 and the second resistive component 22 has been described as a differential circuit, but it is also possible to incorporate a single or multiple capacitive components, a single or multiple resistive components, and a single or multiple inductor components in series or parallel, and in that case, it is possible to detect multiple waveforms from the connection points between multiple components.

[0060] Further, although the second power supply unit 20 of the waveform input unit 2 is described as being configured as a single DC power supply, a variable DC power supply or an AC power supply can also be applied.

[0061] Furthermore, in the present invention, the configuration of a rising waveform at waveform output terminal 19 of waveform output section 1 has been described, but similar to the first PMOS 15, first resistance component 16, and second PMOS 17 that configure the rising waveform, by replacing NMOS 18 connected to waveform output terminal 19 with a plurality of NMOSs or by connecting a resistance component, it is also possible to accommodate a falling waveform configuration at waveform output terminal 19.

[0062] In this case, as shown in FIG. 9, the waveform output section 1 is configured with a low-current, low-level voltage output circuit 9 and a high-current, low-level voltage output circuit 10.

[0063] Furthermore, it is also possible to incorporate both rising and falling circuits at the same time. In this case, as shown in Fig. 10, the waveform output section 1 is configured with a low-current high-level voltage output circuit 3, a high-current high-level voltage output circuit 4, a low-current low-level voltage output circuit 9, and a high-current low-level voltage output circuit 10.

[0064] As described above, the present invention is a low power consumption circuit using multiple data transmission utilizing current changes, in which the waveform output section has a low current high level voltage output circuit and a high current high level voltage output circuit, the waveform input section has a first waveform detection section, a second waveform detection section, and a differentiation circuit, and the waveform output section and the waveform input section are connected by a transmission line, and the waveform output section outputs a low current high level voltage from the low current high level voltage output circuit and outputs a high current high level voltage from the high current high level voltage output circuit, transmits the output waveforms to the waveform input section through the transmission line, detects the waveform by the first waveform detection section, and detects the waveform in the differentiation circuit by the second waveform detection section.

[0065] In this way, conventional transmission methods for semiconductors, computers, etc. judge whether the data is 01 (zero one) based on the high / low voltage of the waveform, and only transmit the high / low voltage changes during one degree or one cycle of waveform transmission. However, in this invention, in addition to that, the high and low levels of the waveform current are transmitted and received, and the current changes are converted into voltage to make it possible to judge the data. Since it is possible to detect changes in current as well as voltage during one degree or one cycle, it becomes possible to send and receive multiple waveform data. Since it is possible to increase the amount of data that can be transmitted without increasing the frequency, it has the effect of making it possible to address the predicted further increases in data volume on a global level in the future, the problem of power supply shortages, and the problem of CO2 emissions that are directly linked to global warming. [Industrial Applicability]

[0066] In the low-power circuit of the present invention, which uses current changes to transmit multiple data, conventional transmission methods for semiconductors, computers, etc. use the high / low voltage of the waveform as a reference to determine whether the data is 01 (zero one), and only transmit high / low voltage changes during one waveform transmission or one cycle. However, in the present invention, in addition to these, the high and low levels of the waveform current are transmitted and received, and the current changes are converted into voltage to enable data determination. Since changes in current as well as voltage can be detected during one degree or one cycle, it is possible to send and receive multiple waveform data. Since the amount of data that can be transmitted can be increased without increasing the frequency, it will be possible to address the predicted further increase in data volume on a global level in the future, the problem of power supply shortages, and the problem of CO2 emissions that are directly linked to global warming, and this will have the effect of making a significant contribution to the movement towards the SDGs and to the semiconductor and computer industries. [Explanation of symbols]

[0067] 1 Waveform output section 2. Waveform input section 3. Low current high level voltage output circuit 4. High-current high-level voltage output circuit 5. Transmission line 6. First Waveform Detection Section 7. Second waveform detector 8... Differential circuit 9. Low-current, low-level voltage output circuit 10 High current low level voltage output circuit 11... First power supply unit 12 Grand 13...Waveform supply section 14. Selector circuit 15 First PMOS 16 - First resistor component 17 Second PMOS 18. NMOS 19 Waveform output terminal 20...Second power supply unit 21. Capacity parts 22 Second Resistive Component

Claims

1. A low power consumption circuit for multi-data transmission, comprising: a waveform output section including a low-current high-level voltage output circuit that outputs a first signal having a first rise time, and a high-current high-level voltage output circuit that outputs a second signal having a second rise time that is shorter than the first rise time; a waveform input for receiving the first and second signals; a transmission path electrically connecting the waveform output unit and the waveform input unit and transmitting the first and second signals; the waveform output unit outputs one of the first signal and the second signal; the waveform input unit has a differentiation circuit including a capacitive component connected in series to the transmission line via an input terminal and a resistive component electrically connected in series to the capacitive component, a first waveform detection unit connected between the capacitive component and the resistive component of the differentiation circuit, and a second waveform detection unit connected to the input terminal of the differentiation circuit; The second signal is converted by the differentiating circuit into a voltage waveform having a voltage value exceeding a predetermined threshold level; A low power consumption circuit for multiple data transmission, characterized in that the first waveform detection unit is configured to selectively detect a second signal.

2. A low power consumption circuit for multiple data transmission, comprising: a waveform output section including a low-current low-level voltage output circuit that outputs a first signal having a first fall time, and a high-current low-level voltage output circuit that outputs a second signal having a second fall time that is shorter than the first fall time; a waveform input for receiving the first and second signals; a transmission path electrically connecting the waveform output unit and the waveform input unit and transmitting the first and second signals; the waveform output unit outputs one of the first signal and the second signal; the waveform input unit has a differentiation circuit including a capacitive component connected in series to the transmission line via an input terminal and a resistive component electrically connected in series to the capacitive component, a first waveform detection unit connected between the capacitive component and the resistive component of the differentiation circuit, and a second waveform detection unit connected to the input terminal of the differentiation circuit; The second signal is converted by the differentiating circuit into a voltage waveform having a voltage value exceeding a predetermined threshold level; A low power consumption circuit for multiple data transmission, characterized in that the first waveform detection unit is configured to selectively detect a second signal.

3. The voltage waveform converted by the differentiation circuit is such that the first signal and the second signal are converted according to characteristics of the capacitive component and the resistive component, 3. The low power consumption circuit for multiple data transmission according to claim 1, wherein the second signal is detected based on a peak voltage of the voltage waveform converted by the differentiation circuit.

4. The high current high level voltage output circuit includes a first MOS transistor directly connected to an output terminal of a power supply unit, 2. The low power consumption circuit for multi-data transmission according to claim 1, wherein the low current high level voltage output circuit includes a second MOS transistor connected to the output terminal of the power supply unit via a resistive component.

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