Surface-emitting semiconductor light-emitting device

Abstract

To provide a surface-emitting semiconductor light-emitting device with improved optical output characteristics.SOLUTION: A surface-emitting semiconductor light-emitting device comprises: a semiconductor substrate; a first semiconductor layer provided on the semiconductor substrate; an active layer provided on the first semiconductor layer; a photonic crystal layer provided on the active layer, including a plurality of convex parts arranged along a top face of the active layer; a second semiconductor layer provided on the photonic crystal layer; a first electrode provided on the second semiconductor layer; and a second electrode provided on a rear face opposite to the first semiconductor layer, of the semiconductor substrate. The second electrode includes: a plane contact part in surface contact with the rear face of the semiconductor substrate; and a fine-line contact part extended in a surface-emitting region on the rear face where light emitted from the active layer is radiated to the exterior from the semiconductor substrate. Arrangement of the fine-line contact part in the surface-emitting region is rotationally asymmetric.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The embodiment relates to a surface-emitting semiconductor light-emitting device. [Background technology]

[0002] There is a demand for improved light output characteristics in surface-emitting semiconductor light-emitting devices. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2018-93022 A Summary of the Invention [Problem to be solved by the invention]

[0004] The embodiments provide a surface-emitting semiconductor light-emitting device with improved light output characteristics. [Means for solving the problem]

[0005] A surface-emitting semiconductor light-emitting device according to an embodiment includes a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type provided on the semiconductor substrate, an active layer provided on the first semiconductor layer, a photonic crystal layer provided on the active layer and including a plurality of protrusions aligned along an upper surface of the active layer, a second semiconductor layer of the first conductivity type provided on the photonic crystal layer, a first electrode provided on the second semiconductor layer, and a second electrode provided on a rear surface of the semiconductor substrate opposite to the first semiconductor layer. The second electrode includes a planar contact portion in surface contact with the rear surface of the semiconductor substrate and a fine-wire contact portion extending into a surface-emitting region in the rear surface where light emitted from the active layer is emitted from the semiconductor substrate to the outside, and an arrangement of the fine-wire contact portion in the surface-emitting region is non-rotationally symmetrical. [Brief description of the drawings]

[0006] [Figure 1] 1 is a schematic cross-sectional view showing a surface-emitting semiconductor light-emitting device according to a first embodiment. [Diagram 2] 1 is a perspective view showing a schematic view of a surface-emitting semiconductor light-emitting device according to a first embodiment. [Diagram 3] 1 is a schematic cross-sectional view showing an active layer of a surface-emitting semiconductor light-emitting device according to a first embodiment. [Figure 4] 2 is a schematic plan view showing electrodes of the surface-emitting semiconductor light-emitting device according to the first embodiment. FIG. [Diagram 5] 2 is a schematic diagram showing output characteristics of the surface-emitting semiconductor light-emitting device according to the first embodiment. FIG. [Figure 6] FIG. 4 is a schematic plan view showing electrodes of a surface-emitting semiconductor light-emitting device according to a modified example of the first embodiment. [Figure 7] FIG. 11 is a schematic plan view showing electrodes of a surface-emitting semiconductor light-emitting device according to another modified example of the first embodiment. [Figure 8] FIG. 11 is a schematic plan view showing electrodes of a surface-emitting semiconductor light-emitting device according to still another modified example of the first embodiment. [Figure 9] FIG. 5 is a schematic cross-sectional view showing a surface-emitting semiconductor light-emitting device according to a second embodiment. [Figure 10] FIG. 11 is a perspective view showing a schematic view of a surface-emitting semiconductor light-emitting device according to a second embodiment. [Figure 11] FIG. 5 is a schematic plan view showing a surface-emitting semiconductor light-emitting device according to a second embodiment. [Figure 12] 10 is a schematic diagram showing output characteristics of the surface-emitting semiconductor light-emitting device according to the second embodiment. FIG. [Figure 13] 13 is a schematic diagram showing output characteristics of a surface-emitting semiconductor light-emitting device according to a modified example of the second embodiment. FIG. [Figure 14] 6 is a schematic diagram showing a diffractive lens of the surface-emitting semiconductor light-emitting device according to the second embodiment. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Hereinafter, embodiments will be described with reference to the drawings. The same parts in the drawings are denoted by the same reference numerals, and detailed descriptions thereof will be omitted as appropriate, and different parts will be described. Note that the drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio of the sizes between parts, etc. are not necessarily the same as those in reality. Also, even when representing the same part, the dimensions and ratios thereof may be represented differently in the drawings.

[0008] Furthermore, the arrangement and configuration of each part will be described using the X-axis, Y-axis, and Z-axis shown in each figure. The X-axis, Y-axis, and Z-axis are mutually orthogonal and represent the X-direction, Y-direction, and Z-direction, respectively. Also, there may be cases where the Z-direction is described as upward and the opposite direction as downward.

[0009] (First Embodiment) FIG. 1 is a schematic cross-sectional view showing a surface-emitting semiconductor light-emitting device 1 according to an embodiment. The semiconductor light-emitting device 1 is, for example, a surface-emitting QCL (Quantum Cascade Laser).

[0010] As shown in FIG. 1, the semiconductor light-emitting device 1 includes an n-type semiconductor substrate 10, an n-type first semiconductor layer 20, an active layer 30, a photonic crystal layer 40, an n-type second semiconductor layer 50, a first electrode 60, an insulating film 70, and a second electrode 80.

[0011] The semiconductor substrate 10 is, for example, an n-type InP substrate or an n-type GaAs substrate. When a GaAs substrate is used as the semiconductor substrate 10, a buffer layer 13 is provided between the semiconductor substrate 10 and the first semiconductor layer 20. The buffer layer 13 is, for example, an n-type InGaAs layer. Hereinafter, the first conductivity type will be described as n-type, but it is not limited thereto. Also, InGaAs is a semiconductor alloy represented by the composition formula In x Ga 1-x As(0 < x < 1).

[0012] The first semiconductor layer 20 is provided on the semiconductor substrate 10. The first semiconductor layer 20 is, for example, an n-type InP layer. The first semiconductor layer 20 contains, for example, a first conductivity type impurity at a lower concentration than the first conductivity type impurity of the semiconductor substrate 10.

[0013] The active layer 30 is provided on the first semiconductor layer 20. The active layer 30 has, for example, a quantum well structure that causes intersubband transition of carriers. The active layer 30 includes, for example, an n-type III-V compound semiconductor crystal doped with silicon, and emits light due to the subband transition of electrons.

[0014] The photonic crystal layer 40 is provided on the active layer 30. The photonic crystal layer 40 has a particular periodic structure PC and controls the propagation direction of light emitted from the active layer 30. The photonic crystal layer 40 includes, for example, a plurality of protrusions aligned along the upper surface of the active layer 30. The photonic crystal layer 40 includes, for example, InGaAs.

[0015] The second semiconductor layer 50 is provided on the photonic crystal layer 40. The second semiconductor layer 50 is, for example, an n-type InP layer. The second semiconductor layer 50 contains, for example, a first conductivity type impurity at a lower concentration than the first conductivity type impurity of the semiconductor substrate 10.

[0016] The first electrode 60 is provided on the second semiconductor layer 50. The first electrode 60 is, for example, ohmic-connected to the second semiconductor layer 50. The first electrode 60 also contains a material that reflects light emitted from the active layer 30. The first electrode 60 reflects light from the active layer 30 toward the first electrode 60, and propagates the light in a direction toward the semiconductor substrate 10. The first electrode 60 contains, for example, gold (Au).

[0017] 1, the semiconductor light emitting device 1 includes a light emitting region LER having a mesa structure. The light emitting region LER includes a part of the first semiconductor layer 20, an active layer 30, a photonic crystal layer 40, and a second semiconductor layer 50. The insulating film 70 is provided so as to cover the side surface of the mesa structure. The insulating film 70 is provided between the first electrode 60 and the light emitting region LER. The insulating film 70 is, for example, a silicon oxide film.

[0018] The first electrode 60 is formed so as to cover the side surface of the mesa structure and a part of the first semiconductor layer 20 via the insulating film 70. The first electrode 60 is provided so as to reflect also light that passes through the side surface of the mesa structure toward the outside, and return the light to the inside of the light emitting region LER.

[0019] The second electrode 80 is provided on the rear surface of the semiconductor substrate 10 opposite to the active layer 30. The second electrode 80 has a structure in which, for example, a titanium (Ti) layer and a gold (Au) layer are laminated. The Ti layer is provided between the semiconductor substrate 10 and the Au layer.

[0020] In the semiconductor light emitting device 1, carriers (electrons) are injected into the active layer 30 by passing a current between the first electrode 60 and the second electrode 80. The active layer 30 generates QCL light by stimulated emission of light generated by energy relaxation of the carriers in the quantum wells and light guided by the photonic crystal layer 40. The QCL light is emitted to the outside from the rear surface of the semiconductor substrate 10. The wavelength of the QCL light is, for example, 4.5 micrometers (μm).

[0021] 2(a) and (b) are perspective views showing a schematic view of the semiconductor light emitting device 1 according to the first embodiment. Fig. 2(a) is a perspective view showing the front surface side of the semiconductor light emitting device 1. Fig. 2(b) is a perspective view showing the back surface side of the semiconductor light emitting device 1.

[0022] 2(a), the light emitting region LER is provided on the front surface side of the semiconductor substrate 10. The light emitting region LER is, for example, a rectangular parallelepiped having a width of 500 μm. The first electrode 60 is provided so as to cover the light emitting region LER and the surface of the semiconductor substrate 10 around it.

[0023] As shown in FIG. 2(b), the QCL light is radiated to the outside from the back surface of the semiconductor substrate 10. The second electrode 80 has, for example, a surface contact portion 80sc and a fine wire contact portion 80f. The surface contact portion 80sc is provided so as to surround the surface light emission region SER in the back surface of the semiconductor substrate 10. The fine wire contact portion 80f extends from the surface contact portion 80sc into the surface light emission region SER along the back surface of the semiconductor substrate 10.

[0024] The semiconductor substrate 10 transmits the QCL light, but the light absorption is not zero. Therefore, by reducing the thickness of the semiconductor substrate 10 in the Z direction, the output of the QCL light can be improved. However, when the semiconductor substrate 10 is made thinner, for example, the component of the current injected from the second electrode 80 into the active layer 30 that flows along the back surface of the semiconductor substrate 10 becomes larger than the component that flows from the semiconductor substrate 10 toward the active layer 30 (see FIG. 1). For this reason, more current is injected into the outer peripheral portion of the active layer 30 than the center. As a result, the electron injection into the active layer 30 becomes non-uniform, and the light emission efficiency decreases.

[0025] In the semiconductor light emitting device 1 according to the embodiment, by providing the fine wire contact portion 80f extending into the surface light emission region SER, the electron injection into the active layer 30 is made uniform.

[0026] FIG. 3 is a schematic cross-sectional view showing the active layer 30 of the semiconductor light emitting device 1 according to the first embodiment. The active layer 30 has, for example, a quantum well structure in which quantum well layers 33 and barrier layers 35 are alternately stacked in a direction orthogonal to the upper surface of the first semiconductor layer 20, for example, the Z direction. Further, the active layer 30 includes an electron injection region 30a and a light emission region 30b. The electron injection region 30a and the light emission region 30b are alternately arranged in the Z direction. The quantum well layer 33 contains, for example, InGaAs, and the barrier layer 35 contains, for example, AlInAs. Here, AlInAs is a semiconductor mixed crystal represented by the composition formula Al y In 1-y As(0 < y < 1).

[0027] 3, two pairs of the electron injection region 30a and the light emitting region 30b are shown, but the embodiment is not limited thereto. The number of pairs of the electron injection region 30a and the light emitting region 30b provided in the active layer 30 is arbitrary, and the active layer 30 may include, for example, 10 or more pairs.

[0028] Fig. 4 is a schematic plan view showing the second electrode 80 of the semiconductor light emitting device 1 according to the first embodiment. Fig. 4 is a plan view showing the back surface side of the semiconductor substrate 10.

[0029] The second electrode 80 includes a surface contact portion 80sc, a fine line contact portion 80fv, and a fine line contact portion 80fh. The surface contact portion 80sc is provided to surround the surface emission region SER. The fine line contact portions 80fv and 80fh each extend from the surface contact portion 80sc to the surface emission region SER.

[0030] The outer shape of the second electrode 80 is, for example, a square with a side length Le of 2000 μm. The surface emission region SER is, for example, a circle with a diameter Dser of, for example, 1000 μm. The thin-line contact portions 80fv and 80fh have a width of, for example, 10 to 20 μm. The thin-line contact portions 80fv and 80fh are provided so that a decrease in the output of the QCL light is negligible.

[0031] The thin line contact portion 80fv extends in a direction perpendicular to the thin line contact portion 80fh. The thin line contact portion 80fh extends, for example, in the X direction. The thin line contact portion 80fv extends, for example, in the Y direction. The arrangement of the thin line contact portions 80fv and 80fh in the surface emission region SER is not symmetrical, and is neither line symmetrical nor point symmetrical. In addition, the thin line contact portions 80fv and 80fh are arranged so as to be non-rotationally symmetrical.

[0032] Each of the thin-line contact portions 80fv and 80fh has one end connected to the surface contact portion 80sc and the other end located within the surface emission region SER. A plurality of thin-line contact portions 80fv and a plurality of thin-line contact portions 80fh may be provided within the surface emission region SER. The thin-line contact portions 80fv and 80fh are provided, for example, such that the lengths from one end to the other end are different from each other.

[0033] 5(a) to 5(c) are schematic diagrams showing output characteristics of the semiconductor light emitting device 1 according to the first embodiment. Fig. 5(a) shows the second electrode 81 and the far field pattern (FFP) of the QCL light emitted from the surface emission region SER. Figs. 5(b) and 5(c) show the second electrode 82 and the second electrode 80 and their respective FFPs.

[0034] In the example shown in FIG. 5(a), the second electrode 81 does not have a fine-line contact portion. The FFP formed by the second electrode 81 is concentric and has no pattern disturbance. For example, even if the current injection into the active layer 30 becomes non-uniform due to the absence of a fine-line contact portion, this does not cause disturbance in the FFP, but the optical output decreases. Therefore, it is desirable to suppress the decrease in optical output while suppressing the disturbance in the FFP by providing a fine-line contact portion.

[0035] The second electrode 82 shown in FIG. 5(b) includes two thin wire contact portions 82fh and two thin wire contact portions 82fv. The thin wire contact portion 82fh extends in the X direction. The thin wire contact portion 82fv extends in the Y direction. The length of the thin wire contact portion 82fh in the X direction is the same as the length of the thin wire contact portion 82fv in the Y direction. The two thin wire contact portions 82fh are arranged such that their ends face each other in the X direction. The two thin wire contact portions 82fv are arranged such that their ends face each other in the Y direction.

[0036] 5(b), the thin-wire contact portions 82fv and 82fh are arranged to have 90-degree rotational symmetry. Correspondingly, the FFP formed by the second electrode 82 has a clear intensity peak HIP at the positions where the thin-wire contact portions 82fv and 82fh are provided. That is, the provision of the thin-wire contact portions 82fv and 82fh causes a disturbance in the FFP.

[0037] 5(c), the thin wire contact portions 80fv and 80fh are arranged so as to be rotationally asymmetric. Therefore, even if some disturbance occurs in the FFP due to the second electrode 80, a clear intensity peak HIP does not occur. In other words, by arranging the thin wire contact portions 80fh and 80fv so as not to be rotationally asymmetric, the disturbance of the FFP can be suppressed.

[0038] 6 is a schematic plan view showing a second electrode 83 of a semiconductor light emitting device 1 according to a modified example of the first embodiment. The second electrode 83 includes a thin line contact portion 83fhe in addition to thin line contact portions 83fh and 83fv arranged to have 90-degree rotational symmetry. The thin line contact portion 83fhe is provided, for example, at a position spaced apart in the Y direction from one of the two thin line contact portions 83fh.

[0039] In this example, the arrangement of the thin wire contact portions 83fh, 83fv, and 83fhe becomes rotationally asymmetric due to the addition of the thin wire contact portion 83fhe. This makes it possible to suppress disturbance of the FFP due to the second electrode 83.

[0040] 7(a) and (b) are schematic plan views showing a second electrode 84 and a second electrode 85 of a semiconductor light emitting device 1 according to another modified example of the first embodiment.

[0041] 7(a), the second electrode 84 includes a plane contact portion 84sc, and thin wire contact portions 84fh, 84fv, and 84fs. The thin wire contact portions 84fh, 84fv, and 84fs are arranged non-rotationally symmetrically and are provided to be connected to the plane contact portion 84sc.

[0042] The thin contact portion 84fh extends in the X direction. The thin contact portion 84fv extends in the Y direction. The thin contact portion 84fs extends in a direction intersecting the X direction and the Y direction. The thin contact portions 84fh, 84fv, and 84fs have, for example, different lengths from one another.

[0043] 7(b), the second electrode 85 includes a plane contact portion 85sc and thin wire contact portions 85fh, 85fv, and 85fs. The thin wire contact portions 85fh, 85fv, and 85fs are arranged non-rotationally symmetrically and are provided to be connected to the plane contact portion 85sc.

[0044] The thin wire contact portion 85fh extends in the X direction. The thin wire contact portion 85fv extends in the Y direction. The thin wire contact portion 85fs extends in a direction intersecting the X direction and the Y direction. Furthermore, one thin wire contact portion 85fs includes a branch portion 85fb. In this manner, each thin wire contact portion may include a branched portion.

[0045] 8(a) to 8(c) are schematic plan views showing second electrodes 86 to 88 of a semiconductor light emitting device 1 according to yet another modified example of the first embodiment.

[0046] 8(a), the second electrode 86 includes a surface contact portion 86sc, and thin line contact portions 86fh, 86fv, 86fs, and 86fc. The thin line contact portions 86fh, 86fv, 86fs, and 86fc are arranged non-rotationally symmetrically and are provided to be connected to the surface contact portion 86sc.

[0047] The thin line contact portion 86fh extends in the X direction. The thin line contact portion 86fv extends in the Y direction. The thin line contact portion 86fs extends in a direction intersecting the X direction and the Y direction. The thin line contact portion 86fs includes a branch portion 86fb. The thin line contact portion 86fc has a curved shape that follows the rear surface of the semiconductor substrate 10. In this way, the shape of each thin line contact portion is not limited to a straight line and may include a curved shape.

[0048] 8(b), the second electrode 87 includes a surface contact portion 87sc and thin-line contact portions 87fh, 87fv, 87fs, and 87fc. The thin-line contact portions 87fh, 87fv, 87fs, and 87fc are arranged non-rotationally symmetrically and are provided so as to be electrically connected to the surface contact portion 87sc.

[0049] As shown in FIG. 8(b), the thin-wire contact portion 87fc is combined with the thin-wire contact portion 87fh and the thin-wire contact portion 87fv. The thin-wire contact portion 87fh extends in the X direction from the surface contact portion 87sc. One end of the thin-wire contact portion 87fh is connected to the surface contact portion 87sc. Meanwhile, the other end of the thin-wire contact portion 87fh is connected to the thin-wire contact portion 87fc. The thin-wire contact portion 87fv branches off from the thin-wire contact portion 87fc and extends in the Y direction. The thin-wire contact portion 87fs extends in a direction intersecting the X direction and the Y direction. In this manner, each thin-wire contact portion may be provided to have a shape that combines straight lines and curved lines.

[0050] 8(c), the second electrode 88 includes a surface contact portion 88sc and a thin-line contact portion 88fc. The thin-line contact portion 88fc is provided so as to be connected to the surface contact portion 88sc, and has, for example, a spiral shape along the rear surface of the semiconductor substrate 10. The thin-line contact portion 88fc has, for example, a shape combining a plurality of curves having different curvatures. The thin-line contact portion 88fc is provided in a non-rotationally symmetric manner in the surface emission region SER.

[0051] In this manner, the second electrodes 80, 82 to 88 of the surface-emitting semiconductor light-emitting device 1 have at least one thin-wire contact portion provided in the surface-emitting region SER. This can improve the uniformity of electron injection in the active layer 30. Furthermore, by making the arrangement of the thin-wire contact portion in the surface-emitting region SER rotationally asymmetric, it is possible to suppress disturbance of the FFP of the QCL light.

[0052] The thin-line contact portions shown here are not specific to each embodiment, and may be implemented in combination with each other.

[0053] Second embodiment Figures 9(a) and (b) are schematic cross-sectional views showing a surface-emitting semiconductor light-emitting device 2 according to a second embodiment. Figure 9(b) is a cross-sectional view taken along line AA shown in Figure 9(a). The semiconductor light-emitting device 2 is, for example, a ridge waveguide type QCL.

[0054] As shown in FIG. 9(a), the semiconductor light emitting device 2 comprises a semiconductor substrate 110 of a first conductivity type, a first semiconductor layer 120 of the first conductivity type, an active layer 130, a photonic crystal layer 140, a second semiconductor layer 150 of the first conductivity type, a first electrode 160, a reflective layer 165, and a second electrode 180.

[0055] The semiconductor substrate 110 is, for example, an n-type InP substrate. The first semiconductor layer 120 is provided on the semiconductor substrate 110. The first semiconductor layer 120 is, for example, an n-type InP layer. The first semiconductor layer 120 contains a first conductivity type impurity at a concentration lower than the concentration of the first conductivity type impurity in the semiconductor substrate 110.

[0056] The active layer 130 is provided on the first semiconductor layer 120. The active layer 130 has, for example, a quantum well structure that generates intersubband transition of carriers (see FIG. 3). The active layer 130 includes, for example, an n-type III-V compound semiconductor crystal doped with silicon, and emits light due to the subband transition of electrons.

[0057] The second semiconductor layer 150 is provided on the active layer 130. The second semiconductor layer 150 is, for example, an n-type InP layer. The second semiconductor layer 150 contains a first conductivity type impurity at a concentration lower than the concentration of the first conductivity type impurity in the semiconductor substrate 110.

[0058] Photonic crystal layer 140 is provided between active layer 130 and second semiconductor layer 150 at output end LOE of semiconductor light emitting device 2. Photonic crystal layer 140 has a particular periodic structure (see FIG. 10 ) and controls the propagation direction of light emitted from active layer 130. Photonic crystal layer 140 includes, for example, InGaAs.

[0059] The first electrode 160 is provided on the second semiconductor layer 150. The first electrode 160 is, for example, ohmic-connected to the second semiconductor layer 150. The first electrode 160 is, for example, a metal layer containing gold (Au).

[0060] Reflective layer 165 is provided on second semiconductor layer 150 at output end LOE of semiconductor light emitting device 2. Reflective layer 165 is provided so as to cover photonic crystal layer 140. Reflective layer 165 is provided on second semiconductor layer 150 and spaced apart from first electrode 160. Reflective layer 165 is, for example, a metal layer containing gold (Au).

[0061] The second electrode 180 is provided on the rear surface of the semiconductor substrate 110 opposite to the active layer 130. The semiconductor substrate 110 is located between the active layer 130 and the second electrode 180. The second electrode 180 is, for example, a metal layer containing gold (Au) and titanium (Ti). The second electrode 180 is, for example, ohmic-connected to the semiconductor substrate 110.

[0062] The semiconductor light emitting device 2 has a surface emitting region SER in the rear surface of the semiconductor substrate 110. The surface emitting region SER is provided at the output end LOE and faces the reflecting layer 165. The photonic crystal layer 140 is located between the reflecting layer 165 and the surface emitting region SER.

[0063] The semiconductor light emitting device 2 includes, for example, a ridge waveguide region RWR and an output end LOE. The ridge waveguide region RWR has a layered structure including a semiconductor substrate 110, a first semiconductor layer 120, an active layer 130, and a second semiconductor layer 150. The output end LOE is aligned with the ridge waveguide region RWR in the X direction, and has a layered structure including the semiconductor substrate 110, the first semiconductor layer 120, the active layer 130, the photonic crystal layer 140, and the second semiconductor layer 150.

[0064] 9(b), the semiconductor light emitting device 2 has a ridge waveguide structure provided on the first semiconductor layer 120. The ridge waveguide RW includes a part of the first semiconductor layer 120, an active layer 130, and a second semiconductor layer 150. The ridge waveguide RW extends in the X direction on the first semiconductor layer 120.

[0065] The first electrode 160 is provided so as to cover the surfaces of the ridge waveguide RW and the first semiconductor layer 120. The first electrode 160 is electrically connected to the second semiconductor layer 150 on the upper surface of the ridge waveguide RW.

[0066] The semiconductor light emitting device 2 further includes an insulating film 170. The insulating film 170 is provided so as to cover the side surfaces of the ridge waveguide RW and the surface of the first semiconductor layer 120. The insulating film 170 is provided between the first electrode 160 and the ridge waveguide RW, and electrically insulates the first semiconductor layer 120 and the active layer 130 from the first electrode 160. The insulating film 170 is, for example, a silicon oxide film.

[0067] FIG. 10 is a perspective view illustrating a schematic view of an output end LOE of a semiconductor light emitting device 2 according to the second embodiment.

[0068] 10, the semiconductor light emitting device 2 further includes a plurality of fine line contact portions 180f provided in the surface emission region SER. The fine line contact portions 180f each extend in the same direction as the extension direction of the ridge waveguide RW, for example, in the X direction. The fine line contact portions 180f are also arranged in the Y direction along the surface emission region SER (i.e., the rear surface of the semiconductor substrate 110). The fine line contact portions 180f include, for example, the same material as the second electrode 180.

[0069] In the semiconductor light emitting device 2, the QCL light propagates along the ridge waveguide RW in its extension direction, and enters the output end LOE. In the output end LOE, the propagation direction of the QCL light is changed by the photonic crystal layer 140.

[0070] Photonic crystal layer 140 functions as a two-dimensional diffraction grating due to the refractive index difference of the periodic structure, and controls the emission angle of the QCL light. Photonic crystal layer 140 is provided so that the QCL light is emitted in a direction approximately perpendicular to the boundary between active layer 130 and first semiconductor layer 120. "Approximately perpendicular" means, for example, that the angle of the propagation direction of the QCL light with respect to the boundary between active layer 130 and first semiconductor layer 120 is 81° or more and 99° or less.

[0071] The propagation direction is changed in photonic crystal layer 140, and the QCL light propagating in a direction from active layer 130 toward the rear surface of semiconductor substrate 110 is emitted to the outside from surface-emitting region SER. On the other hand, the QCL light propagating in a direction from active layer 130 toward reflective layer 165 is reflected by reflective layer 165 and propagates in a direction toward the rear surface of semiconductor substrate 110. As a result, the QCL light incident on output end LOE from ridge waveguide region RWR is emitted to the outside from surface-emitting region SER.

[0072] Furthermore, the multiple thin-wire contact portions 180f provided in the surface-emitting region SER function as a one-dimensional diffractive lens to control the propagation direction of the QCL light emitted from the surface-emitting region SER.

[0073] 11(a) to (c) are schematic plan views showing a semiconductor light emitting device 2 according to a second embodiment. Fig. 11(a) is a plan view showing the upper surface of the semiconductor light emitting device 2. Figs. 11(b) and (c) are plan views showing the rear surface of a semiconductor substrate 110.

[0074] 11(a), the first electrode 160 is provided in the ridge waveguide region RWR and covers the ridge waveguide RW. The reflective layer 165 is provided at the output end LOE and spaced apart from the first electrode 160. The first electrode 160 and the reflective layer 165 are aligned in the extension direction of the ridge waveguide RW, for example, in the X direction.

[0075] 11(b), the second electrode 180 is provided on the back surface of the semiconductor substrate 110 in the ridge waveguide region RWR. The thin line contact portion 180f is provided, for example, to extend from the second electrode 180 to the surface emission region SER. One end of the thin line contact portion 180f is connected to the second electrode 180, and the other end is located within the surface emission region SER.

[0076] As shown in FIG. 11(c), the thin line contact portion 180f may be provided apart from the second electrode 180 within the surface emission region SER.

[0077] 12(a) and (b) are schematic diagrams showing output characteristics of the semiconductor light emitting device 2 according to the second embodiment. Fig. 12(a) is a plan view showing the arrangement of the thin-line contact portion 180f. Fig. 12(b) is a cross-sectional view showing the propagation path of the QCL light.

[0078] As shown in FIG. 12(a), the multiple fine line contact portions 180f are provided such that the intervals between adjacent fine line contact portions 180f in the Y direction become narrower from the center of the arrangement in both the Y direction and the -Y direction.

[0079] 12(b), the QCL light whose propagation direction has been changed by photonic crystal layer 140 propagates toward surface-emitting region SER and passes between thin-wire contact portions 180f. The QCL light is diffracted by thin-wire contact portions 180f and is focused, for example, at a position fc that is away from surface-emitting region SER (i.e., the back surface of semiconductor substrate 110) in the -Z direction.

[0080] 13(a) and (b) are schematic diagrams showing output characteristics of a semiconductor light emitting device 2 according to a modified example of the second embodiment. Fig. 13(a) is a plan view showing the arrangement of thin wire contact portions 180f. Fig. 13(b) is a cross-sectional view showing the propagation path of QCL light.

[0081] 13(a), the multiple fine line contact portions 180f are arranged such that the interval between adjacent fine line contact portions 180f in the Y direction narrows from the center of the arrangement in the Y direction and in the -Y direction. In this example, the interval between adjacent fine line contact portions 180f is wider than that in the arrangement shown in FIG.

[0082] 13(b), the QCL light propagates toward the surface emission region SER and passes between the thin-line contact portions 180f. The QCL light diffracted by the thin-line contact portions 180f becomes parallel light and is emitted to the outside.

[0083] 14 is a schematic diagram showing a diffractive lens of the semiconductor light emitting device 2 according to the second embodiment. For example, when the optical path lengths from an object point through the diffractive lens (thin line contact portion 180f) to an image point differ from each other by an integer multiple of the wavelength, the light is focused on the image point. Also, when the optical path lengths are the same, the light is focused on the image point.

[0084] For example, if an object point is located infinitely far from the thin-wire contact portion 180f in the Z direction, the light incident on the thin-wire contact portion 180f becomes parallel light, and the wavefront is parallel to the direction in which the thin-wire contact portions 180f are arranged (Y direction). At this time, when the distance from the center of the arrangement of the thin-wire contact portions 180f in the Y direction to the outer edge of each thin-wire contact portion 180f is equal to the square root of nfλ, the light is focused to an image point. Here, "n" is an integer, and "f" is the distance from the center of the arrangement of the thin-wire contact portions 180f to the image point. "λ" is the wavelength of light. The line width of each thin wire is set so as not to collide with neighboring thin wires. The light-focusing efficiency can be optimized by adjusting the line width.

[0085] In the above example, the arrangement of the fine contact portions 180f is described as being line symmetric, but the embodiment is not limited to this. For example, the fine contact portions 180f may be arranged as not being rotationally symmetric.

[0086] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims. [Explanation of symbols]

[0087] REFERENCE SIGNS LIST 1, 2... surface-emitting semiconductor light-emitting device, 10, 110... semiconductor substrate, 13... buffer layer, 20, 120... first semiconductor layer, 30, 130... active layer, 30a... electron injection region, 30b... light-emitting region, 33... quantum well layer, 35... barrier layer, 40, 140... photonic crystal layer, 50, 150... second semiconductor layer, 60, 160... first electrode, 70, 170... insulating film, 80-88, 180... second electrode, 80sc, 84sc, 85sc, 86sc, 87sc, 88sc... surface contact portion, 80f, 80fh, 80fv, 82fh, 82fv, 83fh, 83fhe, 84fh, 84fs, 84fv, 85fh, 85fs, 85fv, 86fc, 86fh, 86fs, 86fv, 87fc, 87fh, 87fs, 87fv, 88fc, 180f...thin line contact section, 85fb, 86fb...branching section, 165...reflective layer, HIP...intensity peak, LER...light emitting region, LOE...output end, PC...periodic structure, RW...ridge waveguide, RWR...ridge waveguide region, SER...surface emitting region

Claims

1. a semiconductor substrate of a first conductivity type; a first semiconductor layer of the first conductivity type provided on the semiconductor substrate; an active layer provided on the first semiconductor layer; a photonic crystal layer provided on the active layer and including a plurality of protrusions aligned along an upper surface of the active layer; a second semiconductor layer of the first conductivity type provided on the photonic crystal layer; a first electrode provided on the second semiconductor layer; a second electrode provided on a back surface of the semiconductor substrate opposite to the first semiconductor layer, the second electrode including a planar contact portion in surface contact with the back surface and a thin-wire contact portion extending to a surface emission region in the back surface where light emitted from the active layer is emitted to the outside from the semiconductor substrate, the thin-wire contact portion being disposed in the surface emission region in a manner that is non-rotationally symmetrical, and is neither line symmetrical nor point symmetrical; A surface-emitting semiconductor light-emitting device comprising:

2. 2. The surface-emitting semiconductor light-emitting device according to claim 1, wherein the planar contact portion surrounds the surface-emitting region.

3. 3. The surface-emitting semiconductor light-emitting device according to claim 1, wherein the thin-wire contact portion has one end connected to the planar contact portion and the other end located within the surface-emitting region.

4. 4. The surface-emitting semiconductor light-emitting device according to claim 3, wherein the second electrode includes a plurality of the thin-line contact portions each having a different length from the one end to the other end.

5. The surface-emitting semiconductor light-emitting device according to any one of claims 1 to 4, wherein the second electrode includes a first thin line contact portion extending in a first direction along the back surface of the semiconductor substrate, and a second thin line contact portion extending in a second direction perpendicular to the first direction along the back surface of the semiconductor substrate.

6. 6. The surface-emitting semiconductor light-emitting device according to claim 1, wherein the thin-line contact portion includes a portion branched in two directions.

7. 7. The surface-emitting semiconductor light-emitting device according to claim 1, wherein the thin-line contact portion extends linearly.

8. 8. The surface-emitting semiconductor light-emitting device according to claim 1, wherein the thin-line contact portion includes a portion that extends in a curved shape along the rear surface of the semiconductor substrate.

9. the active layer has a ridge structure extending in a direction along the back surface of the semiconductor substrate, 2. The surface-emitting semiconductor light-emitting device according to claim 1, wherein the thin-line contact portion of the second electrode extends in the extending direction of the ridge structure.

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