Single package data storage device

Abstract

To provide a data storage device that offers superior read and / or write speed.SOLUTION: A data storage device 200 comprises a controller 210, one or more memory devices 205, and one or more passive components 250 encapsulated in a single package. The controller, memory devices and passive components are directly mounted on a printed circuit board (PCB) 220 of the data storage device. A position of the controller with respect to the one or more memory devices enables the data storage device to use shorter signal traces.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] (CROSS REFERENCE TO RELATED APPLICATIONS) This application claims priority to U.S. Provisional Patent Application No. 63 / 505,639, entitled "SINGLE PACKAGE DATA STORAGE DEVICE," filed June 1, 2023, the entire disclosure of which is incorporated herein by reference in its entirety. [Background technology]

[0002] More and more electronic devices use various data storage devices to process and store data. In particular, solid-state drives (SSDs) are becoming increasingly popular. For example, compared with traditional hard disk drives (HDDs), SDDs have better read and write speeds, are more reliable, and are more compact.

[0003] However, as the demand for SDDs increases, so does the demand for increased storage capacity and faster speeds. As larger and faster SSDs are produced, they become more complex. The more complex the SSD, the more expensive the manufacturing process becomes, both in terms of time and cost.

[0004] For example, a larger capacity SSD typically requires a larger capacity memory device. To accommodate the larger capacity memory device, the printed circuit board (PCB) of the SSD usually needs to have additional layers. As more layers are added to the PCB, additional vias are also added to the PCB, and the trace routing becomes more complex. In addition, each component of the SSD (e.g., the controller and each of the memory devices) may need to be tested separately.

[0005] It would therefore be beneficial for data storage devices such as SSDs to have larger capacities and higher speeds without increasing manufacturing complexity. Summary of the Invention

[0006] This application describes a data storage device having a controller, one or more memory devices, and one or more passive components integrated within a single package. The controller, one or more memory devices, and one or more passive components are mounted directly on the surface of a printed circuit board (PCB) of the data storage device. The one or more memory devices are communicatively coupled to the controller using signal traces associated with the PCB. Similarly, the controller is communicatively coupled to a connector or interface of the PCB using additional signal traces associated with the PCB. A molding compound is used to encapsulate the controller, one or more memory devices, and one or more passive components.

[0007] Because the controller and one or more memory devices are mounted directly on the same PCB surface, the need for a ball grid array (BGA) and solder balls is eliminated. Additionally, the layout of the controller relative to the one or more memory devices improves trace routing between the controller and the one or more memory devices. For example, the layout of the controller relative to the one or more memory devices shortens signal / communication paths compared to current solutions. The shorter signal / communication paths translate into improved read and / or write speeds of the data storage devices.

[0008] Accordingly, this application describes a data storage device that includes a printed circuit board (PCB). A controller is mounted directly on a surface of the PCB. A memory device is also mounted directly on the surface of the PCB and communicatively coupled to signal traces associated with the PCB. The signal traces establish a communication path between the memory device and the controller. A cover encapsulates the controller and the memory device.

[0009] A method of assembling a data storage device is also described. In one example, the method includes coupling a controller to a surface of a printed circuit board (PCB). One or more passive components are also coupled to the surface of the PCB. A reflow soldering process is performed to secure the controller and the one or more passive components to the surface of the PCB. A memory device is provided on the surface of the PCB. The memory device is electrically coupled to signal traces associated with the PCB. A single cover is formed around the controller, the one or more passive components, and the memory device.

[0010] The present application also describes a data storage device. In one example, the data storage device includes a printed circuit board (PCB). A first storage means mounted directly on a surface of the PCB. The first storage means is communicatively coupled to a first signal means associated with the PCB. A second storage means is also mounted directly on a surface of the PCB. The second storage means is communicatively coupled to a second signal means associated with the PCB. A controller means is mounted directly on a surface of the PCB between the first storage means and the second storage means. The controller means is communicatively coupled to the first storage means using the first signal means and is also communicatively coupled to the second storage means using the second signal means. A cover means encloses the first storage means, the second storage means and the controller means.

[0011] This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. [Brief description of the drawings]

[0012] Non-limiting and non-exhaustive examples are described with reference to the following figures. [Figure 1] 1 illustrates an existing data storage device according to an example. [Diagram 2] 1 illustrates a data storage device having a memory device and a controller integrated in a single package, according to an example. [Figure 3A] 1 illustrates a method or process for manufacturing a data storage device according to an example. [Figure 3B] 1 illustrates a method or process for manufacturing a data storage device according to an example. [Figure 3C] 1 illustrates a method or process for manufacturing a data storage device according to an example. [Figure 3D] 1 illustrates a method or process for manufacturing a data storage device according to an example. [Figure 3E] 1 illustrates a method or process for manufacturing a data storage device according to an example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] In the following detailed description, reference is made to the accompanying drawings which form a part hereof, and in which specific embodiments or examples are shown by way of illustration. These aspects may be combined, other aspects may be utilized, and structural changes may be made without departing from the present disclosure. Therefore, the following detailed description is not to be taken in a limiting sense, and the scope of the present disclosure is defined by the appended claims and their equivalents.

[0014] This application describes a data storage device in which a controller, one or more memory devices, and one or more passive components are enclosed within a single package. Unlike current data storage devices in which the controller and memory devices are packaged separately and coupled to the data storage device's printed circuit board (PCB) using a ball grid array (BGA), the controller, one or more memory devices, and one or more passive components of the data storage device of the present disclosure are mounted directly to the PCB.

[0015] Additionally, the layout of the controller relative to the one or more memory devices improves trace routing between the controller and the one or more memory devices as compared to current data storage devices. For example, the layout of the controller relative to the one or more memory devices shortens signal / communication paths as compared to current solutions. Shorter signal / communication paths lead to improved read and / or write speeds of the data storage device.

[0016] In addition to the advantages listed above, a shorter signal / communication path may also provide additional technical advantages, including, but not limited to, reduced resistance, better signal transmission between the controller and the memory device, and / or reduced overall operating temperature of the data storage device.

[0017] These advantages, along with other examples, are shown and described in more detail with respect to Figures 1-3E.

[0018] 1 illustrates an existing data storage device 100 according to an example. The data storage device 100 may be a solid-state drive (SSD) or an enterprise solid-state drive (eSSD). In the example illustrated in FIG. 1, the data storage device 100 includes a memory device package 105 that is separate from a controller package 110.

[0019] The memory device package 105 includes one or more NAND die stacks 120 mounted to a substrate 125. Bond wires 130 are used to communicatively couple the NAND die stacks 120 to signal traces 135 provided in the substrate 125. The one or more NAND die stacks 120 and the bond wires 130 may be encapsulated by a cover 140. In one example, the cover 140 is a molding compound or other such material.

[0020] The memory device package 105 is mounted to a printed circuit board (PCB) 145 of the data storage device 100. In the illustrated example, the memory device package 105 is mounted to the PCB 145 using solder balls that are part of or otherwise form a ball grid array (BGA) 150 of the memory device package 105. One or more of the solder balls of the BGA 150 of the memory device package 105 are communicatively coupled to a first trace 155 (or a first set of traces) provided in the PCB 145.

[0021] The controller device package 110 includes a controller 160. The controller 160 is mounted to a substrate 165 of the controller device package 110 using one or more bump pads and / or copper pillars 170. The one or more bump pads and / or copper pillars 170 are communicatively coupled to respective signal traces 175 in the substrate 165 of the controller device package 110. The controller 160 and the one or more bump pads and / or copper pillars 170 are encapsulated by a cover 180. In one example, the cover 180 is a molding compound or other such material.

[0022] The controller device package 110 is mounted to the PCB 145 of the data storage device 100 using solder balls that are part of or otherwise form a BGA 185 associated with the controller device package 110. One or more of the solder balls are communicatively coupled to second traces 190 (or a second set of traces) provided in the PCB 145.

[0023] For example, a first set of solder balls of the BGA 185 associated with the controller device package 110 are communicatively coupled to the first traces 155 (or the first set of traces). Thus, the first traces 155 are used to communicatively couple one or more NAND die stacks 120 of the memory device package 105 to the controller 160 of the controller package 110.

[0024] 1 , the NAND die stack 120 is coupled (via bond wires 130) to signal traces 135 disposed in a substrate 125 of the memory device package 105. The signal traces 135 are electrically coupled to one or more solder balls of a BGA 150 associated with the memory device package 105. The one or more solder balls of the BGA 150 associated with the memory device package 105 are also communicatively coupled to a first signal trace 155 (or a first set of signal traces) disposed in a PCB 145 of the data storage device 100.

[0025] The first trace 155 extends through the PCB 145 of the data storage device 100 and is communicatively coupled to one or more solder balls of the BGA 185 associated with the controller device package 110. As previously indicated, the solder balls of the BGA 185 associated with the controller device package 110 are communicatively coupled to signal traces 175 in the substrate 165 of the controller device package 110. The signal traces 175 are also communicatively coupled to the controller 160 of the controller device package 110.

[0026] A second set of solder balls of the BGA 185 associated with the controller device package 110 are communicatively coupled to a second trace 190 (or a second set of traces) associated with the PCB 145. In this example, the second traces 190 are used to couple the controller to an interface (e.g., a connector) of the data storage device 100.

[0027] One or more passive components 195 (e.g., capacitors, resistors) may also be mounted on the surface of the PCB 145 of the data storage device 100. As shown, the one or more passive components 195 are not included within the memory device package 105 or the controller package 110.

[0028] 1 requires a PCB 145 having multiple layers. Some layers are required because the memory device package 105 is separated from the controller package 110. For example, additional layers, vias, and traces are required because the memory device package 105 and the controller package 110 are associated with different BGAs. As additional layers, traces, and vias are added, trace routing becomes more difficult and complex.

[0029] Another drawback of the data storage device 100 is that the memory device package 105 is typically tested separately from the controller device package 110. The separate testing process may delay or slow the manufacturing of the data storage device 100.

[0030] The use of solder balls and / or BGAs is another drawback of data storage device 100. For example, whenever solder balls are used, there is a risk that air pockets (e.g., solder voids) may form within the solder balls during the reflow soldering process. Solder voids may reduce the reliability of the connections between the various components and adversely affect the performance of data storage device 100.

[0031] Another drawback of data storage device 100 is the overall length of the traces in PCB 145. As the length of the traces increases, resistance increases, signal transmission may degrade, and the operating temperature of the data storage device may increase. All of these factors can adversely affect the performance of data storage device 100.

[0032] 2 illustrates a data storage device 200 having a memory device 205 and a controller 210 integrated in a single package 215, according to one example. Data storage device 200 may be an SSD, eSSD, or other data storage device. As described below, data storage device 200 addresses various shortcomings of data storage device 100 illustrated and discussed above in connection with FIG. 1.

[0033] As previously indicated, data storage device 200 includes memory devices 205. In the example shown in Figure 2, data storage device 200 includes two memory devices 205 disposed on either side of controller 210. In one example, each memory device 205 may be a stack of NAND memory dies. Although a stack of NAND memory dies is specifically mentioned, memory devices 205 may be any volatile or non-volatile memory device.

[0034] Each memory device 205 is coupled to a surface of a printed circuit board (PCB) 220 of data storage device 200. For example, each memory device 205 is directly coupled to the surface of PCB 220. Memory devices 205 may be coupled to the surface of PCB 220 using any known surface mount technology. However, memory devices 205 are coupled to the surface of PCB 200 without the use of a BGA, separate substrate, traces, etc. This differs from memory devices 120 of data storage device 100 of FIG. 1, which requires separate substrate 125, signal traces 135, and BGA 150.

[0035] 2, the first signal traces 230 (indicated by a first type of shading) electrically and / or communicatively couple the memory device 205 to the controller 210. For example, the first signal traces 230 may electrically and / or communicatively couple the memory device 205 to one or more connection points (e.g., pads and / or pillars used to surface mount or otherwise couple the controller 210 to the PCB 220) associated with the controller 210.

[0036] Based on the location of each memory device 205 on PCB 220 relative to the location of controller 210, first signal traces 230 are substantially shorter as compared to first traces 155 provided in PCB 145 of data storage device 100 shown and described with respect to Figure 1. The shorter communication path between controller 210 and memory devices 205 may improve read and / or write speeds of data storage device 200, reduce resistance, enable better signal transmission between controller 210 and memory devices 205, and / or reduce the overall operating temperature of data storage device 200.

[0037] The controller 210 is also mounted directly to the surface of the PCB 220. In one example, the controller 210 is mounted directly to the surface of the PCB 220 using surface mount technology and / or a reflow soldering process. For example, the controller 210 can be surface mounted to the PCB 220 using one or more pads (e.g., bump pads) and / or pillars 235 (e.g., copper pillars). Although pads and / or pillars 235 are specifically mentioned, other surface mount techniques may be used. However, in this example, the controller 210 is coupled to the surface of the PCB 220 without the use of a BGA, a separate substrate, traces, etc., unlike the controller 160 of the data storage device 100 of FIG. 1, which requires a separate substrate 165, signal traces 175, and BGA 185.

[0038] In one example, a first subset of the pads and / or pillars 235 are used to electrically and / or communicatively couple the controller 210 to the memory device 205. A second subset of the pads and / or pillars 235 may be electrically and / or communicatively coupled to a second signal trace 240 (or a second set of signal traces) associated with the PCB 220. The second signal traces 240 may be used to communicatively couple the controller 210 to an interface 245 of the data storage device 200. In one example, the interface 245 may be a pin of a connector (e.g., an edge connector) extending from the PCB 220. For illustrative purposes, the connection paths between the controller 210, the second signal traces 240, and the interface 245 are shown with a second type of shading (e.g., when compared to the first type of shading shown for the first signal traces 230).

[0039] In one example, due to the location of the controller 210 on the PCB 220, the length of the second signal traces 240 (or the second set of signal traces) may be shorter than the length of the second traces 190 associated with the PCB 145 of the data storage device 100 shown and described with respect to Figure 1. In one example, a shorter communication path between the controller 210 and the interface 245 improves read and / or write speeds of the data storage device 200, reduces resistance, allows for better signal transmission between the controller 210 and the interface 245, and / or reduces the overall operating temperature of the data storage device 200.

[0040] The data storage device 200 also includes one or more passive components 250. The one or more passive components 250 may be capacitors, resistors, or other electronic components. The one or more passive components 250 are also mounted on the surface of the PCB 220. In one example, the one or more passive components 250 are mounted on the surface of the PCB 220 using a reflow soldering process. The reflow soldering process used to mount the one or more passive components 250 on the PCB 220 may be the same as the reflow soldering process used to electrically and / or communicatively couple the controller 210 to the PCB 220.

[0041] The data storage device 200 also includes a cover 255. In one example, the cover is a molding compound or other material. The molding compound may be any suitable molding material (e.g., an epoxy molding compound). In one example, the molding material may have heat dissipation properties. The cover 255 may encapsulate the memory device 205, the controller 210, the bond wires 225, and / or one or more passive components 250.

[0042] 3A-3E illustrate a method or process 300 for manufacturing a data storage device according to one example. In one example, the method or process 300 shown and described with respect to Figures 3A-3E may be used to manufacture the data storage device 200 shown and described with respect to Figure 2.

[0043] 3A, the method or process 300 can begin when a controller 305 is mounted directly to a surface of a printed circuit board (PCB) 310. In one example, the controller 305 is mounted directly to the surface of the PCB 310 using one or more pads 315 (e.g., bump pads) and / or one or more pillars 320 (e.g., copper pillars).

[0044] In one example, one or more pads 315 and / or one or more pillars 320 are used to establish a communication path between a first signal trace 325 (or a first set of signal traces) provided in or otherwise associated with the PCB 310 and a second signal trace 330 (or a second set of signal traces) provided in or otherwise associated with the PCB 310. For example, a first subset of the pads 315 and / or pillars 320 may be used to establish a first communication path between the controller 305 and the first signal trace 325 (or the first set of signal traces), and a second subset of the pads 315 and / or pillars 320 may be used to establish a second communication path between the controller 305 and the second signal trace 330 (or the second set of signal traces).

[0045] 3B illustrates another step in the method or process 300 where one or more passive components 335 are surface mounted to the PCB 310. The one or more passive components may be surface mounted to the PCB using any suitable mounting technique. Once the passive components 335 and controller are surface mounted to the PCB 310, a reflow soldering process may be used to secure the controller 305 and one or more passive components to the PCB 310. In one example, the one or more passive components 335 may be mounted to the PCB 310 before or after the controller 305.

[0046] 3C illustrates yet another step in the method or process 300. In this example, one or more memory devices 340 are directly coupled to a surface of the PCB 310. In one example, one memory device 340 may be provided on a first side of the controller 305 and another memory device 340 may be located on a second side of the controller 305. Although two memory devices 340 are shown, additional memory devices 340 may be surface mounted to the PCB 310 on different sides of the controller 320.

[0047] 3D , the process 300 continues when bond wires 345 are used to electrically couple each memory device 340 to the PCB 310. For example, bond wires 345 are used to electrically and / or communicatively couple each memory device 340 to a first signal trace 325 (or a first set of signal traces) associated with the PCB 310.

[0048] 3E, the process 300 continues by providing a cover 350 over the data storage device. In one example, the cover 350 is a molding compound that surrounds or encapsulates the controller 305, the memory device 340, the bond wires 345, and one or more passive components 335.

[0049] Based on various examples described herein, an example of the disclosure describes a data storage device comprising a printed circuit board (PCB), a controller mounted directly on a surface of the PCB, a memory device mounted directly on a surface of the PCB and communicatively coupled to signal traces associated with the PCB, the signal traces establishing a communication path between the memory device and the controller, and a cover encapsulating the controller and the memory device. In one example, the data storage device further includes one or more passive components mounted directly on a surface of the PCB. In one example, the one or more passive components are encapsulated by the cover. In one example, the one or more passive components are mounted directly on a surface of the PCB using a reflow soldering process. In one example, the controller is mounted directly on a surface of the PCB using a reflow soldering process. In one example, the cover is a molding compound. In one example, the controller is communicatively coupled to an interface of the data storage device using another signal trace associated with the PCB. In one example, the memory device is a stack of NAND memory dies. In one example, the memory device is a first memory device, and the data storage device further comprises a second memory device, such that the first memory device is located on a first side of the controller and a second memory device mounted directly on a surface of the PCB is located on a second side of the controller.

[0050] In one example, the present application also describes a method for assembling a data storage device, the method including coupling a controller to a surface of a printed circuit board (PCB), coupling one or more passive components to the surface of the PCB, performing a reflow soldering process to secure the controller and the one or more passive components to the surface of the PCB, coupling a memory device to the surface of the PCB, electrically coupling the memory device to signal traces associated with the PCB, and encapsulating the controller, the one or more passive components, and the memory device with a single cover. In one example, the signal traces communicatively couple the memory device to the controller. In one example, the single cover is made of molding compound. In one example, the controller is coupled to the surface of the PCB using one or more bump pads and one or more copper pillars. In one example, the method includes communicatively coupling the controller to a connection interface provided on the surface of the PCB. In one example, the memory device is a stack of NAND memory dies.

[0051] In yet another example, the present application describes a data storage device comprising a printed circuit board (PCB), a first storage means mounted directly on a surface of the PCB and communicatively coupled to a first signal means associated with the PCB, a second storage means mounted directly on the surface of the PCB and communicatively coupled to a second signal means associated with the PCB, a controller means mounted directly on the surface of the PCB between the first storage means and the second storage means and communicatively coupled to the first storage means using the first signal means and to the second storage means using the second signal means, and a cover means encapsulating the first storage means, the second storage means, and the controller means. In one example, the first storage means and the second storage means comprise NAND memory dies. In one example, the data storage device also includes one or more electronic components coupled to a surface of the PCB, the one or more components being encapsulated by the cover means. In one example, the controller means is communicatively coupled to a connection means of the data storage device. In one example, the controller means is mounted directly to the surface of the PCB using a reflow soldering process.

[0052] The description and illustrations of one or more aspects provided in this disclosure are not intended to limit or restrict the scope of the disclosure in any way. The aspects, examples, and details provided in this disclosure are believed to be sufficient to convey ownership and to enable others to make and use the best mode of the claimed disclosure.

[0053] The claimed disclosure should not be construed as being limited to any aspect, example, or detail provided in this disclosure. Whether shown and described in combination or separately, various features are intended to be selectively rearranged, included, or omitted to produce various embodiments having a particular set of features. While explanations and examples of this application have been provided, those skilled in the art may envision variations, modifications, and alternatives that fall within the spirit of the broader aspects of the general inventive concept embodied in this application without departing from the broader scope of the claimed disclosure.

[0054] References to elements herein using designations such as "first," "second," etc. generally do not limit the quantity or order of those elements. Rather, these designations may be used as a way of distinguishing between two or more elements or instances of an element. Thus, reference to a first element and a second element does not imply that only two elements may be used or that the first element precedes the second element. In addition, unless otherwise specified, a set of elements may include one or more elements.

[0055] Terms of the form "at least one of A, B, or C," or "A, B, C, or any combination thereof" used in the description or claims mean "A or B or C, or any combination of these elements." For example, the terms can include A, or B, or C, or A and B, or A and C, or A and B and C, or 2A, or 2B, or 2C, or 2A and B, etc. As a further example, "at least one of A, B, or C" is intended to encompass A, B, C, AB, AC, BC, and ABC, as well as multiples of the same member. Similarly, "at least one of A, B, and C" is intended to encompass A, B, C, AB, AC, BC, and ABC, as well as multiples of the same member.

[0056] Similarly, as used herein, a phrase referring to a list of items linked with "and / or" refers to any combination of the items. As an example, "A and / or B" is intended to include A only, B only, or a combination of A and B. As another example, "A, B, and / or C" is intended to include A only, B only, C only, a combination of A and B, a combination of A and C, a combination of B and C, or a combination of A, B, and C.

Claims

1. 1. A data storage device comprising: a printed circuit board (PCB) having an interface for the data storage device provided on a surface thereof; a controller mounted directly to the surface of the PCB without the use of a ball grid array (BGA) and a separate substrate; a memory device, a memory die mounted directly on the surface of the PCB without the use of a ball grid array (BGA) or a separate substrate, and communicatively coupled to signal traces on the PCB, the signal traces establishing a communication path between the memory device and the controller; a cover enclosing the controller and the memory device with the interface exposed on the surface of the PCB.

2. The data storage device of claim 1 , further comprising one or more passive components mounted directly to the surface of the PCB.

3. The data storage device of claim 2 , wherein the one or more passive components are encapsulated by the cover.

4. The data storage device of claim 2 , wherein the one or more passive components are mounted directly to the surface of the PCB using a reflow soldering process.

5. 10. The data storage device of claim 1, wherein the controller is mounted directly to the surface of the PCB using a reflow soldering process.

6. The data storage device of claim 1 , wherein the cover is a molding compound.

7. 2. The data storage device of claim 1, wherein the controller is communicatively coupled to the interface of the data storage device using separate signal traces provided on the PCB.

8. The data storage device of claim 1 , wherein the memory device is a stack of NAND memory dies.

9. 2. The data storage device of claim 1, wherein the memory device is a first memory device, and the data storage device further comprises a second memory device, such that the first memory device is located on a first side of the controller and a second memory device mounted directly on the surface of the PCB is located on a second side of the controller.

10. 1. A method of assembling a data storage device, comprising: Coupling a controller to a surface of a printed circuit board (PCB) on which a connection interface of the data storage device is provided without using a ball grid array (BGA) and a separate substrate; coupling one or more passive components to the surface of the PCB; performing a reflow soldering process to secure the controller and the one or more passive components to the surface of the PCB; coupling a memory device to the surface of the PCB without the use of a ball grid array (BGA) and a separate substrate; electrically coupling the memory device to signal traces provided on the PCB; and encapsulating the controller, the one or more passive components, and the memory device with a single cover, with the connection interface exposed on the surface of the PCB.

11. The method of claim 10 , wherein the signal traces communicatively couple the memory devices to the controller.

12. The method of claim 10 , wherein the unitary cover is made of a molding compound.

13. The method of claim 10 , wherein the controller is coupled to the surface of the PCB using one or more bump pads and one or more copper pillars.

14. The method of claim 10 , further comprising communicatively coupling the controller to the connection interface provided on the surface of the PCB.

15. The method of claim 10 , wherein the memory device is a stack of NAND memory dies.

16. 1. A data storage device comprising: a printed circuit board (PCB) having an interface for the data storage device provided on a surface thereof; a first storage means, the memory die being directly mounted on a surface of the PCB without the use of a ball grid array (BGA) or a separate substrate, the first storage means being communicatively coupled to a first signal means provided on the PCB; a second storage means, the second storage means being communicatively coupled to a second signal means provided on the PCB, the second signal means being communicatively coupled to a memory die mounted directly on the surface of the PCB without the use of a ball grid array (BGA) or a separate substrate; a controller means mounted directly on the surface of the PCB between the first storage means and the second storage means without the use of a ball grid array (BGA) and a separate substrate, the controller means being communicatively coupled to the first storage means using the first signal means and to the second storage means using the second signal means; a cover means for enclosing said first storage means, said second storage means and said controller means, with said interface exposed on said surface of said PCB.

17. 20. The data storage device of claim 16, wherein said first storage means and said second storage means comprise NAND memory dies.

18. 17. The data storage device of claim 16, further comprising one or more electronic components coupled to said surface of said PCB, said one or more components being encapsulated by said cover means.

19. 17. The data storage device of claim 16, wherein the controller means is communicatively coupled to the interface.

20. 17. The data storage device of claim 16, wherein said controller means is mounted directly to said surface of said PCB using a reflow soldering process.

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