LC composite electronic components

Abstract

To provide an LC composite electronic component which can sufficiently secure a Q value of an inductor element.SOLUTION: An LC composite electronic component 1 includes a capacitor element C provided on a substrate 2 and an insulation resin layer 11 embedding the capacitor element C, an inductor element L and insulation resin layers 12 and 13 embedding the inductor element L, post conductors P1 and P2 which are provided so as to penetrate through an insulation resin layer 14 and have lower ends connected to the inductor element L, and terminal electrodes E1 and E2 which are provided on the insulation resin layer 14 and are connected to the upper end of the post conductors P1 and P2. A height H of the post conductors P1 and P2 is larger than thicknesses T2 and T3 of a conductor pattern constituting the inductor element L. Thus, since the height H of the post conductors P1 and P2 is sufficiently secured, a distance between the conductor pattern on the circuit board and the inductor element L can be secured in the state of being mounted on the circuit board.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to an electronic component, and more particularly to an LC composite electronic component including an inductor element and a capacitor element. [Background technology]

[0002] Patent Document 1 discloses an LC composite electronic component having a structure in which an inductor element and a capacitor element are stacked on a substrate. In this type of electronic component, the uppermost conductor layer is used as a terminal electrode. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2019-186337 Summary of the Invention [Problem to be solved by the invention]

[0004] The LC composite electronic component described in Patent Document 1 is mounted on a circuit board upside down, with the substrate facing up. Therefore, depending on the layout of the conductor pattern on the circuit board, the distance between the conductor pattern on the circuit board and the inductor element built into the LC composite electronic component may become short, which may result in a decrease in the Q value.

[0005] Therefore, an object of the present invention is to provide an LC composite electronic component that can ensure a sufficient Q value of the inductor element when mounted on a circuit board. [Means for solving the problem]

[0006] The LC composite electronic component according to the present invention comprises a substrate, a capacitor element provided on the substrate, a first insulating resin layer in which the capacitor element is embedded, an inductor element provided on the first insulating resin layer and connected to the capacitor element, a second insulating resin layer in which the inductor element is embedded, a third insulating resin layer provided on the second insulating resin layer, a post conductor provided to penetrate the third insulating resin layer and having a lower end connected to the inductor element, and a terminal electrode provided on the third insulating resin layer and connected to the upper end of the post conductor, wherein the height of the post conductor is greater than the thickness of the conductor pattern constituting the inductor element.

[0007] According to the present invention, since the post conductor has a sufficient height, it is possible to ensure a sufficient distance between the conductor pattern on the circuit board and the inductor element built into the LC composite electronic component when the component is mounted on the circuit board. This makes it possible to increase the Q value of the inductor element when the component is mounted on the circuit board. Furthermore, since the stress applied to the capacitor element from the terminal electrode side is mitigated by the long post conductor, cracks and the like are less likely to occur in the capacitor element.

[0008] In the present invention, the height of the post conductor may be up to three times the thickness of the conductor pattern that constitutes the inductor element, because even if the height of the post conductor is increased beyond this, there is almost no change in the Q value.

[0009] In the present invention, the height of the post conductor may be greater than the thickness of the substrate, which allows the overall thickness to be reduced.

[0010] In the present invention, the height of the post conductor may be smaller than the thickness from the surface of the substrate to the uppermost conductor layer constituting the inductor element, thereby ensuring a sufficient thickness for the conductor pattern constituting the inductor element. [Effects of the Invention]

[0011] In this way, the LC composite electronic component according to the present invention makes it possible to ensure a sufficient Q value of the inductor element when mounted on a circuit board. [Brief explanation of the drawings]

[0012] [Figure 1] FIG. 1 is a schematic cross-sectional view illustrating the structure of an LC composite electronic component 1 according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a schematic side view showing the LC composite electronic component 1 mounted on a circuit board 100. As shown in FIG. [Figure 3] FIG. 3 is a graph showing the relationship between the height H of the post conductors P1, P2 and the Q value when the LC composite electronic component 1 is mounted on the circuit board 100. As shown in FIG. [Figure 4] FIG. 4 is a schematic plan view for explaining the planar shapes of post conductors P1 and P2 according to the first modified example. [Figure 5] FIG. 5 is a schematic plan view for explaining the planar shapes of post conductors P1 and P2 according to the second modified example. [Figure 6] FIG. 6 is a schematic cross-sectional view illustrating the structure of an LC composite electronic component 1a according to a third modified example. [Figure 7] FIG. 7 is a schematic cross-sectional view illustrating the structure of an LC composite electronic component 1b according to a fourth modified example. [Figure 8] FIG. 8 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 9] FIG. 9 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 10] FIG. 10 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 11] FIG. 11 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 12] FIG. 12 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 13] FIG. 13 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 14] FIG. 14 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 15] FIG. 15 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 16] FIG. 16 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 17] FIG. 17 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 18] FIG. 18 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 19] FIG. 19 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 20] FIG. 20 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 21] FIG. 21 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 22] FIG. 22 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 23] FIG. 23 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 24] FIG. 24 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 25] FIG. 25 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 26] FIG. 26 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 27] FIG. 27 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 28] FIG. 28 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 29] FIG. 29 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 30]FIG. 30 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 31] FIG. 31 is a process chart for explaining the method of manufacturing the LC composite electronic component 1. [Figure 32] FIG. 32 is a schematic cross-sectional view illustrating the structure of an LC composite electronic component 1c according to the second preferred embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0013] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0014] FIG. 1 is a schematic cross-sectional view illustrating the structure of an LC composite electronic component 1 according to a first embodiment of the present invention.

[0015] As shown in FIG. 1, an LC composite electronic component 1 according to this embodiment includes a substrate 2, conductor layers M1-M4, and insulating resin layers 11-14 alternately stacked on the upper surface of the substrate 2. The substrate 2 may be made of any material that is chemically and thermally stable, generates little stress, and maintains a smooth surface. Examples of suitable materials include silicon single crystal, alumina, sapphire, aluminum nitride, MgO single crystal, SrTiO3 single crystal, surface silicon oxide, glass, quartz, ferrite, and wiring boards. The surface of the substrate 2 is covered with a planarization layer 3. Examples of suitable materials for the planarization layer 3 include alumina and silicon oxide.

[0016] The conductor layer M1 is the bottommost conductor layer and includes conductor patterns 21 and 22. The conductor pattern 21 forms the lower electrode of the capacitor element, and its top and side surfaces are covered with a dielectric film (capacitive insulating film) 4. The dielectric film 4 is removed from the outer periphery of the LC composite electronic component 1, thereby alleviating stress.

[0017] A conductor pattern 23 is formed on the upper surface of the conductor pattern 21 with a dielectric film 4 interposed therebetween. The conductor pattern 23 belongs to the conductor layer MM located between the conductor layers M1 and M2 and constitutes the upper electrode of the capacitor element. This forms a capacitor element with the conductor pattern 21 as the lower electrode and the conductor pattern 23 as the upper electrode. The conductor layers M1 and MM are covered with an insulating resin layer 11 with a passivation film 5 interposed therebetween. In this embodiment, both the dielectric film 4 and the passivation film 5 are made of inorganic insulating materials. The inorganic insulating material constituting the dielectric film 4 and the inorganic insulating material constituting the passivation film 5 may be the same material or different materials. The passivation film 5 is removed from the outer periphery of the LC composite electronic component 1, thereby alleviating stress.

[0018] The conductor layer M2 is a second conductor layer provided on the surface of the insulating resin layer 11, and includes conductor patterns 24 and 25. The conductor pattern 24 is connected to the conductor patterns 23 and 22 via via conductors 24a and 24b, respectively. The conductor pattern 25 is connected to the conductor pattern 21 via a via conductor 25a. The conductor layer M2 is covered with the insulating resin layer 12.

[0019] The conductor layer M3 is a third conductor layer provided on the surface of the insulating resin layer 12, and includes conductor patterns 26 and 27. The conductor pattern 26 is connected to the conductor pattern 24 through a via conductor 26a. The conductor layer M3 is embedded in the insulating resin layer 13 and is covered with the insulating resin layer 14.

[0020] The conductor layer M4 is a fourth conductor layer provided on the surface of the insulating resin layer 14, and includes terminal electrodes E1 and E2. The terminal electrodes E1 and E2 are connected to conductor patterns 26 and 27 via post conductors P1 and P2, respectively, which penetrate the insulating resin layer 14. The conductor patterns 22, 24 to 27 are, for example, parts of a coil pattern, which allows capacitor elements and inductor elements to be integrated on the substrate 2.

[0021] 1, the LC composite electronic component 1 according to this embodiment is designed so that the height of the post conductors P1 and P2 is significantly higher than that of a typical LC composite electronic component, and the thickness of the substrate 2 is designed to be thin so as not to increase the overall thickness. For example, if the thickness of the substrate 2 is T1, the thickness of the conductor layer M2 is T2, the thickness of the conductor layer M3 is T3, the height of the post conductors P1 and P2 (= the thickness of the insulating resin layer 14) is H, and the thickness of the terminal electrodes E1 and E2 is T4, then the height H of the post conductors P1 and P2 is H>T1, H>T2, H>T3, and H>T4 The above requirement is satisfied. That is, the height H of the post conductors P1 and P2 is greater than the thickness T1 of the substrate 2, and greater than the thicknesses T2 and T3 of the conductor patterns 24 to 27 that constitute the inductor element, with only the terminal electrodes E1 and E2 being greater than T4. However, if the thickness T1 of the substrate 2 is too thin, the overall mechanical strength will be insufficient. Therefore, it is preferable to reduce the thickness T1 of the substrate 2 within a range that ensures the overall mechanical strength. Furthermore, since reducing the thicknesses T2 and T3 of the conductor patterns 24 to 27 reduces the Q value of the inductor element, it is preferable to increase the height H of the post conductors P1 and P2 rather than reducing the thicknesses T2 and T3 of the conductor patterns 24 to 27. Furthermore, it is preferable that the height H of the post conductors P1 and P2 is smaller than the thickness T5 of the functional layer on which the capacitor element and inductor element are formed, i.e., the thickness from the surface of the substrate 2 to the topmost conductor layer M3 that constitutes the inductor element.

[0022] As an example, T1=47 μm, T2=20 μm, T3=35 μm, T4=20 μm, T5=73 μm, and H=60 μm.

[0023] FIG. 2 is a schematic side view showing a state in which the LC composite electronic component 1 according to this embodiment is mounted on a circuit board 100. As shown in FIG.

[0024] 2, the LC composite electronic component 1 according to this embodiment is mounted on a circuit board 100 in an inverted state with the substrate 2 facing upward. Land patterns 101 and 102 are provided on the front surface of the circuit board 100 and are connected to terminal electrodes E1 and E2, respectively, via solder 103. A large-area ground pattern G is also formed inside or on the back surface of the circuit board 100.

[0025] When the LC composite electronic component 1 according to this embodiment is mounted on a circuit board 100 having such a structure, there is a risk that the Q value of the inductor element L built into the LC composite electronic component 1 will decrease due to the influence of the ground pattern G. However, the LC composite electronic component 1 according to this embodiment is designed so that the thickness T1 of the substrate 2 is thin and the height H of the post conductors P1 and P2 is large, thereby increasing the distance between the inductor element L and the ground pattern G. This prevents a decrease in the Q value of the inductor element L caused by the ground pattern G. Furthermore, the long post conductors P1 and P2 mitigate the stress applied to the capacitor element C from the terminal electrodes E1 and E2, making the capacitor element C less susceptible to cracks and the like.

[0026] FIG. 3 is a graph showing the relationship between the height H of the post conductors P1, P2 and the Q value when the LC composite electronic component 1 is mounted on the circuit board 100, and shows the case where the values ​​of T1 to T5 are as described above.

[0027] 3, the Q value of the inductor element L tends to improve as the height H of the post conductors P1 and P2 increases. However, the improvement in the Q value according to the height H of the post conductors P1 and P2 becomes gentle when H is near 60 μm, and is almost saturated when H is near 90 μm. Taking this into consideration, it is preferable that the height H of the post conductors P1 and P2 be three times or less the thickness T3 of the conductor patterns 26 and 27 that constitute the inductor element.

[0028] As described above, the LC composite electronic component 1 according to this embodiment has post conductors P1 and P2 whose lower ends are connected to the inductor element L and whose upper ends are connected to the terminal electrodes E1 and E2, and the height H of the post conductors P1 and P2 is sufficiently large, making it possible to suppress a decrease in the Q value when mounted on the circuit board 100.

[0029] The planar shape of the post conductors P1 and P2 is not particularly limited and may be circular or rectangular. Alternatively, as in the first modified example shown in FIG. 4, the post conductors P1 and P2 may be embedded in a plurality of integrated circular openings. For example, if the planar size of the terminal electrodes E1 and E2 is 150 μm × 150 μm, a plurality of circular openings each having a diameter of 50 μm may overlap each other, and the post conductors P1 and P2 may be embedded in the integrated openings. The plurality of circular openings may be independent of each other, as in the second modified example shown in FIG. 5. In either case, the planar size of the post conductors P1 and P2 is preferably 40% or more of the planar size of the terminal electrodes E1 and E2. This improves the adhesion between the post conductors P1 and P2 and the terminal electrodes E1 and E2.

[0030] The cross-sectional shapes of the post conductors P1 and P2 are not particularly limited, and may be such that the diameter is greatest at approximately the center in the height direction and decreases toward both ends in the height direction, as in the LC composite electronic component 1a according to a third modified example shown in FIG. 6. This prevents the post conductors P1 and P2 from falling off. Alternatively, the post conductors P1 and P2 may be such that the diameter increases at the upper end in the height direction, as in the LC composite electronic component 1b according to a fourth modified example shown in FIG. 7. This increases the contact area between the post conductors P1 and P2 and the terminal electrodes E1 and E2 without increasing the diameter of the post conductors P1 and P2 at the lower end.

[0031] Next, a method for manufacturing the LC composite electronic component 1 according to this embodiment will be described.

[0032] 8 to 31 are process diagrams illustrating a method for manufacturing the LC composite electronic component 1 according to this embodiment. In the manufacturing process of the LC composite electronic component 1, a large number of LC composite electronic components 1 are obtained using an aggregate substrate, but the manufacturing process described below focuses on the manufacturing process of one LC composite electronic component 1.

[0033] First, as shown in FIG. 8, a planarization layer 3 is formed on a substrate (assembly substrate) 2 using a sputtering method or the like, and its surface is smoothed by grinding or a mirror-finishing process such as CMP. Thereafter, a seed layer S is formed on the surface of the planarization layer 3 using a sputtering method, electroless plating, or the like. Next, as shown in FIG. 9, a resist layer R1 is spin-coated on the seed layer S, and the resist layer R1 is patterned so that the seed layer S in the region where the conductor layer M1 is to be formed is exposed. In this state, electrolytic plating is performed using the seed layer S as a power source to form a plating layer P on the seed layer S, as shown in FIG. 10. The stack of the seed layer S and the plating layer P constitutes the conductor layer M1. In the cross section shown in FIG. 10, the conductor layer M1 includes conductor patterns 21 and 22 and sacrificial patterns 31 and 32. Then, as shown in FIG. 11, the resist layer R1 is removed, and the seed layer S exposed on the surface is removed as shown in FIG. 12, completing the conductor layer M1. The seed layer S can be removed by etching or ion milling.

[0034] 13, a dielectric film 4 is formed on the entire surface of the conductor layer M1, including the top and side surfaces. The dielectric film 4 can be formed from an inorganic insulating material such as a paraelectric material, such as silicon nitride (SiNx) or silicon oxide (SiOx), or a known ferroelectric material. The dielectric film 4 can be formed by sputtering, plasma CVD, MOCVD, sol-gel, electron beam evaporation, or the like.

[0035] Next, as shown in FIG. 14, a conductor pattern 23 is formed on the upper surface of the conductor pattern 21 with a dielectric film 4 interposed therebetween using a method similar to that used to form the conductor layer M1. The conductor pattern 23 is also made of a laminate of a seed layer S and a plating layer P. This completes the conductor layer MM, forming a capacitor element with the conductor pattern 21 as the lower electrode and the conductor pattern 23 as the upper electrode. Next, as shown in FIG. 15, a passivation film 5 is formed on the entire surface of the conductor layers M1 and MM, including their upper and side surfaces. The passivation film 5 can be made of the same inorganic insulating material as the dielectric film 4.

[0036] Next, as shown in FIG. 16, a resist layer R2 is formed to cover the conductor patterns 21 and 22 without covering the sacrificial patterns 31 and 32. The edges of the resist layer R2 are set slightly inside the portion that will eventually become the LC composite electronic component 1. By etching the passivation film 5 and the dielectric film 4 in this state, as shown in FIG. 17, the passivation film 5 and the dielectric film 4 are removed from the portions that will eventually become the outer periphery of the LC composite electronic component 1. The passivation film 5 and the dielectric film 4 are preferably etched using a highly anisotropic etching method such as ion milling. As a result, the passivation film 5 and the dielectric film 4 are removed from the portions parallel to the substrate 2, i.e., the surface of the planarization layer 3 and the top surfaces of the sacrificial patterns 31 and 32, while the passivation film 5 and the dielectric film 4 are left intact from the portions perpendicular to the substrate 2, i.e., the portions covering the side surfaces of the sacrificial patterns 31 and 32.

[0037] Next, as shown in FIG. 18, an insulating resin layer 11 is formed to cover the conductor layers M1 and MM. The insulating resin layer 11 can be formed by a coating method (e.g., spin coating). This is because the total film thickness of the conductor layers M1 and MM is thin, e.g., about 10 μm, and therefore is less expensive than forming the insulating resin layer 11 by a lamination method. A photosensitive polyimide resin can be used as the material for the insulating resin layer 11. Next, as shown in FIG. 19, the insulating resin layer 11 is patterned to form openings 41 to 45 in the insulating resin layer 11. The openings 41 to 45 can be formed by photolithography using a photomask (not shown). As a result, the passivation film 5 covering the upper surfaces of the conductor patterns 21 to 23 is exposed through the openings 41 to 43, respectively, and the sacrificial patterns 31 and 32 are exposed through the openings 44 and 45, respectively.

[0038] Next, as shown in FIG. 20 , a resist layer R3 is formed on the insulating resin layer 11, and then openings 51-53 are formed in the resist layer R3. The openings 51-53 are provided at positions overlapping with the openings 41-43, respectively. As a result, the passivation film 5 covering the upper surfaces of the conductor patterns 21-23 is exposed through the openings 51-53, respectively. In this state, by performing ion milling or the like, the passivation film 5 and the dielectric film 4 exposed in the openings 51 and 52 are removed, and the passivation film 5 exposed in the opening 53 is also removed. As a result, the upper surfaces of the conductor patterns 21-23 are exposed at the positions overlapping with the openings 51-53.

[0039] Then, after removing the resist layer R3, as shown in FIG. 21, a conductor layer M2 is formed on the insulating resin layer 11 by a method similar to that for forming the conductor layer M1. In the cross section shown in FIG. 21, the conductor layer M2 includes conductor patterns 24 and 25 and sacrificial patterns 33 and 34. Here, the conductor pattern 24 is commonly connected to the conductor patterns 22 and 23 through an opening provided in the insulating resin layer 11, and the conductor pattern 25 is connected to the conductor pattern 21 through an opening provided in the insulating resin layer 11. Portions of the conductor patterns 24 and 25 located within the opening of the insulating resin layer 11 form via conductors 24a, 24b, and 25a. The sacrificial patterns 33 and 34 are connected to the sacrificial patterns 31 and 32, respectively, through openings provided in the insulating resin layer 11.

[0040] Next, as shown in FIG. 22, an insulating resin layer 12 is formed to cover the conductor layer M2. The insulating resin layer 12 can be formed by a lamination method. This is because the conductor layer M2 has a large thickness of, for example, about 20 μm, and therefore can be formed at a lower cost than forming the insulating resin layer 12 by a coating method. A non-photosensitive epoxy resin can be used as the material for the insulating resin layer 12. A filler that adjusts the thermal expansion coefficient is added to the insulating resin layer 12, and as a result, the insulating resin layer 12 has a lower thermal expansion coefficient than the insulating resin layer 11.

[0041] 23, openings 54 to 56 are formed in the insulating resin layer 12. The openings 54 to 56 can be formed by laser processing. As a result, the conductive pattern 24 is exposed through the opening 54, and the sacrificial patterns 33 and 34 are exposed through the openings 55 and 56, respectively. Thereafter, residues in the openings 54 to 56 are removed by a desmear treatment using permanganate or the like.

[0042] Next, as shown in Fig. 24, a conductor layer M3 is formed on the insulating resin layer 12 by a method similar to that for forming the conductor layer M1. In the cross section shown in Fig. 24, the conductor layer M3 includes conductor patterns 26 and 27 and sacrificial patterns 35 and 36. Here, the conductor pattern 26 is connected to the conductor pattern 24 through an opening provided in the insulating resin layer 12. The portion of the conductor pattern 26 located within the opening of the insulating resin layer 12 forms a via conductor 26a. Furthermore, the sacrificial patterns 35 and 36 are connected to the sacrificial patterns 33 and 34, respectively, through openings provided in the insulating resin layer 12.

[0043] Next, as shown in Fig. 25, an insulating resin layer 13 is formed to cover the conductor layer M3. The insulating resin layer 13 can be formed by a lamination method. This is because the conductor layer M3 has a large thickness of, for example, about 35 µm, and therefore can be formed at a lower cost than forming the insulating resin layer 13 by a coating method. The insulating resin layer 13 can be made of the same material as the insulating resin layer 12.

[0044] Next, as shown in FIG. 26, the surface of the insulating resin layer 13 is polished, ground, or ashed until the conductor layer M3 is exposed. After the surface of the conductor layer M3 is exposed in this manner, a seed layer S and a resist layer R4 are formed on the entire surface, as shown in FIG. 27. Thereafter, openings 61-64 are formed in the resist layer R4. The openings 61-64 are provided at positions overlapping with the conductor patterns 26, 27 and the sacrificial patterns 35, 36, respectively. Next, as shown in FIG. 28, electrolytic plating is performed using the seed layer S as a power supply, thereby forming post conductors P1, P2 and sacrificial patterns 37, 38 inside the openings 61-64.

[0045] Next, as shown in FIG. 29, the resist layer R4 is removed, and the seed layer S exposed on the surface is removed. Next, as shown in FIG. 30, an insulating resin layer 14 is formed to cover the post conductors P1, P2 and the sacrificial patterns 37, 38, and then the surface of the insulating resin layer 14 is polished, ground, or ashed until the post conductors P1, P2 and the sacrificial patterns 37, 38 are exposed. The insulating resin layer 14 can be formed by a lamination method. This is because the height H of the post conductors P1, P2 is thick, for example, about 60 μm, and therefore the insulating resin layer 14 can be formed at a lower cost than forming the insulating resin layer 14 by a coating method. The insulating resin layer 14 can be made of the same material as the insulating resin layers 12, 13.

[0046] 31, the sacrificial patterns 31 to 38 are removed by etching using an acid or the like. As a result, spaces A are formed in the areas where the sacrificial patterns 31 to 38 have been removed. Then, terminal electrodes E1 and E2 are formed on the surface of the insulating resin layer 14 so as to contact the upper ends of the post conductors P1 and P2, and the substrate 2 is then cut along the spaces A to separate the LC composite electronic component 1. This completes the LC composite electronic component 1 according to this embodiment.

[0047] FIG. 32 is a schematic cross-sectional view illustrating the structure of an LC composite electronic component 1c according to the second preferred embodiment of the present invention.

[0048] As shown in Fig. 32, the LC composite electronic component 1c according to the second embodiment differs from the LC composite electronic component 1 according to the first embodiment shown in Fig. 1 in that the post conductors P1, P2 and the conductor patterns 26, 27 are connected via via conductors, and the terminal electrodes E1, E2 and the post conductors P1, P2 are connected via via conductors. Since the other basic configuration is the same as that of the LC composite electronic component 1 according to the first embodiment, the same elements are denoted by the same reference numerals and redundant explanations will be omitted.

[0049] Such a structure can be obtained by forming openings in the insulating resin layers 13 and 14 instead of performing the polishing process of the insulating resin layers 13 and 14 shown in FIGS.

[0050] The above describes a preferred embodiment of the present invention, but the present invention is not limited to the above embodiment, and various modifications are possible within the scope of the present invention, and it goes without saying that these modifications are also included within the scope of the present invention.

[0051] For example, the terminal electrodes E1 and E2 may be formed by printing a conductive paste such as a resin electrode on the surface of the post conductors P1 and P2, and then covering the surface of the conductive paste with a Ni / Sn film. [Explanation of symbols]

[0052] 1,1a~1c LC composite electronic parts 2 boards 3 Planarization layer 4. Dielectric film 5 Passivation film 11-14 Insulating resin layer 21~27 Conductor pattern 24a, 24b, 25a, 26a Via conductors 31~38 Sacrifice Pattern 41~45, 51~56, 61~64 Openings 100 Circuit Boards 101,102 Land Pattern 103 Solder A Space C capacitor element E1,E2 terminal electrode G Ground Pattern L inductor element M1~M4,MM conductor layers P plating layer P1, P2 post conductor R1~R4 resist layers S seed layer

Claims

1. A substrate; a capacitor element provided on the substrate; a first insulating resin layer in which the capacitor element is embedded; an inductor element provided on the first insulating resin layer and connected to the capacitor element; a second insulating resin layer in which the inductor element is embedded; a third insulating resin layer provided on the second insulating resin layer; a post conductor provided to penetrate the third insulating resin layer and having a lower end connected to the inductor element; a terminal electrode provided on the third insulating resin layer and connected to an upper end of the post conductor, The LC composite electronic component is characterized in that the height of the post conductor is greater than the thickness of the conductor pattern that constitutes the inductor element.

2. 2. The LC composite electronic component according to claim 1, wherein the height of the post conductor is three times or less the thickness of the conductor pattern that constitutes the inductor element.

3. 3. The LC composite electronic component according to claim 1, wherein the height of the post conductor is greater than the thickness of the substrate.

4. 4. The LC composite electronic component according to claim 1, wherein the height of the post conductor is smaller than the thickness from the surface of the substrate to the uppermost conductor layer constituting the inductor element.

5. An LC composite electronic component described in any one of claims 1 to 4, wherein the post conductor has a cross-sectional shape in which the diameter is greatest at approximately the center in the height direction, the diameter decreases as it approaches from the approximately center toward the upper end, and the diameter decreases as it approaches from the approximately center toward the lower end.

6. An LC composite electronic component described in any one of claims 1 to 4, wherein the post conductor has a cross-sectional shape in which the diameter expands at the upper end.

Images