wiring board
The wiring board addresses heat dissipation and insulation issues by using non-through vias with high thermal conductivity materials, ensuring efficient heat transfer and insulation despite processing variations, enhancing thermal conductivity and rigidity.
Patent Information
- Application Number
- JP2022027027
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-02-24
- Publication Date
- 2025-09-11
- Estimated Expiration
- 2042-02-24
AI Technical Summary
Existing wiring boards face challenges in efficiently dissipating heat generated by electronic components while maintaining insulation due to processing variations that can cause misalignment between metal bodies and external connection terminals.
A wiring board design featuring non-through vias made of high thermal conductivity materials, positioned to transfer heat efficiently while ensuring insulation, even with depth variations, by avoiding wiring connections to the via sides and bottoms, and using specific material combinations for the insulating substrate and vias.
The design effectively dissipates heat generated by electronic components while maintaining insulation, compensating for processing variations and preventing localized heat concentration, with improved thermal conductivity and rigidity.
Smart Images

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Figure 0007737926000002
Abstract
Description
[Technical Field]
[0001] The present invention relates to a wiring board. [Background technology]
[0002] Conventionally, structures have been proposed for dissipating heat generated in operation of electronic components such as semiconductors and light-emitting elements mounted on wiring boards. For example, in the wiring board disclosed in Patent Document 1, a light-emitting element is mounted on the upper side of a metal body in a blind hole formed on the upper surface of an insulating base, and the metal body and external connection terminals arranged on the lower surface of the insulating base are stacked one above the other in the thickness direction of the wiring board, so that heat generated from the light-emitting element is dissipated from the metal body to the outside of the system via the external connection terminals. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2008-109079 Summary of the Invention [Problem to be solved by the invention]
[0004] However, processing variations typically occur in the formation of blind holes, and the depth of the blind holes can fluctuate and become deeper than the preset depth. In the wiring board disclosed in Patent Document 1, when such variations occur, the metal body in the blind hole (formed on the upper surface of the insulating base) and the external connection terminals arranged on the lower surface of the insulating base are stacked one above the other in the thickness direction of the wiring board, which can potentially prevent insulation between the metal body and the external connection terminals. Therefore, there has been a demand for the development of a wiring board that can efficiently dissipate heat generated by electronic components while ensuring insulation between components even when processing variations occur.
[0005] The present invention has been made to solve at least some of the above-mentioned problems, and aims to provide a wiring board that can efficiently dissipate heat generated by electronic components while ensuring insulation between components even if there are processing variations. [Means for solving the problem]
[0006] The present invention has been made to solve at least part of the above-mentioned problems, and can be realized in the following forms.
[0007] (1) According to one aspect of the present invention, there is provided a wiring board comprising: an insulating substrate on which an electronic component is mounted; first wiring arranged on a first surface of the insulating substrate that faces the electronic component and connects to the electronic component; and second wiring arranged on a second surface of the insulating substrate that is the surface opposite the first surface, wherein the second wiring is not arranged on the first surface of the insulating substrate when viewed through from the first surface to the second surface, and non-through vias are formed in the portions of the first wiring that are arranged on the first surface, and at least a portion of the non-through vias is made of a material having a higher thermal conductivity than the insulating substrate.
[0008] According to this configuration, a non-through via, at least a portion of which is made of a material with a higher thermal conductivity than the insulating substrate, is formed in a portion of the first surface where the first wiring is arranged. Therefore, when at least a portion of heat generated by the electronic component is transferred from the first wiring to the second wiring via the insulating substrate, the heat is transferred from the first wiring via the non-through via and then from the insulating substrate to the second wiring, thereby efficiently dissipating the heat generated by the electronic component. Furthermore, according to this configuration, the non-through via is formed in a portion of the first surface of the insulating substrate where the second wiring is not arranged when viewed through from the first surface to the second surface. Therefore, even if the depth of the non-through via (the length from the first surface to the bottom surface of the non-through via) varies due to processing variations and becomes deeper than the predetermined depth, the second wiring is not arranged in the portion of the second surface facing the bottom surface of the non-through via, thereby ensuring insulation between the non-through via and the second wiring. Therefore, with the wiring board having this configuration, even if there is variation in the processing of the non-through vias, the heat generated by the electronic component can be efficiently dissipated while ensuring insulation between the non-through vias and the second wiring.
[0009] (2) In the wiring board of the above aspect, there may be no wiring connected to the side surface of the non-through via. With this configuration, since there is no wiring connected to the side surface of the non-through via, it is possible to prevent the heat generated from the wiring from concentrating on the non-through via, and therefore it is possible to efficiently transfer the heat transferred from the first wiring in the non-through via to the bottom surface of the non-through via while avoiding localized heat generation.
[0010] (3) In the wiring board of the above aspect, there may be no wiring connected to the bottom surface of the non-through via. This configuration makes it easier to ensure insulation between the non-through via and the second wiring. When wiring connected to the bottom surface of the non-through via is present, the wiring tends to be routed approximately parallel to the first or second surface, and the distance between the wiring connected to the bottom surface of the non-through via and the second wiring is small, so insulation may not be ensured. Furthermore, when there is no wiring connected to either the side surface or the bottom surface of the non-through via, the non-through via does not perform a conductive function, so it is possible to select a material for the non-through via that takes into account only thermal conductivity, without considering electrical conductivity.
[0011] (4) In the wiring board of the above aspect, the maximum width of the non-through via may be equal to or less than the minimum width of the first wiring located above the non-through via. According to this configuration, the minimum width of the first wiring is designed to ensure insulation from other components, so that insulation from other components can also be ensured for non-penetrating vias that have a maximum width smaller than this minimum width.
[0012] (5) In the wiring board of the above aspect, the length from the first surface to the bottom surface of the non-through via may be two-thirds or less of the length from the first surface to the second surface in the portion where the non-through via is formed. According to this configuration, it is possible to ensure a certain degree of length from the first surface to the bottom surface of the non-through via while maintaining the rigidity of the insulating substrate.
[0013] (6) In the wiring board of the above aspect, the material constituting the insulating substrate may include any one of AlN, Al2O3, SiN, and SiC. According to this configuration, the insulating substrate has heat resistance, wear resistance, and the like in addition to insulation properties.
[0014] (7) In the wiring board of the above aspect, the material constituting at least a portion of the non-through via may include any one of Cu, W, Au, Mo, and Ag. According to this configuration, the blind vias have high thermal conductivity, so that the heat generated by the electronic component can be dissipated more efficiently.
[0015] The present invention can be realized in various forms, for example, in the form of an insulating substrate, a wiring substrate, a wiring substrate for semiconductors, and components including these, a method for manufacturing an insulating substrate, a method for manufacturing a wiring substrate, etc. [Brief explanation of the drawings]
[0016] [Figure 1] 1 is an explanatory diagram schematically illustrating a cross-sectional configuration of a wiring board according to an embodiment of the present invention. [Figure 2] FIG. DETAILED DESCRIPTION OF THE INVENTION
[0017] FIG. 1 is an explanatory diagram schematically illustrating a cross-sectional configuration of a wiring board 1 according to one embodiment of the present invention. In FIG. 1, mutually orthogonal X, Y, and Z axes are shown to identify directions. FIG. 2 is a plan view of the wiring board 1. FIG. 1 is a cross-sectional view taken along line F1-F1 in FIG. 2. The wiring board 1 is a wiring board on which a semiconductor chip SC is mounted as an electronic component. The wiring board 1 includes a first insulating substrate 10. Furthermore, the wiring board 1 includes first wiring 12, a diffusion prevention layer 14, a conductive coating 16, and bumps 18 on the side of the first insulating substrate 10 on which the semiconductor chip SC is mounted. Furthermore, the wiring board 1 includes second wiring 22, a diffusion prevention layer 24, a conductive coating 26, solder 29, and a second insulating substrate 30 on the side of the first insulating substrate 10 opposite the side on which the semiconductor chip SC is mounted.
[0018] The first insulating substrate 10 is a ceramic substrate made of an insulating material containing Al2O3. Alternatively, the first insulating substrate 10 may be a substrate in which an insulating film is applied to the surface of a metal plate, as long as it has insulating properties. First wiring 12 is arranged on a first surface 10F of the first insulating substrate 10, which is the surface on the semiconductor chip SC side (the +Z-axis direction side in FIG. 1). In the wiring substrate 1, the first wiring 12 is made of Cu. The first wiring 12 includes first wiring 12P electrically connected to each end of the semiconductor chip SC in the X-axis direction and first wiring 12N electrically connected to a central portion of the semiconductor chip SC in the X-axis direction. In FIG. 2, the first wiring 12 is shown by a dashed line because it is covered with a conductive coating 16 and therefore cannot be seen.
[0019] The diffusion prevention layer 14 is disposed between the first wiring 12 and the conductive coating 16 (described later) and prevents mutual movement of metal atoms due to diffusion between the first wiring 12 and the conductive coating 16. Examples of materials that can be used to form the diffusion prevention layer 14 include Ni, Pd, Ti, and compounds of these metals. The conductive coating 16 is a conductive film that covers the diffusion prevention layer 14. In the wiring substrate 1, the conductive coating 16 is made of Au. The bumps 18 connect the conductive coating 16 and the semiconductor chip SC. In FIG. 1, the portions of the bumps 18 that contact the semiconductor chip SC extend along the surface of the semiconductor chip SC. In the wiring substrate 1, the bumps 18 are made of Au, just like the conductive coating 16.
[0020] Meanwhile, second wiring 22 is arranged on second surface 10B, which is the surface of first insulating substrate 10 opposite first surface 10F. In wiring board 1, second wiring 22 is made of Cu, the same material as first wiring 12. In Fig. 1, second wiring 22 arranged on the -X-axis direction side is called second wiring 22L, and second wiring 22 arranged on the +X-axis direction side is called second wiring 22R.
[0021] The diffusion prevention layer 24 is similar to the diffusion prevention layer 14 described above, except that it is disposed between the second wiring 22 and a conductive coating 26 described later. Like the conductive coating 16 described above, the conductive coating 26 is a conductive film that covers the diffusion prevention layer 24. Solder 29 connects the conductive coating 26 to a second insulating substrate 30 described later. The second insulating substrate 30 is a substrate similar to the first insulating substrate 10.
[0022] The white arrows shown in Fig. 2 indicate current paths. As shown in Fig. 2, through vias PV1 and PV2 are formed in the first insulating substrate 10. The through via PV1 connects the second wiring 22L (shown in Fig. 1) and the first wiring 12P. The through via PV2 connects the second wiring 22R (shown in Fig. 1) and the first wiring 12N. When current is applied, a current flows from the second wiring 22L through the through via PV1 to the first wiring 12P, passes through the semiconductor chip SC, and then flows from the first wiring 12N to the second wiring 22R via the through via PV2.
[0023] In the cross section of FIG. 1, the portion of the first surface 10F where the first wiring 12P is arranged is the portion where the second wiring 22 is arranged when viewed from the first surface 10F to the second surface 10B. On the other hand, in the cross section of FIG. 1, the portion of the first surface 10F where the first wiring 12N is arranged is the portion where the second wiring 22 is not arranged when viewed from the first surface 10F to the second surface 10B. Non-through vias NV are formed in such portions. The non-through vias NV are formed by forming a recess on the first insulating substrate 10 and then filling the recess with a material with high thermal conductivity. The non-through vias NV are made of a material with higher thermal conductivity than the first insulating substrate 10. In the wiring substrate 1, the non-through vias NV are made of Cu, and therefore the material constituting the first wiring 12 and the material constituting the non-through vias NV are the same. Note that in FIG. 2, non-through vias NV that are not visible in reality are indicated by dashed lines.
[0024] 1 and 2, width L1 indicates the width (length along the X-axis direction) of the non-through via NV in an arbitrary XZ cross section. Width L2 indicates the width (length along the X-axis direction) of the first wiring 12N arranged on the non-through via NV at an arbitrary position. FIGS. 1 and 2 respectively illustrate the maximum width of width L1 and the maximum width of width L2. Here, the maximum width of width L1 of the non-through via NV is equal to or less than the minimum width L2 of the first wiring 12N located on the non-through via NV. In the wiring substrate 1, the width of the non-through via NV is constant, and the width of the first wiring 12N located on the non-through via NV is also constant (see FIG. 2), so it can also be said that width L1 is equal to or less than width L2.
[0025] In the wiring board 1, the length from the first surface 10F to the bottom surface BM of the non-through via NV (the length along the Z-axis direction in FIG. 1) is two-thirds or less of the length from the first surface 10F to the second surface 10B in the portion where the non-through via NV is formed. In this embodiment, the length from the first surface 10F to the bottom surface BM of the non-through via NV is half the length from the first surface 10F to the second surface 10B in the portion where the non-through via NV is formed.
[0026] Furthermore, there is no wiring connected to the side surface SD of the non-through via NV in the wiring board 1. There is also no wiring connected to the bottom surface BM of the non-through via NV. That is, there is no wiring routed from the side surface SD and the bottom surface BM of the non-through via NV, and only the first wiring 12N and the first insulating substrate 10 are in contact with the non-through via NV.
[0027] As described above, according to the wiring board 1 of this embodiment, non-through vias NV made of a material with a higher thermal conductivity than the first insulating substrate 10 are formed in the portion of the first surface 10F where the first wiring 12N is arranged. Therefore, when at least a portion of the heat generated from the semiconductor chip SC is transferred from the first wiring 12N through the first insulating substrate 10 to the second wiring 22 (see FIG. 1), the heat is transferred from the first wiring 12N through the non-through vias NV and then from the first insulating substrate 10 to the second wiring 22, thereby enabling efficient dissipation of heat generated from the electronic components. Furthermore, according to the wiring board 1 of this embodiment, the non-through vias NV are formed in the portion of the first surface 10F where the second wiring 22 is not arranged when viewed through from the first surface 10F to the second surface 10B. Therefore, even if the depth of the non-through via NV (the length from the first surface 10F to the bottom surface BM of the non-through via NV) fluctuates due to processing variations and becomes deeper than a preset depth, the second wiring 22 is not arranged on the portion of the second surface 10B facing the bottom surface BM of the non-through via NV, so it is possible to ensure insulation between the non-through via NV and the second wiring 22. Therefore, according to the wiring board 1 of this embodiment, even if there are processing variations in the non-through via NV, it is possible to efficiently dissipate heat generated from the semiconductor chip SC while ensuring insulation between the non-through via NV and the second wiring 22.
[0028] 1, the portion of the first surface 10F where the first wiring 12P is arranged is the portion where the second wiring 22 (22L, 22R) is arranged when viewed through the first surface 10F to the second surface 10B. Therefore, since the distance from the first wiring 12P to the second wiring 22 (22L, 22R) is relatively short, heat generated by the electronic components can be efficiently dissipated. In contrast, in the cross section of FIG. 1, the portion of the first surface 10F where the first wiring 12N is arranged is the portion where the second wiring 22 (22L, 22R) is not arranged when viewed through the first surface 10F to the second surface 10B. Therefore, since the distance from the first wiring 12N to the second wiring 22 (22L, 22R) is longer than the distance from the first wiring 12P to the second wiring 22 (22L, 22R), it can be said that the formation of the non-penetrating via NV compensates for the heat dissipation efficiency.
[0029] Furthermore, in the wiring board 1 of this embodiment, there is no wiring connected to the side surface SD of the non-through via NV. Therefore, since there is no wiring connected to the side surface SD of the non-through via NV, it is possible to prevent heat generated from the wiring from concentrating on the non-through via NV. Therefore, while avoiding localized heat generation, heat transferred from the first wiring 12N in the non-through via NV can be efficiently transferred toward the bottom surface BM of the non-through via NV.
[0030] Furthermore, in the wiring board 1 of this embodiment, there is no wiring connected to the bottom surface BM of the non-through via NV. This ensures insulation between the non-through via NV and the second wiring 22. If there is wiring connected to the bottom surface BM of the non-through via NV, the wiring tends to be routed approximately parallel to the first surface 10F or the second surface 10B, and the distance between the wiring connected to the bottom surface BM of the non-through via NV and the second wiring 22 is short, making it highly likely that insulation cannot be ensured. Furthermore, if there is no wiring connected to either the side surface SD or the bottom surface BM of the non-through via NV, the non-through via NV does not have a conductive function, and therefore, a material constituting the non-through via NV can be selected taking into account only thermal conductivity without considering electrical conductivity.
[0031] Furthermore, in the wiring board 1 of this embodiment, the maximum width of the non-through via NV is equal to or smaller than the minimum width of the first wiring 12N located above the non-through via NV. Therefore, the minimum width of the first wiring 12N is designed to ensure insulation from other members (for example, the first wiring 12P and the second wiring 22), and therefore, insulation from other members can also be ensured for non-through vias NV having a maximum width smaller than this minimum width.
[0032] Furthermore, in the wiring board 1 of this embodiment, the length from the first surface 10F to the bottom surface BM of the non-through via NV is two-thirds or less of the length from the first surface 10F to the second surface 10B in the portion where the non-through via NV is formed. Therefore, a certain degree of length can be secured for the length from the first surface 10F to the bottom surface BM of the non-through via NV while maintaining the rigidity of the first insulating substrate 10.
[0033] Furthermore, in the wiring board 1 of this embodiment, the material constituting the first insulating substrate 10 and the second insulating substrate 30 contains Al2O3, so that the first insulating substrate 10 and the second insulating substrate 30 have heat resistance, wear resistance, and the like in addition to insulation properties.
[0034] Furthermore, in the wiring board 1 of this embodiment, the non-through vias NV are made of Cu, which has high thermal conductivity, allowing the heat generated from the semiconductor chip SC to be dissipated more efficiently.
[0035] <Modification of this embodiment> The present invention is not limited to the above-described embodiment, and can be embodied in various forms without departing from the spirit of the invention. For example, the following modifications are also possible.
[0036] The above embodiment is an example of a wiring substrate, and the configuration of the wiring substrate can be modified in various ways. For example, the electronic components mounted on the wiring substrate are not limited to semiconductor chips, but may be light-emitting elements such as LED chips or other electronic components. The arrangement of the first wiring and the second wiring does not have to be as illustrated in FIGS. 1 and 2. The material constituting the first insulating substrate and the second insulating substrate is not limited to Al2O3, but may include any of AlN, SiN, and SiC. The material constituting the first insulating substrate and the material constituting the second insulating substrate may be different materials.
[0037] Although the material constituting the non-through via is the same as the material constituting the first wiring, it may be a material different from the material constituting the first wiring. Furthermore, the non-through via is made of a material with higher thermal conductivity than the first insulating substrate, but this is not limited thereto. A portion of the non-through via may be made of a material with higher thermal conductivity than the first insulating substrate, or the non-through via may contain a material different from the material with higher thermal conductivity than the first insulating substrate. Furthermore, the highly thermally conductive material constituting the non-through via may be Ag, or may contain both Cu and Ag, or may contain a material different from Cu and Ag (e.g., W, Au, Mo, etc.). Furthermore, it does not have to be a metal material as long as it has high thermal conductivity, and any type of material may be used as long as it can maintain a solid state. Furthermore, in the above embodiment, there is no wiring connected to either the side surface or the bottom surface of the non-through via. However, there may be a wiring connected to at least one of the side surface and the bottom surface of the non-through via.
[0038] This aspect has been described above based on embodiments and modifications. However, the above-described embodiments are intended to facilitate understanding of this aspect and are not intended to limit this aspect. This aspect may be modified or improved without departing from the spirit and scope of the claims, and equivalents thereof are included in this aspect. Furthermore, if a technical feature is not described as essential in this specification, it may be deleted as appropriate. [Explanation of symbols]
[0039] 1...Wiring board 10...First insulating substrate 10F…First page 10B…Second side 12, 12P, 12N...First wiring 14... Diffusion prevention layer 16...Conductive coating 18...Bump 22,22L,22R…Second wiring 24... Diffusion prevention layer 26...Conductive coating 29...Solder 30...Second insulating substrate NV: Non-penetrating via PV1, PV2...Through via
Claims
1. A wiring board, an insulating substrate on which electronic components are mounted; a first wiring that is disposed on a first surface of the insulating substrate that faces the electronic component and that is connected to the electronic component; a second wiring disposed on a second surface of the insulating substrate opposite to the first surface, the insulating substrate has a portion of the first surface on which the second wiring is not arranged when viewed through from the first surface to the second surface, and a non-penetrating via is formed in the portion on which the first wiring is arranged; At least a portion of the non-through via is made of a material having a higher thermal conductivity than the insulating substrate, a maximum width of the non-through via is equal to or less than a minimum width of the first wiring located above the non-through via; A wiring board characterized in that there is no wiring connected to the bottom surface of the non-penetrating via.
2. 2. The wiring board according to claim 1, A wiring board characterized in that there is no wiring connected to the side surface of the non-penetrating via.
3. 3. The wiring board according to claim 1, A wiring board characterized in that the length from the first surface to the bottom surface of the non-through via is less than two-thirds of the length from the first surface to the second surface in the portion where the non-through via is formed.
4. 4. The wiring board according to claim 1, The insulating substrate is made of AlN, Al 2 O 3 , SiN, or SiC.
5. 5. The wiring board according to claim 1, A wiring board, characterized in that a material constituting at least a part of the non-through via contains any one of Cu, W, Au, Mo, and Ag.
Citation Information
Patent Citations
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