Manufacturing method for semiconductor chip with adhesive, manufacturing method for semiconductor device, and manufacturing method for semiconductor package

Abstract

To provide a method for manufacturing a semiconductor chip with an adhesive capable of manufacturing a semiconductor chip with an adhesive capable of suppressing excessive protrusion of the adhesive during thermocompression bonding to a substrate, a method for manufacturing a semiconductor device, and a method for manufacturing a semiconductor package.SOLUTION: A method for manufacturing a semiconductor chip with an adhesive includes a dicing step of cutting a laminate of a substrate layer and an adhesive layer by dicing by irradiation with a laser beam to manufacture a semiconductor chip with an adhesive, and the adhesive layer is made of an adhesive containing a thermosetting resin.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present disclosure relates to a method for manufacturing an adhesive-attached semiconductor chip, a method for manufacturing a semiconductor device, and a method for manufacturing a semiconductor package. [Background technology]

[0002] As transmission speeds increase, semiconductor packages such as HBM (High Bandwidth Memory) are sometimes adopted as high-speed memories. A semiconductor package is obtained by manufacturing a semiconductor device on which a semiconductor element is mounted, covering the semiconductor element with an encapsulant to obtain an encapsulated structure, and then processing the encapsulated structure.

[0003] As a method for manufacturing the above-mentioned semiconductor device, a method for mounting semiconductor elements by thermocompression bonding a plurality of adhesive-backed semiconductor chips onto a base is conventionally known. This publication proposes using a specific thermosetting adhesive as the adhesive for the adhesive-backed semiconductor chips to suppress misalignment when mounting the semiconductor chips by thermocompression bonding. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Patent No. 6483500 Summary of the Invention [Problem to be solved by the invention]

[0005] However, the method for manufacturing a semiconductor device described in Patent Document 1 has the following problems. That is, the manufacturing method of a semiconductor device described in Patent Document 1 leaves room for improvement in terms of suppressing excessive adhesive extrusion when mounting semiconductor elements by thermocompression bonding multiple semiconductor chips with adhesive onto a base. As a result, there is also room for improvement in terms of improving the mounting density of semiconductor elements when mounting multiple semiconductor elements on a base, and in terms of reducing the size of semiconductor packages when the resulting semiconductor device is sealed to obtain a sealed structure and then the sealed structure is processed to manufacture a semiconductor package.

[0006] The present disclosure aims to provide a method for manufacturing an adhesive-attached semiconductor chip, a method for manufacturing a semiconductor device, and a method for manufacturing a semiconductor package that can manufacture an adhesive-attached semiconductor chip that can suppress excessive adhesive overflow during thermocompression bonding to a base. [Means for solving the problem]

[0007] The present inventors conducted extensive research to solve the above-mentioned problems. First, it was thought that controlling the pressure and temperature would be sufficient to prevent adhesive extrusion during thermocompression bonding. However, if the pressure is insufficient, adhesive extrusion during thermocompression bonding can be prevented, but the adhesive may eventually harden, making it difficult to establish an electrical connection between the semiconductor chip and the substrate. On the other hand, if the temperature during thermocompression bonding is increased, the adhesive will harden and become less likely to extrude, but in reality, it takes time for the adhesive to harden, so adhesive extrusion cannot be sufficiently prevented. Therefore, the present inventors conducted further extensive research. As a result, the present inventors considered that adhesive extrusion could be prevented if the peripheral edge of the adhesive was hardened in advance at the start of thermocompression bonding. They then considered that this could be realized when a laminate of a base layer and an adhesive layer is cut by laser dicing to produce an adhesive-coated semiconductor chip. Thus, the present inventors have completed the present disclosure.

[0008] That is, the present disclosure is a method for manufacturing an adhesive-attached semiconductor chip, which includes a dicing step of cutting a laminate of a base layer and an adhesive layer by dicing with irradiation of laser light to manufacture an adhesive-attached semiconductor chip, and the adhesive layer is made of an adhesive containing a thermosetting resin.

[0009] According to the method for manufacturing an adhesive-attached semiconductor chip of the present disclosure, when a laser beam is irradiated onto the cut portion of the adhesive layer during the dicing process, the laser beam is locally absorbed at the cut portion, and the heat generated at that time can harden the thermosetting resin contained in the adhesive in the adhesive layer at the cut portion. Therefore, when the resulting adhesive-attached semiconductor chip is thermocompression-bonded to a substrate, the peripheral portion of the adhesive is already hardened. Meanwhile, the adhesive inside the peripheral portion is unhardened and has a lower viscosity than the peripheral portion. Therefore, when the adhesive is pressed by the semiconductor chip, the adhesive inside the peripheral portion, which has a lower viscosity than the peripheral portion, tends to extrude. However, because the peripheral portion of the adhesive is already hardened, the peripheral portion of the adhesive functions as a barrier, preventing the adhesive inside the peripheral portion from leaking outward. As a result, excessive adhesive extrusion is suppressed. Therefore, according to the method for manufacturing an adhesive-attached semiconductor chip of the present disclosure, an adhesive-attached semiconductor chip can be manufactured that can prevent excessive adhesive extrusion during thermocompression bonding to a substrate.

[0010] In the above-described method for manufacturing an adhesive-attached semiconductor chip, the dicing step preferably involves irradiating the laminate with laser light from the adhesive layer side.

[0011] In this case, since cutting residues generated by cutting the base layer by irradiating the laser beam are eliminated at the cutting position of the adhesive layer, the laser beam irradiated at the cutting position is effectively absorbed by the adhesive layer. Therefore, the adhesive layer can be effectively cured at the cutting position irradiated with the laser beam. As a result, the resulting adhesive-attached semiconductor chip can be effectively prevented from overflowing when mounted on a substrate by thermocompression bonding.

[0012] The present disclosure also relates to a method for manufacturing a semiconductor device, which includes an assembly step of thermocompressing an adhesive-backed semiconductor chip manufactured using the above-described method for manufacturing an adhesive-backed semiconductor chip onto a base to mount a semiconductor element, thereby obtaining a semiconductor device.

[0013] According to this method for manufacturing a semiconductor device, the adhesive-backed semiconductor chip manufactured by the method for manufacturing an adhesive-backed semiconductor chip can suppress excessive adhesive extrusion when thermocompression-bonded to a base. Therefore, when this adhesive-backed semiconductor chip is thermocompression-bonded to a base in the mounting process, excessive adhesive extrusion is suppressed. Therefore, when multiple semiconductor elements are mounted on a base, the distance between adjacent adhesive-backed semiconductor chips can be reduced, thereby improving the mounting density of the semiconductor elements.

[0014] Furthermore, the present disclosure is a method for manufacturing a semiconductor package, including a sealing structure formation process for covering the semiconductor element of a semiconductor device manufactured using the above-mentioned semiconductor device manufacturing method with a sealing material to form a sealing structure, and a processing process for processing the sealing structure to manufacture a semiconductor package.

[0015] According to the semiconductor package manufacturing method of the present disclosure, when the adhesive-attached semiconductor chip is thermocompression-bonded to the base in the mounting step of the semiconductor device manufacturing method described above, excessive adhesive extrusion is suppressed. Therefore, when the sealing structure is processed to manufacture a semiconductor package, the distance between the semiconductor chip and the surface of the sealing material can be reduced, and the resulting semiconductor package can be made smaller.

[0016] Furthermore, when adhesive-backed semiconductor chips are thermocompression-bonded to a substrate, excessive adhesive extrusion is suppressed. Therefore, when multiple adhesive-backed semiconductor chips are stacked, adjacent adhesive-backed semiconductor chips are prevented from fusing together excessively extruding adhesive to form sealed gaps. This prevents cracks from occurring in the encapsulant of the semiconductor package due to expansion or contraction of the gap caused by changes in ambient temperature, and prevents moisture and other contaminants from penetrating the adhesive layer obtained by hardening the adhesive through these cracks. As a result, delamination of the semiconductor element due to deterioration of the adhesive layer is suppressed, making it possible to obtain a highly reliable semiconductor package. [Effects of the Invention]

[0017] According to the present disclosure, there are provided a method for manufacturing an adhesive-attached semiconductor chip, a method for manufacturing a semiconductor device, and a method for manufacturing a semiconductor package, which are capable of manufacturing an adhesive-attached semiconductor chip that can suppress excessive adhesive overflow during thermocompression bonding to a base. [Brief explanation of the drawings]

[0018] [Figure 1] FIG. 1 is a cross-sectional view schematically illustrating an example of a semiconductor package manufactured by the semiconductor package manufacturing method of the present disclosure. [Figure 2] FIG. 2 is a cross-sectional view schematically showing one step of the method for manufacturing a semiconductor package according to the present disclosure. [Figure 3] FIG. 3 is a cross-sectional view schematically showing one step of the method for manufacturing a semiconductor package according to the present disclosure. [Figure 4] FIG. 4 is a cross-sectional view schematically showing one step of the method for manufacturing a semiconductor package according to the present disclosure. [Figure 5] FIG. 5 is a cross-sectional view schematically showing one step of the method for manufacturing a semiconductor package according to the present disclosure. [Figure 6] FIG. 6 is a cross-sectional view schematically showing one step of the method for manufacturing a semiconductor package according to the present disclosure. [Figure 7]FIG. 7 is a cross-sectional view schematically showing one step of the method for manufacturing a semiconductor package according to the present disclosure. [Figure 8] FIG. 8 is a cross-sectional view schematically showing one step of the method for manufacturing a semiconductor package according to the present disclosure. [Figure 9] FIG. 9 is a cross-sectional view schematically showing one step of the method for manufacturing a semiconductor package according to the present disclosure. [Figure 10] FIG. 10 is a cross-sectional view schematically showing one step of the method for manufacturing a semiconductor package according to the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0019] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings, although the present disclosure is not limited to the following embodiments.

[0020] <Semiconductor package> FIG. 1 is a cross-sectional view schematically illustrating an example of a semiconductor package manufactured by the semiconductor package manufacturing method of the present disclosure. The semiconductor package 100 shown in FIG. 1 includes a base 1, a semiconductor element 2 provided on a mounting surface 1a of the base 1, and an encapsulant 3 that encapsulates the semiconductor element 2 on the mounting surface 1a of the base 1. The semiconductor element 2 is formed by stacking multiple semiconductor chips 4 with adhesive layers in a direction away from the mounting surface 1a. The semiconductor chip 4 with adhesive layers includes a semiconductor chip 5 and an adhesive layer 6 disposed on the base 1 side of the semiconductor chip 5. The adhesive layer 6 is formed by curing an adhesive containing a thermosetting resin. The base 1 and the semiconductor chips 5 are electrically connected to each other, and the semiconductor chips 5 are also electrically connected to each other. The semiconductor chips 5 have, for example, through electrodes that enable electrical connection between the semiconductor chips 5.

[0021] <Semiconductor package manufacturing method> Next, a method for manufacturing the above-described semiconductor package 100 will be described with reference to Figures 2 to 10. Figures 2 to 10 are cross-sectional views that schematically show a series of steps in the method for manufacturing a semiconductor package according to the present disclosure.

[0022] First, as shown in FIG. 2, a laminate 7 is prepared (laminate preparation step). The laminate 7 can be attached and fixed, for example, onto a dicing tape 8. The laminate 7 includes a base layer 9 for forming the semiconductor chip 5, and an adhesive layer 10 made of an adhesive for forming the adhesive layer 6. The adhesive contains a thermosetting resin. In this embodiment, the laminate 7 is attached to the dicing tape 8 so that the base layer 9 is adhered to the dicing tape 8.

[0023] Next, as shown in FIG. 3, the laminate 7 is cut by dicing using laser light L to obtain adhesive-attached semiconductor chips 200 (dicing process). At this time, dicing is performed by irradiating the laser light L onto cutting locations C of the laminate 7 from the adhesive layer 10 side. In this way, the adhesive-attached semiconductor chip 200 is obtained. The adhesive-attached semiconductor chip 200 includes a semiconductor chip 5 and an adhesive 6A attached to the semiconductor chip 5 (see FIG. 4). At this time, in the dicing process, the laser light L is irradiated onto the cutting locations C of the adhesive layer 10, and is locally absorbed at the cutting locations C, and the heat generated at this time makes it possible to harden the thermosetting resin contained in the adhesive in the adhesive layer 10 at the cutting locations C. As a result, the peripheral portion of the adhesive 6A of the adhesive-attached semiconductor chip 200 becomes hardened.

[0024] Next, as shown in FIG. 4, the resulting adhesive-backed semiconductor chip 200 is picked up using a pickup tool P (pickup process). Specifically, the attachment portion P1 of the pickup tool P is faced downward, and the attachment portion P1 is brought into contact with the adhesive 6A of the adhesive-backed semiconductor chip 200, and then lightly pressed to attach the adhesive-backed semiconductor chip 200 to the attachment portion P1 of the pickup tool P. After the dicing process, the dicing tape 8 may be expanded before the resulting adhesive-backed semiconductor chip 200 is picked up (expanding process). That is, the spacing between adjacent adhesive-backed semiconductor chips 200 may be increased by separating them from each other. In this case, the adhesive-backed semiconductor chip 200 can be easily picked up by the pickup tool P. Furthermore, even if the laminate 7 cannot be sufficiently divided by the laser light L alone, the laminate 7 can be divided, and adjacent adhesive-backed semiconductor chips 200 can be separated from each other. The expanding process may be performed at room temperature or at a low temperature of about 0°C to -30°C. After the expanding step, the adhesive-attached semiconductor chips 200 may be pushed upward from the backside of the dicing tape 8 using a push-up tool A. In this case, the adhesive-attached semiconductor chips 200 can be easily picked up. The pickup tool P is a device for picking up the adhesive-attached semiconductor chips 200. The pickup tool P may be, for example, a suction collet with a suction function. Furthermore, a heat shrinking step may be performed after the expanding step and before the pickup step. The heat shrinking step is a step in which an annular region of the dicing tape 8 surrounding the laminate 7 is heated to shrink the annular region into an annular shape. This heat shrinking step applies tension to the dicing tape 8, thereby increasing the spacing between adjacent adhesive-attached semiconductor chips 200. This further reduces pickup errors and improves the visibility of the adhesive-attached semiconductor chips 200 when they are picked up.

[0025] Next, as shown in FIG. 5, the picked-up adhesive-backed semiconductor chip 200 is transferred from the pickup tool P to a bonding tool B. The transfer of the adhesive-backed semiconductor chip 200 can be performed, for example, as follows. That is, first, the pickup tool P is rotated so that the attachment part P1 faces upward, thereby placing the picked-up adhesive-backed semiconductor chip 200 facing upward. Then, the bonding tool B is attached to the upper side of the adhesive-backed semiconductor chip 200. Specifically, the attachment part B1 of the bonding tool B is attached to the semiconductor chip 5 of the adhesive-backed semiconductor chip 200. The bonding tool B is a device that has the function of applying heat and pressure to the adhesive-backed semiconductor chip 200.

[0026] Next, as shown in FIG. 6, the adhesive-attached semiconductor chip 200 is placed on the mounting surface 1a of the base 1. Specifically, the adhesive 6A of the adhesive-attached semiconductor chip 200 is brought into contact with the base 1. Then, the adhesive-attached semiconductor chip 200 is heated and pressurized with a bonding tool B to thermocompression bond it to the base 1. When the adhesive-attached semiconductor chip 200 is thermocompression bonded to the base 1 in this manner, the adhesive 6A hardens and becomes an adhesive layer 6. As a result, the adhesive-attached semiconductor chip 200 becomes a semiconductor chip 4 with an adhesive layer.

[0027] At this time, in the adhesive-attached semiconductor chip 200, the adhesive 6A is sandwiched between the semiconductor chip 5 and the base 1. At this time, the peripheral portion of the adhesive 6A is exposed and in a cured state. On the other hand, the adhesive inside the peripheral portion of the adhesive 6A is uncured and has a lower viscosity than the peripheral portion. Therefore, when the adhesive 6A is pressed by the semiconductor chip 5, the inner adhesive 6A, which has a lower viscosity than the peripheral portion, tends to extrude. However, because the peripheral portion of the adhesive 6A has already cured, the peripheral portion of the adhesive 6A functions as a barrier, preventing the adhesive 6A inside the peripheral portion from flowing outward. As a result, excessive extrusion of the adhesive 6A is suppressed. That is, when the adhesive-attached semiconductor chip 200 is viewed from the semiconductor chip 5 side in FIG. 6, the amount of extrusion from the peripheral portion of the semiconductor chip 5 in the portion indicated by the symbol F is suppressed.

[0028] Next, in the same manner as above, as shown in Figure 7, a semiconductor chip 200 with adhesive is further stacked on the semiconductor chip 4 with adhesive layer. At this time, since the peripheral edge of the adhesive 6A has already hardened, the adhesive 6A inside the peripheral edge is prevented from flowing outward. As a result, excessive overflow of the adhesive 6A is prevented. In this way, a plurality of semiconductor chips 4 with adhesive layer are stacked on the base 1, and a semiconductor element 2 consisting of a plurality of semiconductor chips 4 with adhesive layer is mounted (mounting process).

[0029] Next, as shown in FIG. 8 , another semiconductor element 2 is mounted next to the semiconductor element 2 mounted on the base 1 in the same manner as the semiconductor element 2. Thereafter, if necessary, another semiconductor element 2 is mounted on the base 1. In this manner, a semiconductor device 300 is obtained. The adhesive-attached semiconductor chip 200 manufactured at this time is capable of suppressing excessive overflow of the adhesive 6A when thermocompression-bonded to the base 1. Therefore, when this adhesive-attached semiconductor chip 200 is thermocompression-bonded to the base 1 in the mounting process, excessive overflow of the adhesive 6A is suppressed. Therefore, when multiple semiconductor elements 2 are mounted on the base 1, the distance between adjacent adhesive-attached semiconductor chips 200 can be reduced, and the mounting density of the semiconductor elements 2 can be improved.

[0030] Next, as shown in FIG. 9, the semiconductor element 2 of the semiconductor device 300 is covered with the sealing material 3 to form a sealing structure 400 (sealing structure forming step).

[0031] 10, the sealing structure 400 is processed to manufacture the semiconductor package 100 (processing step). For example, the sealing structure 400 is cut at the cutting portions 401 to manufacture the semiconductor package 100. In this manner, the semiconductor package 100 is obtained.

[0032] According to the above-described method for manufacturing a semiconductor package, excessive overflow of adhesive 6A is suppressed when adhesive-attached semiconductor chip 200 is thermocompression bonded to base 1 in the mounting step of the method for manufacturing semiconductor device 300. Therefore, when semiconductor package 100 is manufactured by processing sealing structure 400, the distance between semiconductor chip 5 and the surface of sealing material 3 can be reduced, and the resulting semiconductor package 100 can be made smaller.

[0033] Furthermore, when the adhesive-attached semiconductor chip 200 is thermocompression-bonded to the base 1, excessive extrusion of the adhesive 6A is suppressed. Therefore, when multiple adhesive-layer-attached semiconductor chips 4 are stacked, the excessively extruding adhesive 6A is prevented from fusing together and forming sealed gaps between adjacent adhesive-attached semiconductor chips 200. This prevents cracks from occurring in the encapsulant 3 of the semiconductor package 100 due to expansion or contraction of gaps caused by changes in ambient temperature, and prevents moisture and the like from penetrating into the adhesive layer 6 from these cracks. As a result, delamination of the semiconductor element 2 due to deterioration of the adhesive layer 6 is suppressed, making it possible to obtain a highly reliable semiconductor package 100.

[0034] Furthermore, in this embodiment, in the dicing step, dicing is performed by irradiating the laminate 7 with laser light L from the adhesive layer 10 side.

[0035] Therefore, at the cutting position C in the adhesive layer 10, there is no cutting residue generated by cutting the base material layer 9 by irradiating the laser light L, and the laser light L irradiated at the cutting position C is effectively absorbed by the adhesive layer 10. Therefore, the adhesive layer 10 can be effectively cured at the cutting position C where the laser light L is irradiated. As a result, the obtained adhesive-attached semiconductor chip 200 can effectively prevent the adhesive 6A from spilling out when mounted on the base 1 by thermocompression bonding.

[0036] Next, each of the above steps will be described in detail. (Laminate preparation process) The substrate layer 9 is diced to separate the semiconductor chips 5. The substrate layer 9 includes, for example, a main body portion and connection portions provided on one surface (the adhesive layer 10 side) or both surfaces of the main body portion. When the substrate layer 9 has connection portions on both surfaces of the main body portion, the substrate layer 9 may have through electrodes that electrically connect the connection portions on both surfaces. The main body portion of the substrate layer 9 is made of, for example, a semiconductor wafer. The connection portions are made of, for example, bumps. The bumps are made of a material that mainly contains, for example, a metal such as gold, silver, copper, solder (main component being, for example, tin-silver, tin-lead, tin-bismuth, tin-copper, or tin-silver-copper), tin, or nickel. The bumps may be made of only a single component, or may be made of multiple components. The bumps may have a structure in which these metals are laminated.

[0037] The adhesive layer 10 may be non-conductive or conductive. The adhesive constituting the adhesive layer 10 may be any adhesive containing a thermosetting resin. The thermosetting resin is not particularly limited as long as it is a resin that hardens when heated, and may include, for example, an epoxy resin and a resin that can act as a curing agent for the epoxy resin. The adhesive may further contain a high molecular weight component, an inorganic filler, a coupling agent, a curing accelerator, etc. If the adhesive layer 10 is non-conductive, the adhesive may further contain a fluxing agent.

[0038] Any epoxy resin having an epoxy group in the molecule can be used without particular limitation. Examples of epoxy resins include bisphenol A epoxy resins, bisphenol F epoxy resins, bisphenol S epoxy resins, phenol novolac epoxy resins, cresol novolac epoxy resins, bisphenol A novolac epoxy resins, bisphenol F novolac epoxy resins, dicyclopentadiene skeleton-containing epoxy resins, stilbene epoxy resins, triazine skeleton-containing epoxy resins, fluorene skeleton-containing epoxy resins, triphenolmethane epoxy resins, biphenyl epoxy resins, xylylene epoxy resins, biphenyl aralkyl epoxy resins, naphthalene epoxy resins, polyfunctional phenols, and diglycidyl ether compounds of polycyclic aromatics such as anthracene. These may be used alone or in combination of two or more.

[0039] Examples of resins that can serve as curing agents for epoxy resins include novolak-type phenolic resins obtained by condensing or co-condensing phenols such as phenol, cresol, resorcinol, catechol, bisphenol A, bisphenol F, phenylphenol, and aminophenol and / or naphthols such as α-naphthol, β-naphthol, and dihydroxynaphthalene with compounds having an aldehyde group such as formaldehyde under an acidic catalyst, phenol aralkyl resins and naphthol aralkyl resins synthesized from phenols such as allylated bisphenol A, allylated bisphenol F, allylated naphthalenediol, phenol novolak, and phenol and / or naphthols with dimethoxyparaxylene or bis(methoxymethyl)biphenyl, etc. These may be used alone or in combination of two or more.

[0040] The high molecular weight component preferably has a glass transition temperature (Tg) of 50° C. or less. Examples of the high molecular weight component include acrylic resin, polyester resin, polyamide resin, polyimide resin, silicone resin, butadiene resin, acrylonitrile resin, and modified products thereof.

[0041] Examples of inorganic fillers include aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, magnesium silicate, calcium oxide, magnesium oxide, aluminum oxide, aluminum nitride, aluminum borate whisker, boron nitride, silica, etc. These may be used alone or in combination of two or more.

[0042] The coupling agent may be a silane coupling agent. Examples of the silane coupling agent include γ-ureidopropyltriethoxysilane, γ-mercaptopropyltrimethoxysilane, 3-phenylaminopropyltrimethoxysilane, and 3-(2-aminoethyl)aminopropyltrimethoxysilane. These may be used alone or in combination of two or more.

[0043] The curing accelerator is not particularly limited, and a commonly used one can be used. Examples of the curing accelerator include imidazoles and their derivatives, organic phosphorus compounds, secondary amines, tertiary amines, and quaternary ammonium salts. These may be used alone or in combination of two or more.

[0044] The fluxing agent is, for example, a compound having a group represented by formula (1). As the fluxing agent, one containing only one type of group represented by the following formula (1) or two or more types thereof can be used.

[0045] [ka] In formula (1), R 1 represents a hydrogen atom or an electron-donating group. Examples of the electron-donating group include an alkyl group, a hydroxyl group, an amino group, an alkoxy group, and an alkylamino group. The electron-donating group is preferably one that is less reactive with other components (such as epoxy resins), and is preferably an alkyl group, a hydroxyl group, or an alkoxy group, and more preferably an alkyl group.

[0046] The alkyl group is preferably an alkyl group having 1 to 10 carbon atoms, and more preferably an alkyl group having 1 to 5 carbon atoms. Basically, the more electron-donating groups there are, the stronger the electron-donating property is, but the greater the steric hindrance. Therefore, the alkyl group may be linear or branched, but is preferably linear. When the alkyl group is linear, from the viewpoint of reducing steric hindrance, the number of carbon atoms in the alkyl group is preferably equal to or less than the number of carbon atoms in the main chain containing the carboxy group.

[0047] The alkoxy group is preferably an alkoxy group having 1 to 10 carbon atoms, and more preferably an alkoxy group having 1 to 5 carbon atoms. The more electron-donating groups there are, the stronger the electron-donating property, but the greater the steric hindrance. Therefore, the alkyl group portion of the alkoxy group may be linear or branched, and is preferably linear. When the alkyl group portion of the alkoxy group is linear, from the viewpoint of reducing steric hindrance, it is preferable that the number of carbon atoms is equal to or less than the number of carbon atoms of the main chain containing the carboxylic acid.

[0048] Examples of the alkylamino group include a monoalkylamino group and a dialkylamino group. The monoalkylamino group is preferably a monoalkylamino group having 1 to 10 carbon atoms, and more preferably a monoalkylamino group having 1 to 5 carbon atoms. The alkyl group portion of the monoalkylamino group may be linear or branched, and is preferably linear.

[0049] The dialkylamino group is preferably a dialkylamino group having 1 to 20 carbon atoms, more preferably a dialkylamino group having 1 to 10 carbon atoms. The alkyl group portion of the dialkylamino group may be linear or branched, and is preferably linear.

[0050] The fluxing agent is preferably a compound having two carboxy groups (dicarboxylic acid). Compared with a compound having one carboxy group (monocarboxylic acid), a compound having two carboxy groups is less likely to volatilize even at high temperatures during mounting, and the occurrence of voids can be further suppressed. Furthermore, when a compound having two carboxy groups is used, the increase in viscosity of the adhesive during storage and mounting can be further suppressed compared with when a compound having three or more carboxy groups is used. As a result, the connection reliability of the semiconductor package 100 can be further improved.

[0051] A suitable fluxing agent is a compound represented by the following formula (2): The fluxing agent made of the compound represented by the following formula (2) can further improve the reflow resistance and connection reliability of the semiconductor package 100. [ka] In formula (2), R 1 and R 2 each independently represents a hydrogen atom or an electron-donating group, and n represents an integer of 0 to 10.

[0052] In formula (2), n is preferably an integer of 2 to 10, and more preferably an integer of 2 to 8. When n is 10 or less, flux activity is exhibited in a shorter time, and even better connection reliability can be obtained, particularly when the connection time is short. Furthermore, when n is 2 or more, volatilization is less likely even at high temperatures during connection, and the generation of voids can be further suppressed.

[0053] R 1 and R 2 may be a hydrogen atom or an electron-donating group. 1 and R 2 When R is a hydrogen atom, the melting point of the adhesive tends to be lower, which may improve connection reliability (solder wettability). 1 , R 2 The fluxing agents both have the same methyl group. 1 or R2 ) has a higher melting point than one having a methyl group, and the wettability to the bumps tends to decrease depending on the melting point (for example, when it exceeds 150°C).

[0054] As the fluxing agent, for example, a compound in which an electron-donating group is substituted at the 2-position of a dicarboxylic acid selected from succinic acid, glutaric acid, adipic acid, pimelic acid, suberic acid, azelaic acid, sebacic acid, undecanedioic acid, and dodecanedioic acid can be used.

[0055] The adhesive layer 10 can be formed by either applying a varnish of an adhesive composition containing an adhesive and a solvent onto the base layer 9 and heating and drying it, or by attaching an adhesive film containing an adhesive onto the base layer 9.

[0056] (dicing process) The light source of the laser light L used for dicing is not particularly limited as long as it is a light source of laser light used for dicing. For example, a light source that oscillates laser light with a wavelength of 355 nm can be used as the light source of the laser light L. The semiconductor chip 5 of the adhesive-attached semiconductor chip 200 obtained in the dicing process is obtained by cutting the base material layer 9, and like the base material layer 9, has a main body portion and connection portions provided on one side (adhesive side) or both sides of the main body portion. When the semiconductor chip 5 has connection portions on both sides of the main body portion, the semiconductor chip 5 may have through electrodes that electrically connect the connection portions on both sides. The main body portion of the semiconductor chip 5 is a portion obtained by cutting the main body portion of the base material layer 9. The connection portions are composed of, for example, bumps. The material of the bumps mainly contains, for example, metals such as gold, silver, copper, solder (main components of which are, for example, tin-silver, tin-lead, tin-bismuth, tin-copper, tin-silver-copper), tin, and nickel. The bumps may be composed of only a single component or multiple components. The bumps may have a structure in which these metals are laminated.

[0057] (mounting process) In the mounting process, the adhesive-attached semiconductor chip 200 is thermocompression bonded to the base 1. The heating temperature at this time is not particularly limited as long as it is a temperature at which the thermosetting resin contained in the adhesive 6A hardens, but may be, for example, 100 to 200°C. The pressure is not particularly limited as long as it is sufficient to electrically connect the base 1 and the semiconductor chip 5, and may be, for example, 0.1 to 5 MPa. The time for thermocompression bonding is not particularly limited, but may be, for example, 2 to 30 seconds.

[0058] The base 1 is composed of, for example, a circuit board having a main body and a circuit part provided on the surface of the main body. Examples of the circuit part include a circuit pattern and an interposer. The base 1 may be a semiconductor wafer. The semiconductor wafer is, for example, a thin semiconductor wafer having a thickness of 50 to 700 μm. The semiconductor wafer may be made of single crystal silicon, polycrystalline silicon, various ceramics, or a compound semiconductor such as gallium arsenide. From the viewpoint of suppressing warpage, the thickness of the base 1 may be, for example, 50 to 500 μm, or may be 200 to 900 μm.

[0059] When multiple semiconductor elements 2 are mounted on the base 1, it is preferable to mount them so that the protruding portions of the adhesive layer 6 of adjacent semiconductor elements 2 are spaced apart from each other. In this case, when processing the sealing structure 400, the protruding portions of the adhesive layer 6 are cut off, and exposure of the protruding portions of the adhesive layer 6 in the semiconductor package 100 is suppressed. This prevents moisture and the like from easily penetrating the adhesive layer 6, and suppresses delamination of the semiconductor elements 2 due to deterioration of the adhesive layer 6.

[0060] (Sealing structure formation process) The sealing material 3 used in the sealing structure forming step is not particularly limited as long as it is a material having a sealing function, and examples of the sealing material 3 include resins such as epoxy resins. It is preferable that the sealing material 3 has a higher sealing function than the adhesive layer 6. In this case, the adhesive layer 6 is more sufficiently protected from the intrusion of moisture and oxygen.

[0061] The processing method for the sealing structure 400 is not particularly limited, but examples of the processing method include dicing. Dicing may be performed using either a rotary blade or laser light, but laser light dicing is preferred. In this case, the dicing width can be reduced, so there is no need to ensure a large distance between the semiconductor elements 2 in consideration of the dicing width. This allows for further improvement in the packaging density of the semiconductor elements 2 in the semiconductor device 300.

[0062] Although the embodiments of the present disclosure have been described in detail above, the present disclosure is not limited to the above embodiments. For example, in the above embodiments, the semiconductor device 300 has multiple semiconductor elements 2 on the base 1, but it may have only one semiconductor element 2. Furthermore, in the above embodiment, the semiconductor element 2 is configured by stacking a plurality of semiconductor chips 4 with adhesive layers, but the semiconductor element 2 may also be configured by one semiconductor chip 4 with adhesive layers. [Explanation of symbols]

[0063] L...laser light, 1...substrate, 2...semiconductor element, 3...encapsulant, 7...laminated body, 9...base material layer, 10...adhesive layer, 100...semiconductor package, 200...semiconductor chip with adhesive, 300...semiconductor device, 400...encapsulated structure.

Claims

1. a dicing step of cutting the laminate of the base material layer and the adhesive layer by dicing with laser light irradiation to produce adhesive-attached semiconductor chips; In the dicing step, the dicing is performed by irradiating the laminate with laser light from the adhesive layer side, the base material layer is a base material layer on which a semiconductor chip is formed, The method for manufacturing an adhesive-attached semiconductor chip, wherein the adhesive layer is made of an adhesive containing a thermosetting resin.

2. 10. A method for manufacturing a semiconductor device, comprising a mounting step of thermocompressing an adhesive-attached semiconductor chip manufactured by the method for manufacturing an adhesive-attached semiconductor chip according to claim 1 onto a substrate to mount a semiconductor element, thereby obtaining a semiconductor device.

3. a sealing structure forming step of covering the semiconductor element of the semiconductor device manufactured by the method of manufacturing a semiconductor device according to claim 2 with a sealing material to form a sealing structure; and a processing step of processing the sealing structure to manufacture a semiconductor package.

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