Ceramic circuit board, manufacturing method therefor, and double-sided cooling type power module having same

Abstract

The present invention provides a ceramic circuit board exhibiting excellent heat dissipation performance by including copper structures, a manufacturing method therefor, and a double-sided cooling type power module having same. The ceramic circuit board, according to an embodiment of the present invention, comprises: a ceramic substrate comprising a ceramic layer, a first base copper layer disposed on a first surface of the ceramic layer, and a second base copper layer disposed on a second surface of the ceramic layer; first copper structures which are disposed on portions of the first base copper layer, are formed by printing, compressing, and sintering a copper-containing paste, and have differential porosities, wherein the porosity is lower on the upper portion thereof than the lower portion that is closer to the first base copper layer; and cooling structures which are formed by printing, compressing, and sintering a copper-containing paste and disposed on portions of the second base copper layer to protrude therefrom, forming one body therewith.

Description

Ceramic circuit board, manufacturing method thereof, and double-sided cooling power module having the same

[0001] The technical idea of ​​the present invention relates to a ceramic circuit board, and more specifically, to a ceramic circuit board having a cooling structure, a method for manufacturing the same, and a double-sided cooling power module having the same.

[0002] Power semiconductor devices, widely used in mobile devices, home appliances, and automobiles, play a role in converting, processing, and controlling power. Power semiconductor devices, which require high current and voltage for power supply, generate a significant amount of heat, and therefore use ceramic circuit boards made of ceramic materials such as Al2O3, AlN, Zirconia Toughened Alumina (ZTA), and Si3N4. Ceramics have high insulation, mechanical strength, and relatively high heat dissipation performance, making them suitable as substrates for high-power power semiconductor devices. In addition, ceramic circuit boards may include conductive patterns made of aluminum (Al) or copper (Cu), which have high thermal conductivity, on the ceramic material.

[0003] In order to easily dissipate heat generated from power semiconductor devices, a double-sided cooling type power module is being used, which can cool both sides by placing ceramic circuit boards on both sides of the power semiconductor devices. In addition, to dissipate heat from the power module, cooling fins are placed on the outside of the ceramic circuit board, and heat can be transferred to a water cooler installed externally through the cooling fins.

[0004] Conventional techniques for manufacturing such ceramic circuit boards use an etching process to form a conductive layer pattern, which limits the shape of the pattern. In particular, conventional techniques using an etching process have difficulty forming patterns with step thicknesses or multilayer patterns to accommodate various types of power semiconductor devices. Therefore, conventionally, conductive spacers made of a Mo-Cu alloy have been used to secure the step thicknesses of the patterns. However, the Mo-Cu alloy conductive spacers have low thermal conductivity and require an additional process of individually mounting small spacers on the ceramic circuit board, which is a limitation. In addition, attaching cooling fins to the outer surface of the ceramic circuit board has the limitation that sufficient heat transfer between the ceramic circuit board and the cooling fins is not achieved. A method of applying thermal grease to the contact surface to ensure smooth heat transfer between them is also available, but this has limitations in improving heat dissipation performance.

[0005] Conventional power modules have a structure in which a cooling structure is bonded to the outside of a ceramic circuit board using a thermal interface material (TIM) to dissipate heat to the outside. However, the material constituting the TIM generally has a thermal conductivity of 20 W / mK or less, which is much lower than that of copper (380 W / mK) or silicon nitride (80 W / mK) constituting the ceramic circuit board. Therefore, there is a limitation in that heat dissipation loss occurs at the bonding interface of the TIM, which reduces cooling efficiency.

[0006] <Prior Art Document> Korean Patent Publication No. 2014-0127228

[0007] The technical problem to be achieved by the technical idea of ​​the present invention is to provide a ceramic circuit board having excellent heat dissipation performance including a copper structure, a method for manufacturing the same, and a double-sided cooling power module having the same.

[0008] However, these tasks are exemplary and the technical idea of ​​the present invention is not limited thereto.

[0009] According to one aspect of the present invention, a ceramic circuit board having excellent heat dissipation performance including a copper structure, a method for manufacturing the same, and a double-sided cooling power module having the same are provided.

[0010] According to one embodiment of the present invention, the ceramic circuit board may include a ceramic substrate including a ceramic layer, a first base copper layer disposed on a first surface of the ceramic layer, and a second base copper layer disposed on a second surface of the ceramic layer; a first copper structure disposed on a portion of the first base copper layer, the first copper structure formed by printing, pressing, and sintering a copper-containing paste, the first copper structure having a differential porosity and including a portion on an upper side having a lower porosity than a lower side relatively adjacent to the first base copper layer; and a cooling structure formed by printing, pressing, and sintering a copper-containing paste, the cooling structure being protrudingly disposed and integrally formed with the second base copper layer on a portion of the second base copper layer.

[0011] According to one embodiment of the present invention, the cooling structure may have a fin shape, a groove shape, or a channel shape.

[0012] According to one embodiment of the present invention, the porosity of the first copper structure may decrease from the lower side relatively adjacent to the first base copper layer toward the upper side.

[0013] According to one embodiment of the present invention, the first copper structure may include a first base portion; and a first surface portion disposed on the first base portion and having a lower porosity than the first base portion.

[0014] According to one embodiment of the present invention, the first base portion may have a porosity in a range of more than 5% by volume and less than or equal to 20% by volume, and the first surface portion may have a porosity in a range of more than 0% by volume and less than or equal to 5% by volume.

[0015] According to one embodiment of the present invention, the first copper structure may further include one or more second copper structures formed by printing, pressing, and sintering a copper-containing paste, and disposed on at least a portion of the first copper structure.

[0016] According to one embodiment of the present invention, the second copper structure may have a differential porosity and include a region on the upper side having a lower porosity than the lower side relatively adjacent to the first copper structure.

[0017] According to one embodiment of the present invention, the porosity of the second copper structure may decrease from the lower side relatively adjacent to the first copper structure toward the upper side.

[0018] According to one embodiment of the present invention, the second copper structure may include a second base portion; and a second surface portion disposed on the second base portion and having a lower porosity than the second base portion.

[0019] According to one embodiment of the present invention, the second base portion may have a porosity in a range of more than 5% by volume and less than or equal to 20% by volume, and the second surface portion may have a porosity in a range of more than 0% by volume and less than or equal to 5% by volume.

[0020] According to one embodiment of the present invention, at least one of the first base copper layer and the second base copper layer may be formed as a TPC copper layer formed by printing, pressing, and sintering a copper-containing paste on the ceramic layer.

[0021] According to one embodiment of the present invention, at least one of the first base copper layer and the second base copper layer may include at least one of a bonding copper layer, a laminated copper layer, and a surface copper layer.

[0022] According to one embodiment of the present invention, the bonding copper layer may be formed using a copper-containing bonding paste including glass frit, inorganic particles, copper oxide particles, copper particles, a solvent, and a binder, the laminated copper layer may be formed using a copper-containing laminated paste including inorganic particles, copper particles, a solvent, and a binder, and the surface copper layer may be formed using a copper-containing surface paste including copper oxide particles, copper particles, a solvent, and a binder.

[0023] According to one embodiment of the present invention, the method for manufacturing the ceramic circuit board may include a first step of providing a ceramic layer including a first side and a second side; a second step of forming a first paste layer by printing and pressing a copper-containing paste on the first side of the ceramic layer; a third step of forming a second paste layer by printing and pressing a copper-containing paste on the second side of the ceramic layer; and a fourth step of simultaneously sintering the first paste layer and the second paste layer at a temperature ranging from 500°C to 800°C.

[0024] According to one embodiment of the present invention, the volume ratio of the first paste layer and the second paste layer that are simultaneously sintered may be in the range of 90% to 100%.

[0025] According to one embodiment of the present invention, the second step and the third step can be performed alternately and repeatedly.

[0026] According to one embodiment of the present invention, the second step, the third step, and the fourth step can be performed repeatedly.

[0027] According to one embodiment of the present invention, by repeatedly performing the second step, the third step, and the fourth step, a first base copper layer can be formed on the first surface of the ceramic layer, and at the same time, a second base copper layer can be formed on the second surface of the ceramic layer, a first copper structure can be formed on a portion of the first base copper layer, and at the same time, a cooling structure can be formed on a portion of the second base copper layer.

[0028] According to one embodiment of the present invention, the double-sided cooling power module comprises: a lower ceramic circuit board including a lower ceramic substrate including a lower ceramic layer, a lower first base copper layer, and a lower second base copper layer; a lower first copper structure disposed on a portion of the lower first base copper layer; a lower second copper structure disposed on a portion of the lower first copper structure; and a lower cooling structure disposed on a portion of the lower second base copper layer so as to protrude integrally with the lower second base copper layer; an upper ceramic substrate including an upper ceramic layer, an upper first base copper layer, and an upper second base copper layer; an upper first copper structure disposed on a portion of the upper first base copper layer; an upper second copper structure disposed on a portion of the upper first copper structure; and an upper cooling structure disposed on a portion of the upper second base copper layer so as to protrude integrally with the upper second base copper layer; a first semiconductor element disposed between the lower first copper structure and the upper first copper structure; A second semiconductor element disposed between the lower second copper structure and the upper second copper structure and having a smaller thickness than the first semiconductor element; and a mold layer covering the first semiconductor element and the second semiconductor element by filling a space between the lower ceramic circuit board and the upper ceramic circuit board; wherein at least one of the lower first copper structure, the upper first copper structure, the lower second copper structure, and the upper second copper structure has a differential porosity and may include a region on the upper side having a lower porosity than a lower side relatively adjacent to the lower first base copper layer or the upper first base copper layer.

[0029] According to one embodiment of the present invention, the double-sided cooling power module comprises: a lower ceramic circuit board including a lower ceramic layer, a lower first base copper layer, and a lower second base copper layer; a lower first copper structure disposed on a portion of the lower first base copper layer; a lower second copper structure disposed on a portion of the lower first copper structure; and a lower cooling structure disposed on a portion of the lower second base copper layer so as to protrude integrally with the lower second base copper layer; an upper ceramic substrate including an upper ceramic layer, an upper first base copper layer, an upper second base copper layer, and an upper cooling structure disposed on a portion of the upper second base copper layer so as to protrude integrally with the upper second base copper layer; a first semiconductor element disposed between the lower first copper structure and the upper first base copper layer; a second semiconductor element disposed between the lower second copper structure and the upper first base copper layer and having a smaller thickness than the first semiconductor element; And a mold layer that fills the space between the lower ceramic circuit board and the upper ceramic substrate to cover the first semiconductor element and the second semiconductor element; and at least one of the lower first copper structure and the lower second copper structure may include a region on the upper side having a differential porosity and having a lower porosity than the lower side relatively adjacent to the lower first base copper layer.

[0030] The ceramic circuit board according to the present invention can form a three-dimensional pattern on a ceramic substrate by using a copper structure formed by printing, pressing, and sintering as a spacer, so as to be compatible with various types of semiconductor devices mounted on the substrate. Furthermore, the use of the copper structure improves electrical and thermal conductivity, and enhances durability against thermal cycles.

[0031] In addition, since the above copper structure is a sintered material rather than a rolled material, there are differences in the microstructure, such as not having the directionality that appears in a rolled material, and there are differences in the degree of inclusion and distribution of pores.

[0032] While the Mo-Cu spacer according to the prior art has a porosity of about 0% and thus has high thermal stress and low thermal fatigue characteristics, the copper structure according to the present invention includes a lower layer having a high porosity, thereby providing low thermal stress and improved resistance to thermal fatigue destruction, and further includes an upper layer having a low porosity, thereby preventing bonding defects in power semiconductor devices.

[0033] In addition, since the copper structure has a pyramidal shape, a power semiconductor element can be stably mounted.

[0034] The method for manufacturing a ceramic circuit board according to the present invention can prevent the formation of defects due to heat by performing sintering of a copper structure at a temperature ranging from 500°C to 800°C. In addition, by performing surface blasting treatment, copper oxide formed on the surface of the copper structure during sintering can be removed to provide a smooth surface, thereby ensuring stable bonding of power semiconductor devices mounted on the copper structure.

[0035] The ceramic circuit board according to the present invention can eliminate the need for a thermal interface material (TIM) by forming a cooling structure formed of a copper structure integrally with the ceramic circuit board. Therefore, thermal conductivity can be increased, thereby improving heat dissipation characteristics. Furthermore, the TIM bonding process can be omitted, thereby preventing process defects, simplifying the process, and reducing process costs.

[0036] The effects of the present invention described above are illustrative, and the scope of the present invention is not limited by these effects.

[0037] Figures 1 and 2 are cross-sectional views of a ceramic circuit board according to one embodiment of the present invention.

[0038] FIG. 3 is a cross-sectional view showing a base copper layer and a copper structure of a ceramic circuit board according to one embodiment of the present invention.

[0039] FIG. 4 is a photograph showing the microstructure of a copper structure of a ceramic circuit board according to an embodiment of the present invention.

[0040] FIGS. 5A and 5B are cross-sectional views and photographs showing a pyramid-shaped copper structure of a ceramic circuit board according to one embodiment of the present invention.

[0041] Figure 6 is a flowchart illustrating a method for manufacturing a ceramic circuit board according to one embodiment of the present invention.

[0042] FIG. 7 is a schematic diagram illustrating a method for manufacturing a ceramic circuit board according to an embodiment of the present invention.

[0043] FIGS. 8A, 8B, and 8C are schematic diagrams illustrating a cooling structure of a ceramic circuit board according to one embodiment of the present invention.

[0044] Figure 9 is an ultrasonic inspection result showing whether a defect occurs depending on the sintering temperature of a ceramic circuit board according to an embodiment of the present invention.

[0045] FIG. 10 is a photograph showing the surface state of a copper structure of a ceramic circuit board before and after blasting treatment according to an embodiment of the present invention.

[0046] FIG. 11 is a perspective view illustrating a pair of ceramic circuit boards for forming a double-sided cooling power module according to one embodiment of the present invention.

[0047] FIGS. 12 and 13 are cross-sectional views illustrating a double-sided cooling power module according to one embodiment of the present invention.

[0048] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings. Embodiments of the present invention are provided to more completely explain the technical idea of ​​the present invention to those skilled in the art. The following embodiments may be modified in various different forms, and the scope of the technical idea of ​​the present invention is not limited to the following embodiments. Rather, these embodiments are provided to more faithfully and completely convey the technical idea of ​​the present invention to those skilled in the art. Like reference numerals throughout this specification denote like elements. Furthermore, various elements and areas in the drawings are schematically drawn. Therefore, the technical idea of ​​the present invention is not limited by the relative sizes or intervals drawn in the attached drawings.

[0049] In this specification, a layer formed "on" another layer may refer to a layer formed directly above the other layer, or may refer to an intermediate layer or layers formed on another layer. It should be noted that the meanings of "upper" and "lower" in this specification are relative, and the direction upward from the ceramic substrate is described as "upper", and the direction downward is described as "lower."

[0050] In this specification, power semiconductor devices are exemplary, and cases composed of other semiconductor devices are also included in the technical concept of the present invention.

[0051] Figures 1 and 2 are cross-sectional views of a ceramic circuit board according to one embodiment of the present invention.

[0052] Referring to FIGS. 1 and 2, a ceramic circuit board (1) may include a ceramic substrate (110), a first copper structure (150), and a cooling structure (170). A ceramic circuit board (100) may include a ceramic substrate (110), a first copper structure (150), a second copper structure (160), and a cooling structure (170).

[0053] Hereinafter, components of a ceramic circuit board will be described in detail with reference to FIGS. 1 and 2.

[0054] The ceramic substrate (110) may include a ceramic layer (120), a first base copper layer (130), and a second base copper layer (140).

[0055] The ceramic layer (120) may have a first surface (121) and a second surface (122) that face each other. In FIGS. 1 and 2, the first surface (121) is illustrated as the upper surface and the second surface (122) is illustrated as the lower surface with respect to the ceramic layer (120). The ceramic layer (120) may have excellent thermal conductivity and electrical insulation. The ceramic layer (120) may be formed of a ceramic material, and may include, for example, at least one of Al2O3, AlN, Zirconia Toughened Alumina (ZTA), and Si3N4.

[0056] A first base copper layer (130) may be disposed on a first surface (121) of a ceramic layer (120). The first base copper layer (130) may have a total thickness in the range of, for example, 100 μm to 1000 μm, and may have a total thickness of, for example, about 300 μm.

[0057] The second base copper layer (140) may be disposed on the second surface (122) opposite to the first surface (121) of the ceramic layer (120). The second base copper layer (140) may function as a warpage prevention layer that prevents the ceramic layer (120) from warping during the sintering process for forming the first base copper layer (130) and the sintering process for forming the first copper structure (150) and the second copper structure (160). In addition, the second base copper layer (140) may provide a path for dissipating heat generated from the power semiconductor element to the outside. For this purpose, a cooling structure (170) may be formed integrally with the second base copper layer (140). The second base copper layer (140) may be formed as a single layer or as a plurality of layers.

[0058] The second base copper layer (140) can be formed in the same manner as the first base copper layer (130). The second base copper layer (140) can include the same material as the first base copper layer (130) and can be formed simultaneously.

[0059] The first base copper layer (130) and the second base copper layer (140) may be formed as TPC (thick printed copper) copper layers using TPC technology. The TPC technology may refer to a technology of forming a copper layer having a predetermined thickness by printing, pressing, and sintering using a copper-containing paste. The TPC copper layer may be formed by printing a copper-containing paste on one or both sides of a ceramic layer (120) to form a paste layer, and pressing and sintering the paste layer. Since the TPC technology forms the TPC copper layer using a screen printing method, it does not require an additional etching process and can freely implement various patterning shapes. In addition, the TPC technology may allow a layer formed in one process cycle of printing, pressing, and sintering to have a very small thickness, and the layer may have a thickness in the range of, for example, 10 μm to 100 μm. In addition, since the thickness of the TPC copper layer can be increased by repeatedly performing the above process cycle to form multiple layers, thickness control can be facilitated. In addition, the TPC copper layer can secure overall uniformity in thickness, surface quality, etc. In addition, nickel (Ni), silver (Ag), gold (Au), etc. can be plated on the TPC copper layer.

[0060] In order to form a pattern on the first base copper layer (130), an additional etching process may be required when applying the DBC technology, DPC technology, or AMB technology. Therefore, when using such an etching process, there is a limitation in that there is a limitation in the pattern shape, and it may be difficult to make a difference in thickness between patterns or to form secondary and tertiary patterns on the pattern in order to respond to various types of semiconductor devices. On the other hand, when applying the TPC technology to form the first base copper layer (130), the pattern can be easily formed during printing, and an additional etching process may not be required.

[0061] The first copper structure (150) may be disposed on a portion of the ceramic substrate (110), for example, on a portion of the first base copper layer (130). The first copper structures (150) may all have substantially the same height. The height may refer to the height from the ceramic substrate (110).

[0062] The second copper structure (160) may be disposed on at least a portion of the first copper structure (150). As the second copper structure (160) is formed on at least a portion of the first copper structure (150), the portion where the second copper structure (160) is additionally formed may have a higher height than the portion where only the first copper structure (150) is formed.

[0063] The first copper structure (150) and the second copper structure (160) can be formed using the above-described TPC technology that forms copper layers by printing, pressing, and sintering. Therefore, the first structure (150) and the second copper structure (160) can be sintered bodies made of substantially the same material. The second copper structure (160) can be laminated one or more times on the first copper structure (150). As an example, FIG. 2 shows a single layer of the second copper structure (160) laminated on a portion of the first copper structure (150). However, the present invention is not limited thereto, and the second copper structure (160) can be formed in two or more layers in order to adjust the height of the copper structure as needed.

[0064] The first copper structure (150) and the second copper structure (160) can provide a space in which the power semiconductor element is mounted, and can function as a spacer that corrects a thickness deviation of the power semiconductor element. The height at which the power semiconductor element is disposed can be changed by the arrangement of the first copper structure (150) and the second copper structure (160). That is, as the second copper structure (160) is selectively formed on a portion of the first copper structure (150), the height provided when the first copper structure (150) and the second copper structure (160) are included can be greater than the height provided when only the first copper structure (150) is included. The height can refer to the height from the ceramic substrate (110). Copper structures having different heights are formed, and thus, the thickness deviation of power semiconductor elements having different thicknesses can be corrected.

[0065] The first copper structure (150) and the second copper structure (160) may have the same planar area, or the second copper structure (160) may have a smaller planar area than the first copper structure (150).

[0066] In addition, the first copper structure (150) and the second copper structure (160) can additionally perform the function of wiring that provides an electrical passage. The first copper structure (150) and the second copper structure (160) can be applied with a high current or high voltage from the power semiconductor element.

[0067] The first copper structure (150) and the second copper structure (160) can be integrated by sintering.

[0068] At least one of the first copper structure (150) and the second copper structure (160) may have a surface from which oxides have been removed by blasting treatment.

[0069] The cooling structure (170) may be protruded and disposed integrally with the second base copper layer (140) on the ceramic substrate (110), for example, on a portion of the second base copper layer (140). The cooling structure (170) may have a fin shape, a groove shape, or a channel shape. The cooling structure (170) may include copper or a copper alloy.

[0070] The cooling structure (170) can be formed using the above-described TPC technology that forms a copper layer by printing, pressing, and sintering a copper-containing paste. The cooling structure (170) can be formed continuously in the process of forming the second base copper layer (140). Therefore, the cooling structure (170) can be integrated with the second base copper layer (140). The second base copper layer (140) and the cooling structure (170) can include the same material.

[0071] FIG. 3 is a cross-sectional view showing a base copper layer and a copper structure of a ceramic circuit board according to one embodiment of the present invention.

[0072] Referring to FIG. 3, the first base copper layer (130) may be a sintered body of a copper-containing paste formed by TPC technology. The first copper structure (150) and the second copper structure (160) may be sintered bodies of a copper-containing paste formed by TPC technology.

[0073] The first base copper layer (130), the first copper structure (150), and the second copper structure (160) can be formed by commonly printing a copper-containing paste to form a paste layer and pressing and sintering the paste layer.

[0074] The first base copper layer (130) may be disposed on a portion of the ceramic layer (120). The first base copper layer (130) may be formed using the TPC technology described above.

[0075] The first base copper layer (130) may be composed of a plurality of layers. The first base copper layer (130) may include, for example, at least one of a bonding copper layer (131), a laminated copper layer (132), and a surface copper layer (133).

[0076] The thickness of the first base copper layer (130) can be varied by controlling the thickness of the relatively thick laminated copper layer (132). The laminated copper layer (132) can have a greater thickness than the bonded copper layer (131) and the surface copper layer (133). The bonded copper layer (131) and the surface copper layer (133) can have the same thickness or different thicknesses. The bonded copper layer (131) can have a thickness in the range of, for example, 1 μm to 100 μm, for example, about 20 μm. The laminated copper layer (132) can have a thickness in the range of, for example, 100 μm to 1000 μm. The surface copper layer (133) can have a thickness in the range of, for example, 1 μm to 100 μm, for example, about 30 μm.

[0077] The bonding copper layer (131) may be disposed on at least a portion of the ceramic layer (120). The laminated copper layer (132) may be disposed on the bonding copper layer (131). The surface copper layer (133) may be disposed on the laminated copper layer (132). However, this is exemplary and the technical idea of ​​the present invention is not limited thereto. For example, when the thickness of the first base copper layer (130) is not thick, the first base copper layer (130) may be configured to include the bonding copper layer (131) and the surface copper layer (133), excluding the laminated copper layer (132). Alternatively, when a power semiconductor element is not bonded on the base copper layer (140), the first base copper layer (130) may be configured to include the bonding copper layer (131) and the laminated copper layer (132), excluding the surface copper layer (133).

[0078] The bonding copper layer (131) can be formed by forming a bonding paste layer by printing a copper-containing bonding paste on the ceramic layer (120) using a screen printing method or the like, drying to remove the solvent, pressing the dried bonding paste layer, and then heating to sinter it.

[0079] The laminated copper layer (132) can be formed by printing a copper-containing laminated paste on the bonding copper layer (131) using a screen printing method or the like to form a laminated paste layer, then drying to remove the solvent, pressing the dried laminated paste layer, and then heating to sinter it.

[0080] The surface copper layer (133) can be formed by printing a copper-containing surface paste on the laminated copper layer (132) using a screen printing method or the like to form a surface paste layer, then drying to remove the solvent, pressing the dried surface paste layer, and then heating to sinter it.

[0081] By the above pressing, the internal pores of the bonding paste layer, the laminated paste layer, and the surface paste layer can be reduced and the uniformity of height can be secured.

[0082] The above-described printing, pressing, and sintering steps may be performed repeatedly. For example, after forming one paste layer in one cycle of the printing and pressing, the printing and pressing may be performed again to form a subsequent paste layer on the previously formed paste layer, and this may be repeated to form a plurality of paste layers. The plurality of paste layers may be sintered together. In addition, by repeatedly performing the sintering, the copper layer may be formed. That is, sintering may be performed one or more times for one copper layer constituting the first base copper layer (130). The number of times of the printing, pressing, and sintering may vary.

[0083] Below, the materials constituting the above-described paste forming the first base copper layer (130) will be described.

[0084] The copper-containing bonding paste may include, for example, copper particles, glass frit, inorganic particles, copper oxide particles, a solvent, and a binder.

[0085] The copper-containing laminate paste may include, for example, copper particles, inorganic particles, a solvent, and a binder. Compared to the copper-containing bonding paste, the copper-containing laminate paste may not include glass frit and copper oxide particles.

[0086] The copper-containing surface paste may include copper particles, copper oxide particles, a solvent, and a binder. Compared to the copper-containing bonding paste, the copper-containing surface paste may not include glass frit and inorganic particles.

[0087] The above glass frit is a sintering aid that helps sintering of copper (Cu) particles and can provide better bonding between the ceramic layer (120) and the bonding copper layer (131).

[0088] The above inorganic particles may include powder of at least one of Al2O3, CaO, and ZrO2. The above inorganic particles may function to reduce the shrinkage rate of the paste. For reference, the shrinkage rate can be measured by printing the paste into a disk shape, drying and sintering it, and comparing the diameter of the disk after drying and after sintering.

[0089] The above copper oxide particles may include at least one of CuO and Cu2O, and may perform a function of improving bonding properties with the components to be bonded. The above copper oxide particles may form a process liquid phase during the sintering process. For example, when the ceramic layer (120) includes alumina (Al2O3), the copper oxide may react with alumina to form CuAlO2, CuAl2O4, etc., thereby improving bonding properties.

[0090] The above copper particles may be composed of copper and may be a main component constituting the first base copper layer (130). The copper particles may include fine copper particles having an average particle diameter in the range of 1 μm to 10 μm and may be included in an amount of 60 wt% to 95 wt% of the paste.

[0091] The shrinkage rate of the copper-containing laminate paste may be higher than the shrinkage rate of the copper-containing bonding paste. The shrinkage rate of the copper-containing surface paste may be higher than the shrinkage rate of the copper-containing bonding paste and the shrinkage rate of the copper-containing bonding paste. The shrinkage rate of the copper-containing bonding paste may be, for example, 0% to 3%. The shrinkage rate of the copper-containing laminate paste may be, for example, 3% to 9%. The shrinkage rate of the copper-containing surface paste may be, for example, 10% to 15%.

[0092] The copper-containing bonding paste, the copper-containing laminate paste, and the copper-containing surface paste can change the types and contents of glass frit, inorganic particles, copper oxide particles, copper particles, solvent, and binder in order to achieve a desired thermal expansion coefficient and shrinkage rate.

[0093] The description of the composition and paste for the first base copper layer (130) described above can be equally applied to the second base copper layer (140).

[0094] The first copper structure (150) may be placed on a portion of the first base copper layer (130). The first copper structure (150) may be placed on a portion of the first base copper layer (130) to reduce the difference in thermal expansion coefficient with respect to the power semiconductor element mounted thereon, for example, 5 x 10 -6 / ℃ to 20 x 10 -6 / ℃ can have a coefficient of thermal expansion in the range.

[0095] The first copper structure (150) may be a porous structure having pores within it. The first copper structure (150) may have a differential porosity. This means that the first copper structure (150) includes a region on the upper side having a lower porosity than the lower side that is relatively adjacent to the first base copper layer (130).

[0096] For example, the porosity of the first copper structure (150) may decrease from the lower side relatively adjacent to the first base copper layer (130) toward the upper side.

[0097] For example, the first copper structure (150) may be composed of a plurality of layers and may include a first base portion (151) and a first surface portion (152) disposed on the first base portion (151) and having a lower porosity than the first base portion (151). The first base portion (151) may have a porosity in a range of, for example, more than 5% by volume and less than or equal to 20% by volume. The first surface portion (152) may have a porosity in a range of, for example, more than 0% by volume and less than or equal to 5% by volume.

[0098] Since the first base (151) has a relatively high porosity, the pores perform a buffer function against thermal shock, thereby reducing thermal stress and increasing resistance to thermal fatigue destruction due to thermal stress under repeated thermal history.

[0099] On the other hand, since the first surface portion (152) has a relatively low porosity, it can have a smooth surface, and thus the bonding of the power semiconductor element mounted thereon can be improved. If the first surface portion (152) has a high porosity, void defects may remain on the bonding surface due to the pores, which may result in poor bonding of the power semiconductor element. Therefore, it is preferable to control the first surface portion (152) so that there are no pores or the porosity is low.

[0100] To control this porosity, the particle size and fraction of copper particles included in the paste can be controlled. If the particle size of the copper particles is large or the fraction is low, the porosity can increase, and if the particle size of the copper particles is small or the fraction is large, the porosity can decrease.

[0101] The first paste forming the first base portion (151) may include copper particles having an average particle diameter in a range of more than 3 μm and less than or equal to 10 μm. The second paste forming the first surface portion (152) may include copper particles having an average particle diameter in a range of 100 nm to 3 μm. That is, the average particle diameter of the copper particles included in the second paste may be smaller than the average particle diameter of the copper particles included in the first paste. Due to this difference in the average particle diameter of the copper particles, the first surface portion (152) may have a denser microstructure and a lower porosity than the first base portion (151).

[0102] The first copper structure (150) may have an overall thickness in the range of, for example, 100 μm to 2000 μm. The first base portion (151) may have a greater thickness than the first surface portion (152). The first base portion (151) may have a thickness in the range of, for example, 100 μm to 1900 μm. The first surface portion (152) may have a thickness in the range of, for example, 1 μm to 100 μm, for example, about 20 μm.

[0103] The first copper structure (150) can be formed using the TPC technology described above. The first copper structure (150) can be formed using a copper-containing paste including copper particles, inorganic particles, a solvent, and a binder. The copper-containing paste may further include copper oxide particles. The first copper structure (150) can be formed by printing the copper-containing paste using a screen printing method or the like to form a paste layer, then drying to remove the solvent, pressing the dried paste layer, and then heating to sinter it.

[0104] The above-described printing, pressing, and sintering steps may be performed repeatedly. For example, after forming one paste layer in one cycle of the printing and pressing, the printing and pressing may be performed again to form one more subsequent paste layer on the previously formed paste layer, and this may be repeated a plurality of times to form a plurality of paste layers. The plurality of paste layers may be sintered together. In addition, by repeatedly performing the sintering, the copper layer may be formed. That is, sintering may be performed one or more times for one copper layer constituting the first copper structure (150). The number of times of the printing, pressing, and sintering may vary.

[0105] The second copper structure (160) may be disposed on at least a portion of the first copper structure (150). The second copper structure (160) may be formed using the TPC technology described above. The second copper structure (160) may be formed to reduce the difference in thermal expansion coefficient with respect to the power semiconductor element mounted thereon, for example, by 5 x 10 -6 / ℃ to 20 x 10 -6 / ℃ can have a coefficient of thermal expansion in the range.

[0106] The second copper structure (160) may be a porous structure having pores within it. The second copper structure (160) may have a differential porosity. This means that the second copper structure (160) includes a region on the upper side having a lower porosity than the lower side that is relatively adjacent to the first copper structure (150).

[0107] For example, the porosity of the second copper structure (160) may decrease from the lower side relatively adjacent to the first copper structure (150) toward the upper side.

[0108] For example, the second copper structure (160) may be composed of a plurality of layers and may include a second base portion (161) and a second surface portion (162) disposed on the second base portion (161) and having a lower porosity than the second base portion (161). The second base portion (161) may have a porosity in a range of, for example, more than 5% by volume and less than or equal to 20% by volume. The second surface portion (162) may have a porosity in a range of, for example, more than 0% by volume and less than or equal to 5% by volume.

[0109] The first paste forming the second base portion (161) may include copper particles having an average particle diameter in the range of more than 3 μm and less than or equal to 10 μm. The second paste forming the second surface portion (162) may include copper particles having an average particle diameter in the range of 100 nm to 3 μm.

[0110] The second copper structure (160) may have an overall thickness in the range of, for example, 100 μm to 2000 μm. The second base portion (161) may have a greater thickness than the second surface portion (162). The second base portion (161) may have a thickness in the range of, for example, 100 μm to 1900 μm. The second surface portion (162) may have a thickness in the range of, for example, 1 μm to 100 μm, for example, about 20 μm.

[0111] The second copper structure (160) can be formed using the TPC technology described above. The second copper structure (160) can be formed using a copper-containing paste including copper particles, inorganic particles, a solvent, and a binder.

[0112] The second base portion (161) may be identical or similar to the first base portion (151), and the second surface portion (162) may be identical or similar to the first surface portion (152).

[0113] However, this is exemplary, and the technical idea of ​​the present invention also includes cases where the second copper structure (160) has a different structure than the first copper structure (150), has a different constituent material, or is formed by a different manufacturing method.

[0114] FIG. 4 is a photograph showing the microstructure of a copper structure of a ceramic circuit board according to an embodiment of the present invention.

[0115] Referring to FIG. 4, the internal pores of the first base portion (151) and the first surface portion (152) of the first copper structure (150) are shown. Compared to the first base portion (151), the first surface portion (152) has a low porosity, and the size of each pore is also small. That is, the first surface portion (152) has a dense microstructure.

[0116] When the porosity was 0%, it exhibited a high thermal stress of 220 MPa, whereas when the porosity was 7.7%, it exhibited a thermal stress of 136 MPa, and when the porosity was 17.2%, it exhibited a thermal stress of 114 MPa. In other words, it can be seen that as the porosity increases, the thermal stress decreases. In addition, when the porosity was 7.7%, it exhibited thermal fatigue failure characteristics of 1000 cycles, and when the porosity was 17.2%, it exhibited improved thermal fatigue failure characteristics of 2000 cycles. In other words, it can be seen that as the porosity increases, the resistance to thermal fatigue failure improves.

[0117] The Mo-Cu spacer according to the prior art is a metalworking material that substantially does not contain pores inside and has a porosity of approximately 0%, thereby exhibiting high thermal stress and low thermal fatigue fracture characteristics. In contrast, the copper structure according to the present invention comprises a lower layer having a high porosity, thereby providing low thermal stress and improved resistance to thermal fatigue fracture, and further comprises an upper layer having a low porosity, thereby preventing bonding defects in power semiconductor devices.

[0118] FIGS. 5A and 5B are cross-sectional views and photographs showing a pyramid-shaped copper structure of a ceramic circuit board according to one embodiment of the present invention.

[0119] Referring to FIG. 5a, the first copper structure (150) may have a truncated pyramid shape in which the planar area of ​​the upper side is smaller than that of the lower side as the planar area decreases from the lower side relatively adjacent to the first base copper layer (130) toward the upper side. That is, the first copper structure (150) may have a trapezoidal vertical cross-sectional shape. In addition, the first copper structure (150) may have a horizontal cross-sectional shape that is a polygon such as a triangle, a square, a pentagon, a hexagon, or a circle such as a square, an ellipse, a semicircle, or the like.

[0120] Since the first copper structure (150) has a pyramidal shape, it can stably mount a power semiconductor element. In addition, it can prevent an undercut phenomenon formed by etching.

[0121] These pyramidal shapes can be formed as follows.

[0122] After printing and pressing the first layer (151_1) of the first base portion (151) and then sintering, it can naturally shrink due to volume reduction caused by evaporation of the solvent and sintering of the copper particles. At this time, the lower side of the first layer (151_1) is attached to the first base copper layer (130), so the shrinkage is small, whereas the upper side shrinks greatly. Then, when the second layer (151_2) is printed, the area of ​​the upper side that has shrunk corresponds to the area of ​​the upper side, so the lower area of ​​the second layer (150_2) is reduced. When the second layer (151_2) is sintered, the upper side shrinks more than the lower side, similar to the first layer (150_1). In this manner, a plurality of layers having an upper side having a smaller area than the lower side are formed. Next, a first surface portion (152) having an upper side having a smaller area than a lower side is formed on the n-th layer (150_n). Accordingly, a first copper structure (150) having a pyramidal shape can be formed.

[0123] In addition, in the step of forming the first copper structure (150), the application area of ​​the paste applied during printing can be reduced from the bottom to the top using TPC technology to implement the pyramidal shape. When forming a subsequent layer based on the first layer formed first, for example, a second layer (151_2) based on the first layer (151_1), the application area can be reduced to 1 area% to 10 area%, for example, 3 area% to 5 area%.

[0124] Additionally, similar to the first copper structure (150), the second copper structure (160) may have a pyramidal shape in which the planar area decreases from the lower side relatively adjacent to the first copper structure (150) toward the upper side.

[0125] Referring to Fig. 5b, photographs of a copper structure in the shape of a pyramid are shown.

[0126] Referring again to FIGS. 1 and 2, the above description of the first copper structure (150) and the second copper structure (160) can be equally applied to the cooling structure (170).

[0127] The cooling structure (170) may be positioned to protrude on a portion of the second base copper layer (140). The cooling structure (170) may be formed using the TPC technique described above. The cooling structure (170) may be formed using a copper-containing paste including copper particles, inorganic particles, a solvent, and a binder. The cooling structure (170) may be formed using, for example, 5 x 10 -6 / ℃ to 20 x 10 -6 / ℃ range of thermal expansion coefficient. The cooling structure (170) may be a porous structure having pores therein. The cooling structure (170) may have a differential porosity. This means that the cooling structure (170) includes a region on the upper side having a lower porosity than the lower side relatively adjacent to the second base copper layer (140). The cooling structure (170) may have a porosity that decreases from the lower side relatively adjacent to the second base copper layer (140) toward the upper side.

[0128] For example, the cooling structure (170) may be formed of a plurality of layers and may include a base portion and a surface portion disposed on the base portion and having a lower porosity than the base portion. The base portion may have a porosity in a range of, for example, more than 5% by volume and less than or equal to 20% by volume. The surface portion may have a porosity in a range of, for example, more than 0% by volume and less than or equal to 5% by volume. The first paste forming the base portion may include copper particles having an average particle size in a range of more than 3 μm and less than or equal to 10 μm. The second paste forming the surface portion may include copper particles having an average particle size in a range of 100 nm to 3 μm. The base portion may be identical to or similar to the first base portion (151) and the second base portion (161), and the surface portion may be identical to or similar to the first surface portion (152) and the second surface portion (162).

[0129] The cooling structure (170) may have a truncated pyramid shape in which the planar area of ​​the upper side is smaller than that of the lower side as the planar area decreases from the lower side relatively adjacent to the second base copper layer (140) toward the upper side. That is, the cooling structure (170) may have a trapezoidal vertical cross-sectional shape. In addition, the cooling structure (170) may have a horizontal cross-sectional shape of a polygon such as a triangle, a square, a pentagon, a hexagon, or a circle such as a square, an ellipse, a semicircle, or the like. The manufacturing method of such a truncated pyramid shape is the same as described above with respect to the first copper structure (150).

[0130] Hereinafter, a method for manufacturing a ceramic circuit board according to one embodiment of the present invention will be described.

[0131] Figure 6 is a flowchart illustrating a method for manufacturing a ceramic circuit board according to one embodiment of the present invention.

[0132] Referring to FIG. 6, a method for manufacturing a ceramic circuit board (S100) may include a first step (S110) of providing a ceramic layer including a first surface and a second surface; a second step (S120) of forming a first paste layer by printing and pressing a copper-containing paste on the first surface of the ceramic layer; a third step (S130) of forming a second paste layer by printing and pressing a copper-containing paste on the second surface of the ceramic layer; and a fourth step (S140) of simultaneously sintering the first paste layer and the second paste layer at a temperature ranging from 500°C to 800°C.

[0133] The second step (S120) and the third step (S130) may be performed alternately and repeatedly. In addition, the second step (S120), the third step (S130), and the fourth step (S140) may be performed repeatedly.

[0134] In the above printing step, a copper-containing paste may be screen-printed to form a paste layer. The printing step may include a drying step that is intentionally performed to remove all or part of the solvent contained in the paste layer by maintaining the temperature in the air at a range of 10°C to 100°C. Alternatively, the drying may be performed unintentionally through natural drying.

[0135] In the above pressing step, the paste layer can be pressed to form a uniform thickness. The boundary of the paste layer may have a higher viscosity than the center due to a reduced flow rate of the copper-containing paste, and may be formed to a thicker thickness. By pressing the paste layer, this thickness variation can be reduced. In addition, internal pores in the paste layer can be eliminated or reduced.

[0136] In the above sintering step, the copper particles contained in the paste layer can be sintered. The sintering step can be performed in an inert atmosphere, such as a nitrogen atmosphere or an argon atmosphere, or can be performed in an air atmosphere. The sintering step can be performed in a continuous heat treatment furnace, such as a muffle-type heat treatment furnace, or in a batch-type heat treatment furnace, such as a box oven.

[0137] The sintering step may be performed, for example, at a temperature below 900°C, and may be performed, for example, at a temperature in the range of 500°C to 800°C for 10 to 120 minutes. The sintering step may include a bake out step at a temperature in the range of 300°C to 500°C by supplying a small amount of water vapor or oxygen in a nitrogen atmosphere to remove the binder contained in the paste layer, and a liquid phase sintering step of the copper particles contained in the paste layer. However, this is exemplary and the technical idea of ​​the present invention is not limited thereto, and the bake out step may be omitted.

[0138] In addition, if a paste layer is formed on only one side of the ceramic layer and sintered, the ceramic layer may warp during sintering. To prevent this, a paste layer may be formed on each side of the ceramic layer and sintered together, thereby preventing warping.

[0139] It is preferable that the first paste layer and the second paste layer, which are formed on both sides of the ceramic layer and are simultaneously sintered, have the same volume, or in the case of different volumes, the volume ratio of the first paste layer and the second paste layer may be, for example, in the range of 90% to 100%. The volume ratio may be a percentage obtained by dividing the volume of the paste layer having a small volume by the volume of the paste layer having a large volume. In addition, the volume may be calculated from the weight of the paste layer.

[0140] The above printing step, the pressing step, and the sintering step may be performed repeatedly. For example, after forming one paste layer in one cycle of the printing step and the pressing step, the printing step and the pressing step may be performed again to further form a subsequent paste layer on the previously formed paste layer, thereby forming a plurality of paste layers. The plurality of paste layers may be sintered together. In addition, by repeatedly performing the sintering step, the copper layer may be formed. That is, the sintering step may be performed one or more times for one copper layer. The number of times of the printing step, the pressing step, and the sintering step may be varied.

[0141] By performing the above printing step, the pressing step, and the sintering step, a first base copper layer, a second base copper layer, a first copper structure, a second copper structure, and a cooling structure can be formed.

[0142] Each of the first copper structure and the second copper structure may be formed to have a differential porosity. The first and second copper structures may include a region on the upper side having a lower porosity than the region on the lower side.

[0143] Each of the first copper structure or the second copper structure may be formed by a step of forming a base portion; and a step of forming a surface portion on the base portion, the surface portion having a lower porosity than the base portion. The step of forming the base portion may be performed using a paste including copper particles having an average particle diameter in a range of more than 3 μm and less than or equal to 10 μm. The step of forming the surface portion may be performed using a paste including copper particles having an average particle diameter in a range of 100 nm to 3 μm on the first base portion. The base portion may have a porosity in a range of more than 5 vol% and less than or equal to 20 vol%. The surface portion may have a porosity in a range of more than 0 vol% and less than or equal to 5 vol%. The base portion described above may include a first base portion and a second base portion, and the surface portion described above may include a first surface portion and a second surface portion.

[0144] The first copper structure can be formed by reducing the application area of ​​the copper-containing paste from a lower side relatively adjacent to the first base copper layer toward an upper side when performing the printing step, so that the first copper structure has a truncated pyramidal shape. The second copper structure can be formed by reducing the application area of ​​the copper-containing paste from a lower side relatively adjacent to the first copper structure toward an upper side when performing the printing step, so that the second copper structure has a truncated pyramidal shape. The cooling structure can be formed by reducing the application area of ​​the copper-containing paste from a lower side relatively adjacent to the second base copper layer toward an upper side when performing the printing step, so that the cooling structure has a truncated pyramidal shape.

[0145] The above cooling structure may be formed to protrude over a portion of the second base copper layer of the ceramic substrate.

[0146] In addition, the method for manufacturing a ceramic circuit board (S100) may further include a step (S150) of blasting the surface of at least one of the base copper layer, the first copper structure, and the second copper structure.

[0147] The above blasting treatment step (S150) can treat the surface of at least one of the base copper layer, the first copper structure, and the second copper structure by blasting it with ceramic particles such as sand.

[0148] Solder is applied to the first copper structure and the second copper structure, and a power semiconductor element is mounted on the first copper structure and the second copper structure. The process of sintering the first copper structure and the second copper structure is heat-treated at a high temperature in the air, so a copper oxide layer may be formed on the surface. In addition, even when the sintering is performed in an inert atmosphere, oxidation by oxygen may occur. The copper oxide layer may reduce the adhesion of the power semiconductor element to the first copper structure and the second copper structure. Therefore, after forming the first copper structure and the second copper structure, the copper oxide layer may be removed by blasting fine-diameter ceramic particles on the surfaces of the first copper structure and the second copper structure. The blasting may be referred to as sandblasting. In addition, a case of blasting a base copper layer is also included in the technical concept of the present invention.

[0149] FIG. 7 is a schematic diagram illustrating a method for manufacturing a ceramic circuit board according to an embodiment of the present invention.

[0150] Referring to Fig. 7, a first paste layer is formed by printing and pressing a copper-containing paste on a first surface of a ceramic layer (120), a second paste layer is formed by printing and pressing a copper-containing paste on a second surface of the ceramic layer (120), and then the first paste layer and the second paste layer are simultaneously sintered at a temperature ranging from 500°C to 800°C. Accordingly, a first base copper layer (130) is formed on the first surface of the ceramic layer (120), and at the same time, a second base copper layer (140) is formed on the second surface of the ceramic layer (120).

[0151] Next, a copper-containing paste is printed and pressed onto the first surface of the ceramic layer (120), that is, onto a portion of the first base copper layer (130), to form a first paste layer, and a copper-containing paste is printed and pressed onto the second surface of the ceramic layer (120), that is, onto a portion of the second base copper layer (140), to form a second paste layer, and then the first paste layer and the second paste layer are co-sintered at a temperature in the range of 500°C to 800°C. Accordingly, a first copper structure (150) is formed on a portion of the first base copper layer (130) on the first surface of the ceramic layer (120), and at the same time, at least a portion of a cooling structure (170) is formed on a portion of the second base copper layer (140) on the second surface of the ceramic layer (120).

[0152] Next, a copper-containing paste is printed and pressed onto the first surface of the ceramic layer (120), that is, onto a portion of the first copper structure (150), to form a first paste layer, and a copper-containing paste is printed and pressed onto the second surface of the ceramic layer (120), that is, onto a portion of the cooling structure (170), to form a second paste layer, and then the first paste layer and the second paste layer are co-sintered at a temperature in the range of 500°C to 800°C. Accordingly, one or more second copper structures (160) are formed on a portion of the first copper structure (150) on the first surface of the ceramic layer (120), and at the same time, a cooling structure (170) is formed on a portion of the second base copper layer (140) on the second surface of the ceramic layer (120). The cooling structure (170) may be integral with the second base copper layer (140).

[0153] The method described in Fig. 7 is exemplary, and the technical idea of ​​the present invention is not limited thereto. That is, the first paste layer and the second paste layer, which are formed on both sides of the ceramic layer (120) and sintered simultaneously, are performed so that they have a volume ratio in the range of 90% to 100%, thereby preventing the ceramic layer (120) from warping during sintering.

[0154] For example, various changes are possible within the above-described volume ratio range, such as sintering the first base copper layer (130) and the cooling structure (170) together, sintering the second base copper layer (140) and the first copper structure (150) together, or sintering the second base copper layer (140) and the second copper structure (160) together.

[0155] FIGS. 8A, 8B, and 8C are schematic diagrams illustrating a cooling structure of a ceramic circuit board according to one embodiment of the present invention.

[0156] Referring to FIG. 8a, a fin-type cooling structure (170a) having a shape in which multiple fins protrude is illustrated.

[0157] Referring to FIG. 8b, a groove-type cooling structure (170b) having a shape in which a plurality of grooves (172) are provided on a flat plate (171) is illustrated.

[0158] Referring to FIG. 8c, a channel-type cooling structure (170c) having a shape in which a plurality of channels (174) are provided on a flat plate (173) is illustrated.

[0159] However, this is exemplary, and the technical idea of ​​the present invention also includes cases where the cooling structure (170) has various shapes.

[0160] Figure 9 is an ultrasonic inspection result showing whether a defect occurs depending on the sintering temperature of a ceramic circuit board according to an embodiment of the present invention.

[0161] Referring to Fig. 9, when the sintering of the copper structure was performed at 900°C to form a ceramic circuit board, an adhesion defect occurred between the ceramic layer and the base copper layer, as indicated by the arrow. It is analyzed that the adhesion defect occurred due to exposure to a high temperature of 900°C during the sintering process of the copper structure, and the occurrence became more pronounced as this high-temperature exposure was repeated. In particular, when the ceramic circuit board includes an active metal brazing layer, since the sintering temperature of 900°C approaches or exceeds the melting point of the active metal brazing layer, the adhesion defect occurs more as the active metal brazing layer melts.

[0162] On the other hand, when the sintering of the copper structures was performed at 600°C, the above-mentioned adhesion defect did not occur. Therefore, the sintering temperature of the base copper layer, the first copper structure, and the second copper structure is preferably lower than 900°C, and for example, a temperature in the range of 500°C to 800°C is preferable.

[0163] FIG. 10 is a photograph showing the surface state of a copper structure of a ceramic circuit board before and after blasting treatment according to an embodiment of the present invention.

[0164] Referring to Fig. 10, the surface condition of a copper structure before and after blasting is shown. When blasting is not performed, it can be seen that copper oxide exists on the surface of the copper structure, resulting in a rough surface. On the other hand, it can be seen that the copper oxide is removed by blasting, resulting in a smooth surface, and that the surface becomes even smoother as the number of blasting cycles increases. Therefore, after blasting, power semiconductor devices mounted on the copper structure can be more stably bonded.

[0165] FIG. 11 is a perspective view illustrating a pair of ceramic circuit boards for forming a double-sided cooling power module according to one embodiment of the present invention.

[0166] Referring to FIG. 11, a lower ceramic circuit board (100_D) and an upper ceramic circuit board (100_U) forming a double-sided cooling power module are illustrated.

[0167] The lower ceramic circuit board (100_D) may include a lower ceramic substrate (110_D), a lower first copper structure (150_D), and a lower second copper structure (160_D). The lower ceramic substrate (110_D) may include a lower ceramic layer (120_D), a lower first base copper layer (130_D), and a lower second base copper layer (140_D). In addition, the lower ceramic circuit board (100_D) may include a lower cooling structure (170_D) integrated into the lower second base copper layer (140_D).

[0168] The upper ceramic circuit board (100_U) may include an upper ceramic substrate (110_U), an upper first copper structure (150_U), and an upper second copper structure (160_U). The upper ceramic substrate (110_U) may include an upper ceramic layer (120_U), an upper first base copper layer (130_U), and an upper second base copper layer (140_U). In addition, the upper ceramic circuit board (100_U) may include an upper cooling structure (170_U) integrated into the upper second base copper layer (140_U).

[0169] FIGS. 12 and 13 are cross-sectional views illustrating a double-sided cooling power module according to one embodiment of the present invention.

[0170] Referring to FIG. 12, a double-sided cooling power module (10) may include a lower ceramic circuit board (100_D), an upper ceramic circuit board (100_U), a first power semiconductor element (20), a second power semiconductor element (30), an element attachment layer (40), and a mold layer (50).

[0171] The lower ceramic circuit board (100_D) may include a lower ceramic substrate (110_D), a lower first copper structure (150_D), and a lower second copper structure (160_D). The lower ceramic substrate (110_D) may include a lower ceramic layer (120_D), a lower first base copper layer (130_D), and a lower second base copper layer (140_D). In addition, the lower ceramic circuit board (100_D) may include a lower cooling structure (170_D) that is integrally formed with the lower second base copper layer (140_D) and protrudes over a portion of the lower second base copper layer (140_D).

[0172] The upper ceramic circuit board (100_U) may include an upper ceramic substrate (110_U), an upper first copper structure (150_U), and an upper second copper structure (160_U). The upper ceramic substrate (110_U) may include an upper ceramic layer (120_U), an upper first base copper layer (130_U), and an upper second base copper layer (140_U). In addition, the upper ceramic circuit board (100_U) may include an upper cooling structure (170_U) that is integrally formed with the upper second base copper layer (140_U) and protrudes over a portion of the upper second base copper layer (140_U).

[0173] The lower ceramic circuit board (100_D) and the upper ceramic circuit board (100_U) can be placed facing each other.

[0174] A first power semiconductor element (20) and a second power semiconductor element (30) may be placed between a lower ceramic circuit board (100_D) and an upper ceramic circuit board (100_U). The lower ceramic circuit board (100_D) and the upper ceramic circuit board (100_U) may perform a function of discharging heat generated from the first power semiconductor element (20) and the second power semiconductor element (30) to the outside.

[0175] This heat dissipation can be achieved by a lower cooling structure (170_D) disposed on the outer surface of a lower ceramic circuit board (100_D) and an upper cooling structure (170_U) disposed on the outer surface of an upper ceramic circuit board (100_U). The lower cooling structure (170_D) and the upper cooling structure (170_U) can increase the heat dissipation efficiency by increasing the surface area.

[0176] The first power semiconductor element (20) and the second power semiconductor element (30) may be, for example, a GTO (gate turn-off thyristor) semiconductor element or an IGBT (insulated gate bipolar mode transistor) semiconductor element, and may perform an operation of converting power supplied from a power supply unit such as a battery into power for driving a motor through a switching operation and supplying the converted power. In addition, the first power semiconductor element (20) and the second power semiconductor element (30) may include electrode members formed on the upper or lower portions.

[0177] The first power semiconductor element (20) may be placed between the lower first copper structure (150_D) and the upper first copper structure (150_U). One side of the first power semiconductor element (20) may be attached to the lower first copper structure (150_D) by means of an element attachment layer (40), and the other side may be attached to the upper first copper structure (150_U) by means of an element attachment layer (40).

[0178] The second power semiconductor element (30) may be placed between the lower second copper structure (160_D) and the upper second copper structure (160_U). One side of the second power semiconductor element (30) may be attached to the lower second copper structure (160_D) by means of an element attachment layer (40), and the other side may be attached to the upper second copper structure (160_U) by means of an element attachment layer (40).

[0179] The second power semiconductor element (30) may have a smaller thickness than the first power semiconductor element (20). Therefore, by further arranging a second copper structure (160) on the upper and lower sides of the second power semiconductor element (30), the thickness difference between the second power semiconductor element (30) and the first power semiconductor element (20) can be corrected.

[0180] The component attachment layer (40) may be a solder layer or an adhesive layer, which is exemplary and the technical idea of ​​the present invention is not limited thereto.

[0181] The mold layer (50) can fill the space between the lower ceramic circuit board (100_D) and the upper ceramic circuit board (100_U). Accordingly, the first power semiconductor element (20) and the second power semiconductor element (30) can be covered by the mold layer (50). The mold layer (50) can insulate the first power semiconductor element (20) and the second power semiconductor element (30). The mold layer (50) can be composed of, for example, EMC (epoxy molding compound).

[0182] At least one of the lower first copper structure (150_D), the upper first copper structure (150_U), the lower second copper structure (160_D) and the upper second copper structure (160_U) may have a differential porosity and include a region on the upper side having a lower porosity than the lower side relatively adjacent to the lower first base copper layer (130_D) or the upper first base copper layer (130_U).

[0183] The double-sided cooling power module (10) may have a symmetrical structure based on the first power semiconductor element (20) and the second power semiconductor element (30). That is, the lower first copper structure (150_D), the lower second copper structure (160_D), the upper first copper structure (150_U), and the upper second copper structure (160_U) may be arranged symmetrically. However, this is exemplary and the technical idea of ​​the present invention is not limited thereto. For example, the lower first copper structure (150_D) and the upper first copper structure (150_U) may have different heights. In addition, the lower second copper structure (160_D) and the upper second copper structure (160_U) may have different heights.

[0184] Hereinafter, descriptions of components identical or similar to those in the embodiment of Fig. 12 will be omitted.

[0185] Referring to FIG. 13, a double-sided cooling power module (10a) may include a lower ceramic circuit board (100_D), an upper ceramic board (110_U), a first power semiconductor element (20), a second power semiconductor element (30), an element attachment layer (40), and a mold layer (50).

[0186] The lower ceramic circuit board (100_D) may include a lower ceramic substrate (110_D), a lower first copper structure (150_D), and a lower second copper structure (160_D). The lower ceramic substrate (110_D) may include a lower ceramic layer (120_D), a lower first base copper layer (130_D), and a lower second base copper layer (140_D). In addition, the lower ceramic circuit board (100_D) may include a lower cooling structure (170_D) that is integrally formed with the lower second base copper layer (140_D) and protrudes over a portion of the lower second base copper layer (140_D).

[0187] The upper ceramic substrate (110_U) may include an upper ceramic layer (120_U), an upper first base copper layer (130_U), and an upper second base copper layer (140_U). In addition, the upper ceramic substrate (110_U) may include an upper cooling structure (170_U) that is integrally formed with the upper second base copper layer (140_U) and protrudes over a portion of the upper second base copper layer (140_U).

[0188] The lower ceramic circuit board (100_D) and the upper ceramic board (110_U) can be placed facing each other.

[0189] The first power semiconductor element (20) may be disposed between the lower first copper structure (150_D) and the upper first base copper layer (130_U). The second power semiconductor element (30) may be disposed between the lower second copper structure (160_D) and the upper first base copper layer (130_U). The second power semiconductor element (30) may have a smaller thickness than the first power semiconductor element (20).

[0190] At least one of the lower first copper structure (150_D) and the lower second copper structure (160_D) may have a differential porosity and may include a region on the upper side having a lower porosity than the lower side relatively adjacent to the lower first base copper layer (130_D).

[0191] Compared with the double-sided cooling power module (10) of Fig. 12, the double-sided cooling power module (10a) of Fig. 13 has a difference in that it includes an upper ceramic substrate (110_U) instead of an upper ceramic circuit substrate (100_U). That is, the double-sided cooling power module (10b) does not include an upper first copper structure (150_U) and an upper second copper structure (160_U). Therefore, the double-sided cooling power module (10b) may have an asymmetrical structure with respect to the first power semiconductor element (20) and the second power semiconductor element (30).

[0192] According to one embodiment of the present invention, a method for manufacturing a double-sided cooling power module comprises the steps of: providing a lower ceramic circuit board including a lower ceramic substrate including a lower ceramic layer, a lower first base copper layer, and a lower second base copper layer; a lower first copper structure disposed on a portion of the lower first base copper layer; one or more lower second copper structures disposed on at least a portion of the lower first copper structure; and a lower cooling structure disposed on a portion of the lower second base copper layer so as to protrude integrally with the lower second base copper layer; mounting a first power semiconductor device on the lower first copper structure; mounting a second power semiconductor device having a smaller thickness than the first power semiconductor device on the lower second copper structure; providing an upper ceramic substrate including an upper ceramic layer, an upper first base copper layer, and an upper second base copper layer on the lower ceramic circuit board; an upper first copper structure disposed on a portion of the upper first base copper layer; The method may include: a step of disposing an upper ceramic circuit board facing the lower ceramic circuit board, the upper ceramic circuit board including at least one upper second copper structure disposed on at least a portion of the upper first copper structure; and an upper cooling structure disposed on a portion of the upper second base copper layer to protrude and be integral with the upper second base copper layer; and a step of forming a mold layer that fills a space between the lower ceramic circuit board and the upper ceramic circuit board to cover the first power semiconductor element and the second power semiconductor element.

[0193] According to one embodiment of the present invention, a method for manufacturing a double-sided cooling power module comprises the steps of: providing a lower ceramic circuit board including a lower ceramic substrate including a lower ceramic layer, a lower first base copper layer, and a lower second base copper layer; a lower first copper structure disposed on a portion of the lower first base copper layer; one or more lower second copper structures disposed on at least a portion of the lower first copper structure; and a lower cooling structure disposed on a portion of the lower second base copper layer so as to protrude and be integral with the lower second base copper layer; mounting a first power semiconductor element on the lower first copper structure; mounting a second power semiconductor element having a smaller thickness than the first power semiconductor element on the lower second copper structure; The method may include: a step of arranging an upper ceramic substrate facing the lower ceramic circuit board, the upper ceramic substrate including an upper ceramic layer, an upper first base copper layer, an upper second base copper layer, and an upper cooling structure disposed on a portion of the upper second base copper layer to protrude and be integral with the upper second base copper layer; and a step of forming a mold layer that fills a space between the lower ceramic circuit board and the upper ceramic substrate to cover the first power semiconductor element and the second power semiconductor element.

[0194] At least one of the lower first copper structure, the upper first copper structure, the lower second copper structure, and the upper second copper structure can be formed by printing, pressing, and sintering of a copper-containing paste at a temperature ranging from 500°C to 800°C.

[0195] The surface of at least one of the lower first copper structure, the upper first copper structure, the lower second copper structure, and the upper second copper structure can be blasted.

[0196] At least one of the lower first copper structure, the upper first copper structure, the lower second copper structure, and the upper second copper structure may have a differential porosity, and may include a region on the upper side having a lower porosity than a lower side relatively adjacent to the upper first base copper layer or the lower first base copper layer.

[0197] It will be apparent to a person skilled in the art to which the technical idea of ​​the present invention pertains that the technical idea of ​​the present invention described above is not limited to the above-described embodiments and the attached drawings, and that various substitutions, modifications, and changes are possible within a scope that does not depart from the technical idea of ​​the present invention.

Claims

1. A ceramic substrate comprising a ceramic layer, a first base copper layer disposed on a first surface of the ceramic layer, and a second base copper layer disposed on a second surface of the ceramic layer; A first copper structure disposed on a portion of the first base copper layer, formed by printing, pressing, and sintering a copper-containing paste, having a differential porosity, and including a region on the upper side having a lower porosity than the lower side relatively adjacent to the first base copper layer; and A cooling structure formed by printing, pressing and sintering a copper-containing paste, and protruding and arranged integrally with the second base copper layer on a portion of the second base copper layer. Ceramic circuit board.

2. In paragraph 1, The above cooling structure is, Having a pin shape, a groove shape, or a channel shape, Ceramic circuit board.

3. In paragraph 1, The above first copper structure is, The porosity decreases from the lower side relatively adjacent to the first base copper layer toward the upper side, Ceramic circuit board.

4. In paragraph 1, The above first copper structure is, First base; and A first surface portion disposed on the first base portion and having a lower porosity than the first base portion, Ceramic circuit board.

5. In paragraph 4, The above first base has a porosity in the range of more than 5% by volume and less than or equal to 20% by volume, The above first surface portion has a porosity in a range of more than 0 volume% and less than or equal to 5 volume%, Ceramic circuit board.

6. In paragraph 1, Further comprising one or more second copper structures disposed on at least a portion of the first copper structure and formed by printing, pressing and sintering a copper-containing paste. Ceramic circuit board.

7. In paragraph 6, The above second copper structure is, having a differential porosity, and including a region on the upper side having a lower porosity than the lower side relatively adjacent to the first copper structure; Ceramic circuit board.

8. In paragraph 7, The above second copper structure is, The porosity decreases from the lower side relatively adjacent to the first copper structure toward the upper side, Ceramic circuit board.

9. In paragraph 6, The above second copper structure is, Second base; and A second surface portion disposed on the second base portion and having a lower porosity than the second base portion, Ceramic circuit board.

10. In paragraph 9, The above second base has a porosity in the range of more than 5% by volume and less than or equal to 20% by volume, The second surface portion has a porosity in a range of more than 0 volume% and less than or equal to 5 volume%. Ceramic circuit board.

11. In paragraph 1, At least one of the first base copper layer and the second base copper layer, Consisting of a TPC copper layer formed by printing, pressing and sintering a copper-containing paste on the above ceramic layer, Ceramic circuit board.

12. In paragraph 1, At least one of the first base copper layer and the second base copper layer, Comprising at least one of a bonding copper layer, a laminated copper layer, and a surface copper layer, Ceramic circuit board.

13. In paragraph 12, The above bonding copper layer is formed using a copper-containing bonding paste including glass frit, inorganic particles, copper oxide particles, copper particles, a solvent, and a binder, The above laminated copper layer is formed using a copper-containing laminate paste including inorganic particles, copper particles, a solvent, and a binder, The above surface copper layer is formed using a copper-containing surface paste containing copper oxide particles, copper particles, a solvent, and a binder. Ceramic circuit board.

14. A first step of providing a ceramic layer including a first surface and a second surface; A second step of forming a first paste layer by printing and pressing a copper-containing paste on the first surface of the ceramic layer; A third step of forming a second paste layer by printing and pressing a copper-containing paste on the second surface of the ceramic layer; and A fourth step of simultaneously sintering the first paste layer and the second paste layer at a temperature ranging from 500°C to 800°C is included. Method for manufacturing ceramic circuit boards.

15. In paragraph 14, The volume ratio of the first paste layer and the second paste layer that are simultaneously sintered is in the range of 90% to 100%. Method for manufacturing ceramic circuit boards.

16. In paragraph 14, The second and third steps are performed alternately and repeatedly. Method for manufacturing ceramic circuit boards.

17. In paragraph 14, The second step, the third step, and the fourth step are performed repeatedly. Method for manufacturing ceramic circuit boards.

18. In paragraph 14, By repeatedly performing the above second step, the third step, and the fourth step, Forming a first base copper layer on the first surface of the ceramic layer, and simultaneously forming a second base copper layer on the second surface of the ceramic layer, Forming a first copper structure on a portion of the first base copper layer, and simultaneously forming a cooling structure on a portion of the second base copper layer. Method for manufacturing ceramic circuit boards.

19. A lower ceramic circuit board comprising: a lower ceramic substrate including a lower ceramic layer, a lower first base copper layer, and a lower second base copper layer; a lower first copper structure disposed on a portion of the lower first base copper layer; a lower second copper structure disposed on a portion of the lower first copper structure; and a lower cooling structure disposed on a portion of the lower second base copper layer so as to protrude and be integral with the lower second base copper layer; An upper ceramic circuit board comprising: an upper ceramic substrate including an upper ceramic layer, an upper first base copper layer, and an upper second base copper layer; an upper first copper structure disposed on a portion of the upper first base copper layer; an upper second copper structure disposed on a portion of the upper first copper structure; and an upper cooling structure disposed on a portion of the upper second base copper layer so as to protrude and be integral with the upper second base copper layer; A first semiconductor element disposed between the lower first copper structure and the upper first copper structure; A second semiconductor element disposed between the lower second copper structure and the upper second copper structure and having a smaller thickness than the first semiconductor element; and A mold layer covering the first semiconductor element and the second semiconductor element by filling the space between the lower ceramic circuit board and the upper ceramic circuit board; At least one of the lower first copper structure, the upper first copper structure, the lower second copper structure and the upper second copper structure has a differential porosity and includes a region on the upper side having a lower porosity than the lower side relatively adjacent to the lower first base copper layer or the upper first base copper layer. Double-sided cooled power module.

20. A lower ceramic circuit board comprising: a lower ceramic substrate including a lower ceramic layer, a lower first base copper layer, and a lower second base copper layer; a lower first copper structure disposed on a portion of the lower first base copper layer; a lower second copper structure disposed on a portion of the lower first copper structure; and a lower cooling structure disposed on a portion of the lower second base copper layer so as to protrude and be integral with the lower second base copper layer; An upper ceramic substrate comprising an upper ceramic layer, an upper first base copper layer, an upper second base copper layer, and an upper cooling structure disposed to protrude and be integral with the upper second base copper layer on a portion of the upper second base copper layer; A first semiconductor element disposed between the lower first copper structure and the upper first base copper layer; A second semiconductor element disposed between the lower second copper structure and the upper first base copper layer and having a smaller thickness than the first semiconductor element; and A mold layer covering the first semiconductor element and the second semiconductor element by filling the space between the lower ceramic circuit board and the upper ceramic substrate; At least one of the lower first copper structure and the lower second copper structure has a differential porosity and includes a region on the upper side having a lower porosity than the lower side relatively adjacent to the lower first base copper layer. Double-sided cooled power module.

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