Switching device driving circuit, driving method, driving chip, and driving device

Abstract

The present disclosure relates to the technical field of drive, and provides a switching device driving circuit, a driving method, a driving chip, and a driving device. The circuit comprises: a resistor, having one end connected to an output end of an external voltage device, and the other end connected to a pulse signal input pin; a first switch, having one end connected to the pulse signal input pin, and the other end connected to a gate of a switch device; a delayer, having an input end connected to the pulse signal input pin, and an output end used for transmitting a pulse signal to a second switch so as to control the second switch to be connected or disconnected; and the second switch, having one end connected to a power supply voltage input pin, and the other end connected to the gate of the switch device. In the switching device driving circuit provided by the embodiments of the present disclosure, a resistor pin may no longer be arranged, so that the number of pins in the driving circuit is reduced while bipolar driving of the driving circuit is not influenced, thereby meeting the requirements for specific application and packaging.

Description

Switching device driving circuit, driving method, driving chip and driving device Technical Field

[0001] The present disclosure relates to the field of driving technology, and in particular to a switching device driving circuit, a driving method, a driving chip, and a driving device. Background Art

[0002] Traditional switching device drive circuits are two-stage circuits. A PWM pulse signal is the drive input. When the PWM pulse signal is high, the drive circuit activates the switching device; when the PWM pulse signal is low, the drive circuit deactivates the switching device. This drive process occurs in two stages. In the first stage, the power supply voltage is applied to the switching device's gate through a resistor, slowly increasing the gate-source voltage. In the second stage, the power supply voltage is applied to the switching device's gate without a resistor, fully increasing the gate-source voltage. The drain-source voltage of the switching device drops to zero, fully turning the switching device on.

[0003] Traditional switching device driver circuits require three pins: a power supply voltage input pin, a resistor pin for connecting a resistor, and a PWM pulse signal input pin for inputting a PWM pulse signal. However, some applications and packaging requirements do not provide enough pins to meet the needs of traditional switching device driver circuits.

[0004] Summary of the Invention

[0005] The embodiments of the present disclosure provide a switching device driving circuit, a driving method, a driving chip, and a driving device to solve the technical problem that a traditional switching device driving circuit requires three pins, but under certain applications and packaging requirements, a sufficient number of pins cannot be provided to meet the needs of the traditional switching device driving circuit.

[0006] In a first aspect, an embodiment of the present disclosure provides a switching device driving circuit, comprising:

[0007] A resistor, an external voltage device, a pulse signal input pin, a power supply voltage input pin, a first switch, a second switch and a delay device;

[0008] One end of the resistor is connected to the output end of the external voltage device, and the other end of the resistor is connected to the pulse signal input pin;

[0009] One end of the first switch is connected to the pulse signal input pin, and the other end of the first switch is connected to the gate of the switching device;

[0010] The input end of the delay device is connected to the pulse signal input pin, and the output end of the delay device is used to transmit a pulse signal to the second switch to control the second switch to be closed or opened;

[0011] One end of the second switch is connected to the power supply voltage input pin, and the other end of the second switch is connected to the gate of the switching device.

[0012] In one embodiment, the invention further comprises: a pre-driving circuit and a third switch;

[0013] The input end of the pre-driving circuit is connected to the pulse signal input pin, and the output end of the pre-driving circuit is used to transmit a pulse signal to the third switch to control the third switch to be closed or opened;

[0014] One end of the third switch is connected to the gate of the switching device, and the other end of the third switch is connected to the source of the switching device.

[0015] In a second aspect, an embodiment of the present disclosure provides a method for driving a switching device, including:

[0016] Controlling the voltage output by the external voltage device to be applied to the gate of the switching device;

[0017] Controlling the PWM pulse high-level signal to be output to the second switch through the pulse signal input pin, so as to close the second switch;

[0018] A control power supply voltage is applied to the gate of the switching device through the power supply voltage input pin and the second switch.

[0019] In one embodiment, the controlling the voltage output by the external voltage device to be applied to the gate of the switching device includes:

[0020] The first switch is controlled to be closed, and the voltage output by the external voltage device is controlled to be applied to the gate of the switching device through the resistor, the pulse signal input pin and the first switch.

[0021] In one embodiment, the control PWM pulse high level signal is output to the second switch through the pulse signal input pin, including:

[0022] Controlling the PWM pulse high level signal to be output to the delay device through the pulse signal input pin;

[0023] After controlling the delay device to delay the PWM pulse high level signal, the PWM pulse high level signal is output to the second switch.

[0024] In one embodiment, it further includes:

[0025] Controlling the PWM pulse high level signal to be output to the pre-driving circuit through the pulse signal input pin;

[0026] Controlling the pre-driving circuit to invert the PWM pulse high-level signal to obtain a PWM pulse low-level signal;

[0027] The pre-driving circuit is controlled to output the PWM pulse low-level signal to the third switch.

[0028] In one embodiment, after the control power supply voltage is applied to the gate of the switching device through the power supply voltage input pin and the second switch, the method further comprises:

[0029] The first switch is controlled to be turned off to limit the gate voltage of the switching device.

[0030] In one embodiment, after the control power supply voltage is applied to the gate of the switching device through the power supply voltage input pin and the second switch, the method further comprises:

[0031] The first switch is controlled to enter a clamping mode to limit a gate voltage of the switching device.

[0032] In one embodiment, it further includes:

[0033] The value of the resistor is adjusted to adjust the falling speed of the drain-source voltage of the switching device.

[0034] In one embodiment, the power supply voltage does not exceed 7V.

[0035] In a third aspect, an embodiment of the present disclosure provides a switching device driver chip, comprising the switching device driver circuit described in the first aspect.

[0036] In a fourth aspect, an embodiment of the present disclosure provides a switching device driving apparatus, comprising the switching device driving chip described in the third aspect.

[0037] The switching device driving circuit provided by the present disclosure includes a resistor, an external voltage device, a pulse signal input pin, a power supply voltage input pin, a first switch, a second switch and a delay device. One end of the resistor is connected to the output end of the external voltage device, and the other end of the resistor is connected to the pulse signal input pin. One end of the first switch is connected to the pulse signal input pin, and the other end of the first switch is connected to the gate of the switching device. The input end of the delay device is connected to the pulse signal input pin, and the output end of the delay device is used to transmit a pulse signal to the second switch to control the second switch to close or open. One end of the second switch is connected to the power supply voltage input pin, and the other end of the second switch is connected to the gate of the switching device. The driving circuit disclosed herein has the following characteristics: in the first stage, an external voltage device applies a voltage to the gate of the switching device through a resistor, and the gate-source voltage is slowly pulled up; in the second stage, the power supply voltage is applied to the gate of the switching device without passing through a resistor, the gate-source voltage is fully pulled up, the drain-source voltage of the switching device drops to zero, and the switching device is fully turned on. By connecting one end of the resistor to the output end of the external voltage device and the other end of the resistor to the pulse signal input pin, the resistor pin can be eliminated, and the number of pins in the driving circuit can be reduced without affecting the two-pole driving of the driving circuit, thereby meeting the requirements of specific applications and packaging. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions in the present disclosure or the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0039] FIG1 is a schematic diagram of a switch device driving circuit provided by an embodiment of the present disclosure;

[0040] FIG2 is a schematic diagram of a conventional switching device driving circuit;

[0041] FIG3 is a schematic diagram of a flow chart of a method for driving a switching device according to an embodiment of the present disclosure;

[0042] FIG4 is a second flow chart of a method for driving a switching device according to an embodiment of the present disclosure;

[0043] 5 is a diagram showing a corresponding relationship between a pulse signal in a switching device driving circuit and a voltage of a switching device according to an embodiment of the present disclosure;

[0044] FIG6 is a diagram showing the corresponding relationship between a pulse signal in a conventional switching device driving circuit and a voltage of a switching device.

[0045] Reference numerals:

[0046] 1-Pulse signal input pin; 2-Power supply voltage input pin; 3-Resistor pin. DETAILED DESCRIPTION

[0047] To make the objectives, technical solutions, and advantages of the present disclosure more clear, the technical solutions of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present disclosure without making any creative efforts shall fall within the scope of protection of the present disclosure.

[0048] In the description of the embodiments of the present disclosure, it should be noted that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore should not be understood as limiting the embodiments of the present disclosure. In addition, the terms "first", "second", and "third" are used for descriptive purposes only and should not be understood as indicating or implying relative importance.

[0049] In the embodiments of the present disclosure, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Furthermore, a first feature being "above," "above," and "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is at a higher level than the second feature. A first feature being "below," "below," and "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is at a lower level than the second feature.

[0050] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the embodiments of the present disclosure. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification and features of different embodiments or examples, unless they are contradictory.

[0051] FIG1 is a schematic diagram of a switch device driving circuit provided by an embodiment of the present disclosure;

[0052] FIG2 is a schematic diagram of a conventional switching device driving circuit;

[0053] 1 , an embodiment of the present disclosure provides a switching device driving circuit, which may include: a resistor R, an external voltage device, a pulse signal input pin, a power supply voltage input pin, a first switch, a second switch, and a delay device;

[0054] One end of the resistor R is connected to the output end of the external voltage device, and the other end of the resistor R is connected to the pulse signal input pin 1;

[0055] One end of the first switch S1 is connected to the pulse signal input pin 1, and the other end of the first switch S1 is connected to the gate G of the switching device;

[0056] The input end of the delay device is connected to the pulse signal input pin 1, and the output end of the delay device is used to transmit a pulse signal to the second switch S2 to control the second switch S2 to be closed or opened;

[0057] One end of the second switch S2 is connected to the power supply voltage input pin 2 , and the other end of the second switch S2 is connected to the gate G of the switching device.

[0058] The switching device can be a high electron mobility transistor made of gallium nitride, including a gate G, a source S and a drain D. In the first stage of the driving circuit in Figure 1, the first switch S1 is controlled to be closed, and the voltage output by the external voltage device is applied to the gate G of the switching device through the resistor R, and the gate-source voltage is slowly pulled up. In the second stage, the PWM pulse high-level signal is input from the pulse signal input pin 1, and the second switch S2 receives the PWM pulse high-level signal after the delay of the delay device and is closed. The power supply voltage VDD is input from the power supply voltage input pin 2 and is applied to the gate G of the switching device through the second switch S2 instead of the resistor R. The gate-source voltage is fully pulled up, the drain-source voltage of the switching device drops to zero, and the switching device is fully turned on.

[0059] As can be seen from the above, the switch device driving circuit of this example only needs to have two pins, the pulse signal input pin 1 and the power supply voltage input pin 2.

[0060] In the first stage of the driving circuit of Figure 2, a PWM pulse high-level signal is input from the pulse signal input pin 1. The first switch S1 is closed after receiving the signal. A resistor R is connected between the power supply voltage input pin 2 and the resistor pin 3. The power supply voltage VDD is input from the power supply voltage input pin 2 and applied to the gate G of the switching device through the resistor R and the first switch S1. The gate-source voltage is slowly pulled up. In the second stage, the second switch S2 is closed after receiving the PWM pulse high-level signal delayed by the delay device. The power supply voltage VDD is applied to the gate G of the switching device through the second switch S2 instead of the resistor R. The gate-source voltage is fully pulled up, the drain-source voltage of the switching device drops to zero, and the switching device is fully turned on.

[0061] As can be seen from the above, the traditional switch device driving circuit needs to have three pins, a pulse signal input pin 1, a power supply voltage input pin 2 and a resistor pin 3.

[0062] PWM (Pulse Width Modulation) is an analog control method that modulates the bias of a transistor's base or MOSFET's gate according to load variations, thereby varying the on-time of the transistor or MOSFET and, consequently, the output of a switching power supply. This method maintains a constant output voltage despite varying operating conditions and is a highly effective technique for controlling analog circuits using digital signals from a microprocessor. It is widely used in a wide range of fields, from measurement and communications to power control and conversion.

[0063] The switching device driving circuit provided in this embodiment includes a resistor, an external voltage device, a pulse signal input pin, a power supply voltage input pin, a first switch, a second switch and a delay device. One end of the resistor is connected to the output end of the external voltage device, and the other end of the resistor is connected to the pulse signal input pin. One end of the first switch is connected to the pulse signal input pin, and the other end of the first switch is connected to the gate of the switching device. The input end of the delay device is connected to the pulse signal input pin, and the output end of the delay device is used to transmit a pulse signal to the second switch to control the second switch to close or open. One end of the second switch is connected to the power supply voltage input pin, and the other end of the second switch is connected to the gate of the switching device. In the driving circuit of this embodiment, in the first stage, the external voltage device applies voltage to the gate of the switching device through the resistor, and the gate-source voltage is slowly pulled up. In the second stage, the power supply voltage is applied to the gate of the switching device without passing through the resistor, the gate-source voltage is fully pulled up, the drain-source voltage of the switching device drops to zero, and the switching device is fully turned on. By connecting one end of the resistor to the output end of the external voltage device and the other end of the resistor to the pulse signal input pin, the resistor pin can be eliminated. Without affecting the two-pole drive of the driving circuit, the number of pins in the driving circuit is reduced to meet the requirements of specific applications and packaging.

[0064] 1 , in one embodiment, the switching device driving circuit further includes: a pre-driving circuit and a third switch S3;

[0065] The input end of the pre-driving circuit is connected to the pulse signal input pin 1, and the output end of the pre-driving circuit is used to transmit a pulse signal to the third switch S3 to control the third switch S3 to be closed or opened;

[0066] One end of the third switch S3 is connected to the gate of the switching device, and the other end of the third switch S3 is connected to the source of the switching device.

[0067] During the driving process, the pre-driving circuit inverts the PWM pulse high-level signal into a PWM pulse low-level signal, so that the third switch S3 remains in the off state, that is, the source voltage of the switching device remains zero. When the switching device needs to be turned off, the PWM pulse low-level signal can be controlled to be input from the pulse signal input pin, and then the pre-driving circuit is controlled to invert the PWM pulse low-level signal into a PWM pulse high-level signal, so that the third switch S3 is closed, and the switching device is turned off by increasing the source voltage.

[0068] This embodiment provides a pre-drive circuit and a third switch so that the third switch is disconnected when the switching device needs to be driven and closed when the switching device needs to be closed. This can avoid applying voltage to the source of the switching device when the switching device needs to be driven, without affecting its conduction. When the switching device needs to be closed, voltage is still applied to the source of the switching device to close it, thereby ensuring the reliability and effectiveness of the drive circuit.

[0069] FIG3 is a flow chart of a method for driving a switching device according to an embodiment of the present disclosure. Referring to FIG1 and FIG3 , an embodiment of the present disclosure provides a method for driving a switching device, which may include:

[0070] 301. Control the voltage output by the external voltage device to be applied to the gate of the switching device;

[0071] 302. Control the PWM pulse high-level signal to be output to the second switch through the pulse signal input pin, so as to close the second switch;

[0072] 303. Control the power supply voltage to be applied to the gate of the switching device through the power supply voltage input pin and the second switch.

[0073] Among them, step 301 is the first stage of driving the switching device, and step 302 and step 303 are the second stage of driving the switching device, and there is no strict timing relationship between step 302 and step 303; that is, they can be executed simultaneously, or any step can be executed first, depending on actual needs and is not limited here.

[0074] Furthermore, controlling the voltage output by the external voltage device to be applied to the gate of the switching device may include:

[0075] The first switch is controlled to be closed, and the voltage output by the external voltage device is controlled to be applied to the gate of the switching device through the resistor, the pulse signal input pin and the first switch.

[0076] Furthermore, controlling the PWM pulse high-level signal to be output to the second switch through the pulse signal input pin may include:

[0077] The PWM pulse high level signal is controlled to be output to the delay device through the pulse signal input pin. After the control delay device delays the PWM pulse high level signal, the PWM pulse high level signal is output to the second switch.

[0078] The switching device driving method provided in this embodiment is as follows: in the first stage, the external voltage device applies voltage to the gate of the switching device through a resistor, and the gate-source voltage is slowly pulled up; in the second stage, the power supply voltage is applied to the gate of the switching device without passing through the resistor, the gate-source voltage is fully pulled up, the drain-source voltage of the switching device drops to zero, and the switching device is fully turned on. By connecting one end of the resistor to the output end of the external voltage device and the other end of the resistor to the pulse signal input pin, the resistor pin can be eliminated. Without affecting the two-pole drive of the driving circuit, the number of pins in the driving circuit is reduced to meet the requirements of specific applications and packaging.

[0079] FIG4 is a second flow chart of a method for driving a switching device according to an embodiment of the present disclosure. Referring to FIG1 and FIG4 , in one embodiment, the method for driving a switching device further includes:

[0080] 401. Control the PWM pulse high level signal to be output to the pre-driving circuit through the pulse signal input pin;

[0081] 402. Control the pre-driving circuit to invert the PWM pulse high-level signal to obtain a PWM pulse low-level signal;

[0082] 403. Control the pre-driving circuit to output a PWM pulse low-level signal to the third switch.

[0083] During the driving process, the pre-driving circuit inverts the PWM pulse high-level signal into a PWM pulse low-level signal, so that the third switch remains in the off state, that is, the source voltage of the switching device remains zero. When the switching device needs to be turned off, the PWM pulse low-level signal can be controlled to be input from the pulse signal input pin, and then the pre-driving circuit is controlled to invert the PWM pulse low-level signal into a PWM pulse high-level signal, so that the third switch is closed, and the switching device is turned off by increasing the source voltage.

[0084] This embodiment uses a pre-drive circuit and a third switch to disconnect the third switch when the switching device needs to be driven, thereby avoiding applying voltage to the source of the switching device when the switching device needs to be driven, without affecting its conduction, and ensuring the reliability and effectiveness of the drive circuit.

[0085] 5 is a diagram showing a corresponding relationship between a pulse signal in a switching device driving circuit and a voltage of a switching device according to an embodiment of the present disclosure;

[0086] 6 is a diagram showing the corresponding relationship between a pulse signal in a conventional switching device driving circuit and a voltage of a switching device;

[0087] 1 , in one embodiment, after controlling the power supply voltage to be applied to the gate of the switching device via the power supply voltage input pin and the second switch, the method may include:

[0088] The first switch is controlled to be turned off to limit the gate voltage of the switching device.

[0089] Since the power supply voltage generally does not exceed 7V and does not exceed the tolerance limit of the switching device, the maximum voltage applied to the switching device in a traditional switching device driving circuit is 7V. Therefore, there is no need to limit the gate voltage.

[0090] However, in this embodiment, since an external voltage is applied to the gate in the first stage, the external voltage can support different voltage ranges according to actual conditions, such as 5V to 30V, generally 10V, which exceeds the limit of the switching device. Therefore, after entering the second stage of superimposing the power supply voltage, the external voltage can be cut off by disconnecting the first switch to prevent damage to the switching device.

[0091] As can be seen from FIG5 , when the switching device needs to be driven, the PWM pulse signal is at a high level. The first switch S1 is at a high level, i.e., closed, in the first phase P1, and is at a low level, i.e., open, in the second phase P2, to cut off the external voltage and prevent damage to the switching device. The second switch S2 is at a low level, i.e., open, in the first phase P1, and after a delay enters the second phase P2, at a high level, i.e., closed. The third switch S3 is at a low level, i.e., open, throughout the entire process. The gate-source voltage Vgs of the switching device is slowly pulled up in the first phase P1 and fully pulled up in the second phase P2. The drain-source voltage Vds of the switching device continuously decreases in the first phase P1 until it drops to zero in the second phase P2. When the switching device needs to be turned off, the PWM pulse signal is at a low level. The first and second switches S1, S2 are both at a low level, i.e., open, and the third switch S3 is at a high level, i.e., closed. The gate-source voltage Vgs of the switching device drops to zero, and the drain-source voltage Vds of the switching device is fully pulled up.

[0092] Specifically, the control of the second switch S2 and the third switch S3 can be described as follows:

[0093] When the PWM pulse signal is at a high level, the third switch S3 is controlled to be opened through the pre-driving circuit, and the delay device is triggered at the same time. When the delay device meets the delay end condition, the second switch S2 is controlled to be closed. When the PWM pulse signal is at a low level, the third switch S3 is controlled to be closed through the pre-driving circuit. At this time, since the delay device does not work, the second switch S2 is synchronously opened after receiving the low-level pulse signal.

[0094] The delay circuit only operates when the second switch S2 is closed; the delay is zero when the second switch S2 is open. The delay circuit's end condition can be an application-adjustable time or can be based on detecting that an external signal meets a certain condition, such as the drain-to-source voltage of the switching device falling below a specific threshold.

[0095] As can be seen from FIG6 , when the switching device needs to be driven, the PWM pulse signal is at a high level, and the first switch S1 is at a high level throughout, that is, in a closed state. There is no need to limit the voltage input to the switching device. The second switch S2 is at a low level, that is, in an open state, in the first stage P1. After a delay, it enters the second stage P2 at a high level, that is, in a closed state. The third switch S3 is at a low level, that is, in an open state. The gate-source voltage Vgs of the switching device is slowly pulled up in the first stage P1 and is fully pulled up in the second stage P2. The drain-source voltage Vds of the switching device continues to decrease in the first stage P1 until it drops to zero in the second stage P2. When the switching device needs to be turned off, the PWM pulse signal is at a low level, and the first and second switches S1, S2 are both at a low level, that is, in an open state. The third switch S3 is at a high level, that is, in a closed state. The gate-source voltage Vgs of the switching device drops to zero, and the drain-source voltage Vds of the switching device is fully pulled up.

[0096] It should be noted that in Figures 5 and 6, during the driving process of the switching device, the drain-source voltage Vds does not necessarily drop to zero exactly at the end of the first stage P1 or at the beginning of the second stage P2. Its declining process may also extend from the first stage P1 to the second stage P2 and drop to zero at a certain moment in the second stage P2.

[0097] In the second stage of this embodiment, the switching device is connected to the power supply voltage and then cuts off the voltage, which can limit the gate voltage of the switching device and prevent the switching device from being damaged.

[0098] 1 , in one embodiment, after controlling the power supply voltage to be applied to the gate of the switching device via the power supply voltage input pin and the second switch, the method may include:

[0099] The first switch is controlled to enter a clamping mode to limit a gate voltage of the switching device.

[0100] Since the power supply voltage generally does not exceed 7V and does not exceed the tolerance limit of the switching device, the maximum voltage applied to the switching device in a traditional switching device driving circuit is 7V. Therefore, there is no need to limit the gate voltage.

[0101] However, in this embodiment, since an external voltage is applied to the gate in the first stage, the external voltage can support different voltage ranges according to actual conditions, such as 5V to 30V, generally 10V, which exceeds the limit of the switching device. Therefore, after entering the second stage of superimposing the power supply voltage, the gate voltage of the switching device can be limited by the clamping mode of the first switch to prevent damage to the switching device.

[0102] Clamping mode is a mode that limits the potential of a certain point to a specified potential. It is an overvoltage protection technology. By controlling the first switch to enter clamping mode, the gate voltage can also be controlled to limit it to a reasonable range to avoid damage to the switching device.

[0103] In the second stage of this embodiment, after the switching device is connected to the power supply voltage, the first switch is controlled to enter the clamping mode, which can limit the gate voltage of the switching device and prevent the switching device from being damaged.

[0104] 1 , in one embodiment, the switching device driving method may further include:

[0105] The size of the resistor is adjusted to adjust the drop speed of the drain-source voltage of the switching device.

[0106] During the driving process of the switching device, the drop in the drain-source voltage will cause electromagnetic interference and have adverse effects on surrounding devices. The speed at which the drain-source voltage drops, that is, the slope, is closely related to the magnitude of the electromagnetic interference. Therefore, the size of the resistor can be adjusted to adjust the voltage of the input switching device gate, thereby adjusting the drop speed of the drain-source voltage of the switching device to reduce electromagnetic interference.

[0107] This embodiment can adjust the drop speed of the drain-source voltage of the switching device by adjusting the value of the resistor, thereby reducing electromagnetic interference to peripheral devices.

[0108] An embodiment of the present disclosure provides a switching device driver chip, comprising the aforementioned switching device driver circuit.

[0109] In the driver chip of this embodiment, in the first stage, the external voltage device applies voltage to the gate of the switching device through the resistor, and the gate-source voltage is slowly pulled up. In the second stage, the power supply voltage is applied to the gate of the switching device without passing through the resistor, the gate-source voltage is fully pulled up, the drain-source voltage of the switching device drops to zero, and the switching device is fully turned on. By connecting one end of the resistor to the output end of the external voltage device and the other end of the resistor to the pulse signal input pin, the resistor pin can be eliminated. Without affecting the two-pole drive of the driving circuit, the number of pins in the driving circuit is reduced to meet the requirements of specific applications and packaging.

[0110] An embodiment of the present disclosure provides a switching device driving apparatus, including the aforementioned switching device driving chip.

[0111] In the driving device of this embodiment, in the first stage, the external voltage device applies voltage to the gate of the switching device through the resistor, and the gate-source voltage is slowly pulled up. In the second stage, the power supply voltage is applied to the gate of the switching device without passing through the resistor, the gate-source voltage is fully pulled up, the drain-source voltage of the switching device drops to zero, and the switching device is fully turned on. By connecting one end of the resistor to the output end of the external voltage device and the other end of the resistor to the pulse signal input pin, the resistor pin can be eliminated. Without affecting the two-pole drive of the driving circuit, the number of pins in the driving circuit is reduced to meet the requirements of specific applications and packaging.

[0112] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present disclosure.

Claims

1. A switch device driving circuit, characterized in that: include: A resistor, an external voltage device, a pulse signal input pin, a power supply voltage input pin, a first switch, a second switch and a delay device; One end of the resistor is connected to the output end of the external voltage device, and the other end of the resistor is connected to the pulse signal input pin; One end of the first switch is connected to the pulse signal input pin, and the other end of the first switch is connected to the gate of the switching device; The input end of the delay device is connected to the pulse signal input pin, and the output end of the delay device is used to transmit a pulse signal to the second switch to control the second switch to be closed or opened; One end of the second switch is connected to the power supply voltage input pin, and the other end of the second switch is connected to the gate of the switching device.

2. The switch device driving circuit according to claim 1, characterized in that: Also includes: A pre-driver circuit and a third switch; The input end of the pre-driving circuit is connected to the pulse signal input pin, and the output end of the pre-driving circuit is used to transmit a pulse signal to the third switch to control the third switch to be closed or opened; One end of the third switch is connected to the gate of the switching device, and the other end of the third switch is connected to the source of the switching device.

3. A method for driving a switching device, characterized in that: The method is implemented by using the switch device driving circuit according to any one of claims 1 to 2, comprising: Controlling the voltage output by the external voltage device to be applied to the gate of the switching device; Controlling the PWM pulse high level signal to be output to the second switch through the pulse signal input pin, so that the second switch is closed; A control power supply voltage is applied to the gate of the switching device through a power supply voltage input pin and the second switch.

4. The method for driving a switching device according to claim 3, wherein: The control of applying the voltage output by the external voltage device to the gate of the switching device comprises: Control the first switch to close, control the voltage output by the external voltage device to pass through the resistor, the pulse A signal is input to the first switch pin and applied to the gate of the switching device.

5. The method for driving a switching device according to claim 3, characterized in that: The control PWM pulse high level signal is output to the second switch through the pulse signal input pin, comprising: Control the PWM pulse high level signal to pass through the pulse signal input pin and output to the delay device; After controlling the delay device to delay the PWM pulse high level signal, the PWM pulse high level signal is output to the second switch.

6. The method for driving a switching device according to claim 3, wherein: Also includes: Controlling the PWM pulse high level signal to be output to the pre-driving circuit through the pulse signal input pin; Controlling the pre-driving circuit to invert the PWM pulse high level signal to obtain a PWM pulse low level signal; The pre-driving circuit is controlled to output the PWM pulse low level signal to the third switch.

7. The method for driving a switching device according to claim 3, wherein: After the control power supply voltage is applied to the gate of the switching device through the power supply voltage input pin and the second switch, the method comprises: The first switch is controlled to be turned off to limit the gate voltage of the switching device.

8. The method for driving a switching device according to claim 3, wherein: After the control power supply voltage is applied to the gate of the switching device through the power supply voltage input pin and the second switch, the method comprises: The first switch is controlled to enter a clamping mode to limit a gate voltage of the switching device.

9. The method for driving a switching device according to claim 4, wherein: Also includes: The size of the resistor is adjusted to adjust the drop speed of the drain-source voltage of the switching device.

10. The method for driving a switching device according to claim 3, wherein: The power supply voltage does not exceed 7V.

11. A switch device driver chip, characterized in that: A switching device driving circuit comprising the switching device driving circuit according to any one of claims 1 to 2.

12. A switching device driving device, characterized in that: Includes the switching device driver chip as claimed in claim 11.

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