Method for simultaneous selective deposition of both metal and dielectric films

Abstract

Methods and apparatuses for the binary selective deposition of a first material on a first surface of a substrate and a second material on a second, different surface of the same substrate are provided. Methods for the reduction of overhang during silicon oxide deposition are also provided. The selectively deposited materials include metal-containing materials or dielectric materials.

Description

METHOD FOR SIMULTANEOUS SELECTIVE DEPOSITION OF BOTH METAL AND DIELECTRIC FILMSCROSS REFERENCES

[0001] A PCT Request Form is filed concurrently with this specification as part of the present application. Each application that the present application claims benefit of or priority to as identified in the concurrently filed PCT Request Form is incorporated by reference herein in their entireties and for all purposes.BACKGROUND

[0002] Integrated circuits are manufactured by a complex process in which various layers of materials are sequentially constructed in a predetermined arrangement on a semiconductor substrate.

[0003] The predetermined arrangement of materials on a semiconductor substrate is often accomplished by deposition of a material over the entire substrate surface, followed by removal of the material from predetermined areas of the substrate, such as by deposition of a mask layer and subsequent selective etching process. Multiple steps are typically required when one material is to be deposited only on a first surface while another material is to be deposited on a second surface. To accomplish the desired arrangement, one material may be deposited over the entire substrate surface. Then a photolithography process is used to pattern the material exposing the material not on the first surface. The first surface is then etched until the material only remains on the first surface. The same steps must then be repeated in order to deposit another material on the second surface. Such processes are not only cumbersome, but also can result in formation of undesirable materials in undesirable locations on a substrate.

[0004] Semiconductor processing efficiency could be improved if a single process suitable for advanced semiconductor applications could be utilized to both deposit a first material on a first surface of a substrate and a second material on a second surface of the substrate.

[0005] The background description provided herein is for the purposes of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.SUMMARY

[0006] Methods and apparatuses for the binary selective deposition of a first material on a first surface of a substrate and a second material on a second, different surface of the same substrate are provided. For example, a metal -based inhibitor may be thermally deposited on the metal surface of a substrate, and a silicon-containing film may be deposited by atomic layer deposition or chemical vapor deposition on the dielectric surface of the same substrate, followed by conversion of the metal-based inhibitor to a metal film. Methods for the reduction of overhang during silicon oxide deposition are also provided. The selectively deposited materials include metal-containing materials or dielectric materials.

[0007] Accordingly, in a first aspect, the present disclosure encompasses a method for binary deposition of a metal and a dielectric film. In some embodiments, the method includes providing a substrate having a metal surface including a first metal and a dielectric surface including a first dielectric in a process chamber; exposing the substrate to a metal-containing inhibitor having a second metal to form a film of the metal-containing inhibitor on the metal surface; supplying a dielectric precursor comprising a second dielectric to the process chamber to selectively form a dielectric film including the second dielectric on the dielectric surface including the first dielectric; and converting the film of the metal-containing inhibitor on the metal surface to a second metal by treating the film of the metal-containing inhibitor with plasma.

[0008] In some embodiments, the metal-containing inhibitor is a metal carbene compound, a metal carbenoid compound, a metal halide compound, a metal oxyhalide compound, a metal carbonyl compound, a metal cyclopentadienyl compound, a metal diketonate compound, a metal arylisocyanide compound or a metal alkylisocyanide compound; and the metal of the metalcontaining inhibitor is antimony, chromium, copper, cobalt, hafnium, molybdenum, nickel, ruthenium, platinum, titanium, tantalum, tungsten, zinc or zirconium.

[0009] In some embodiments, the metal-containing inhibitor is a structure of formula (I) MLX(I); wherein M is a metal including antimony, copper, cobalt, hafnium, nickel, ruthenium, platinum, titanium, tantalum, tungsten or molybdenum; each L is independently a monodentate ligand, ambidentate ligand, bidentate ligand or tridentate ligand; and x is an integer of 1-6.

[0010] In some embodiments, the monodentate ligand is hydrogen, halo, hydroxy, alkyl silyl, silylalkyl, alkenyl, alkynyl, allyl, alkoxy, alkenoxy, alkynoxy, thioalkoxy, aliphatic acyl, -CF3, nitro, amino, imino, -N(CI-C3 alkyl)C(O)(Ci-C3 alkyl), -C1-C3 alkylamino, alkenylamino, alkynylamino, di(Ci-C3alkyl)amino, -C(O)O-(Ci-C3alkyl), -C(O)NH-(CI-C3alkyl), -CH=NOH,-P(Ci-C3alkyl)3, -PO3H2, -OPO3H2, -C(0)N(CI-C3 alkyl)2, haloalkyl, alkoxy carbonyl, alkoxyalkoxy, carboxaldehyde, carboxamide, cycloalkyl, cycloalkenyl, cycloalkynyl, aryl, aroyl, aryloxy, arylamino, biaryl, thioaryl, heterocyclyl, alkylheterocyclyl, heterocyclylalkyl, heterocycloyl, alkylaryl, alkylcarbonyl, CO, =0, =S, =N, C = C,-N0, aralkenyl, aralkyl, sulfonyl, sulfonamido, sulfonimido, carbamate, aryloxyalkyl, carboxyl, carboxy, -C(O)NH(benzyl), ylidenyl, amido, azido, isocyanato, thiocyanato, isothiocyanato, cyano, isocyanoalkyl, isocyanohaloalkyl, isocyanoaryl, isocyanohaloaryl or cyclyl.

[0011] In some embodiments, at least one L is ylidenyl.

[0012] In some embodiments, the ylidenyl is a carbene or a nitrogen carbenoid.

[0013] In some embodiments, the carbene is an N-heterocyclic carbene.

[0014] In some embodiments, the nitrogen carbenoid is imidazolium or pyridinium.

[0015] In some embodiments, the metal-containing inhibitor has a structure of formula (II) L’yML”ML’y(II); wherein M is a metal including antimony, copper, cobalt, hafnium, nickel, ruthenium, platinum, titanium, tantalum, tungsten or molybdenum; each L’ is independently a monodentate ligand, ambidentate ligand, bidentate ligand or tridentate ligand; L” is a ligand comprising a triply bonded carbyne, a triply bonded imide or a triply bonded nitride; and y is an integer of 1-5.

[0016] In some embodiments, the monodentate ligand is hydrogen, halo, hydroxy, alkyl silyl, silylalkyl, alkenyl, alkynyl, allyl, alkoxy, alkenoxy, alkynoxy, thioalkoxy, aliphatic acyl, -CF3, nitro, amino, imino, -N(CI-C3 alkyl)C(O)(Ci-C3 alkyl), -C1-C3 alkylamino, alkenylamino, alkynylamino, di(Ci-C3alkyl)amino, -C(O)O-(Ci-C3alkyl), -C(O)NH-(CI-C3alkyl), -CH=NOH, -P(Ci-C3alkyl)3, -PO3H2, -OPO3H2, -C(O)N(CI-C3 alkyl)2, haloalkyl, alkoxy carbonyl, alkoxyalkoxy, carboxaldehyde, carboxamide, cycloalkyl, cycloalkenyl, cycloalkynyl, aryl, aroyl, aryloxy, arylamino, biaryl, thioaryl, heterocyclyl, alkylheterocyclyl, heterocyclylalkyl, heterocycloyl, alkylaryl, alkylcarbonyl, CO, =0, =S, =N, C = C,-NO, aralkenyl, aralkyl, sulfonyl, sulfonamido, sulfonimido, carbamate, aryloxyalkyl, carboxyl, carboxy, -C(O)NH(benzyl), ylidenyl, amido, azido, isocyanato, thiocyanato, isothiocyanato, cyano, isocyanoalkyl, isocyanohaloalkyl, isocyanoaryl, isocyanohaloaryl or cyclyl.

[0017] In some embodiments, the metal-containing inhibitor comprises a molybdenum halide, a molybdenum oxyhalide, or a molybdenum diketonate.

[0018] In some embodiments, the method also includes optionally post-treating the second metal to remove excess inhibitor after converting the film of the metal-containing inhibitor to a secondmetal.

[0019] In some embodiments, post-treating is treatment with a hydrogen-containing plasma or treatment with a flash-enhanced plasma.

[0020] In some embodiments, the metal surface is tungsten oxide, hafnium oxide, titanium oxide, aluminum oxide, zirconium oxide, cobalt, copper, tungsten, ruthenium, molybdenum or a combination thereof.

[0021] In some embodiments, the first dielectric is germanium oxide, antimony oxide, bismuth oxide, magnesium oxide, aluminum oxide, nickel oxide, iron oxide, titanium oxide, tantalum nitride, cobalt oxide, silicon dioxide, silicon nitride or silicon oxide carbide; and the second dielectric is silicon dioxide, silicon nitride or silicon oxide carbide.

[0022] In a second aspect, the present disclosure encompasses a method for selective deposition of a silicon oxide film on a substrate. In some embodiments, the method includes providing a substrate having a first surface and a second surface in a process chamber; exposing the substrate to at least one metal-containing inhibitor to form a pre-treated substrate having a metal-containing inhibitor on the first surface; supplying a silicon-containing precursor and an oxygen-containing reactant or a silicon- and oxygen-containing precursor to the process chamber to form a silicon- containing film over the second surface of the pre-treated substrate; and removing the metalcontaining inhibitor from the first surface, where the first surface and the second surface are different.

[0023] In some embodiments, the metal-containing inhibitor is a metal carbene compound, a metal carbenoid compound, a metal halide compound, a metal oxyhalide compound, a metal carbonyl compound, a metal cyclopentadienyl compound, a metal diketonate compound, a metal arylisocyanide compound, or a metal alkylisocyanide compound; and wherein the metal of the metal-containing inhibitor comprises antimony, chromium, copper, cobalt, hafnium, molybdenum, nickel, ruthenium, platinum, titanium, tantalum, tungsten, zinc or zirconium.

[0024] In some embodiments, the metal-containing inhibitor is (3,3-dimethyl-l-butyne)dicobalt hexacarbonyl, tungsten hexacarbonyl or molybdenum pentachloride.

[0025] In some embodiments, the first surface is a metal, the second surface is a dielectric, and overhang is minimized.

[0026] In a third aspect, the present disclosure encompasses an apparatus for selective deposition of two different materials on two different surfaces of a semiconductor substrate. In some embodiments, the apparatus includes a processing chamber; a substrate holder in the processingchamber; one or more gas inlets for flowing gases into the processing chamber; a vacuum source for removing gases from the processing chamber; a plasma generator for generating plasma within the processing chamber; and one or more controllers comprising machine-readable instructions for operating the one or more gas inlets, vacuum source, and plasma generator to deposit onto a semiconductor substrate, the machine-readable instructions of the one or more controllers comprising instructions for: introducing a metal-containing inhibitor to form a metalcontaining inhibitor film on a first surface of a semiconductor substrate; introducing a dielectric precursor to form a dielectric film on a second surface of a semiconductor substrate; and converting metal-containing inhibitor film on the first surface of the semiconductor substrate to metal.

[0027] Other features and advantages of the invention will be apparent from the following description and the claims.

[0028] These and other aspects are described further below with reference to the drawings.BRIEF DESCRIPTION OF THE DRAWINGS

[0029] FIG. 1 provides a schematic of non-limiting operations for selective deposition in accordance with certain disclosed embodiments.

[0030] FIG. 2 provides a process flow diagram showing relevant operations of a method for simultaneous selective deposition in accordance with certain disclosed embodiments.

[0031] FIG. 3 provides a schematic of a semiconductor substrate containing a high aspect ratio feature at different stages of a process impeded by overhang in accordance with certain embodiments.

[0032] FIG. 4 provides a process flow diagram showing relevant operations of methods for selective deposition of silicon oxides which may minimize overhang in accordance with certain disclosed embodiments.

[0033] FIG. 5 shows a schematic illustration of an atomic layer deposition (ALD) or chemical vapor deposition (CVD) chamber suitable for practicing certain disclosed embodiments.

[0034] FIG. 6 shows another schematic illustration of another ALD or CVD chamber suitable for practicing certain disclosed embodiments.

[0035] FIG. 7 shows a schematic illustration of a module cluster suitable for practicing certain disclosed embodiments.DETAILED DESCRIPTION

[0036] In the following description, numerous specific details are set forth to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail to not unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with the specific embodiments, it will be understood that it is not intended to limit the disclosed embodiments.Definitions

[0037] By “aliphatic” is meant a hydrocarbon moiety having at least one carbon atom to 50 carbon atoms (C1-50), such as one to 25 carbon atoms (C1-25), or one to ten carbon atoms (Ci- 10), and which includes saturated groups such as alkanes (or alkyl) and unsaturated groups such as alkenes (or alkenyl), alkynes (or alkynyl), and also includes cyclic versions thereof, and further including straight- and branched-chain arrangements, and all stereo and position isomers as well. Such a hydrocarbon can be unsubstituted or substituted with one or more groups, such as halogens or groups described herein for an alkyl group.

[0038] By “alkenyl” is meant an optionally substituted C2-24 alkyl group having one or more double bonds. The alkenyl group can be cyclic (e.g., C3-24 cycloalkenyl) or acyclic. The alkenyl group can also be substituted or unsubstituted. For example, the alkenyl group can be substituted with one or more substitution groups, as described herein for alkyl. Non-limiting unsubstituted alkenyl groups include C2-8 alkenyl, C2-6 alkenyl, C2-5 alkenyl, C2-4 alkenyl, or C2-3 alkenyl. Exemplary, non-limiting alkenyl groups include vinyl or ethenyl (-CH=CH2), 1 -propenyl (-CH=CHCH3), allyl or 2-propenyl (-CH2-CH=CH2), 1-butenyl (-CH=CHCH2CH3), 2-butenyl (-CH2CH=CHCH3), 3-butenyl (e g. -CH2CH2CH=CH2), 2-butenylidene (e.g, =CH-CH=CHCH3), and the like.

[0039] By “alkenylene” is meant a multivalent (e.g., bivalent) form of an alkenyl group, which is an optionally substituted C2-24 alkyl group having one or more double bonds. The alkenylene group can be cyclic (e.g, C3-24 cycloalkenyl) or acyclic. The alkenylene group can be substituted or unsubstituted. For example, the alkenylene group can be substituted with one or more substitution groups, as described herein for alkyl. Exemplary, non-limiting alkenylene groups include -CH=CH- or -CH=CHCH2-.

[0040] By “alkoxy” is meant -OR, where R is an optionally substituted alkyl group, as described herein. Exemplary alkoxy groups include methoxy, ethoxy, butoxy, trihaloalkoxy, such astrifluoromethoxy, etc. The alkoxy group can be substituted or unsubstituted. For example, the alkoxy group can be substituted with one or more substitution groups, as described herein for alkyl. Exemplary unsubstituted alkoxy groups include C1-3, C1-6, C1-12, Ci-16, Ci-is, C1-20, or C1-24 alkoxy groups.

[0041] By “alkyl” and the prefix “alk” is meant a branched or unbranched saturated hydrocarbon group of 1 to 24 carbon atoms, such as methyl (Me), ethyl (Et), n-propyl (n-Pr or nPr), isopropyl (i-Pr or iPr), cyclopropyl, n-butyl (n-Bu or nBu), isobutyl (i-Bu or iBu), s-butyl (s-Bu or sBu), t- butyl (t-Bu or tBu), cyclobutyl, n-pentyl, isopentyl, s-pentyl, neopentyl, hexyl, heptyl, octyl, nonyl, decyl, dodecyl, tetradecyl, hexadecyl, eicosyl, tetracosyl, and the like. The alkyl group can be cyclic (e.g., C3-24 cycloalkyl) or acyclic. The alkyl group can be branched or unbranched. The alkyl group can also be substituted or unsubstituted. For example, the alkyl group can include haloalkyl, in which the alkyl group is substituted by one or more halo groups, as described herein. In another example, the alkyl group can be substituted with one, two, three or, in the case of alkyl groups of two carbons or more, four substituents independently selected from the group consisting of: (1) C1-6 alkoxy (e.g., -O-Ak, wherein Ak is optionally substituted C1-6 alkyl); (2) amino (e.g., -NRN1RN2, where each of RN1and RN2is, independently, H or optionally substituted alkyl, or RN1and RN2, taken together with the nitrogen atom to which each are attached, form a heterocyclyl group); (3) aryl; (4) arylalkoxy (e.g., -O-Lk-Ar, wherein Lk is a bivalent form of optionally substituted alkyl and Ar is optionally substituted aryl); (5) aryloyl (e.g., -C(O)-Ar, wherein Ar is optionally substituted aryl); (6) cyano (e.g., -CN); (7) carboxyaldehyde (e.g., -C(O)H); (8) carboxyl (e.g., -CO2H); (9) C3-8 cycloalkyl (e.g., a monovalent saturated or unsaturated non-aromatic cyclic C3-8 hydrocarbon group); (10) halo (e.g., F, Cl, Br, or I); (11) heterocyclyl (e.g., a 3-, 4-, 5-, 6- or 7-membered ring, unless otherwise specified, containing one, two, three, or four non-carbon heteroatoms, such as nitrogen, oxygen, phosphorous, sulfur, or halo); (12) heterocyclyloxy (e.g., -O-Het, wherein Het is heterocyclyl, as described herein); (13) heterocyclyloyl (e.g., -C(O)-Het, wherein Het is heterocyclyl, as described herein); (14) hydroxyl (e.g., -OH); (15) N-protected amino; (16) nitro (e.g., -NO2); (17) oxo (e.g., =0); (18) -CO2RA, where RAis selected from the group consisting of (a) C1-6 alkyl, (b) C4-18 aryl, and (c) (C4-18 aryl) C1-6 alkyl (e.g., -Lk-Ar, wherein Lk is a bivalent form of optionally substituted alkyl group and Ar is optionally substituted aryl); (19) -C(0)NRBRc, where each of RBand Rcis, independently, selected from the group consisting of (a) hydrogen, (b) C1-6 alkyl, (c) C4-18 aryl, and (d) (C4-18 aryl) C1-6 alkyl (e.g., -Lk-Ar, wherein Lk is a bivalent form of optionally substituted alkyl group and Ar is optionally substituted aryl); and (20) -NRGRH, where each of RGand RHis, independently, selected from the group consisting of (a) hydrogen, (b) an N-protecting group, (c) C1-6 alkyl, (d)C2-6 alkenyl (e.g., optionally substituted alkyl having one or more double bonds), (e) C2-6 alkynyl (e.g., optionally substituted alkyl having one or more triple bonds), (f) C4-18 aryl, (g) (C4-18 aryl) C1-6 alkyl (e.g., Lk-Ar, wherein Lk is a bivalent form of optionally substituted alkyl group and Ar is optionally substituted aryl), (h) C3-8 cycloalkyl, and (i) (C3-8 cycloalkyl) C1-6 alkyl (e.g., -Lk-Cy, wherein Lk is a bivalent form of optionally substituted alkyl group and Cy is optionally substituted cycloalkyl, as described herein), wherein in one embodiment no two groups are bound to the nitrogen atom through a carbonyl group. The alkyl group can be a primary, secondary, or tertiary alkyl group substituted with one or more substituents (e.g., one or more halo or alkoxy). In some embodiments, the unsubstituted alkyl group is a C1-2, C1-3, C1-6, C1-12, Ci-16, Ci-18, C1-20, C1-24, C2- 3, C2-6, C2-12, C2-16, C2-18, C2-20, or C2-24 alkyl group.

[0042] By “alkylene” is meant a multivalent (e.g., bivalent) form of an alkyl group, as described herein. Exemplary alkylene groups include methylene, ethylene, propylene, butylene, etc. In some embodiments, the alkylene group is a C1-3, C1-6, C1-12, Ci-16, Ci-18, C1-20, C1-24, C2-3, C2-6, C2- 12, C2-16, C2-18, C2-20, or C2-24 alkylene group. The alkylene group can be branched or unbranched. The alkylene group can also be substituted or unsubstituted. For example, the alkylene group can be substituted with one or more substitution groups, as described herein for alkyl.

[0043] By “alkylcarbonyl” is meant an alkyl group as previously defined appended to the parent molecular moiety through a carbonyl group. Exemplary, non-limiting alkylcarbonyl groups include methylcarbonyl, ethyl carbonyl, and isopropylcarbonyl among others.

[0044] By “alkynyl” is meant an optionally substituted C2-24 alkyl group having one or more triple bonds. The alkynyl group can be cyclic or acyclic and is exemplified by ethynyl, 1-propynyl, and the like. The alkynyl group can also be substituted or unsubstituted. For example, the alkynyl group can be substituted with one or more substitution groups, as described herein for alkyl. Nonlimiting unsubstituted alkynyl groups include C2-8 alkynyl, C2-6 alkynyl, C2-5 alkynyl, C2-4 alkynyl, or C2-3 alkynyl. Exemplary, non-limiting alkynyl groups include ethynyl (-C=CH), 1-propynyl (- OCCH3), 2-propynyl or propargyl (-CH2OCH), 1-butynyl (-OCCH2CH3), 2-butynyl (-CH2OCCH3), 3-butynyl (-CH2CH2OCH), and the like.

[0045] By “alkynylene” is meant a multivalent (e.g., bivalent) form of an alkynyl group, which is an optionally substituted C2-24 alkyl group having one or more triple bonds. The alkynylene group can be cyclic or acyclic. The alkynylene group can be substituted or unsubstituted. For example, the alkynylene group can be substituted with one or more substitution groups, as described herein for alkyl. Exemplary, non-limiting alkynylene groups include -C=C- or -OCCH2-.

[0046] By “ amido” is meant -N(RN1)C(O)-, where RN1is H, optionally substituted alkyl, or optionally substituted aryl.

[0047] By “amino” is meant -NRN1RN2, where each of RN1and RN2is, independently, H, optionally substituted alkyl, or optionally substituted aryl, or RN1and RN2, taken together with the nitrogen atom to which each are attached, form a heterocyclyl group, as defined herein.

[0048] By “aminoalkyl” is meant an alkyl group, as defined herein, substituted by an amino group, as defined herein.

[0049] By “aminoaryl” is meant an aryl group, as defined herein, substituted by an amino group, as defined herein.

[0050] By “aryl” is meant a group that contains any carbon-based aromatic group including, but not limited to, phenyl, benzyl, anthracenyl, anthryl, benzocyclobutenyl, benzocyclooctenyl, biphenylyl, chrysenyl, dihydroindenyl, fluoranthenyl, indacenyl, indenyl, naphthyl, phenanthryl, phenoxybenzyl, picenyl, pyrenyl, terphenyl, and the like, including fused benzo-C4-8 cycloalkyl radicals (e.g., as defined herein) such as, for instance, indanyl, tetrahydronaphthyl, fluorenyl, and the like. The term aryl also includes heteroaryl, which is defined as a group that contains an aromatic group that has at least one heteroatom incorporated within the ring of the aromatic group. Examples of heteroatoms include, but are not limited to, nitrogen, oxygen, sulfur, and phosphorus. Likewise, the term non-heteroaryl, which is also included in the term aryl, defines a group that contains an aromatic group that does not contain a heteroatom. The aryl group can be substituted or unsubstituted. The aryl group can be substituted with one, two, three, four, or five substituents, such as any described herein for alkyl.

[0051] By “ azido” is meant -Ns.

[0052] By “branched alkenyl” is meant an isomer of a straight chain alkenyl compound; one having alkyl groups bonded to the main carbon chain.

[0053] By “ cyano” is meant -CN.

[0054] By “carbonyl” is meant a -C(O)- group, which can also be represented as >C=O.

[0055] By “cycloalkyl” is meant a monovalent saturated or unsaturated non-aromatic or aromatic cyclic hydrocarbon group of from three to eight carbons, unless otherwise specified, and is exemplified by cyclopropyl, cyclobutyl, cyclopentyl, cyclopentadienyl, cyclohexyl, cycloheptyl, bicyclo[2.2.1.]heptyl, and the like. The cycloalkyl group can also be substituted or unsubstituted. For example, the cycloalkyl group can be substituted with one or more groupsincluding those described herein for alkyl.

[0056] By “deposition” or “vapor deposition” is meant a process in which a metal layer is formed on one or more surfaces of a substrate from vaporized precursor composition(s) including one or more metal containing compounds. The metal -containing compounds are vaporized and directed to and / or contacted with one or more surfaces of a substrate (i.e., semiconductor substrate or semiconductor assembly) placed in a deposition chamber. Typically, the substrate is heated. These metal containing compounds form a non-volatile, thin, uniform metal-containing layer on the surface(s) of the substrate. One operation of the method is one cycle, and the process can be repeated for as many cycles necessary to obtain the desired metal thickness.

[0057] By “dicarbonyl” is meant any moiety or compound including two carbonyl groups, as defined herein. Non-limiting dicarbonyl moi eties include 1,2-dicarbonyl (e.g., Rcl-C(O)- C(O)RC2, in which each of RC1and RC2is, independently, optionally substituted alkyl, halo, optionally substituted alkoxy, hydroxyl, or a leaving group); 1,3-dicarbonyl (e.g., Rcl-C(O)- C(RlaR2a)-C(O)RC2, in which each of RC1and RC2is, independently, optionally substituted alkyl, halo, optionally substituted alkoxy, hydroxyl, or a leaving group and in which each of Rlaand R2ais, independently, H or an optional substituent provided for alkyl, as defined herein); and 1,4- dicarbonyl (e.g., Rcl-C(O)-C(RlaR2a)-C(R3aR4a)-C(O)RC2, in which each of RC1and RC2is, independently, optionally substituted alkyl, halo, optionally substituted alkoxy, hydroxyl, or a leaving group and in which each of Rla, R2a, R3a, and R4ais, independently, H or an optional substituent provided for alkyl, as defined herein).

[0058] By “halo” is meant F, Cl, Br, or I.

[0059] By “halo containing substituent” is meant a group that contains a halo, such as a haloaliphatic or haloalkyl group.

[0060] By “haloaliphatic” is meant an aliphatic group, as defined herein, substituted with one or more halo.

[0061] By “haloalkenyl” is meant an alkenyl group, as defined herein, substituted with one or more halo.

[0062] By “haloalkynyl” is meant an alkynyl group, as defined herein, substituted with one or more halo.

[0063] By “haloalkyl” is meant an alkyl group, as defined herein, substituted with one or more halogen. Non-limiting unsubstituted haloalkyl groups include C1-2 haloalkyl, C1-3 haloalkyl, Ci-4 haloalkyl, C1-5 haloalkyl, C1-6 haloalkyl, C2-3 haloalkyl, C2-4 haloalkyl, C2-5 haloalkyl, C2-6haloalkyl, or C3-6 haloalkyl. Other non-limiting haloalkyl groups include -CXyHs-y, wherein y is 1, 2, or 3, and wherein each X is, independently, halo (F, Cl, Br, or I); -CXzFk-zCXvFh-v, wherein z is 0, 1, or 2, wherein y is 0, 1, 2, or 3, and wherein each X is, independently, halo (F, Cl, Br, or I), in which at least one of z or y is not 0; -CFFCXyFb-y, wherein y is 1, 2, or 3, and wherein each X is, independently, halo (F, Cl, Br, or I); -CXziH2-ziCXZ2H2-z2CXyH3-y, wherein each of zl and z2 is, independently, 0, 1, or 2, wherein y is 0, 1, 2, or 3, and wherein each X is, independently, halo (F, Cl, Br, or I), in which at least one of zl, z2, or y is not 0; and -CXzHi-z[CXyiH3-yi][CXy2H3-y2], wherein z is 0 or 1, wherein each of yl and y2 is, independently, 0, 1, 2, or 3, and wherein each X is, independently, halo (F, Cl, Br, or I), in which at least one of z, yl, or y2 is not 0.

[0064] By “haloalkylene” is meant an alkylene group, as defined herein, substituted with one or more halo.

[0065] By “heterocyclyl” is meant a 3-, 4-, 5-, 6- or 7-membered ring, unless otherwise specified, containing one, two, three, or four non-carbon heteroatoms (e.g., independently selected from the group consisting of nitrogen, oxygen, phosphorous, sulfur, selenium, or halo). The 3- membered ring has zero to one double bonds, the 4- and 5-membered ring has zero to two double bonds, and the 6- and 7-membered rings have zero to three double bonds. The term “heterocyclyl” also includes bicyclic, tricyclic and tetracyclic groups in which any of the above heterocyclic rings is fused to one, two, or three rings independently selected from the group consisting of an aryl ring, a cyclohexane ring, a cyclohexene ring, a cyclopentane ring, a cyclopentene ring, and another monocyclic heterocyclic ring, such as indolyl, quinolyl, isoquinolyl, tetrahydroquinolyl, benzofuryl, benzothienyl and the like. Heterocyclics include acridinyl, adenyl, alloxazinyl, azaadamantanyl, azabenzimidazolyl, azabicyclononyl, azacycloheptyl, azacyclooctyl, azacyclononyl, azahypoxanthinyl, azaindazolyl, azaindolyl, azecinyl, azepanyl, azepinyl, azetidinyl, azetyl, aziridinyl, azirinyl, azocanyl, azocinyl, azonanyl, benzimidazolyl, benzisothiazolyl, benzisoxazolyl, benzodiazepinyl, benzodiazocinyl, benzodihydrofuryl, benzodioxepinyl, benzodioxinyl, benzodi oxanyl, benzodioxocinyl, benzodi oxolyl benzodithiepinyl, benzodithiinyl, benzodioxocinyl, benzofuranyl, b enzophenaziny 1 benzopyranonyl, benzopyranyl, benzopyrenyl, benzopyronyl, benzoquinolinyl benzoquinolizinyl, benzothiadiazepinyl, benzothiadiazolyl, benzothi azepinyl, benzothiazocinyl, benzothiazolyl, benzothienyl, benzothiophenyl, benzothiazinonyl, benzothiazinyl, benzothiopyranyl, benzothi opyronyl, benzotriazepinyl, benzotriazinonyl, benzotriazinyl, benzotriazolyl, benzoxathiinyl, benzotrioxepinyl, benzoxadiazepinyl, benzoxathiazepinyl, benzoxathiepinyl, benzoxathiocinyl, benzoxazepinyl, benzoxazinyl, benzoxazocinyl,benzoxazolinonyl, benzoxazolinyl, benzoxazolyl, benzylsultamyl, benzylsultimyl, bipyrazinyl, bipyridinyl, carbazolyl (e.g., 4H-carbazolyl), carbolinyl (e.g., P-carbolinyl), chromanonyl, chromanyl, chromenyl, cinnolinyl, coumarinyl, cytdinyl, cytosinyl, decahydroisoquinolinyl, decahydroquinolinyl, diazabicyclooctyl, diazetyl, diaziridinethionyl, diaziridinonyl, diaziridinyl, diazirinyl, dibenzisoquinolinyl, dibenzoacridinyl, dibenzocarbazolyl, dibenzofuranyl, dibenzophenazinyl, dibenzopyranonyl, dibenzopyronyl (xanthonyl), dibenzoquinoxalinyl, dibenzothiazepinyl, dibenzothiepinyl, dibenzothiophenyl, dibenzoxepinyl, dihydroazepinyl, dihydroazetyl, dihydrofuranyl, dihydrofuryl, dihydroisoquinolinyl, dihydropyranyl, dihydropyridinyl, dihydroypyridyl, dihydroquinolinyl, dihydrothienyl, dihydroindolyl, dioxanyl, dioxazinyl, dioxindolyl, dioxiranyl, dioxenyl, dioxinyl, di oxobenzofuranyl, dioxolyl, dioxotetrahydrofuranyl, dioxothiomorpholinyl, dithianyl, dithiazolyl, dithienyl, dithiinyl, furanyl, furazanyl, furoyl, furyl, guaninyl, homopiperazinyl, homopiperidinyl, hypoxanthinyl, hydantoinyl, imidazolidinyl, imidazolinyl, imidazolyl, indazolyl (e.g., IH-indazolyl), indolenyl, indolinyl, indolizinyl, indolyl (e.g., IH-indolyl or 3H-indolyl), isatinyl, isatyl, isobenzofuranyl, isochromanyl, isochromenyl, isoindazoyl, isoindolinyl, isoindolyl, isopyrazolonyl, isopyrazolyl, isoxazolidiniyl, isoxazolyl, isoquinolinyl, isoquinolinyl, isothiazolidinyl, isothiazolyl, morpholinyl, naphthindazolyl, naphthindolyl, naphthiridinyl, naphthopyranyl, naphthothiazolyl, naphthothioxolyl, naphthotri azolyl, naphthoxindolyl, naphthyridinyl, octahydroisoquinolinyl, oxabicycloheptyl, oxauracil, oxadiazolyl, oxazinyl, oxaziridinyl, oxazolidinyl, oxazolidonyl, oxazolinyl, oxazolonyl, oxazolyl, oxepanyl, oxetanonyl, oxetanyl, oxetyl, oxtenayl, oxindolyl, oxiranyl, oxobenzoisothiazolyl, oxochromenyl, oxoisoquinolinyl, oxoquinolinyl, oxothiolanyl, phenanthridinyl, phenanthrolinyl, phenazinyl, phenothiazinyl, phenothienyl (benzothiofuranyl), phenoxathiinyl, phenoxazinyl, phthalazinyl, phthalazonyl, phthalidyl, phthalimidinyl, piperazinyl, piperidinyl, piperidonyl (e.g., 4-piperidonyl), pteridinyl, purinyl, pyranyl, pyrazinyl, pyrazolidinyl, pyrazolinyl, pyrazolopyrimidinyl, pyrazolyl, pyridazinyl, pyridinyl, pyridopyrazinyl, pyridopyrimidinyl, pyridyl, pyrimidinyl, pyrimidyl, pyronyl, pyrrolidinyl, pyrrolidonyl (e.g., 2-pyrrolidonyl), pyrrolinyl, pyrrolizidinyl, pyrrolyl (e.g., 2H-pyrrolyl), pyrylium, quinazolinyl, quinolinyl, quinolizinyl (e.g., 4H-quinolizinyl), quinoxalinyl, quinuclidinyl, selenazinyl, selenazolyl, selenophenyl, succinimidyl, sulfolanyl, tetrahydrofuranyl, tetrahydrofuryl, tetrahydroisoquinolinyl, tetrahydroisoquinolyl, tetrahydropyridinyl, tetrahydropyridyl (piperidyl), tetrahydropyranyl, tetrahydropyronyl, tetrahydroquinolinyl, tetrahydroquinolyl, tetrahydrothienyl, tetrahydrothiophenyl, tetrazinyl, tetrazolyl, thiadiazinyl (e.g., 6H-l,2,5-thiadiazinyl or 2H,6H-l,5,2-dithiazinyl), thiadiazolyl, thianthrenyl, thianyl, thianaphthenyl, thiazepinyl, thiazinyl, thiazolidinedionyl, thiazolidinyl, thiazolyl, thienyl,thiepanyl, thiepinyl, thietanyl, thietyl, thiiranyl, thiocanyl, thiochromanonyl, thiochromanyl, thiochromenyl, thiodiazinyl, thiodiazolyl, thioindoxyl, thiomorpholinyl, thiophenyl, thiopyranyl, thiopyronyl, thiotri azolyl, thiourazolyl, thioxanyl, thioxolyl, thymidinyl, thyminyl, triazinyl, triazolyl, trithianyl, urazinyl, urazolyl, uretidinyl, uretinyl, uricyl, uridinyl, xanthenyl, xanthinyl, xanthionyl, and the like, as well as modified forms thereof (e.g., including one or more oxo and / or amino) and salts thereof. The heterocyclyl group can be substituted or unsubstituted. For example, the heterocyclyl group can be substituted with one or more substitution groups, as described herein for aryl.

[0066] By “hydroxyl” is meant -OH.

[0067] By “imino” is meant -NR-, in which R can be H or optionally substituted alkyl.

[0068] By “isocyanato” is meant -NCO.

[0069] By “isothiocyanate” is meant -N=C=S.

[0070] By “isocyano” is meant -C=NR, where R may be an alkyl group such as in an alkylisocyano or an aryl group such as in an arylisocyano. The alkyl or aryl group may be optionally substituted with substituents described below.

[0071] By “oxo” is meant an =0 group.

[0072] By “oxy” is meant -O-.

[0073] By “silyl” is meant a -SiRJR2R3or -SiR'R2- group. In some embodiments, each of R1, R2, and R3is, independently, H, optionally substituted aliphatic, optionally substituted heteroaliphatic, optionally substituted aromatic, optionally substituted heteroaromatic, or optionally substituted amino. In particular embodiments, each of R1, R2, and R3is, independently, H, optionally substituted alkyl, optionally substituted alkoxy, optionally substituted aryl, optionally substituted aryloxy, optionally substituted alkyl-aryl, optionally substituted aryl-alkyl, or optionally substituted amino. In other embodiments, the silyl group is -Si(R)a(OR)b(NR2)c, in which each R is, independently, H, optionally substituted aliphatic, optionally substituted heteroaliphatic, optionally substituted aromatic, or optionally substituted heteroaromatic; each of a, b, and c > 0; and a + b + c = 3. In particular embodiments, each R is, independently, H, optionally substituted alkyl, optionally substituted aryl, optionally substituted alkyl-aryl, or optionally substituted aryl-alkyl.

[0074] By “silyloxy” is meant -OR, where R is an optionally substituted silyl group, as described herein. In some embodiments, the silyloxy group is -O-SiRJR2R3, in which each of R1, R2, and R3is, independently, H, optionally substituted aliphatic, optionally substituted heteroaliphatic, optionally substituted aromatic, optionally substituted heteroaromatic, or optionally substituted amino. In particular embodiments, each of R1, R2, and R3is, independently, H, optionally substituted alkyl, optionally substituted alkoxy, optionally substituted aryl, optionally substituted aryloxy, optionally substituted alkyl-aryl, optionally substituted aryl-alkyl, or optionally substituted amino. In other embodiments, the silyloxy group is -0-Si(R)a(0R)b(NR2)c, in which each R is, independently, H, optionally substituted aliphatic, optionally substituted heteroaliphatic, optionally substituted aromatic, or optionally substituted heteroaromatic; each of a, b, and c > 0; and a + b + c = 3. In particular embodiments, each R is, independently, H, optionally substituted alkyl, optionally substituted aryl, optionally substituted alkyl-aryl, or optionally substituted arylalkyl.

[0075] Use of the above terms is meant to encompass substituted and unsubstituted moieties. Substitution may be by one or more groups such as alcohols, ethers, esters, amides, sulfones, sulfides, hydroxyl, nitro, cyano, carboxy, amines, heteroatoms, lower alkyl, lower alkoxy, lower alkoxycarbonyl, alkoxyalkoxy, acyloxy, halogens, trifluoromethoxy, trifluoromethyl, alkyl, aralkyl, alkenyl, alkynyl, aryl, cyano, carboxy, carboalkoxy, carboxyalkyl, cycloalkyl, cycloalkylalkyl, heterocyclyl, alkylheterocyclyl, heterocyclylalkyl, oxo, arylsulfonyl and aralkyaminocarbonyl, or any of the substituents of the preceding paragraphs or any of those substituents either directly attached or by suitable linkers. The linkers are typically short chains of 1-3 atoms containing any combination of -C-, -C(O)-, -NH-, -S-, -S(O)-, -O-, -C(O)- or -S(O)O- . Rings may be substituted multiple times.

[0076] The term “lower” modifying “alkyl”, “alkenyl”, “alkynyl”, “alkoxy” or “alkoxycarbonyl” refers to a Ci-Ceunit for a particular functionality. For example, “lower alkyl” means Ci-Ce alkyl.

[0077] By “substituted” is meant having one or more substituent moieties whose presence does not interfere with the desired function or reactivity. Examples of substituents alkyl, alkenyl, alkynyl, cycloalkyl (non-aromatic ring), Si(alkyl)s, Si(alkoxy)3, alkoxy, amino, alkylamino, alkenylamino, amide, amidine, guanidine, hydroxyl, thioether, alkylcarbonyl, alkylcaronyloxy, alkoxycarbonyloxy, carbonate, alkoxycarbonyl, aminocarbonyl, alkylthiocarbonyl, phosphate, phosphate ester, phosphonato, cyano, halo, acylamino, imino, sulfhydryl, alkylthio, thiocarboxylate, dithiocarb oxy late, sulfate, sulfato, sulfonate, sulfamoyl, sulfonamide, nitro, nitrile, azido, heterocyclyl, ether, ester, silicon-containing moieties, thioester or a combination thereof. The substituents may themselves be substituted. For instance, an amino substituent mayitself be mono or independently disubstituted by further substituents defined above, such as alkyl, alkenyl, alkynyl, and cycloalkyl (non-aromatic ring).

[0078] By “thiocyanato” is meant -SCN.

[0079] By “unsubstituted” is meant any open valence of an atom being occupied by hydrogen. Also, if an occupant of an open valence position on an atom is not specified, then it is hydrogen.

[0080] As used herein, the term “about” is understood to account for minor increases and / or decreases beyond a recited value, which changes do not significantly impact the desired function of the parameter beyond the recited value(s). In some cases, “about” encompasses + / -10% of any recited value. As used herein, this term modifies any recited value, range of values, or endpoints of one or more ranges.

[0081] As used herein, the terms “top,” “bottom,” “upper,” “lower,” “above,” and “below” are used to provide a relative relationship between structures. The use of these terms does not indicate or require that a particular structure must be located at a particular location in the apparatus.

[0082] The term “aspect ratio” generally represents the ratio of the height dimension to the width dimension of particular openings into which an electrical contact is to be placed. For example, a via opening which typically extends in a cylindrical form through multiple layers has a height and a diameter, and the aspect ratio would be the height of the cylinder divided by the diameter. The aspect ratio of a trench would be the height of the trench divided by the minimal width of the trench at its base.

[0083] The term “flow control hardware” generally represents components configured to place one or more chemical sources in fluid connection with a processing chamber. Flow control hardware can comprise one or more mass flow controllers and / or valves, for example. Example chemical sources include dielectric film precursor sources, halogen-containing precursor sources, reactant gas sources, and inert gas sources.

[0084] The term “forming a gas mixture” generally represents either of or both of mixing a plurality of gases before introducing the plurality of gases into the processing chamber, or mixing a plurality of gases in the processing chamber.

[0085] The term “inert gas” generally represents a gas phase material that does not react with other chemicals in a processing chamber during substrate processing. Example inert gases include helium (He), neon (Ne), argon (Ar), krypton (Kr), and xenon (Xe), as well as nitrogen (N2) in some processes.

[0086] The term “plasma” generally represents a gas comprising cations, free radicals and free electrons. The term “in-situ plasma” generally represents a plasma formed at a processing station in a processing chamber. The term “remote plasma” generally represents a plasma formed at a location away from a processing station in a processing chamber.

[0087] The term “plasma generator” generally represents a combination of components that can be used to form a plasma. Example components include a radiofrequency power source, an impedance matching network, and one or more electrodes.

[0088] The term “precursor” generally represents a chemical species that adsorbs to a substrate surface in an ALD process. The precursor is reacted with a reactant to convert the adsorbed precursor to a film layer.

[0089] The term “processing chamber” or “process chamber” generally represents an enclosure in which chemical and / or physical processes are performed on substrates. The pressure, substrate temperature and atmospheric composition within a processing chamber can be controllable to perform the chemical and / or physical processes.

[0090] The term “processing tool” may generally represent a machine comprising a processing chamber and other hardware configured to enable processing to be carried out in the processing chamber.

[0091] The term “processing station” generally represents a location in a processing chamber at which a substrate is positioned during processing.

[0092] The term “reactant” generally represents a chemical species that reacts with a precursor adsorbed to a substrate surface to form a film layer in an ALD process. A reaction between a reactant and a precursor can be facilitated by thermal energy and / or a plasma in various processes.

[0093] The implementations disclosed below describe deposition of a material on a substrate such as a wafer, substrate, or other work piece. The work piece may be of various shapes, sizes, and materials. In this application, the terms “semiconductor wafer,” “wafer,” “substrate,” “wafer substrate,” and “partially fabricated integrated circuit” are used interchangeably. One of ordinary skill in the art would understand that the term “partially fabricated integrated circuit” can refer to a silicon wafer during any of many stages of integrated circuit fabrication thereon. A wafer or substrate used in the semiconductor device industry typically has a diameter of 200 mm, or 300 mm, or 450 mm. Unless otherwise stated, the processing details recited herein (e.g., flow rates, power levels, etc.) are relevant for processing 300 mm diameter substrates, or for treating chambers that are configured to process 300 mm diameter substrates and can be scaled asappropriate for substrates or chambers of other sizes. In addition to semiconductor wafers, other work pieces that may be used implementations disclosed herein include various articles such as printed circuit boards and the like. The processes and apparatuses can be used in the fabrication of semiconductor devices, displays, LEDs, photovoltaic panels and the like.

[0094] “ Silicon oxide” is referred to herein as including chemical compounds including silicon and oxygen atoms, including any and all stoichiometric possibilities for SixOy, including integer values of x and y and non-integer values of x and y. For example, “silicon oxide” includes compounds having the formula SiOn, where 1 < n < 2, where n can be an integer or non-integer values. “Silicon oxide” can include sub-stoichiometric compounds such as SiOi.8. “Silicon oxide” also includes silicon dioxide (SiCh) and silicon monoxide (SiO). “Silicon oxide” also includes both natural and synthetic variations and also includes any and all crystalline and molecular structures, including tetrahedral coordination of oxygen atoms surrounding a central silicon atom. “Silicon oxide” also includes amorphous silicon oxide and silicates.

[0095] “ Tin oxide” is referred to herein as including any and all stoichiometric possibilities for SnxOy, including integer values of x and y and non-integer values of x and y. For example, “tin oxide” includes compounds having the formula SnOn, where 1 < n < 2, where n can be an integer or non-integer values. “Tin oxide” can include sub-stoichiometric compounds such as SnOi.8. “Tin oxide” also includes tin dioxide (SnCh or stannic oxide) and tin monoxide (SnO or stannous oxide). “Tin oxide” also includes both natural and synthetic variations and also includes any and all crystalline and molecular structures. “Tin oxide” also includes amorphous tin oxide.

[0096] By “unsaturated” is meant a moiety that contains double or triple carbon-carbon bonds.

[0097] By “unsaturated substituent” is meant a double or triple bond containing aliphatic chain, cyclic, aryl or heteroaryl group.Introduction and Context

[0098] ALD is a technique that deposits thin layers of material using sequential self-limiting reactions. ALD processes use surface-mediated deposition reactions to deposit films on a layer-by-layer basis in cycles. As an example, an ALD cycle may include the following operations: (i) delivery / adsorption of a precursor, (ii) purging of precursor from the chamber, (iii) delivery of a second reactant and optionally ignite plasma, and (iv) purging of byproducts from the chamber. The reaction between the second reactant and the adsorbed precursor to form a film on the surface of a substrate affects the film composition and properties, such as nonuniformity, stress, wet etch rate, dry etch rate, electrical properties (e.g., breakdown voltage and leakagecurrent), etc. In ALD deposition of silicon oxide films, this reaction involves reacting oxygen plasma with carbon and nitrogen to form a gaseous species; oxidizing silicon to silicon oxide; eliminating trace carbon, nitrogen, and hydrogen impurities; and increasing bonding and densification of the film.

[0099] Unlike a chemical vapor deposition (CVD) technique, ALD processes use surface-mediated deposition reactions to deposit films on a layer-by-layer basis. In one example of an ALD process, a substrate surface that includes a population of surface active sites is exposed to a gas phase distribution of a first precursor, such as a silicon-containing precursor, in a dose provided to a chamber housing a substrate. Molecules of this first precursor are adsorbed onto the substrate surface, including chemisorbed species and / or physisorbed molecules of the first precursor. It should be understood that when a compound is adsorbed onto the substrate surface as described herein, the adsorbed layer may include the compound as well as derivatives of the compound. For example, an adsorbed layer of a silicon-containing precursor may include the silicon-containing precursor as well as derivatives of the silicon-containing precursor. After a first precursor dose, the chamber is then evacuated to remove most or all of first precursor remaining in gas phase so that mostly or only the adsorbed species remain. In some implementations, the chamber may not be fully evacuated. For example, the reactor may be evacuated such that the partial pressure of the first precursor in gas phase is sufficiently low to mitigate a reaction. A second reactant, such as an oxygen-containing gas, is introduced to the chamber so that some of these molecules react with the first precursor adsorbed on the surface. In some processes, the second precursor reacts immediately with the adsorbed first precursor. In other embodiments, the second reactant reacts only after a source of activation is applied temporally. The chamber may then be evacuated again to remove unbound second reactant molecules. As described above, in some embodiments the chamber may not be completely evacuated. Additional ALD cycles may be used to build film thickness.

[0100] In some implementations, the ALD methods include plasma activation. As described herein, the ALD methods and apparatuses described herein may be conformal film deposition (CFD) methods, which are described generally in U.S. Patent Application No. 13 / 084,399 (now U.S. Patent No. 8,728,956), filed April 11, 2011, and titled “PLASMA ACTIVATED CONFORMAL FILM DEPOSITION,” and in U.S. Patent Application No. 13 / 084,305, filed April 11, 2011, and titled “SILICON NITRIDE FILMS AND METHODS,” which are herein incorporated by reference in their entireties.

[0101] The present disclosure relates to use of a metal-containing inhibitor to selectively inhibitparticular regions on a semiconductor substrate. In one embodiment, the substrate can include a first region (e.g., including a metal or a semiconductor) and a second region (e.g., including a material that is different than the first region). For instance, when the first region includes a metal, then the second region can include a semiconductor or a dielectric. In another instance, when the first region includes a semiconductor, then the second region can include a dielectric.

[0102] The processes herein can provide an inhibitor layer to selectively deposit on the first region, thereby providing an inhibited surface. In this way, the inhibited surface is blocked from subsequent deposition steps, which can provide a deposited layer on the non-inhibited surface of the second region. Just as the first region is selectively inhibited, the second region is selectively deposited with a layer (e.g., an oxide layer, a nitride layer, a carbide layer, or others described herein). Subsequent steps can include opening up the first region (e.g., by removing the inhibitor layer), patterning the substrate to provide access to only the first region, and depositing a metal within the pattern to provide a patterned via that is electrically connected to the first region. If the first region includes a metal line, then the patterned via can provide an electrical contact to that line.

[0103] In other non-limiting embodiments, the selective deposition processes herein can reduce the RC delay and improve device performance. In further embodiments, the processes herein can reduce EUV lithography steps, as well as save time and potentially cost.

[0104] FIG. 1 schematically shows a non-limiting process 100 for a binary selective deposition, which simultaneously deposits two different materials on two different surfaces of a semiconductor substrate. As shown, the substrate 110 includes a first region 111 and a second region 112 that is different from the first region 111 and in proximity to (or adjacent to) the first region 111. In one embodiment, the first region 111 includes a conductive material (e.g., a metal), and the second region 112 includes a semi- or non-conductive material (e.g., a semiconductor or a dielectric). In another embodiment, the first region 111 includes a semi -conductive material, and the second region 112 includes a non-conductive material.

[0105] Non-limiting conductive materials can include a metal, such as a transition metal, including cobalt (Co), copper (Cu), tungsten (W), ruthenium (Ru), tantalum (Ta), titanium (Ti), hafnium (Hf), zirconium (Zr), and / or molybdenum (Mo), as well as combinations thereof and doped forms thereof. Non-limiting semi-conductive materials include silicon (Si), germanium (Ge), silicon germanium (SiGe), germanium silicon (GeSi), doped Si, doped Ge, and, in some instances, silicon carbide. Non-limiting non-conductive materials can include a non-metal or a dielectric, such as a 1OW-K dielectric. Examples of 1OW-K dielectrics include those having a relativedielectric constant (K) of less than about 4.0 or less than about 3.0, as well as from about 2.0 to 4.0, 2.0 to 2.0, 2.5 to 4.0, or 2.5 to 3.0. LOW-K dielectrics include silicon dioxide (SiCh), including doped SiCh (e.g., carbon-doped oxide (CDO) or carbon-doped SiCh), porous SiCh, porous doped SiCh (e.g., porous CDO), silicon nitride, silicon carbide in some instances, silicon oxycarbide, silicon oxynitride, silicon carbon nitride, etc.

[0106] Turning again to FIG. 1, the process 100 can include introducing 101 a metal-containing inhibitor, depositing 102 a dielectric material, and optionally removing 103 the inhibitor layer. Each of these operations are discussed in turn. In operation 101, the metal -containing inhibitor is thermally introduced to a process chamber for adsorption on the surface of the substrate 110. Due to the affinity of the inhibitor molecule to the first region 111, an inhibitor layer 120 is selectively provided on the first region 111. Most of the second region 112 is free from the metal-containing inhibitor, thus providing a non-inhibited surface. The inhibitor layer 120 can be characterized by its position, e.g., being disposed by its proximity to the first region as compared to the second region.Metal-Containing Inhibitors

[0107] Use of a metal-containing inhibitor instead of a conventional silicon-containing inhibitor can provide certain advantages in semiconductor processing, as a silicon-containing inhibitor may leave behind undesirable silicon or silicon dioxide residue on the metal surface it is meant to protect. The metal-based inhibitor adsorbs to the metal surface rendering the metal surface unreactive to treatment with a subsequent dielectric precursor.

[0108] In some embodiments, the metal of the metal-containing inhibitor is a different metal from the metal on the surface of the substrate which it adsorbs onto.

[0109] The metal of the metal-containing inhibitor may be antimony, copper, cobalt, hafnium, nickel, ruthenium, platinum, titanium, tantalum, tungsten or molybdenum.

[0110] Suitable inhibitors for use with this disclosure include but are not limited to metal carbenes. Carbenes have general formula R1R2C: (where is an unbonded, lone electron pair). Carbenes, and the isovalent carbenoids from groups XIII, XIV and XV are compounds containing di-coordinate atoms and bear a pair of electrons for a total of six valent electrons. Such compounds are also referred to as “ylidenes”. Without wishing to be bound by theory, the affinity that compounds having available lone pair electrons exhibit towards metal surfaces promotes a preference for selective adsorption on metal surfaces rather than dielectric surfaces. Metal ligands such as carbenes or isocyanides are therefore effective in certain embodiments.[OHl] One class of stable carbenes that may be useful inhibitors are the transition metal carbene complexes. In some embodiments, the metal is tungsten or molybdenum. These include, e.g., Schrock or Fisher carbenes of general formula M=R having the classic structures illustrated in Scheme 1 (below).SCHEME 1Fischer Schrock

[0112] Metal carbenes may be of the general formula M=CRR’.

[0113] Examples of other carbene-type inhibitors include A-heterocyclic carbenes or methylenes. In certain embodiments, the carbene has a vapor pressure of about 7000 Torr or lower at 25° C. In certain embodiments, the carbene has a vapor pressure of about 700 Torr or lower at 25° C.

[0114] The metal-containing inhibitor may be a metal carbene compound, a metal carbenoid compound, a metal halide compound such as MoCh or MoCk; a metal oxyhalide compound such as MoOCh; a metal carbonyl compound such as NiCCh, WCOe, (C3He)Co(CO)3, (3,3-dimethyl- l-butyne)dicobalt hexacarbonyl; a metal cyclopentadienyl compound such as CpMoCh, iPrCp2WH2, CpTiCh, CpTiCh, CpHfCh, CpTi(NMe2)3, CpCo(CO)2, CpCu(PEt3), MeCpPtMe3, CpTa(NtBu)(NEt2)2or Cp2MoCl2; a metal diketonate compound such as Ru(acac)3, Ru(thd)3, Mo(acac)2, Mo(acac)3 or MoO2(acac)2, MoO2(thd)2; or a metal alkylisocyanide compound. The abbreviation of acac refers to an acetylacetonate group; the abbreviation Cp refers to a cyclopentadienyl group and the abbreviation of thd refers to a 2,2,6,6-tetramethyl-3,5- heptanedionato group.

[0115] The metal -containing inhibitor may have a structure of formula (I) MLX(I); wherein M is a metal including antimony, copper, cobalt, hafnium, nickel, ruthenium, platinum, titanium, tantalum, tungsten or molybdenum; each L is independently a monodentate ligand, ambidentate ligand, bidentate ligand or tridentate ligand; and x is an integer of 1-6.

[0116] In some embodiments, the monodentate ligand may be hydrogen, halo, hydroxy, alkyl silyl, silylalkyl, alkenyl, alkynyl, allyl, alkoxy, alkenoxy, alkynoxy, thioalkoxy, aliphatic acyl, - CF3, nitro, amino, imino, -N(CI-C3 alkyl)C(O)(Ci-C3 alkyl), -C1-C3 alkylamino, alkenylamino,alkynylamino, di(Ci-C3alkyl)amino, -C(O)O-(Ci-C3alkyl), -C(O)NH-(CI-C3alkyl), -CH=NOH, -P(Ci-C3alkyl)3, -PO3H2, -OPO3H2, -C(O)N(CI-C3alkyl)2, haloalkyl, alkoxy carbonyl, alkoxyalkoxy, carboxaldehyde, carboxamide, cycloalkyl, cycloalkenyl, cycloalkynyl, aryl, aroyl, aryloxy, arylamino, biaryl, thioaryl, heterocyclyl, alkylheterocyclyl, heterocyclylalkyl, heterocycloyl, alkylaryl, alkylcarbonyl, CO, =0, =S, =N, C = C,-N0, aralkenyl, aralkyl, sulfonyl, sulfonamido, sulfonimido, carbamate, aryloxyalkyl, carboxyl, carboxy, -C(O)NH(benzyl), ylidenyl, amido, azido, isocyanato, thiocyanato, isothiocyanato, cyano, isocyanoalkyl, isocyanohaloalkyl, isocyanoaryl, isocyanohaloaryl or cyclyl.

[0117] In some embodiments, at least one L is ylidenyl group, where the ylindenyl group is a carbene such as an N-heterocyclic carbene or a nitrogen carbenoid such as imidazolium or pyridinium.

[0118] In some embodiments, the metal-containing inhibitor has a structure of formula (II) L’yML”ML’y(II); wherein M is a metal including antimony, copper, cobalt, hafnium, nickel, ruthenium, platinum, titanium, tantalum, tungsten or molybdenum; each L’ is independently a monodentate ligand, ambidentate ligand, bidentate ligand or tridentate ligand; L” is a ligand comprising a triply bonded carbyne, a triply bonded imide, a triply bonded nitride or a triply bonded oxide; and y is an integer of 1-5.

[0119] In some embodiments, the monodentate ligand is hydrogen, halo, hydroxy, alkyl silyl, silylalkyl, alkenyl, alkynyl, allyl, alkoxy, alkenoxy, alkynoxy, thioalkoxy, aliphatic acyl, -CF3, nitro, amino, imino, -N(CI-C3alkyl)C(O)(Ci-C3alkyl), -Ci-C3alkylamino, alkenylamino, alkynylamino, di(Ci-C3alkyl)amino, -C(O)O-(Ci-C3alkyl), -C(O)NH-(CI-C3alkyl), -CH=N0H, -P(Ci-C3alkyl)3, -PO3H2, -OPO3H2, -C(O)N(CI-C3alkyl)2, haloalkyl, alkoxy carbonyl, alkoxyalkoxy, carboxaldehyde, carboxamide, cycloalkyl, cycloalkenyl, cycloalkynyl, aryl, aroyl, aryloxy, arylamino, biaryl, thioaryl, heterocyclyl, alkylheterocyclyl, heterocyclylalkyl, heterocycloyl, alkylaryl, alkylcarbonyl, CO, =0, =S, =N, C = C,-NO, aralkenyl, aralkyl, sulfonyl, sulfonamido, sulfonimido, carbamate, aryloxyalkyl, carboxyl, carboxy, -C(O)NH(benzyl), ylidenyl, amido, azido, isocyanato, thiocyanato, isothiocyanato, cyano, isocyanoalkyl, isocyanohaloalkyl, isocyanoaryl, isocyanohaloaryl or cyclyl.

[0120] In some embodiments, the metal-containing inhibitor comprises a molybdenum halide, a molybdenum oxyhalide, or a molybdenum diketonate.

[0121] Specific examples of the metal-containing inhibitor include, but are not limited to, (3,3- dimethyl-l-butyne)dicobalt hexacarbonyl, tungsten hexacarbonyl and molybdenumpentachloride.

[0122] Specific examples of molybdenum-containing inhibitors include, but are not limited to, MO(CO)3(CNR)3, MO(CO)4(CNR)2, MO(CO)S(CNR) and Mol3(CNR)3 where R is trifluoromethyl, pentafluoroethyl, 2-trifluoroethyl, methyl or t-butyl.

[0123] The metal-containing inhibitor (e.g., any described herein) can be introduced thermally to the surface with useful process conditions. In one embodiment, the metal-containing inhibitor is provided to the chamber with a dose time of about 5 seconds to 600 seconds and / or at a temperature of about 50°C to 500°C or 100°C to 400°C and / or a pressure of about 10 mTorr to about 400 Torr, from about ITorr to about 100 Torr, or from about 5 Torr to 10 Torr. In particular embodiments, the metal-containing inhibitor is provided with an inert carrier gas (e.g., nitrogen (N2) gas) and may be delivered at a temperature of between 50-100 °C. In certain embodiments, the carrier gas is N2 and process pressure range is 5-10 Torr. Delivery of the inhibitor to the chamber can be continuous or in pulses.

[0124] As seen in FIG. 1, operation 102 includes depositing a dielectric material 130 on the second region 112 by exposing the substrate to a dielectric precursor. The deposition may be by thermal or plasma-based means. Process conditions may be a pressure of from about 10 mTorr to about 400 Torr, from about ITorr to about 100 Torr, from about 5 Torr to 10 Torr or from about 2 to about 5 Torr; a temperature of from about 50°C to 500°C or 100°C to 400°C or 200 °C to about 300 °C; and the process time may be from about 1 second to about 600 seconds or about 5 to about 90 seconds. The dielectric precursor may be a silicon-containing precursor, introduced to the process chamber with an oxygen-containing reactant; or with a silicon- and oxygen-containing precursor, wherein an oxygen-containing reactant is unnecessary. Silicon-containing precursors include silanes. Examples of silanes are silane (SiEU), disilane (Si2He), halosilanes, aminosilanes, polysilanes (H3Si-(SiH2)n-SiH3), where n > 0 and organosilanes such as methylsilane, ethylsilane, isopropylsilane, t-butyl silane, dimethylsilane, diethylsilane, di -t-butyl silane, allylsilane, ec-butylsilane, thexylsilane, isoamylsilane, t-butyldisilane, di-t-butyldisilane, and the like.

[0125] A halosilane includes at least one halogen group and may or may not include hydrogens and / or carbon groups. Examples of halosilanes are iodosilanes, bromosilanes, chlorosilanes and fluorosilanes. Although halosilanes, particularly fluorosilanes, may form reactive halide species that can etch silicon materials when a plasma is struck, a halosilane may not be introduced to the chamber when a plasma is struck in some embodiments, so formation of a reactive halide species from a halosilane may be mitigated. Specific chlorosilanes are tetrachlorosilane, trichlorosilane, dichlorosilane, monochlorosilane, chloroallylsilane, chloromethylsilane, dichloromethylsilane,chlorodimethylsilane, chloroethylsilane, t-butylchlorosilane, di-t-butylchlorosilane, chloroisopropylsilane, chloro-sec-butylsilane, t-butyldimethylchlorosilane, thexyldimethylchlorosilane, and the like.

[0126] An aminosilane includes at least one nitrogen atom bonded to a silicon atom, but may also contain hydrogens, oxygens, halogens, and carbons. Examples of aminosilanes are mono-, di-, tri- and tetra-aminosilane (H3Si(NH2), EbSiQSIEb)?, HSi(NH2)3 and Si(NH2)4, respectively), as well as substituted mono-, di-, tri- and tetra-aminosilanes, for example, t-butylaminosilane, methylaminosilane, tert-butylsilanamine, bi(tertiarybutylamino)silane (SiH2(NHC(CH3)3)2 (BTBAS), tert-butyl silylcarbamate, SiH(CH3)-(N(CH3)2)2, SiHCl-(N(CH3)2)2, (Si(CH3)2NH)3 and the like. A further example of an aminosilane is trisilylamine (N(SiH3)).

[0127] Silicon- and oxygen-containing precursors include, but are not limited to siloxanes. Examples of siloxanes include 2,4,6, 8-tetram ethylcyclotetrasiloxane (TMCTS), heptamethylcyclotetrasiloxane (HMCTS), silsesquioxane, disiloxanes, such as pentamethyldisiloxane (PMDSO) or tetramethyldisiloxane (TMDSO), and trisiloxanes such as hexamethyltrisiloxane or heptamethyltrisiloxane.

[0128] The oxygen-containing reactant may be an oxygen-containing gas including oxygen (O2), ozone (O3), water, a peroxide, hydrogen peroxide, oxygen plasma, water plasma, an alcohol, a dihydroxy alcohol, a polyhydroxy alcohol, a fluorinated dihydroxy alcohol, a fluorinated polyhydroxy alcohol, a fluorinated glycol, formic acid, and other sources of hydroxyl moi eties, as well as combinations thereof. The oxygen-containing gas may be co-flowed with an inert gas; for example as a combination of oxygen and argon, or oxygen and helium.

[0129] In one embodiment, the material 130 is provided as a layer. As used herein, selective deposition can mean selectively depositing a metal-containing inhibitor on a first region and / or selectively depositing a material on a second region. The material 130 is selectively deposited on the second region 112 because the inhibitor layer 111 blocks deposition.

[0130] The material can be deposited using a vapor-based deposition process, such as ALD, CVD, as well as plasma-enhanced forms thereof. Non-limiting materials include non-conductive material, such as an insulator, as well as an oxide, a metal oxide, a nitride, a metal nitride, a carbide, a metal carbide, or an oxynitride. Examples of materials include aluminum oxide, zinc oxide, zirconium oxide, hafnium oxide, silicon oxide, silicon oxynitride, silicon nitride, or titanium oxide. Layers of material can be deposited using a plurality of cycles (e.g., 10, 100, 200, or more cycles). Other conditions can include a deposition time of about 5 seconds to 600 seconds and / or at atemperature of about 25°C to 500°C and / or a pressure of about 10 mTorr to 10 Torr.

[0131] Turning again to FIG. 1, in operation 103 the metal -containing inhibitor is converted to a metal layer 140.

[0132] FIG. 2 shows a process flow diagram for a selective deposition method 200 for a binary selective deposition, which simultaneously deposits two different materials on two different surfaces of a semiconductor substrate. This dual deposition technique is efficient and enables a completely “bottom up” patterning approach.

[0133] Operation 202 is providing a substrate as described above having a first surface and a second surface in a process chamber. In some embodiments, the pressure in the process chamber is from about 2 Torr to about 400 Torr, from about 200 Torr to about 400 Torr or from about 2 Torr to about 20 Torr. In some embodiments, the temperature in the process chamber is from about 25 °C to about 550 °C, from about 50 °C to about 450 °C or from about 200 °C to about 400 °C. The substrate includes those described below which may have one or more features. In some embodiments, the first surface is a metal or metal-containing surface and the second surface is a dielectric.

[0134] Operation 204 is a thermal deposition of a metal-containing inhibitor layer on the metal surface of the substrate. Process conditions and suitable metal -containing inhibitors are described with respect to FIG. 1 above.

[0135] Operation 206 is a thermal or plasma deposition of a dielectric material on the dielectric surface of the substrate as described with respect to FIG. 1 above.

[0136] Operation 208 is a conversion of the metal -containing inhibitor on the metal surface to a metal. In some embodiments, the conversion is effected by exposure to a plasma of a reducing agent such as hydrogen. Process conditions may be a pressure of from about 10 mTorr to about 400 Torr, from about ITorr to about 100 Torr, from about 5 Torr to 10 Torr or from about 2 to about 5 Torr; a temperature of from about 50°C to 500°C or 100°C to 400°C or 200 °C to about 300 °C; and the process time may be from about 1 second to about 600 seconds or about 5 to about 90 seconds. Plasma power may be from about 10 Watts to about 10,000 Watts per 300 mm wafer, or from about 250 Watts to about 2,000 Watts per 300 mm wafer. In some embodiments, the conversion is effected by flowing hydrogen at a flow rate of 5,000 seem and argon at a flow rate of 7,500 seem at a pressure of 5 Torr and an RF power of 13.56 MHz.

[0137] The method 200 can include optional operations. For instance, an optional plasma pretreatment operation (not shown) may be performed before operation 204 to pre-clean the surfacesin order to prepare them for the dual deposition. In some embodiments, pre-treating provides an activated surface that promotes selective deposition of the silicon-containing inhibitor on the first region. Non-limiting pre-treatment processes include plasma treatment, reducing plasma treatment, or other reducing processes that remove metal oxide or other surface chemistry from the first region. Plasma treatment can include inductively coupled plasma (ICP) or capacitively coupled plasma (CCP). Process conditions may be a pressure of from about 10 mTorr to about 400 Torr, from about ITorr to about 100 Torr, from about 5 Torr to 10 Torr or from about 2 to about 5 Torr; a temperature of from about 50°C to 500°C or 100°C to 400°C or 200 °C to about 300 °C; and the process time may be from about 1 second to about 600 seconds or about 5 to about 90 seconds. Plasma power may be from about 10 Watts to about 10,000 Watts per 300 mm wafer, or from about 250 Watts to about 2,000 Watts per 300 mm wafer.

[0138] In one embodiment, treatment includes use of hydrogen (H2) gas for a treatment time of about 1 to 10 minutes. In another embodiment, treatment includes an ICP plasma source with the plasma gas being hydrogen (H2) gas and oxygen (O2) gas (e.g., at a power of about 100 W). Nonlimiting conditions include a treatment time of about 30 seconds to 360 seconds and / or a substrate temperature of about 20°C. In yet another embodiment, treatment includes a CCP plasma source with the plasma gas being ammonia (NH3) gas (e.g., at a power of about 100 W). Non-limiting conditions include a treatment time of about 10 seconds to 60 seconds and / or a substrate temperature of about 200°C to 300°C.

[0139] Operation 210 is an optional post-treatment of the surface to remove the inhibitor layer from the first region. Such post-treatment can include plasma treatment, wet etchant chemistry, dry etchant chemistry, or combinations thereof. Such post-treatment processes can include those that minimize damage to the first region. In another embodiment, treatment includes an ICP or CCP plasma source with the plasma gas being hydrogen (H2) gas or ammonia (NH3) gas. Nonlimiting conditions include a treatment time of about 30 seconds to 360 seconds and / or a substrate temperature of about 50 °C to about 450 °C or about 100°C to 300°C.

[0140] Purges of the process chamber may optionally be performed before or after operations 204, 206 and 208. Purging the chamber may involve flowing a purge gas or a sweep gas, which may be a carrier gas used in other operations or may be a different gas. In some embodiments, purging may involve evacuating the chamber. Example purge gases are inert gases including argon, nitrogen, hydrogen, and helium. In some embodiments, a purge may include one or more evacuation subphases for evacuating the process chamber. Alternatively, it will be appreciated that purges may be omitted in some embodiments. A purge may have any suitable duration, suchas between about 0 seconds and about 60 seconds, for example about 0.01 seconds.

[0141] Operations 204-208 of the method constitute one cycle, and the process can be repeated for as many cycles necessary to obtain the desired result. Moreover, different cycles may utilize different metal-containing inhibitors and dielectric precursors.

[0142] Overhang of materials is one challenge during deposition of dielectric materials on substrate surfaces including features. An overhang is a protrusion formed near the feature opening during deposition. FIG. 3 illustrates complications caused by overhang during processing of a semiconductor substrate containing a high aspect ratio feature. The first cross-section 301 of FIG. 3 shows a substrate 303 with a pre-formed feature hole 305.

[0143] The substrate may be a silicon wafer, e.g., a 200-mm wafer, a 300-mm wafer, or a 450- mm wafer, including wafers having one or more layers of material, such as dielectric, conducting, or semi-conducting material deposited thereon. In various embodiments, the substrate is patterned. A patterned substrate may have “features” such as pillars, poles, trenches, via or contact holes, which may be characterized by one or more of narrow and / or re-entrant openings, constrictions within the feature, and high aspect ratios. The feature(s) may be formed in one or more of the above described layers. One example of a feature is a pillar or pole in a semiconductor substrate or a layer on the substrate. Another example is a trench in a substrate or layer.

[0144] In some embodiments, the feature(s) such as a pillar may have an aspect ratio of at least about 1 : 1, at least about 2: 1, at least about 4: 1, at least about 6: 1, at least about 10: 1, or higher. The feature(s) may also have a dimension near the opening, e.g., an opening diameter or line width of between about 10 nm to 500 nm, for example between about 25 nm and about 300 nm. Disclosed methods may be performed on substrates with feature(s) having an opening less than about 150 nm. A via, trench or other recessed feature may be referred to as an unfilled feature or a feature. According to various embodiments, the feature profile may narrow gradually and / or include an overhang at the feature opening.

[0145] A re-entrant profile is one that narrows from the bottom, closed end, or interior of the feature to the feature opening. A re-entrant profile may be generated by asymmetric etching kinetics during patterning and / or the overhang due to non-conformal film step coverage in the previous film deposition, such as deposition of a diffusion barrier. In various examples, the feature may have a width smaller in the opening at the top of the feature than the width of the bottom of the feature.

[0146] Returning to FIG. 3, the features hole 305 may also have a cross-section dimension nearthe opening (e.g., opening diameter, line width, etc.) of between about 10 nanometers to 500 nanometers, or more specifically between about 25 nanometers to 300 nanometers. The feature hole is sometimes referred to as an unfilled feature or simply a feature.

[0147] In the next stage (cross-section 311), the substrate 303 is shown with a deposited an underlayer 313 lining the feature hole 305, which may be a diffusion barrier layer, an adhesion layer, a nucleation layer, a combination of thereof, or any other applicable material. Because many deposition processes do not have good step coverage properties, i.e., more material is deposited on the field region and near the opening than inside the feature, the underlayer 313 may form an overhang 315. In some embodiments, the overhang may be formed by a material other than an underlayer. While the overhang 315 is a part of the underlayer 313, the layer 313 may be thicker near the opening than, for example, inside the feature. For the purposes of this description, “near the opening” is defined as an approximate position or an area within the feature (i.e., along the side wall of the feature) corresponding to between about 0-10% of the feature depth measured from the field region. In certain embodiments, the area near the opening corresponds to the area at the opening. Further, “inside the feature” is defined as an approximate position or an area within the feature corresponding to between about 20-60% of the feature depth measured from the field region on the top of the feature. Typically, when values for certain parameters (e.g., thicknesses) are specified “near the opening” or “inside the feature”, these values represent a measurement or an average of multiple measurements taken within these positions / areas.

[0148] In certain embodiments, an average thickness of the under-layer near the opening is at least about 10% greater than that inside the feature. In more specific embodiments, this difference may be at least about 25%, at least about 50%, or at least about 100%. Distribution of a material within a feature may also be characterized by its step coverage. For the purposes of this description, “step coverage” is defined as a ratio of two thicknesses, i.e., the thickness of the material inside the feature divided by the thickness of the material near the opening. In certain examples, the step coverage of the under-layer is less than about 100% or, more specifically, less than about 75% or even less than about 50%.

[0149] The next cross-section 321 illustrates the feature hole filled with metal-containing materials 323. A deposition process may result in a conformal layer of the materials 323 built-up over the underlayer 313. This deposited layer follows the shape of the under-layer 313 including its overhang 315. In certain embodiments and, particularly, in later stages of the deposition process (e.g., right before feature closing), the layer 323 may become less conformal resulting in poor step coverage (i.e., more material being deposited near the opening than inside the feature).As the layer 323 thickens, it may close the feature forming a pinch point 325. Often some additional material is deposited above the pinch point 325 before the deposition process is stopped. Because of the overhang 315 and, in certain embodiments, the poor step coverage of the layer 323, the closed feature may have an unfilled void 329 (i.e., a seam) below the reference point 325. The size of the void 329 and the position of the reference point 325 with respect to the field region 327 depend on the size of the overhang 315, as well as the size, aspect ratio, and bowing of the feature, deposition process parameters, and other parameters.

[0150] Finally, cross-section 331 shows the substrate 333 after chemical-mechanical planarization (CMP), which removes a top layer from the substrate 303. CMP may be used to remove an overburden from the field region, such as parts of layers 313 and 323 that were present on the top surface of the substrate 303. Typically the substrate 303 is also thinned down during CMP to form the substrate 333. If the pinch point 325 falls above the planarization level of the CMP process, as in FIG. 3, the seam 329 opens up and is exposed to environment through the seam opening 335. The problems with open and large seams are described above.

[0151] FIG. 4 provides a process flow diagram showing relevant operations of a method 400 for selective deposition of silicon oxides which may minimize overhang in accordance with certain disclosed embodiments.

[0152] Operation 402 is providing a substrate as described above having a first surface and a second surface in a process chamber. The substrate includes those described above which may have one or more features. In some embodiments, the first surface is a metal or metal-containing surface and the second surface is a dielectric. Suitable process conditions include those described with respect to operation 202 in FIG. 2 above.

[0153] Operation 404 is exposure of the substrate to a metal-containing inhibitor to prepare the substrate for a thermal deposition of a silicon-containing film over a second surface. An inert gas is co-flowed with the metal-containing inhibitor in certain embodiments. This pre-treatment forms a film selectively over the first surface. The selectivity for deposition on the first surface relative to the second surface may be at least about 80%, about 85%, about 90% or at least about 95%. Suitable metal-containing inhibitors include those described above with respect to FIG. 1. Suitable process conditions include those described with respect to operation 101 in FIG. 1 above.

[0154] In operation 406, a silicon-containing film is deposited on the second surface subsequent to introduction of a silicon-containing precursor and an oxygen-containing reactant or introduction of a silicon- and oxygen-containing precursor to the process chamber. Suitable precursors andreactants are described above with respect to FIG. 2. An inert gas may be co-flowed with precursors and / or reactants in certain embodiments. Without wishing to be bound by theory, the method is effective due to blockage of the adjacent first surface by the metal-containing inhibitor, overhang may be minimized, reduced or even completely avoided.

[0155] In operation 408, the metal-containing inhibitor may be removed from the first surface under wet etch (for example with dilute hydrogen fluoride) or dry etch (for example with chlorine) conditions.

[0156] Purges of the process chamber may optionally be performed before or after operations 404, 406 and 408. Purging the chamber may involve flowing a purge gas or a sweep gas, which may be a carrier gas used in other operations or may be a different gas. In some embodiments, purging may involve evacuating the chamber. Example purge gases are inert gases including argon, nitrogen, hydrogen, and helium. In some embodiments, a purge may include one or more evacuation subphases for evacuating the process chamber. Alternatively, it will be appreciated that purges may be omitted in some embodiments. A purge may have any suitable duration, such as between about 0 seconds and about 60 seconds, for example about 0.01 seconds.

[0157] Operations 404-408 of the method constitute one cycle, and the process can be repeated for as many cycles necessary to obtain the desired result.

[0158] Moreover, an optional plasma pre-treatment operation (not shown) may be performed before operation 404 to pre-clean the surfaces in order to prepare them for the selective deposition as described above with reference to FIG. 2.Apparatus

[0159] FIG. 5 schematically shows an embodiment of a process station 500 that may be used to deposit material using atomic layer deposition (ALD) and / or chemical vapor deposition (CVD), either of which may be plasma enhanced. For simplicity, the process station 500 is depicted as a standalone process station having a process chamber body 502 for maintaining a low-pressure environment. However, it will be appreciated that a plurality of process stations 500 may be included in a common process tool environment. Further, it will be appreciated that, in some embodiments, one or more hardware parameters of process station 500, including those discussed in detail below, may be adjusted programmatically by one or more computer controllers.

[0160] Process station 500 fluidly communicates with reactant delivery system 501 for delivering process gases to a distribution showerhead 506. Reactant delivery system 501 includesa mixing vessel 504 for blending and / or conditioning process gases for delivery to showerhead 506. One or more mixing vessel inlet valves 520 may control introduction of process gases to mixing vessel 504. Similarly, a showerhead inlet valve 505 may control introduction of process gasses to the showerhead 506.

[0161] Some reactants, like BTBAS, may be stored in liquid form prior to vaporization at and subsequent delivery to the process station. For example, the embodiment of FIG. 5 includes a vaporization point 503 for vaporizing liquid reactant to be supplied to mixing vessel 504. In some embodiments, vaporization point 503 may be a heated vaporizer. The reactant vapor produced from such vaporizers may condense in downstream delivery piping. Exposure of incompatible gases to the condensed reactant may create small particles. These small particles may clog piping, impede valve operation, contaminate substrates, etc. Some approaches to addressing these issues involve sweeping and / or evacuating the delivery piping to remove residual reactant. However, sweeping the delivery piping may increase process station cycle time, degrading process station throughput. Thus, in some embodiments, delivery piping downstream of vaporization point 503 may be heat traced. In some examples, mixing vessel 504 may also be heat traced. In one nonlimiting example, piping downstream of vaporization point 503 has an increasing temperature profile extending from approximately 100°C to approximately 150°C at mixing vessel 504.

[0162] In some embodiments, reactant liquid may be vaporized at a liquid injector. For example, a liquid injector may inject pulses of a liquid reactant into a carrier gas stream upstream of the mixing vessel. In one scenario, a liquid injector may vaporize reactant by flashing the liquid from a higher pressure to a lower pressure. In another scenario, a liquid injector may atomize the liquid into dispersed microdroplets that are subsequently vaporized in a heated delivery pipe. It will be appreciated that smaller droplets may vaporize faster than larger droplets, reducing a delay between liquid injection and complete vaporization. Faster vaporization may reduce a length of piping downstream from vaporization point 503. In one scenario, a liquid inj ector may be mounted directly to mixing vessel 504. In another scenario, a liquid injector may be mounted directly to showerhead 506.

[0163] In some embodiments, a liquid flow controller upstream of vaporization point 503 may be provided for controlling a mass flow of liquid for vaporization and delivery to process station 500. For example, the liquid flow controller (LFC) may include a thermal mass flow meter (MFM) located downstream of the LFC. A plunger valve of the LFC may then be adjusted responsive to feedback control signals provided by a proportional-integral-derivative (PID) controller in electrical communication with the MFM. However, it may take one second or more to stabilizeliquid flow using feedback control. This may extend a time for dosing a liquid reactant. Thus, in some embodiments, the LFC may be dynamically switched between a feedback control mode and a direct control mode. In some embodiments, the LFC may be dynamically switched from a feedback control mode to a direct control mode by disabling a sense tube of the LFC and the PID controller.

[0164] Showerhead 506 distributes process gases toward substrate 512. In the embodiment shown in FIG. 5, substrate 512 is located beneath showerhead 506, and is shown resting on a pedestal 508. It will be appreciated that showerhead 506 may have any suitable shape, and may have any suitable number and arrangement of ports for distributing processes gases to substrate 512.

[0165] In some embodiments, a microvolume 507 is located beneath showerhead 506. Performing an ALD and / or CVD process in a microvolume rather than in the entire volume of a process station may reduce reactant exposure and sweep times, may reduce times for altering process conditions (e.g., pressure, temperature, etc.), may limit an exposure of process station robotics to process gases, etc. Example microvolume sizes include, but are not limited to, volumes between 0.1 liter and 2 liters. This microvolume also impacts productivity throughput. While deposition rate per cycle drops, the cycle time also simultaneously reduces. In certain cases, the effect of the latter is dramatic enough to improve overall throughput of the module for a given target thickness of film.

[0166] In some embodiments, pedestal 508 may be raised or lowered to expose substrate 512 to microvolume 507 and / or to vary a volume of microvolume 507. For example, in a substrate transfer phase, pedestal 508 may be lowered to allow substrate 512 to be loaded onto pedestal 508. During a deposition process phase, pedestal 508 may be raised to position substrate 512 within microvolume 507. In some embodiments, microvolume 507 may completely enclose substrate 512 as well as a portion of pedestal 508 to create a region of high flow impedance during a deposition process.

[0167] Optionally, pedestal 508 may be lowered and / or raised during portions the deposition process to modulate process pressure, reactant concentration, etc., within microvolume 507. In one scenario where process chamber body 502 remains at a base pressure during the deposition process, lowering pedestal 508 may allow microvolume 507 to be evacuated. Example ratios of microvolume to process chamber volume include, but are not limited to, volume ratios between 1 :500 and 1: 10. It will be appreciated that, in some embodiments, pedestal height may be adjusted programmatically by a suitable computer controller.

[0168] In another scenario, adjusting a height of pedestal 508 may allow a plasma density to be varied during plasma activation and / or treatment cycles included in the deposition process. At the conclusion of the deposition process phase, pedestal 508 may be lowered during another substrate transfer phase to allow removal of substrate 512 from pedestal 508.

[0169] While the example microvolume variations described herein refer to a height-adjustable pedestal, it will be appreciated that, in some embodiments, a position of showerhead 506 may be adjusted relative to pedestal 508 to vary a volume of microvolume 507. Further, it will be appreciated that a vertical position of pedestal 508 and / or showerhead 506 may be varied by any suitable mechanism within the scope of the present disclosure. In some embodiments, pedestal 508 may include a rotational axis for rotating an orientation of substrate 512. It will be appreciated that, in some embodiments, one or more of these example adjustments may be performed programmatically by one or more suitable computer controllers.

[0170] Returning to the embodiment shown in FIG. 5, showerhead 506 and pedestal 508 electrically communicate with RF power supply 514 and matching network 516 for powering a plasma. In some embodiments, the plasma energy may be controlled by controlling one or more of a process station pressure, a gas concentration, an RF source power, an RF source frequency, and a plasma power pulse timing. For example, RF power supply 514 and matching network 516 may be operated at any suitable power to form a plasma having a desired composition of radical species. Examples of suitable powers are included above. Likewise, RF power supply 514 may provide RF power of any suitable frequency. In some embodiments, RF power supply 514 may be configured to control high- and low-frequency RF power sources independently of one another. Example low-frequency RF frequencies may include, but are not limited to, frequencies between 50 kHz and 500 kHz. Example high-frequency RF frequencies may include, but are not limited to, frequencies between 1.8 MHz and 2.45 GHz. It will be appreciated that any suitable parameters may be modulated discretely or continuously to provide plasma energy for the surface reactions. In one non-limiting example, the plasma power may be intermittently pulsed to reduce ion bombardment with the substrate surface relative to continuously powered plasmas.

[0171] In some embodiments, the plasma may be monitored in-situ by one or more plasma monitors. In one scenario, plasma power may be monitored by one or more voltage, current sensors (e.g., VI probes). In another scenario, plasma density and / or process gas concentration may be measured by one or more optical emission spectroscopy sensors (OES). In some embodiments, one or more plasma parameters may be programmatically adjusted based on measurements from such in-situ plasma monitors. For example, an OES sensor may be used in afeedback loop for providing programmatic control of plasma power. It will be appreciated that, in some embodiments, other monitors may be used to monitor the plasma and other process characteristics. Such monitors may include, but are not limited to, infrared (IR) monitors, acoustic monitors, and pressure transducers.

[0172] In some embodiments, the plasma may be controlled via input / output control (IOC) sequencing instructions. In one example, the instructions for setting plasma conditions for a plasma process phase may be included in a corresponding plasma activation recipe phase of a deposition process recipe. In some cases, process recipe phases may be sequentially arranged, so that all instructions for a deposition process phase are executed concurrently with that process phase. In some embodiments, instructions for setting one or more plasma parameters may be included in a recipe phase preceding a plasma process phase. For example, a first recipe phase may include instructions for setting a flow rate of an inert and / or a reactant gas, instructions for setting a plasma generator to a power set point, and time delay instructions for the first recipe phase. A second, subsequent recipe phase may include instructions for enabling the plasma generator and time delay instructions for the second recipe phase. A third recipe phase may include instructions for disabling the plasma generator and time delay instructions for the third recipe phase. It will be appreciated that these recipe phases may be further subdivided and / or iterated in any suitable way within the scope of the present disclosure.

[0173] In some deposition processes, plasma strikes last on the order of a few seconds or more in duration. In certain implementations, much shorter plasma strikes may be used. These may be on the order of 10 ms to 1 second, typically, about 20 to 80 ms, with 50 ms being a specific example. Such very short RF plasma strikes require extremely quick stabilization of the plasma. To accomplish this, the plasma generator may be configured such that the impedance match is set preset to a particular voltage, while the frequency is allowed to float. Conventionally, high- frequency plasmas are generated at an RF frequency at about 13.56 MHz. In various embodiments disclosed herein, the frequency is allowed to float to a value that is different from this standard value. By permitting the frequency to float while fixing the impedance match to a predetermined voltage, the plasma can stabilize much more quickly, a result which may be important when using the very short plasma strikes associated with some types of deposition cycles.

[0174] In some embodiments, pedestal 508 may be temperature controlled via heater 510. Further, in some embodiments, pressure control for deposition process station 500 may be provided by butterfly valve 518. As shown in the embodiment of FIG. 5, butterfly valve 518 throttles a vacuum provided by a downstream vacuum pump (not shown). However, in someembodiments, pressure control of process station 500 may also be adjusted by varying a flow rate of one or more gases introduced to process station 500.

[0175] FIG. 6 shows a schematic view of an embodiment of a multi-station processing tool 600 with an inbound load lock 602 and an outbound load lock 604, either or both of which may comprise a remote plasma source. A robot 606, at atmospheric pressure, is configured to move wafers from a cassette loaded through a pod 608 into inbound load lock 602 via an atmospheric port 610. A wafer is placed by the robot 606 on a pedestal 612 in the inbound load lock 602, the atmospheric port 610 is closed, and the load lock is pumped down. Where the inbound load lock 602 comprises a remote plasma source, the wafer may be exposed to a remote plasma treatment in the load lock prior to being introduced into a processing chamber 614. Further, the wafer also may be heated in the inbound load lock 602 as well, for example, to remove moisture and adsorbed gases. Next, a chamber transport port 616 to processing chamber 614 is opened, and another robot (not shown) places the wafer into the reactor on a pedestal of a first station shown in the reactor for processing. While the embodiment depicted in FIG. 6 includes load locks, it will be appreciated that, in some embodiments, direct entry of a wafer into a process station may be provided.

[0176] The depicted processing chamber 614 comprises four process stations, numbered from 1 to 4 in the embodiment shown in FIG. 6. Each station has a heated pedestal (shown at 618 for station 1), and gas line inlets. It will be appreciated that in some embodiments, each process station may have different or multiple purposes. While the depicted processing chamber 614 comprises four stations, it will be understood that a processing chamber according to the present disclosure may have any suitable number of stations. For example, in some embodiments, a processing chamber may have five or more stations, while in other embodiments a processing chamber may have three or fewer stations.

[0177] FIG. 6 also depicts an embodiment of a wafer handling system 690 for transferring wafers within processing chamber 614. In some embodiments, wafer handling system 690 may transfer wafers between various process stations and / or between a process station and a load lock. It will be appreciated that any suitable wafer handling system may be employed. Non-limiting examples include wafer carousels and wafer handling robots. FIG. 6 also depicts an embodiment of a system controller 650 employed to control process conditions and hardware states of process tool 600. System controller 650 may include one or more memory devices 656, one or more mass storage devices 654, and one or more processors 652. Processor 652 may include a CPU or computer, analog and / or digital input / output connections, stepper motor controller boards, etc.

[0178] In some embodiments, system controller 650 controls all of the activities of process tool 600. System controller 650 executes system control software 658 stored in mass storage device 654, loaded into memory device 656, and executed on processor 652. System control software 658 may include instructions for controlling the timing, mixture of gases, chamber and / or station pressure, chamber and / or station temperature, purge conditions and timing, wafer temperature, RF power levels, RF frequencies, substrate, pedestal, chuck and / or susceptor position, and other parameters of a particular process performed by process tool 600. System control software 658 may be configured in any suitable way. For example, various process tool component subroutines or control objects may be written to control operation of the process tool components necessary to carry out various process tool processes in accordance with the disclosed methods. System control software 658 may be coded in any suitable computer readable programming language.

[0179] In some embodiments, system control software 658 may include input / output control (IOC) sequencing instructions for controlling the various parameters described above. For example, each phase of a plasma-enhanced ALD (PEALD) process may include one or more instructions for execution by system controller 650. The instructions for setting process conditions for a PEALD process phase may be included in a corresponding PEALD recipe phase. In some embodiments, the PEALD recipe phases may be sequentially arranged, so that all instructions for a PEALD process phase are executed concurrently with that process phase.

[0180] Other computer software and / or programs stored on mass storage device 654 and / or memory device 656 associated with system controller 650 may be employed in some embodiments. Examples of programs or sections of programs for this purpose include a substrate positioning program, a process gas control program, a pressure control program, a heater control program, and a plasma control program.

[0181] A substrate positioning program may include program code for process tool components that are used to load the substrate onto pedestal 618 and to control the spacing between the substrate and other parts of process tool 600.

[0182] A process gas control program may include code for controlling gas composition and flow rates and optionally for flowing gas into one or more process stations prior to deposition in order to stabilize the pressure in the process station. The process gas control program may include code for controlling gas composition and flow rates within any of the disclosed ranges. A pressure control program may include code for controlling the pressure in the process station by regulating, for example, a throttle valve in the exhaust system of the process station, a gas flow into the process station, etc. The pressure control program may include code for maintaining the pressure in theprocess station within any of the disclosed pressure ranges.

[0183] A heater control program may include code for controlling the current to a heating unit that is used to heat the substrate. Alternatively, the heater control program may control delivery of a heat transfer gas (such as helium) to the substrate. The heater control program may include instructions to maintain the temperature of the substrate within any of the disclosed ranges.

[0184] A plasma control program may include code for setting RF power levels and frequencies applied to the process electrodes in one or more process stations, for example using any of the RF power levels disclosed herein. The plasma control program may also include code for controlling the duration of each plasma exposure.

[0185] In some embodiments, there may be a user interface associated with system controller 650. The user interface may include a display screen, graphical software displays of the apparatus and / or process conditions, and user input devices such as pointing devices, keyboards, touch screens, microphones, etc.

[0186] In some embodiments, parameters adjusted by system controller 650 may relate to process conditions. Non-limiting examples include process gas composition and flow rates, temperature, pressure, plasma conditions (such as RF power levels, frequency, and exposure time), etc. These parameters may be provided to the user in the form of a recipe, which may be entered utilizing the user interface.

[0187] Signals for monitoring the process may be provided by analog and / or digital input connections of system controller 650 from various process tool sensors. The signals for controlling the process may be output on the analog and digital output connections of process tool 600. Nonlimiting examples of process tool sensors that may be monitored include mass flow controllers, pressure sensors (such as manometers), thermocouples, etc. Appropriately programmed feedback and control algorithms may be used with data from these sensors to maintain process conditions.

[0188] Any suitable chamber may be used to implement the disclosed embodiments. Example deposition apparatuses include, but are not limited to, apparatus from the ALTUS® product family, the VECTOR® product family, and / or the SPEED® product family, each available from Lam Research Corp., of Fremont, California, or any of a variety of other commercially available processing systems. Two or more of the stations may perform the same functions. Similarly, two or more stations may perform different functions. Each station can be designed / configured to perform a particular function / method as desired.

[0189] FIG. 7 is a block diagram of a processing system suitable for conducting thin filmdeposition processes in accordance with certain embodiments. The system 700 includes a transfer module 703. The transfer module 703 provides a clean, pressurized environment to minimize risk of contamination of substrates being processed as they are moved between various reactor modules. Mounted on the transfer module 703 are two multi-station reactors 709 and 710, each capable of performing atomic layer deposition (ALD) and / or chemical vapor deposition (CVD) according to certain embodiments. Reactors 709 and 710 may include multiple stations 711, 713, 715, and 717 that may sequentially or non-sequentially perform operations in accordance with disclosed embodiments. The stations may include a heated pedestal or substrate support, one or more gas inlets or showerhead or dispersion plate.

[0190] Also mounted on the transfer module 703 may be one or more single or multi-station modules 707 capable of performing plasma or chemical (non-plasma) pre-cleans, or any other processes described in relation to the disclosed methods. The module 707 may in some cases be used for various treatments to, for example, prepare a substrate for a deposition process. The module 707 may also be designed / configured to perform various other processes such as etching or polishing. The system 700 also includes one or more wafer source modules 701, where wafers are stored before and after processing. An atmospheric robot (not shown) in the atmospheric transfer chamber 719 may first remove wafers from the source modules 701 to loadlocks 721. A wafer transfer device (generally a robot arm unit) in the transfer module 703 moves the wafers from loadlocks 721 to and among the modules mounted on the transfer module 703.

[0191] In various embodiments, a system controller 729 is employed to control process conditions during deposition. The controller 729 will typically include one or more memory devices and one or more processors. A processor may include a CPU or computer, analog and / or digital input / output connections, stepper motor controller boards, etc.

[0192] The controller 729 may control all of the activities of the deposition apparatus. The system controller 729 executes system control software, including sets of instructions for controlling the timing, mixture of gases, chamber pressure, chamber temperature, wafer temperature, radio frequency (RF) power levels, wafer chuck or pedestal position, and other parameters of a particular process. Other computer programs stored on memory devices associated with the controller 729 may be employed in some embodiments.

[0193] Typically there will be a user interface associated with the controller 729. The user interface may include a display screen, graphical software displays of the apparatus and / or process conditions, and user input devices such as pointing devices, keyboards, touch screens, microphones, etc.

[0194] System control logic may be configured in any suitable way. In general, the logic can be designed or configured in hardware and / or software. The instructions for controlling the drive circuitry may be hard coded or provided as software. The instructions may be provided by “programming.” Such programming is understood to include logic of any form, including hard coded logic in digital signal processors, application-specific integrated circuits, and other devices which have specific algorithms implemented as hardware. Programming is also understood to include software or firmware instructions that may be executed on a general purpose processor. System control software may be coded in any suitable computer readable programming language.

[0195] The computer program code for controlling the germanium-containing reducing agent pulses, hydrogen flow, and tungsten-containing precursor pulses, and other processes in a process sequence can be written in any conventional computer readable programming language: for example, assembly language, C, C++, Pascal, Fortran, or others. Compiled object code or script is executed by the processor to perform the tasks identified in the program. Also as indicated, the program code may be hard coded.

[0196] The controller parameters relate to process conditions, such as, for example, process gas composition and flow rates, temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature. These parameters are provided to the user in the form of a recipe, and may be entered utilizing the user interface. Signals for monitoring the process may be provided by analog and / or digital input connections of the system controller 729. The signals for controlling the process are output on the analog and digital output connections of the deposition apparatus 700.

[0197] The system software may be designed or configured in many different ways. For example, various chamber component subroutines or control objects may be written to control operation of the chamber components necessary to carry out the deposition processes (and other processes, in some cases) in accordance with the disclosed embodiments. Examples of programs or sections of programs for this purpose include substrate positioning code, process gas control code, pressure control code, and heater control code.

[0198] In some implementations, a controller is part of a system, which may be part of the abovedescribed examples. Such systems can include semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and / or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the “controller,”which may control various components or subparts of the system or systems. The controller, depending on the processing requirements and / or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings in some systems, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and / or load locks connected to or interfaced with a specific system.

[0199] Broadly speaking, the controller may be defined as electronics having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and / or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0200] The controller, in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the “cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g., a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and / or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations.It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus as described above, the controller may be distributed, such as by comprising one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.

[0201] Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and / or manufacturing of semiconductor wafers.

[0202] As noted above, depending on the process step or steps to be performed by the tool, the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and / or load ports in a semiconductor manufacturing factory.Further Implementations

[0203] The apparatus and processes described herein may be used in conjunction with lithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels, and the like. Typically, though not necessarily, such apparatus and processes will be used or conducted together in a common fabrication facility. Lithographic patterning of a film typically comprises some or all of the following steps, each step enabled with a number of possible tools: (1) application of photoresist on a work piece, i.e., a substrate, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or UV curing tool; (3) exposing the photoresist to visible or UV or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove resist and thereby pattern it using a tool such as a wet bench; (5) transferring the resist pattern intoan underlying film or work piece by using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.Conclusion

[0204] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems, and apparatus of the present embodiments. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the embodiments are not to be limited to the details given herein.

Claims

CLAIMSWhat is claimed is:

1. A method for binary deposition of a metal and a dielectric film comprising: providing a substrate having a metal surface comprising a first metal and a dielectric surface comprising a first dielectric in a process chamber; exposing the substrate to a metal-containing inhibitor comprising a second metal to form a film of the metal-containing inhibitor on the metal surface; supplying a dielectric precursor comprising a second dielectric to the process chamber to selectively form a dielectric film comprising the second dielectric on the dielectric surface comprising the first dielectric; and converting the film of the metal-containing inhibitor on the metal surface to a second metal by treating the film of the metal-containing inhibitor with plasma.

2. The method of claim 1, wherein the metal-containing inhibitor comprises a metal carbene compound, a metal carbenoid compound, a metal halide compound, a metal oxyhalide compound, a metal carbonyl compound, a metal cyclopentadienyl compound, a metal diketonate compound, a metal arylisocyanide compound or a metal alkylisocyanide compound; and wherein the metal of the metal-containing inhibitor comprises antimony, chromium, copper, cobalt, hafnium, molybdenum, nickel, ruthenium, platinum, titanium, tantalum, tungsten, zinc or zirconium.

3. The method of claim 1, wherein the metal-containing inhibitor comprises a structure of formula (I)MLx (I); wherein M is a metal comprising antimony, copper, cobalt, hafnium, nickel, ruthenium, platinum, titanium, tantalum, tungsten or molybdenum; each L is independently a monodentate ligand, ambidentate ligand, bidentate ligand or tridentate ligand; and x is an integer of 1-6.

4. The method of claim 3, wherein the monodentate ligand comprises hydrogen, halo, hydroxy, alkyl silyl, silylalkyl, alkenyl, alkynyl, allyl, alkoxy, alkenoxy, alkynoxy, thioalkoxy, aliphatic acyl, -CF3, nitro, amino, imino, -N(CI-C3 alkyl)C(O)(Ci-C3 alkyl), - C1-C3 alkylamino, alkenylamino, alkynylamino, di(Ci-Cs alkyl)amino, -C(O)O-(Ci-C3 alkyl), -C(O)NH-(CI-C3alkyl), -CH=NOH, -P(Ci-C3alkyl)3, -PO3H2, -OPO3H2, - C(O)N(CI-C3 alkyl)2, haloalkyl, alkoxycarbonyl, alkoxyalkoxy, carboxaldehyde, carboxamide, cycloalkyl, cycloalkenyl, cycloalkynyl, aryl, aroyl, aryloxy, arylamino, biaryl, thioaryl, heterocyclyl, alkylheterocyclyl, heterocyclylalkyl, heterocycloyl, alkylaryl, alkylcarbonyl, CO, =0, =S, =N, C = C,-N0, aralkenyl, aralkyl, sulfonyl, sulfonamido, sulfonimido, carbamate, aryloxyalkyl, carboxyl, carboxy,-C(O)NH(benzyl), ylidenyl, amido, azido, isocyanato, thiocyanato, isothiocyanato, cyano, isocyanoalkyl, isocyanohaloalkyl, isocyanoaryl, isocyanohaloaryl or cyclyl.

5. The method of claim 3, wherein at least one L comprises ylidenyl.

6. The method of claim 5, wherein the ylidenyl is a carbene or a nitrogen carbenoid.

7. The method of claim 6, wherein the carbene is an N-heterocyclic carbene.

8. The method of claim 6, wherein the nitrogen carbenoid is imidazolium or pyridinium.

9. The method of claim 1, wherein the metal-containing inhibitor comprises a structure of formula (II)L’yML”ML’y(II); wherein M is a metal comprising antimony, copper, cobalt, hafnium, nickel, ruthenium, platinum, titanium, tantalum, tungsten or molybdenum; each L’ is independently a monodentate ligand, ambidentate ligand, bidentate ligand or tridentate ligand;L” is a ligand comprising a triply bonded carbyne, a triply bonded imide or a triplybonded nitride; and y is an integer of 1-5.

10. The method of claim 9, wherein the monodentate ligand comprises hydrogen, halo, hydroxy, alkyl silyl, silylalkyl, alkenyl, alkynyl, allyl, alkoxy, alkenoxy, alkynoxy, thioalkoxy, aliphatic acyl, -CF3, nitro, amino, imino, -N(CI-C3 alkyl)C(O)(Ci-C3 alkyl), - C1-C3 alkylamino, alkenylamino, alkynylamino, di(Ci-C3 alkyl)amino, -C(O)O-(Ci-C3 alkyl), -C(O)NH-(CI-C3alkyl), -CH=NOH, -P(Ci-C3alkyl)3, -PO3H2, -OPO3H2, - C(O)N(CI-C3 alkyl)2, haloalkyl, alkoxycarbonyl, alkoxyalkoxy, carboxaldehyde, carboxamide, cycloalkyl, cycloalkenyl, cycloalkynyl, aryl, aroyl, aryloxy, arylamino, biaryl, thioaryl, heterocyclyl, alkylheterocyclyl, heterocyclylalkyl, heterocycloyl, alkylaryl, alkylcarbonyl, CO, =0, =S, =N, C = C,-NO, aralkenyl, aralkyl, sulfonyl, sulfonamido, sulfonimido, carbamate, aryloxyalkyl, carboxyl, carboxy,-C(O)NH(benzyl), ylidenyl, amido, azido, isocyanato, thiocyanato, isothiocyanato, cyano, isocyanoalkyl, isocyanohaloalkyl, isocyanoaryl, isocyanohaloaryl or cyclyl.

11. The method of claim 1, wherein the metal-containing inhibitor comprises a molybdenum halide, a molybdenum oxyhalide, or a molybdenum diketonate.

12. The method of claim 1, further comprising optionally post-treating the second metal to remove excess inhibitor after converting the film of the metal-containing inhibitor to a second metal.

13. The method of claim 12, wherein post-treating comprises treatment with a hydrogencontaining plasma or treatment with a flash-enhanced plasma.

14. The method of claim 1, wherein the metal surface comprises tungsten oxide, hafnium oxide, titanium oxide, aluminum oxide, zirconium oxide, cobalt, copper, tungsten, ruthenium, molybdenum or a combination thereof.

15. The method of claim 1, wherein the first dielectric comprises germanium oxide, antimony oxide, bismuth oxide, magnesium oxide, aluminum oxide, nickel oxide, iron oxide, titanium oxide, tantalum nitride, cobalt oxide, silicon dioxide, silicon nitride or silicon oxide carbide; and wherein the second dielectric comprises silicon dioxide, silicon nitride or silicon oxide carbide.

16. A method for selective deposition of a silicon oxide film on a substrate comprising: providing a substrate comprising a first surface and a second surface in a process chamber; exposing the substrate to at least one metal-containing inhibitor to form a pre-treated substrate comprising a metal -containing inhibitor on the first surface; supplying a silicon-containing precursor and an oxygen-containing reactant or a silicon- and oxygen-containing precursor to the process chamber to form a silicon-containing film over the second surface of the pre-treated substrate; and removing the metal-containing inhibitor from the first surface, wherein the first surface and the second surface are different.

17. The method of claim 16, wherein the metal-containing inhibitor comprises a metal carbene compound, a metal carbenoid compound, a metal halide compound, a metal oxyhalide compound, a metal carbonyl compound, a metal cyclopentadienyl compound, a metal diketonate compound, a metal arylisocyanide compound or a metal alkylisocyanide compound; and wherein the metal of the metal-containing inhibitor comprises antimony, chromium, copper, cobalt, hafnium, molybdenum, nickel, ruthenium, platinum, titanium, tantalum, tungsten, zinc or zirconium.

18. The method of claim 16, wherein the metal-containing inhibitor comprises (3,3-dimethyl- l-butyne)dicobalt hexacarbonyl, tungsten hexacarbonyl or molybdenum pentachloride.

19. The method of claim 16, wherein the first surface comprises a metal, the second surface comprises a dielectric, and whereby overhang is minimized.

20. An apparatus for selective deposition of two different materials on two different surfaces of a semiconductor substrate, the apparatus comprising: a processing chamber;a substrate holder in the processing chamber; one or more gas inlets for flowing gases into the processing chamber; a vacuum source for removing gases from the processing chamber; a plasma generator for generating plasma within the processing chamber; and one or more controllers comprising machine-readable instructions for operating the one or more gas inlets, vacuum source, and plasma generator to deposit onto a semiconductor substrate, the machine-readable instructions of the one or more controllers comprising instructions for: introducing a metal -containing inhibitor to form a metal-containing inhibitor film on a first surface of a semiconductor substrate; introducing a dielectric precursor to form a dielectric film on a second surface of a semiconductor substrate; and converting metal-containing inhibitor film on the first surface of the semiconductor substrate to metal.

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