Microelectronic package with non-magnetic plating structure

Abstract

An electronics package includes a ceramic housing with a non-magnetic plating adjacent to a fired metallization layer over at least a portion of the ceramic housing. An electrically conductive element, such as a trace, includes the fired metallization layer printed and fired onto at least a portion of the ceramic housing a non-magnetic plating structure adjacent to the fired metallization layer. The non-magnetic plating structure includes at least a seed layer comprising copper, a conductive layer comprising gold, and a diffusion barrier layer. The diffusion barrier layer comprises palladium and is between the conductive layer and the seed layer. In some situations, an adhesion layer is adjacent to the seed layer and is between the fired metallization layer and the seed layer.

Description

MICROELECTRONIC PACKAGE WITH NON-MAGNETIC PLATING STRUCTURECLAIM OF PRIORITY

[0001] The present application claims priority to Provisional Application No. 63 / 531 ,876, entitled “NON-MAGNETIC PLATING LAYER STACK-UP FOR HERMETIC AND NON- HERMETIC MICROELECTRONIC PACKAGING”, docket number KII-SC PRO 00025 US, filed August 10, 2023, assigned to the assignee hereof and hereby expressly incorporated by reference in its entirety.FIELD

[0002] This invention generally relates to electronics packaging and more particularly to electronics packaging with non-magnetic plating structures.BACKGROUND

[0003] Many conventional electronic devices include packaging. For example, conventional microelectronics, semiconductors and integrated circuits (IC) are mounted in ceramic packages where the ceramic packages are sometimes hermetically sealed. Traces and other electrically conductive elements in the package are often required to provide connections to, or otherwise support the functions of, the electronics contained within the housing of the package. These traces and conductive elements can be formed with a fired metallization layer that is typically printed on a portion of the ceramic housing and fired. A plating layer including nickel is often deposited on the fired metallization layer which may include materials such as tungsten and molybdenum. Since nickel is ferromagnetic, however, such conventional techniques may limit or adversely affect the performance of some devices. For example, the performance of devices such as atomic clocks and quantum computer chips is sometimes significantly limited by traces containing nickel or other strongly magnetic materials.SUMMARY

[0004] An electronics package includes a ceramic housing with a non-magnetic plating adjacent to a fired metallization layer over at least a portion of the ceramic housing. An electrically conductive element, such as a trace, includes the fired metallization layer printed and fired onto at least a portion of the ceramic housing a nonmagnetic plating structure adjacent to the fired metallization layer. The non-magnetic plating structure includes at least a seed layer comprising copper, a conductive layer comprising gold, and a diffusion barrier layer. The diffusion barrier layer comprises palladium and is between the conductive layer and the seed layer. In some situations, an adhesion layer is adjacent to the seed layer and is between the fired metallization layer and the seed layer.BRIEF DESCRIPTION OF THE DRAWINGS

[0005] FIG. 1 A is a block diagram of top view of an example of an electronics package with electrically conductive elements having non-magnetic plating structures.

[0006] FIG. 1 B is a block diagram of a cross-sectional side view of the electronics package of FIG. 1A taken at line B-B.

[0007] FIG. 2 is a block diagram of an example of a portion of the electronics package where the non-magnetic layer structure includes a seed layer, a diffusion barrier layer, and a conductive layer.

[0008] FIG. 3 is a block diagram of an example of a portion of the electronics package where the non-magnetic layer structure includes an adhesion layer, a seed layer, a diffusion barrier layer, and a conductive layer.

[0009] FIG. 4 is a flow chart of an example of a method of forming an electronics package with a conductive element including a non-magnetic plating structure.DETAILED DESCRIPTION

[0010] As discussed above, conventional packaging techniques are limited due to the use of nickel. Nickel is often used as a diffusion barrier layer in a plating stack applied to a metallization layer. The performance of devices sensitive to magnetic fields is adversely affected since nickel is ferromagnetic. Some attempts to address the problem include adding materials to the nickel to reduce the magnetic properties of nickel. For example, adding phosphorous to the nickel diffusion barrier reduces ferromagnetic properties. Unfortunately, the addition of phosphorous adversely affects other desired properties of the diffusion barrier layer. With a sufficient concentration of phosphorous to reduce the ferromagnetic properties to a desired level, for example, the nickel diffusion barrier is brittle, hard and has reduced solderability and conductivity. As a result, the performance of the resulting plated metallization layer is reduced.

[0011] With the techniques discussed herein, however, a non-magnetic plating structure is formed without adversely affecting other properties of the plated metallization layer. For the examples, a non-magnetic plating structure includes a diffusion barrier layer comprising palladium. Therefore, conventional diffusion barrier layers using magnetic materials such as nickel are replaced with the diffusion barrier layer comprising palladium. As discussed herein, non-magnetic refers to materials with diamagnetic or paramagnetic properties with low susceptibility.

[0012] FIG. 1A is a block diagram of top view of an example of an electronics package 100 with electrically conductive elements 102 having a non-magnetic plating structure. The electronics package 100 includes a ceramic housing 104 with a wall 106 and an electronics area 108 for containing electronics, integrated circuits (ICs), chips, semiconductor devices, discrete electronic devices or other electronic devices (collectively “electronics”). The electronics area 108 may be a cavity of any suitable shape and size for receiving the electronics. In some circumstances a lid or cover can be attached to the wall 106 to enclose the electronics. The interior of the package 100 may be hermetically sealed using appropriate techniques for attaching the lid to thewall. Also, the housing may be formed from a single piece of ceramic or multiple sections.

[0013] For the examples discussed herein, the housing is a non-magnetic ceramic where the ceramic may include materials such as oxides, nitrides, carbides, borides, semimetals and combinations thereof. An example of a suitable ceramic material includes aluminum oxide. Other examples of ceramics include materials such as aluminum nitride, beryllium oxide, zirconium oxide, silicon nitride, silicon carbide, glass ceramics (including low temperature cofired alumina ceramic LTCC), and mullite (alumina - silica).

[0014] The electrically conductive elements may be any feature that facilitates connection to the electronics, the conduction of electrical signals or electrical energy between different points of the electronics package. For the examples herein, the electrically conductive elements 102 are traces that facilitate connections to the electronics where the electronics may be soldered or wire bonded to the traces. Such a structure allows for electrical connections from outside the electronics package to the electronics.

[0015] For the examples represented in FIG. 1A, FIG. 1 B, FIG. 2, and FIG. 3, the electrically conductive elements 102 are traces and include a non-magnetic plating structure that includes either three plating layers or four plating layers. The nonmagnetic plating structure, however, may have any number of plating layers. FIG. 1 A, FIG. 1 B, FIG. 2, and FIG. 3 are not necessarily to scale and are not intended to be more than general illustrations showing the relative positioning of elements.

[0016] FIG. 1 B is a block diagram of a cross-sectional side view of the electronics package of FIG. 1 A taken at line B-B. FIG. 1 B includes an exploded view of a portion 110 of the electronics package 100 where the exploded view includes a cross-sectional side view of the wall 106 and an element housing section 112 with the electrically conductive elements 102. As mentioned above, the housing 104 may include multiple ceramic sections in some situations. For the example of FIG. 1 A and FIG. 1 B, the housing 104 includes a base section 114 attached to the element housing section 112and the wall 106 attached to the element housing section 112. The electrically conductive elements 102 include a fired metallization layer 116 and the non-magnetic plating structure 118. The non-magnetic plating structure 118 includes a plurality of plating layers. The non-magnetic plating structure 118 is illustrated with a crosshatched block having a horizontal dashed line to indicate that the non-magnetic plating structure 118 may include any number of plating layers. Examples of suitable techniques for forming the plating layers include an electroless plating process and an electrolytic plating process.

[0017] For the example FIG. 1A and FIG. 1 B, the fired metallization layer is formed before the wall is attached to the element housing section 112. The non-magnetic plating structure 118 is formed after the wall 106 is attached and, as a result, the nonmagnetic plating structure 118 is not positioned between the wall 106 and the element housing section 112 in the example. An example of typical manufacturing technique includes printing a metallization layer onto the element housing section 112 before firing and then attaching the wall 106.

[0018] FIG. 2 is a block diagram of an example of a portion 200 of the electronics package 100 where the non-magnetic layer structure 118 includes a seed layer 202, a diffusion barrier layer 204, and a conductive layer 206. Accordingly, the portion 200 of FIG. 2 is an example of the portion 110 of FIG. 1 B.

[0019] For the example of FIG. 2, the fired metallization layer 116 comprises tungsten and is formed on a portion of the ceramic housing 104. A non-magnetic plating structure 118 is applied to the fired metallization layer 116 where the non-magnetic plating structure 118 includes a seed layer 202 comprising copper, a diffusion barrier layer 204 comprising palladium and a conductive layer 206 comprising gold. The seed layer 202 is adjacent to and contacts the fired metallization layer 116. The diffusion barrier layer 204 is between the seed layer 202 and conductive layer 206. For the example, the diffusion barrier layer 204 is adjacent to and contacts the seed layer 202 on one side and the conductive layer 206 on opposite side. In other examples, additional layers may be applied between the fired metallization layer 116 and the seedlayer 202, the seed layer 202 and the diffusion barrier layer 204 and / or the diffusion barrier layer 204 and the conductive layer 206. For example, an adhesion layer comprising gold may be applied between the fired metallization layer 116 and the seed layer 202. Where the seed layer 202 comprising copper is adjacent to the fired metallization layer 116, the layer 202 may be referred to as an adhesion layer. In the interest of clarity and consistency, the term “seed layer” is used herein to differentiate the layers when additional layers are applied. As discussed below with reference to FIG. 3, for example, the layer comprising copper is referred to as the seed layer and the layer comprising gold between the fired metallization layer and the seed layer is referred to as an adhesion layer.

[0020] FIG. 3 is a block diagram of an example of a portion 300 of the electronics package 100 where the non-magnetic layer structure 118 includes an adhesion layer 302, a seed layer 202, a diffusion barrier layer 204, and a conductive layer 206. Accordingly, the portion 300 of FIG. 3 is an example of the portion 110 of FIG. 1 B.

[0021] For the example of FIG. 3, a tungsten layer forms the fired metallization layer 116 on a portion of the ceramic housing 104. A non-magnetic plating structure 118 is applied to the fired metallization layer 116 where the non-magnetic plating structure 118 includes an adhesion layer 302 comprising gold, a seed layer comprising copper 202, a diffusion barrier layer 204 comprising palladium and a conductive layer 206 comprising gold. The adhesion layer 302 is adjacent to and contacts the fired metallization layer 116. The seed layer 202 is between the diffusion barrier layer 204 and the fired metallization layer 116. The diffusion barrier layer 204 is between the seed layer 202 and conductive layer 206.

[0022] For the example, the diffusion barrier layer 204 is adjacent to and contacts the seed layer 202 on one side and the conductive layer 206 on the opposite side. In other examples, additional layers may be applied between the fired metallization layer 116 and the seed layer 202, the seed layer 202 and the diffusion barrier layer 204 and / or the diffusion barrier layer 204 and the conductive layer 206. For example, an adhesion layer comprising gold may be applied between the fired metallization layer116 and the seed layer 202. Where the seed layer 202 comprising copper is adjacent to the fired metallization layer 116, the layer 202 may be referred to as an “adhesion layer”. In the interest of clarity and consistency, the term “seed layer” is used herein for the layer comprising copper to differentiate between the layer adjacent to the metallization layer when the adjacent layer comprises copper and when the adjacent layer comprises gold. The adhesion layer 302 comprising gold promotes adhesion to the tungsten of the fired metallization layer 116. As a result, improved adhesion to the base metallization may be achieved since gold adheres well to the tungsten metallization. For example, gold has been demonstrated to adhere to tungsten when applied with special processing, the adhesion layer 302 assists with the adhesion of the copper in the seed layer 202.

[0023] The diffusion barrier layer 204 prevents, or at least partially inhibits, the seed layer 202 comprising copper from migrating to the surface of the conductive layer 206 comprising gold. Mitigating the diffusion of the copper to the gold may improve the longevity of the electronics package 100. The palladium of the diffusion barrier layer 204 may be electrolytic in some situations.

[0024] In some situations, additional layers may be applied between the layers discussed above. For example, an interior layer comprising gold may be applied between the seed layer 202 and the diffusion barrier layer 204.

[0025] For example, each of the layers 202, 204, 206, 302 may include, or be formed by, any of numerous materials where the adhesion layer 302 comprises gold, the seed layer 202 comprises copper, the diffusion barrier layer 204 comprises palladium, and the conductive layer 206 comprises gold. The materials in each layer may be pure metal, or an alloy of non-magnetic metals as needed to achieve the electrical and mechanical properties needed. An example of a suitable adhesion material is gold. Examples of other adhesion materials include non-magnetic metals such as copper, silver, and zinc. An example of a suitable seed layer is copper. Silver is another example of a suitable seed layer. Examples of suitable diffusion barrier layers include palladium and platinum, which have slow diffusion rates for many metals. An exampleof a suitable conductive layer is gold. An example of an alternative conductive layer material is silver.

[0026] FIG. 4 is a flow chart of an example of a method 400 of forming an electronics package with one or more conductive elements including a non-magnetic plating structure. In some situations, the method 400 may be used to form an electronics package, such as at least the electronic package 100 with the non-metallic plating structure examples discussed above. One or more of the steps may be omitted, combined, performed in parallel, or performed in a different order than that described herein or shown in FIG. 4. In still further examples, additional steps may be added that are not explicitly described in connection with the example discussed with reference to FIG. 4.

[0027] At step 402, a metallization layer is printed on a portion of the ceramic housing. The metallization material is applied to the surface of the ceramic housing in accordance with a desired pattern. For the example, a layer of tungsten is deposed on the ceramic substrate of the housing. Examples of suitable deposition techniques include screen printing, ink jet printing, spraying, or brushing.

[0028] At step 404, the printed metallization layer is fired. At least the element housing section 112 with the printed metallization layer is placed in an oven and heated to a sufficiently high temperature to sinter the printed metallization layer such that it is bonded to the ceramic. For the example, the printed tungsten is heated to a temperature of 1 ,500 C or more.

[0029] At step 406, an adhesion layer 302 comprising gold is applied to the fired metallization layer 116. In some situations, the fired metallization layer is heat treated to improve adhesion between the adhesion layer and the metallization layer. The heat treatment may include heating to a temperature of 800 C in reducing atmosphere. Step 406 may be omitted in some situations. For examples-where the seed layer comprising copper is applied directly to the fired metallization layer, the application of the adhesion layer 302 is omitted. Accordingly, the box representing step 406 in FIG. 4 is shown with dashed lines to represent that the step may be skipped in some cases.

[0030] At step 408, a seed layer 202 comprising copper is applied. Where step 406 is omitted, the seed layer is applied to the fired metallization layer 116. Otherwise, the seed layer is applied to the adhesion layer 302. In some situations where the adhesion layer has been omitted, a heat treatment step is applied to the seed layer.

[0031] At step 410, a diffusion barrier layer 204 comprising palladium is applied to the seed layer 202. The diffusion barrier is typically thin, on the order of 0.1 to 1.0 microns, to block diffusion or migration of the seed layer to the conductive layer.

[0032] At step 412, a conductive layer 206 comprising gold is applied to the diffusion barrier layer 204. The thickness of the conductive layer depends on the required electrical properties and the method of making electrical connections, such as soldering and / or creating wire bonds.

[0033] Clearly, other embodiments and modifications of this invention will occur readily to those of ordinary skill in the art in view of these teachings. The above description is illustrative and not restrictive. This invention is to be limited only by the following claims, which include all such embodiments and modifications when viewed in conjunction with the above specification and accompanying drawings. The scope of the invention should, therefore, be determined not with reference to the above description, but instead should be determined with reference to the appended claims along with their full scope of equivalents.

Claims

CLAIMS1 . An electronics package comprising: a ceramic housing; a fired metallization layer on at least a portion of the ceramic housing; and a non-magnetic plating structure adjacent to the fired metallization layer, the nonmagnetic plating structure comprising a seed layer comprising copper, a conductive layer comprising gold, and a diffusion barrier layer between the conductive layer and the seed layer and comprising palladium, the seed layer adjacent to the diffusion barrier layer and between the fired metallization layer and the diffusion barrier layer.

2. The package of claim 1 , wherein one or more of the seed layer, the conductive layer and the diffusion barrier layer are heat treated to improve adhesion between at least two layers3. The package of claim 2, wherein: the seed layer is heat treated after being applied to the metallization layer and before the diffusion barrier layer is applied to the seed layer; the diffusion barrier layer is heat treated after being applied to the seed layer and before the conductive layer is applied to the diffusion barrier layer; and the conductive layer is heat treated after being applied to the diffusion barrier layer4. The package of claim 2, wherein the seed layer, the conductive layer and the diffusion barrier layer are heat treated after the conductive layer is applied to the diffusion barrier layer and after the diffusion barrier layer is applied to the seed layer.

5. The package of claim 1 , wherein the seed layer is adjacent to the fired metallization layer.

6. The package of claim 1 , wherein the non-magnetic plating structure further comprises an adhesion layer adjacent to the fired metallization layer and comprising gold.

7. The package of claim 6, wherein the fired metallization layer is heat treated before the adhesion layer is applied to the fired metallization layer.

8. The package of claim 6, wherein the non-magnetic plating structure further comprises an interior layer comprising gold and between the seed layer and the barrier diffusion layer.

9. The package of claim 1 , wherein the non-magnetic plating structure further comprises an interior layer comprising gold and between the seed layer and the barrier diffusion layer.

10. The package of claim 1 , wherein the fired metallization layer comprises tungsten.11 . The package of claim 1 , wherein the fired metallization layer comprises molybdenum.

12. An electronics package comprising: a ceramic housing; a fired metallization layer on at least a portion of the ceramic housing, the fired metallization layer comprising tungsten; and a non-magnetic plating structure adjacent to the fired metallization layer, the nonmagnetic plating structure comprising an adhesion layer comprising gold and adjacent to the fired metallization later, a seed layer comprising copper, a conductive layer comprising gold, and a diffusion barrier layer comprising palladium and positioned between the conductive layer and the seed layer, the seed layer adjacent to the barrier diffusion layer and between the fired metallization layer and the diffusion barrier layer.

13. The package of claim 12, wherein one or more of the adhesion layer, the seed layer, the conductive layer and the diffusion barrier layer are heat treated to improve adhesion between at least two layers.

14. The package of claim 13, wherein: the adhesion layer is heat treated after being applied to the metallization layer and before the seed layer is applied to the adhesion layer; the seed layer is heat treated after being applied to the adhesion layer and before the diffusion barrier layer is applied to the seed layer; the diffusion barrier layer is heat treated after being applied to the seed layer and before the conductive layer is applied to the diffusion barrier layer; and the conductive layer is heat treated after being applied to the diffusion barrier layer15. The package of claim 13, wherein the seed layer, the conductive layer and the diffusion barrier layer are heat treated after the conductive layer is applied to the diffusion barrier layer and after the diffusion barrier layer is applied to the seed layer.

16. A method of manufacturing an electronics package with a non-magnetic plating structure, the method comprising: printing a metallization layer on at least a portion of a ceramic housing; firing the metallization layer to form a fired metallization layer on the ceramic housing: applying a seed layer comprising copper to the fired metallization layer; applying a diffusion barrier layer comprising palladium to the seed layer; and applying a conductive layer comprising gold to the diffusion barrier layer.

17. The method of claim 15, further comprising:heat treating one or more of the seed layer, the conductive layer, and the diffusion barrier layer are heat treated to improve adhesion between at least two layers.

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