Frequency modulation method for electronic device and electronic device

Abstract

Provided in the present application are a frequency modulation method for an electronic device and an electronic device, relating to the field of terminals. The method comprises: acquiring a first computing power difference and a first frequency point value of a processor during a first frequency modulation cycle, the first computing power difference being positively correlated with a difference value between the load duty ratio of the processor during the first frequency modulation cycle and a target load duty ratio; on the basis of the first computing power difference and the first frequency point value, determining a second frequency point value of the processor during a second frequency modulation cycle, the second frequency modulation cycle following the first frequency modulation cycle; and during the second frequency modulation cycle, on the basis of the second frequency point value, adjusting a frequency point value of the processor. The technical solution provided by the present application can improve the flexibility and accuracy of frequency modulation, implement on-demand supply of frequency point values for processors, and has fast response speeds, thus solving the problems of over-supply and under-supply of the frequency point values.

Description

Frequency modulation method of electronic equipment and electronic equipment

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on August 29, 2023, with application number 202311103322.4 and application name “Frequency modulation method of processor and electronic device”, and the Chinese patent application filed with the State Intellectual Property Office on September 8, 2023, with application number 202311168887.0 and application name “Frequency modulation method of electronic device and electronic device”, all contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of terminals, and in particular to a frequency modulation method of an electronic device and the electronic device. Background Art

[0003] Processor frequency modulation is a technology that rationally configures the processor frequency value according to the processor load. Its purpose is to make the processor performance meet the current load requirements without generating unnecessary power waste.

[0004] In the prior art, one or more frequency-boosting scenarios can be set in advance, such as application cold start, sliding operation, click-to-switch operation, etc. When the electronic device is running, the current business scenario can be identified. When the business scenario is a pre-set frequency-boosting scenario, the frequency value of the processor is increased to a fixed frequency value and maintained for a fixed period of time. However, under this frequency modulation strategy, since the frequency value of the processor is increased to a fixed frequency value and maintained for a fixed period of time, and the fixed frequency value and fixed period of time do not completely match the current business scenario, the frequency value may be too high and the frequency-boosting time may be too long, which may lead to problems such as excess computing power of the processor, waste of power consumption, and heat generation. The frequency value may also be too low or the frequency-boosting time may be too short, which cannot meet the needs of the current business scenario. For example, the business scenario lasts longer than the frequency-boosting time, resulting in problems such as freezes and loss of response, and poor performance experience.

[0005] Summary of the Invention

[0006] In view of this, the present application provides a frequency modulation method for an electronic device and an electronic device, which can improve the flexibility and accuracy of frequency modulation, realize on-demand supply of frequency point values ​​of the processor, have a fast response speed, and improve the problem of oversupply and undersupply of frequency point values.

[0007] To achieve the above objectives, in a first aspect, an embodiment of the present application provides a frequency modulation method for an electronic device, comprising:

[0008] Obtain a first computing power difference and a first frequency point value of the processor in a first frequency modulation period, where the first computing power difference is positively correlated with a difference between a load duty cycle of the processor in the first frequency modulation period and a target load duty cycle; determine a second frequency point value of the processor in a second frequency modulation period based on the first computing power difference and the first frequency point value, where the second frequency modulation period is after the first frequency modulation period; and adjust the frequency point value of the processor in the second frequency modulation period based on the second frequency point value.

[0009] In an embodiment of the present application, the first computing power difference and the first frequency point value of the processor in the first frequency modulation period can be obtained. Since the first computing power difference is positively correlated with the difference between the load duty cycle of the processor in the first frequency modulation period and the target load duty cycle, and the load duty cycle can be used as a load measurement value of the processor in the first frequency modulation period, the first computing power difference can indicate the difference between the computing power actually provided by the processor in the first frequency modulation period and the target computing power. The second frequency point value of the processor in the second frequency modulation period is determined by the first computing power difference and the first frequency point value of the processor in the first frequency modulation period. In the second frequency modulation period, the frequency point value of the processor is adjusted based on the second frequency point value, which can improve the flexibility and accuracy of frequency modulation, realize the on-demand supply of the frequency point value of the processor, and have a fast response speed. It improves the problem of oversupply and undersupply of frequency point values, and does not require the frequency increase scenario to be set in advance, and has good generalization.

[0010] In some embodiments, the electronic device includes a single-core processor chip encapsulated with a single processor core, and the processor may refer to the single-core processor chip or the processor core in the single-core processor chip. In some embodiments, the electronic device includes a multi-core processor chip encapsulated with multiple processor cores, and the processor may refer to any one of the processor cores in the multi-core processor chip.

[0011] In some embodiments, obtaining the first computing power difference of the processor in the first frequency modulation period includes: obtaining the number of clock cycles consumed by the processor to execute instructions in the first frequency modulation period; determining the load duty cycle of the processor in the first frequency modulation period based on the number of clock cycles; and determining the first computing power difference based on the load duty cycle and the target load duty cycle.

[0012] In some embodiments, obtaining the number of clock cycles consumed by the processor to execute instructions within the first frequency modulation period includes: obtaining the number of clock cycles consumed by the processor to execute instructions within the first frequency modulation period through a performance monitoring unit (PMU) or a register.

[0013] In some implementations, the PMU may implement counting of performance data through registers.

[0014] A clock cycle, also known as a clock_cycle or a tick, is the reciprocal of the clock frequency. A processor's frequency determines the maximum number of clock cycles it can generate within a given timeframe. A higher frequency increases the maximum number of clock cycles a processor can generate within a given timeframe, meaning the processor can complete more instructions at the same efficiency.

[0015] The number of clock cycles consumed by the processor in each frequency modulation cycle is obtained through hardware such as the PMU or a PMU register, so that the load condition of the processor in each frequency modulation cycle can be determined more accurately.

[0016] In some implementations, the frequency modulation (FM) cycle can be divided using a tick. The tick is a relative unit of time in the operating system, derived from the periodic interrupts (output pulses) of a timer, with each interrupt representing a tick. A tick can be set to the duration of a FM cycle. During each FM cycle, a processor register continuously collects the number of clock cycles consumed by the processor and determines whether the tick has been reached. If not, the processor continues to collect the number of clock cycles consumed. If so, the subsequent steps are executed.

[0017] In some embodiments, determining the second frequency point value of the processor in the second frequency modulation period based on the first computing power difference and the first frequency point value includes: determining the second frequency point value of the processor in the second frequency modulation period based on at least one of the first computing power difference and the first frequency point value, and the second computing power difference and the sum of the computing power difference of the processor in at least one historical frequency modulation period, wherein the second computing power difference is the computing power difference of the processor in the third frequency modulation period, and the third frequency modulation period is before the first frequency modulation period.

[0018] In some implementations, the at least one historical frequency modulation period may include a first frequency modulation period and a third frequency modulation period.

[0019] In some embodiments, the method further includes: starting from the moment when the first frequency modulation period ends, if the second frequency point value of the processor in the second frequency modulation period is not determined within the first time period based on the first computing power difference and the first frequency point value, and the second computing power difference and the sum of the computing power difference of the processor in the at least one historical frequency modulation period, then deleting the first computing power difference, the first frequency point value, the second computing power difference and the sum of the computing power difference of the processor in the at least one historical frequency modulation period.

[0020] In some embodiments, the first duration is an integer multiple of the frequency modulation period. For example, if the frequency modulation period is 4 ms, the first duration may be 5 times the frequency modulation period, i.e., 20 ms.

[0021] If the processor's second frequency value for the second frequency modulation cycle is not determined within the first duration from the moment the first frequency modulation cycle ends, this indicates that the duration from the end of the first frequency modulation cycle to the current second duration is greater than or equal to the preset first duration, i.e., the first frequency modulation cycle is significantly longer than the current moment, and the load conditions and service scenarios of the electronic device may have significantly changed. Therefore, based on data such as the number of clock cycles and computing power in historical frequency modulation cycles including the first frequency modulation cycle, it is difficult to accurately determine the frequency value of the processor in frequency modulation cycles after the current moment. Therefore, the first computing power difference, the first frequency value, the second computing power difference, and the sum of the computing power difference of the processor in at least one historical frequency modulation cycle can be deleted. Alternatively, it can be understood as initializing the first computing power difference, the first frequency value, the second computing power difference, and the sum of the computing power difference of the processor in at least one historical frequency modulation cycle.

[0022] In some embodiments, determining the second frequency value of the processor in the second frequency modulation period based on the first computing power difference and the first frequency value includes: determining the second frequency value of the processor in the second frequency modulation period based on a closed-loop feedback loop type algorithm, the first computing power difference and the first frequency value, the closed-loop feedback loop type algorithm including proportional control, and at least one of integral control and differential control.

[0023] In some embodiments, the processor's first computing power difference in the first frequency modulation period can implement proportional control of the frequency point value. As the first computing power difference increases, the proportional control effect becomes greater, and the difference between the second frequency point value and the first frequency point value also increases, allowing the processor's actual computing power to match the load more quickly. As the first computing power difference decreases, the proportional control effect becomes smaller, and the difference between the second frequency point value and the first frequency point value also decreases, avoiding overmodulation.

[0024] In some embodiments, the processor can implement integral control of the frequency point value by summing the difference in computing power during at least one historical frequency modulation cycle prior to the second frequency modulation cycle. The larger the sum of the computing power differences, the greater the integral control effect, thereby reducing static error; and the smaller the sum of the computing power differences, the smaller the integral control effect, thereby avoiding integral saturation.

[0025] In some embodiments, the difference between the processor's first computing power difference in the first frequency modulation cycle and the processor's second computing power difference in the third frequency modulation cycle can reflect the rate of change of the computing power difference. The third frequency modulation cycle can precede the first frequency modulation cycle. When the rate of change is greater, the differential control effect is greater, and the difference between the first and second frequency points is also greater, allowing the processor's actual computing power to match the load more quickly. When the rate of change is smaller, the differential control effect is smaller, and the difference between the first and second frequency points is also smaller, avoiding overshoot.

[0026] In some embodiments, the third frequency modulation period may be a frequency modulation period before the first frequency modulation period, the second frequency modulation period may be a frequency modulation period after the first frequency modulation period, and the time interval between the third frequency modulation period and the first frequency modulation period, and the time interval between the first frequency modulation period and the second frequency modulation period, is less than five times the frequency modulation period. For example, the frequency modulation period is 4 ms, and the time interval between the third frequency modulation period and the first frequency modulation period, and the time interval between the first frequency modulation period and the second frequency modulation period, are both less than 20 ms.

[0027] In some embodiments, adjusting the frequency value of the processor based on the second frequency value during the second frequency modulation period includes: setting the frequency value of the processor to the second frequency value during the second frequency modulation period.

[0028] In some implementations, the second frequency value may serve as a frequency reference value, and the electronic device may determine whether to set the frequency value of the processor to the second frequency value in the second frequency modulation period through a pre-set decision method.

[0029] In a second aspect, an embodiment of the present application provides a frequency modulation method for an electronic device, including: a frequency modulation method for an electronic device, including: identifying a business scenario of the electronic device; in response to the business scenario being a specific scenario, obtaining a first computing power difference and a first frequency point value of the processor in a first frequency modulation cycle, the first computing power difference being positively correlated with the difference between the load duty cycle of the processor in the first frequency modulation cycle and the target load duty cycle; based on the first computing power difference and the first frequency point value, determining a second frequency point value of the processor in a second frequency modulation cycle, the second frequency modulation cycle being after the first frequency modulation cycle; in the second frequency modulation cycle, adjusting the frequency point value of the processor based on the second frequency point value.

[0030] In an embodiment of the present application, the business scenario in which the electronic device is located can be identified, and when the electronic device is in a specific scenario, the frequency value of the processor can be supplied on demand, with a fast response speed, thereby improving the problem of oversupply and undersupply of frequency value.

[0031] In some embodiments, the specific scenario includes any one of the following: launching an application, opening a status bar, switching a display interface, responding to an input operation, displaying an animation effect, and displaying a virtual keyboard.

[0032] Launching an application can include cold launching or hot launching. When launching an application, if there is no background process for the application in the electronic device, the electronic device will create a new process and assign it to the application. When hot launching an application, if there is already a background process for the application, the application can be launched from the existing process.

[0033] The status bar can be used to display the operating status of the electronic device, such as network mode, message notification mode, brightness, volume, etc. Users can query or configure the operating status of the electronic device by opening the status bar.

[0034] Switching the display interface may include switching between any multiple display interfaces of the electronic device. In some embodiments, switching the display interface may include switching the display interface within an application, or may include switching the display interface between applications.

[0035] The input operation can be used for a user or other external object to input data into the electronic device. In some embodiments, the input operation can include a click operation or a touch operation on the display screen.

[0036] Displaying animation effects can be used to provide users with a more realistic and dynamic visual experience. In some embodiments, corresponding animation effects can be displayed in response to user operations. For example, dynamic switching effects when switching display interfaces.

[0037] The virtual keyboard can be used to receive text and other data input by the user.

[0038] In a third aspect, embodiments of the present application provide a frequency modulation device for an electronic device, which has the function of implementing the electronic device behavior in the above-mentioned aspects and possible implementations of the above-mentioned aspects. The functions can be implemented through hardware or by hardware executing corresponding software implementations. The hardware or software includes one or more modules or units corresponding to the above-mentioned functions. For example, a transceiver module or unit, a processing module or unit, an acquisition module or unit, etc.

[0039] In a fourth aspect, an embodiment of the present application provides an electronic device, comprising: a memory and a processor, the memory being used to store a computer program; and the processor being used to execute any one of the methods described in the first aspect above when calling the computer program.

[0040] In a fifth aspect, an embodiment of the present application provides a chip system, which includes a processor coupled to a memory, and the processor executes a computer program stored in the memory to implement any method described in the first aspect above.

[0041] The chip system may be a single chip or a chip module composed of multiple chips.

[0042] In a sixth aspect, an embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon, which implements any of the methods described in the first aspect when the computer program is executed by a processor.

[0043] In a seventh aspect, an embodiment of the present application provides a computer program product. When the computer program product is run on an electronic device, the electronic device executes any one of the methods described in the first aspect.

[0044] It can be understood that the beneficial effects of the third to seventh aspects mentioned above can be found in the relevant descriptions in the first or second aspect mentioned above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] FIG1 is a schematic structural diagram of an electronic device provided in an embodiment of the present application;

[0046] FIG2 is a schematic diagram of a load following curve provided in an embodiment of the present application;

[0047] FIG3 is a flow chart of a frequency modulation method for an electronic device provided in an embodiment of the present application;

[0048] FIG4 is a flow chart of another frequency modulation method for an electronic device provided in an embodiment of the present application;

[0049] FIG5 is a flow chart of another frequency modulation method for an electronic device provided in an embodiment of the present application;

[0050] FIG6 is a flow chart of another frequency modulation method for an electronic device provided in an embodiment of the present application;

[0051] FIG7 is a schematic diagram of another load following curve provided in an embodiment of the present application. DETAILED DESCRIPTION

[0052] The processor frequency modulation method provided in the embodiments of the present application can be applied to electronic devices such as mobile phones, tablet computers, wearable devices, in-vehicle devices, augmented reality (AR) / virtual reality (VR) devices, laptop computers, ultra-mobile personal computers (UMPCs), netbooks, and personal digital assistants (PDAs). The embodiments of the present application do not impose any restrictions on the specific types of electronic devices.

[0053] 1 is a schematic diagram of the structure of an electronic device 100 according to an embodiment of the present application. The electronic device 100 may include a processor 110, a memory 120, a communication module 130, and the like.

[0054] The memory 120 is used to store program code and data. In embodiments of the present application, the processor 110 can execute computer-executable instructions stored in the memory 120 to control and manage the operation of the electronic device 100. The frequency value (also known as frequency) of the processor 110 is the number of times the processor 110 clock cycle runs in one second. The processor 110 can run one operation in each clock cycle. Therefore, the larger the frequency value of the processor 110, the faster the processor 110's operation speed and better performance, but also the higher the power consumption. In some embodiments, the electronic device 100 may include one or more processors 110. In some embodiments, the electronic device 100 may include one or more frequency modulation strategies. Based on these frequency modulation strategies, the electronic device 100 may adjust the frequency value of one or more processors 110 to achieve the purpose of balancing the power consumption and performance of the electronic device 100. In some embodiments, the electronic device 100 includes a single-core processor chip, which is packaged with a processor core. The processor 110 may refer to the single-core processor chip or a processor core in the single-core processor chip. In some embodiments, the electronic device 100 includes a multi-core processor chip on which multiple processor cores are packaged, and the processor 110 may refer to any one of the processor cores in the multi-core processor chip.

[0055] The communication module 130 can be used for communication between various internal modules of the electronic device 100, or communication between the electronic device 100 and other external electronic devices. For example, if the electronic device 100 communicates with other electronic devices via a wired connection, the communication module 130 may include an interface, such as a USB interface. The USB interface may be an interface that complies with USB standard specifications, specifically a Mini USB interface, a Micro USB interface, a USB Type C interface, etc. The USB interface can be used to connect a charger to charge the electronic device 100, and can also be used to transmit data between the electronic device 100 and peripheral devices. It can also be used to connect headphones to play audio through the headphones. The interface can also be used to connect other electronic devices, such as AR devices.

[0056] Alternatively, the communication module 130 may include an audio device, a radio frequency circuit, a Bluetooth chip, a wireless fidelity (Wi-Fi) chip, a near-field communication (NFC) module, etc., and can realize the interaction between the electronic device 100 and other electronic devices in a variety of different ways.

[0057] Optionally, the electronic device 100 may further include a performance detection unit 140. The performance detection unit may directly collect corresponding events from various hardware such as the processor, and may also be associated with software to optimize the hardware or operating system. The performance detection unit 140 may include a register 141, which may be used to record raw hardware events. In some embodiments, the register 141 may record the number of clock cycles consumed by the processor 110. In some embodiments, the performance detection unit 140 may further include a counter, and when detecting raw hardware events, the register 141 may specifically count the number of a certain type of raw detection event through the counter. In some embodiments, the register 141 may also be referred to as a PMU register.

[0058] Optionally, the electronic device 100 may further include a display screen 150 , which may display images or videos in a human-computer interaction interface.

[0059] Optionally, the electronic device 100 may further include a peripheral device 160 , such as a mouse, a keyboard, a speaker, a microphone, and the like.

[0060] It should be understood that, other than the various components or modules listed in FIG1 , the embodiments of the present application do not specifically limit the structure of the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown, or combine or separate certain components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0061] In order to facilitate understanding of the technical solutions in the embodiments of the present application, the application scenarios of the embodiments of the present application are first introduced below.

[0062] The processor's frequency, also known as the clock frequency, is the processor's clock rate, which can be understood as the processor's operating frequency during operations. The higher the frequency, the faster the processor's operation speed.

[0063] A clock cycle, also known as a clock cycle or a tick, is the reciprocal of the clock frequency. A clock cycle is the basic unit of time in electronic devices. Within one clock cycle, an electronic device can complete only one "micro-operation" or several compatible "micro-operations" (non-conflicting and non-interfering micro-operations on the data path). A collection of multiple "micro-operations" constitutes an instruction. The processor's frequency determines the maximum number of clock cycles a processor can generate in a given timeframe. A higher frequency increases the maximum number of clock cycles a processor can generate, meaning it can complete more instructions at the same efficiency. However, it should be understood that the number of clock cycles a processor actually consumes to execute instructions in the same timeframe can be positively correlated with the processor's load and can be less than the maximum number of clock cycles it can generate. For example, a processor with a frequency of 2 GHz can generate a maximum of 2,000,000 clock cycles in 1 millisecond, but the number of clock cycles the processor actually consumes to execute instructions in that 1 millisecond may be less than 2,000,000.

[0064] Processor frequency modulation is a technology that rationally configures the processor frequency value according to the processor load. Its purpose is to make the processor performance meet the current load requirements without generating unnecessary power waste.

[0065] The following describes several exemplary frequency-increasing strategies, using the diagram of a processor load following curve shown in Figure 2. In Figure 2, Curve 1 is the processor load curve, Curve 2 is the frequency point value curve corresponding to Frequency Adjustment Strategy 1, and Curve 3 is the frequency point value curve corresponding to Frequency Adjustment Strategy 2.

[0066] In some frequency modulation strategies (i.e., frequency modulation strategy one), one or more frequency-increasing scenarios (e.g., boost scenarios) can be set in advance, such as application cold start, sliding operation, click-to-switch operation, etc. When the electronic device is running, the current business scenario can be identified. When the business scenario is a pre-set frequency-increasing scenario, the frequency value of the processor is increased to a fixed frequency value and maintained for a fixed duration. However, under this frequency modulation strategy, since the frequency value of the processor is increased to a fixed frequency value and maintained for a fixed duration, and the fixed frequency value and fixed duration do not completely match the current business scenario, the frequency value may be too high and the frequency-increasing time may be too long (i.e., oversupply), which may lead to problems such as excess computing power of the processor, waste of power consumption, and heat generation. The frequency value may also be too low or the frequency-increasing time may be too short, which cannot meet the needs of the current business scenario (i.e., undersupply). For example, if the business scenario lasts longer than the frequency-increasing time, problems such as freezing and loss of response may occur, resulting in a poor performance experience. In addition, long-term use of this frequency modulation strategy may also cause the electronic equipment to heat up severely, leading to more serious problems such as frequency reduction, reduced display resolution, reduced refresh rate, reduced brightness, and loose bonding structures between components, further affecting the user experience.

[0067] In some frequency modulation strategies (i.e., frequency modulation strategy 2), the processor load can be determined through the window assist load tracking algorithm (WALT). When the processor load reaches a preset value, the processor frequency value is increased. WALT can use the time length window as a unit, and based on the load of N windows in the processor history, predict the processor load in the next window and output the frequency value. The default window used by the open source community is currently 20ms (milliseconds). However, the response speed of this frequency modulation strategy is very slow. In the case of sudden high load, the processor frequency cannot be increased in time, resulting in insufficient processor computing power and poor performance experience. After the load decreases, the frequency cannot be reduced in time, resulting in waste of power consumption.

[0068] To address at least some of the above-mentioned technical issues, the present application provides a frequency modulation method for an electronic device. The frequency modulation strategy employed in this frequency modulation method can be referred to as frequency modulation strategy three. Frequency modulation strategy three can determine the processor's frequency value through closed-loop feedback loop algorithms such as PID (compound control of proportional, integral, and differential superposition), PI (proportional integral control), and PD (proportional differential control), improving the flexibility and accuracy of frequency modulation. This allows for on-demand supply of the processor's frequency value, resulting in a fast response speed and improved frequency over- and under-supply issues. It also eliminates the need to identify frequency-increasing scenarios in advance to set the corresponding frequency modulation strategy, demonstrating excellent generalizability. Frequency modulation strategy three can determine the processor load by obtaining the number of clock cycles consumed by the processor to execute instructions through the PMU, improving the accuracy of processor load measurement and, consequently, the accuracy of processor frequency modulation. The technical solutions of this application are described in detail below using specific embodiments. The following specific embodiments may be combined with one another, and identical or similar concepts or processes may not be described in detail in some embodiments.

[0069] Please refer to Figure 3, which is a flow chart of a frequency modulation method for an electronic device provided in an embodiment of the present application. This method can be used for an electronic device to frequency modulate a processor in a single frequency modulation cycle. It should be noted that this method is not limited to the specific sequence described in Figure 3 and below. It should be understood that in other embodiments, the order of some steps in this method can be interchanged according to actual needs, or some steps can be omitted or deleted. The method includes the following steps:

[0070] S301: A processor register collects the number of clock cycles consumed by the processor.

[0071] A processor is any processor in an electronic device.

[0072] During operation, a processor can execute one or more instructions, each of which can be broken down into multiple "micro-operations." Each micro-operation consumed by the processor consumes one clock cycle. As you can see, the greater the processor load, the more instructions it executes, and accordingly, the greater the number of clock cycles consumed.

[0073] In some embodiments, a processor register may be a data storage area used by the processor to temporarily store computational data and results, as well as information required for processor operation. In some embodiments, the register may be a PMU register. By collecting the number of clock cycles consumed by the processor through the register, the processor load can be assessed using hardware information.

[0074] S302: The electronic device determines whether the first frequency modulation period has ended, and if so, executes S303; otherwise, returns to S301.

[0075] If the first frequency modulation period has not yet ended, step S301 may be executed again, i.e., the number of clock cycles consumed by the processor may continue to be collected. If the first frequency modulation period has ended, it indicates that the number of clock cycles consumed by the processor in the first frequency modulation period has been counted, and the subsequent steps may be continued.

[0076] In some embodiments, the duration of the frequency modulation period can be pre-set. For example, a frequency modulation period can be 4 ms. Of course, in actual applications, the duration of the frequency modulation period can also be other values. The embodiments of the present application do not limit the method for setting the frequency modulation period or the specific duration of the frequency modulation period.

[0077] In some implementations, the frequency modulation (FM) cycle can be divided by a tick. The tick is a relative unit of time in the operating system, derived from the periodic interrupts (output pulses) of a timer. Each interrupt represents a tick, also known as a "clock tick" or a time scale. A tick can be set to the duration of a FM cycle. During each FM cycle, a processor register continuously collects the number of clock cycles consumed by the processor and determines whether the tick has been reached. If not, the processor continues to collect the number of clock cycles consumed. If so, the processor continues to execute subsequent steps.

[0078] S303: The electronic device obtains and stores the number of clock cycles consumed by the processor in the first frequency modulation period.

[0079] In some implementations, the electronic device may obtain the number of clock cycles consumed by the processor in the first frequency modulation period through the PMU or a PMU register.

[0080] Through S301-S303, the number of clock cycles consumed by the processor in each frequency modulation cycle is obtained through hardware, thereby more accurately determining the load of the processor in each frequency modulation cycle. It is understood that in actual applications, other methods can also be used to obtain the number of clock cycles consumed by the processor in each frequency modulation cycle, or other methods can be used to determine the load of the processor in each frequency modulation cycle.

[0081] S304: The electronic device determines whether to update the frequency value of the processor in the second frequency modulation period. If yes, S305 is executed; otherwise, S308 is executed.

[0082] In some examples, the second frequency modulation period may be after the first frequency modulation period. In some implementations, the second frequency modulation period may be a frequency modulation period subsequent to the first frequency modulation period.

[0083] Adjusting the processor's frequency affects both processor performance and power consumption. For example, increasing the frequency results in higher processor performance, but also higher power consumption. Therefore, electronic devices can determine whether to update the processor's frequency for each frequency modulation cycle based on a pre-set power consumption policy. For example, if the electronic device is in energy-saving mode or has a low remaining battery life, the processor's frequency may not be adjusted to improve battery life.

[0084] It is understandable that in actual applications, electronic devices may also determine whether to update the frequency value of the processor's next frequency modulation cycle for other reasons and through other methods. The embodiments of the present application do not limit the reasons for determining whether to update the frequency value of the processor's next frequency modulation cycle and the specific determination method.

[0085] In some implementations, S304 may be omitted or skipped. That is, the electronic device may always update the frequency point value of the processor in each frequency modulation cycle.

[0086] S305: The electronic device determines a load duty cycle of the processor in the first frequency modulation period based on the number of clock cycles consumed by the processor in the first frequency modulation period.

[0087] In some examples, the load duty cycle of a processor may indicate how busy the processor is during a period of time, or in other words, the load duty cycle may be a measure of the load of the processor during the period of time. The load duty cycle may be expressed as a percentage.

[0088] A larger duty cycle indicates that the processor is busier, or more loaded, during the first frequency modulation period. As previously mentioned, obtaining the number of clock cycles consumed by the processor during the first frequency modulation period through hardware can more accurately determine the processor's load during the first frequency modulation period. Therefore, based on the number of clock cycles consumed by the processor during the first frequency modulation period, the duty cycle of the processor during the first frequency modulation period can also be more accurately determined.

[0089] In some implementations, the load duty cycle of the processor in the first frequency modulation period can be determined by the following formula 1: cpu_usage=clock_cycles*1024 / avg_freq (Formula 1)

[0090] In some examples, cpu_usage represents the load duty cycle of the processor in the first frequency modulation period; clock_cycles represents the number of clock cycles consumed by the processor in the first frequency modulation period; avg_freq represents the average frequency value of the processor in the first frequency modulation period. Since the electronic device may adjust the frequency value of the processor based on other reasons (such as other frequency modulation strategies) during the operation of the processor, avg_freq may be different from the first frequency value of the processor in the first frequency modulation period.

[0091] It is understandable that the load duty cycle of the processor in the first frequency modulation period may also be determined in other ways.

[0092] S306: The electronic device determines a first computing power difference of the processor in the first frequency modulation period based on the load duty cycle of the processor in the first frequency modulation period and the target load duty cycle.

[0093] In some embodiments, the target load duty cycle can be obtained by presetting. For example, the target load duty cycle can be 75%, that is, targetload is 1024*75%. It is understood that in actual applications, the target load duty cycle can also be set by other methods, and the target load duty cycle can also be other values. The embodiments of the present application do not limit the method for setting the target load duty cycle and the specific value of the target load duty cycle.

[0094] In some implementations, the first computing power difference of the processor in the first frequency modulation period can be determined by the following formula 2: error = compu * cpu_usage / targetload - compu (Formula 2)

[0095] In some examples, error represents the first computing power difference; compu represents the actual computing power of the processor in the first frequency modulation period, which can be determined based on the first frequency point value of the processor in the first frequency modulation period; and compu * cpu_usage / targetload represents the target computing power. As shown in Formula 2, the first computing power difference is positively correlated with the difference between the processor's load duty cycle in the first frequency modulation period and the target load duty cycle.

[0096] In some embodiments, a load duty cycle difference between a load duty cycle of the processor in the first frequency modulation period and a target load duty cycle can be determined, and based on the load duty cycle difference, a first computing power difference can be determined from a stored mapping relationship between the load duty cycle difference and the computing power difference.

[0097] In some embodiments, the electronic device may obtain and store the mapping relationship between the load duty cycle difference and the computing power difference. The mapping relationship may be represented in a table. For example, the mapping relationship may include multiple load duty cycle differences and the computing power difference corresponding to each load duty cycle difference. In some embodiments, the mapping relationship may be represented by a function. For example, computing power difference = A*(load duty cycle difference), where A may be a predetermined parameter. It is understandable that in actual applications, the electronic device may also obtain the mapping relationship between the load duty cycle difference and the computing power difference in other ways, and the mapping relationship between the load duty cycle difference and the computing power difference may also be represented in other ways.

[0098] It is understandable that, in practical applications, the first computing power difference of the processor in the first frequency modulation period may also be determined in other ways.

[0099] As can be seen from the above, the load duty cycle of the processor can indicate the busyness of the processor over a period of time, and the first computing power difference is positively correlated with the difference between the load duty cycle of the processor in the first frequency modulation period and the target load duty cycle. When the load duty cycle of the processor in the first frequency modulation period is greater than the target load duty cycle, the first computing power difference is greater than 0, which can indicate that the actual computing power of the processor in the first frequency modulation period is insufficient and cannot meet the load demand. When the load duty cycle of the processor in the first frequency modulation period is less than the target load duty cycle, the first computing power difference is less than 0, which can indicate that the actual computing power of the processor in the first frequency modulation period overflows and can meet the load demand, and the overflow computing power may waste part of the power consumption.

[0100] S307: The electronic device determines a second frequency point value in a second frequency modulation period based on a closed-loop feedback loop algorithm and the first computing power difference.

[0101] A closed-loop feedback loop algorithm can include three components: proportional control (P), integral control (I), and differential control (D). These components can be used individually or in combination. The proportional control component can generate control by adjusting the error between the system input and the set value. The integral control component can generate control based on the cumulative error between the system output and the set value. The differential control component can generate control based on the rate of change of the system output. The combination of proportional control, integral control, and differential control can achieve precise control of the system. Closed-loop control refers to a control method that uses the system output as a feedback signal, compares it with the set value, and then adjusts it. It can continuously provide feedback on the system output, thereby promptly correcting deviations and enabling the system to better utilize changes. In some embodiments, the closed-loop feedback loop algorithm can include proportional control (P) and at least one of proportional-integral control (I) and proportional-differential control (D). In some embodiments, the closed-loop feedback loop algorithm can include proportional-integral-differential (PID), proportional-integral control (PI), or proportional-differential control (PD). In some embodiments, the proportional-integral-differential (PID) compound control can specifically be position-based proportional-integral-differential (PID) compound control.

[0102] In some embodiments, the frequency value of the processor can be controlled by a closed-loop feedback loop based on the first computing power difference of the processor in the first frequency modulation cycle, or in combination with the computing power difference or the sum of the computing power differences of more frequency modulation cycles before the second frequency modulation cycle, so as to obtain the second frequency value of the processor in the second frequency modulation cycle, thereby improving the flexibility and accuracy of the frequency modulation, realizing on-demand supply of the frequency value of the processor, fast response speed, improving the problem of oversupply and undersupply of the frequency value, and no need to set the frequency increase scenario in advance, with good generalization.

[0103] In some embodiments, the processor's first computing power difference in the first frequency modulation period can implement proportional control of the frequency point value. As the first computing power difference increases, the proportional control effect becomes greater, and the difference between the second frequency point value and the first frequency point value also increases, allowing the processor's actual computing power to match the load more quickly. As the first computing power difference decreases, the proportional control effect becomes smaller, and the difference between the second frequency point value and the first frequency point value also decreases, avoiding overmodulation.

[0104] In some embodiments, the processor can implement integral control of the frequency point value by summing the difference in computing power during at least one historical frequency modulation cycle prior to the second frequency modulation cycle. The larger the sum of the computing power differences, the greater the integral control effect, thereby reducing static error; and the smaller the sum of the computing power differences, the smaller the integral control effect, thereby avoiding integral saturation.

[0105] In some embodiments, the difference between the processor's first computing power difference in the first frequency modulation cycle and the processor's second computing power difference in the third frequency modulation cycle can reflect the rate of change of the computing power difference. The third frequency modulation cycle can precede the first frequency modulation cycle. When the rate of change is greater, the differential control effect is greater, and the difference between the first and second frequency points is also greater, allowing the processor's actual computing power to match the load more quickly. When the rate of change is smaller, the differential control effect is smaller, and the difference between the first and second frequency points is also smaller, avoiding overshoot.

[0106] In addition, the manner in which the electronic device determines the second frequency point value in the second frequency modulation period based on the closed-loop feedback loop algorithm and the first computing power difference can also be referred to in detail in the following embodiments.

[0107] S308, the electronic device decides whether to adjust the frequency.

[0108] In some implementations, if the electronic device determines through S304 not to update the frequency value of the processor in the second frequency modulation period, the frequency value of the processor may not be adjusted in the second frequency modulation period.

[0109] In some embodiments, if the electronic device determines the second frequency value of the processor in the second frequency modulation period through S305-S307, the frequency value of the processor can be adjusted based on the second frequency value during the second frequency modulation period. In some embodiments, the electronic device can set the frequency value of the processor to the second frequency value during the second frequency modulation period.

[0110] In some embodiments, the second frequency value can serve as a frequency reference value, and the electronic device can determine whether to set the frequency value of the processor to the second frequency value during the second frequency modulation period using a pre-set decision method. For example, the electronic device includes multiple processors, and the frequency values ​​of the multiple processors during the second frequency modulation period are determined using the same or similar method as described above in S301-S307. The electronic device can obtain a maximum frequency value from the multiple frequency values ​​and set the frequency values ​​of the multiple processors as the maximum frequency value during the second frequency modulation period.

[0111] In some embodiments, the third frequency modulation period may be a frequency modulation period before the first frequency modulation period, the second frequency modulation period may be a frequency modulation period after the first frequency modulation period, and the time interval between the third frequency modulation period and the first frequency modulation period, and the time interval between the first frequency modulation period and the second frequency modulation period, is less than five times the frequency modulation period. For example, the frequency modulation period is 4 ms, and the time interval between the third frequency modulation period and the first frequency modulation period, and the time interval between the first frequency modulation period and the second frequency modulation period, are both less than 20 ms.

[0112] In an embodiment of the present application, a closed-loop feedback loop algorithm can be used, as well as the processor's first computing power difference and first frequency point value in the first frequency modulation period, to determine the processor's second frequency point value in the second frequency modulation period, thereby improving the flexibility and accuracy of frequency modulation, enabling on-demand supply of the processor's frequency point value, and achieving fast response speed. This improves the problem of oversupply and undersupply of frequency point values, eliminates the need to set frequency increase scenarios in advance, and has good generalization. Furthermore, the number of processor clock cycles can be obtained from a register, and then the processor's first computing power difference can be determined based on the number of clock cycles, thereby improving the accuracy of determining the processor's load condition and, in turn, improving the accuracy of frequency modulation of the processor.

[0113] Please refer to Figure 4, which is a flow chart of a frequency modulation method for an electronic device provided in an embodiment of the present application. As shown in Figure 4, the electronic device may include a frequency modulation strategy service and a closed-loop feedback frequency modulation service, and the frequency modulation method may be implemented through the interaction between these two services.

[0114] The frequency modulation policy service is an upper-level entry point for providing frequency modulation services to electronic devices. The frequency modulation policy service can obtain multiple data related to the processor (such as the processor identifier and the number of processor clock cycles) and provide this data to one or more frequency modulation services, which then obtain the frequency value corresponding to the processor from the one or more frequency modulation services.

[0115] The closed-loop feedback frequency modulation service can be one of the one or more frequency modulation services. The closed-loop feedback frequency modulation service can obtain multiple data related to the processor from the frequency modulation strategy service, determine the frequency point value corresponding to the processor based on the closed-loop feedback loop type algorithm and the multiple data, and return the frequency point value to the frequency modulation strategy service. In some embodiments, the closed-loop feedback frequency modulation service may include multiple computing interfaces, each of which can be used to implement a type of calculation. Exemplarily, the closed-loop feedback frequency modulation service may include a load duty cycle interface, a computing power difference interface, and a frequency point value interface. The load duty cycle interface can be used to calculate the load duty cycle of the processor, the computing power difference interface can be used to calculate the computing power difference of the processor, and the frequency point value interface can be used to calculate the frequency point value corresponding to the processor based on the closed-loop feedback loop type algorithm.

[0116] The following will specifically describe how to implement the frequency modulation method of the processor through the frequency modulation strategy service and the closed-loop feedback frequency modulation service. It is understood that in actual applications, the implementation of this method is not limited to the method shown in Figure 4. It should also be noted that this method is not limited to the specific sequence shown in Figure 4 and the following. It should be understood that in other embodiments, the order of some steps in this method can be interchanged according to actual needs, or some steps can be omitted or deleted. The method includes the following steps:

[0117] S401, the frequency modulation policy service calls the closed-loop feedback frequency modulation service, and inputs the processor identifier (cpu_id), the frequency modulation policy identifier (flags), and the number of clock cycles (clock_cycles) consumed by the processor in the first frequency modulation period.

[0118] In some examples, the processor identification and frequency scaling policy identification may be omitted.

[0119] The processor identifier is used to indicate the identity of the processor. When an electronic device includes multiple processors, the processor identifier can be used to distinguish between different processors. The processor identifier can include a character or string. In some embodiments, the processor identifier can be set by the processor manufacturer, or it can be configured by the user or other relevant technical personnel.

[0120] The frequency modulation strategy identifier can be used to indicate a frequency modulation strategy. When an electronic device includes multiple frequency modulation strategies, the frequency modulation strategy identifier can be used to distinguish different frequency modulation strategies. The frequency modulation strategy identifier can include characters or character strings. For example, in addition to the closed-loop feedback frequency modulation service, the electronic device also includes two other frequency modulation services. These three frequency modulation services correspond to a frequency modulation strategy respectively, so flags=1, flags=2 and flags=3 can be used to indicate these three frequency modulation services respectively. If flags=1 indicates the closed-loop feedback frequency modulation service, the frequency modulation strategy service can call the closed-loop feedback frequency modulation service by setting flags to 1.

[0121] It should be noted that the manner in which the frequency modulation policy service obtains the number of clock cycles consumed by the processor in the first frequency modulation period can be found in the related descriptions in the aforementioned S301-S303.

[0122] S402, the closed-loop feedback frequency modulation service is started, and the processor identifier (cpu_id), the number of clock cycles (clock_cycles) consumed by the processor in the first frequency modulation period, and the second time length from the end of the first frequency modulation period to the current period are transmitted to the load duty cycle interface.

[0123] In some examples, the processor identifier and the second duration from the end of the first frequency modulation cycle to the present time can be omitted.

[0124] In some embodiments, when the second duration from the end of the first frequency modulation cycle to the current moment is less than the preset first duration, subsequent steps may be continued. When the second duration from the end of the first frequency modulation cycle to the current moment is greater than or equal to the preset first duration, this indicates that the first frequency modulation cycle is significantly distant from the current moment, and the load condition and service scenario of the electronic device may have significantly changed. Therefore, based on data such as the number of clock cycles and computing power in historical frequency modulation cycles including the first frequency modulation cycle, it is difficult to accurately determine the frequency point value of the processor's frequency modulation cycle after the current moment, and therefore subsequent steps may be discontinued.

[0125] In some embodiments, when the duration from the end of the first frequency modulation cycle to the current second duration is greater than or equal to the preset first duration, at least a portion of the relevant data used to determine the frequency point value of the processor may be initialized. In some embodiments, from the moment the first frequency modulation cycle ends, if the second frequency point value of the processor in the second frequency modulation cycle is not determined within the first duration based on at least one of the closed-loop feedback loop algorithm, the first computing power difference and the first frequency point value, and the second computing power difference and the sum of the computing power difference of the processor in at least one historical frequency modulation cycle, then the first computing power difference, the first frequency point value, the second computing power difference, and the sum of the computing power difference of the processor in at least one historical frequency modulation cycle are deleted. The at least one historical frequency modulation cycle may include the first frequency modulation cycle and the third frequency modulation cycle, the second computing power difference being the computing power difference of the processor in the third frequency modulation cycle, and the third frequency modulation cycle being before the first frequency modulation cycle.

[0126] In some embodiments, the first duration may be an integer multiple of the frequency modulation period. For example, if the frequency modulation period is 4 ms, the first duration may be 5 times the frequency modulation period, i.e., 20 ms. It is understood that in actual applications, the first duration may also be other values.

[0127] In some embodiments, the closed-loop feedback frequency modulation service may also transmit the current time and frequency modulation period to the load duty cycle interface, and the load duty cycle interface determines the second duration from the end of the first frequency modulation period to the current time based on the current time and frequency modulation period.

[0128] S403, the load duty cycle interface returns the load duty cycle (cpu_usage) to the closed-loop feedback frequency modulation service based on the average frequency value (avg_freq) of the processor in the first frequency modulation period and the number of clock cycles (clock_cycles) consumed by the processor in the first frequency modulation period.

[0129] In some examples, the load duty cycle interface can determine the load duty cycle of the processor in the first frequency modulation period based on the number of clock cycles consumed by the processor in the first frequency modulation period. It should be noted that the manner in which the load duty cycle interface determines the load duty cycle of the processor in the first frequency modulation period based on the number of clock cycles consumed by the processor in the first frequency modulation period can be found in the detailed description of S305 above.

[0130] S404: The closed-loop feedback frequency modulation service transmits the processor identifier (cpu_id), load duty cycle (cpu_usage), and target load duty cycle (targetload) to the computing power difference interface.

[0131] In some examples, the identification of the processor may be omitted.

[0132] S405: The computing power difference interface returns the first computing power difference (error) of the processor in the first frequency modulation cycle to the closed-loop feedback frequency modulation service based on the load duty cycle (cpu_usage) and the target load duty cycle (targetload).

[0133] In some examples, the computing power difference interface can determine a first computing power difference of the processor in the first frequency modulation period based on the target load duty cycle and the load duty cycle. It should be noted that the manner in which the computing power difference interface determines the first computing power difference of the processor in the first frequency modulation period based on the target load duty cycle and the load duty cycle can be described in detail in S306 above.

[0134] S406: The closed-loop feedback frequency modulation service transmits the closed-loop feedback parameters and the first computing power difference (error) to the frequency point value interface.

[0135] In some examples, the closed-loop feedback parameters may be omitted.

[0136] As can be seen from the above, a closed-loop feedback loop algorithm can include three parts: proportional control (p), integral control (i), and differential control (d). Therefore, the closed-loop feedback parameters can include at least one of the proportional adjustment coefficient (kp), the integral adjustment coefficient (ki), and the differential adjustment coefficient (kd). The proportional adjustment coefficient can speed up the system's response, improve the system's adjustment accuracy, and quickly adjust errors. The integral adjustment coefficient can eliminate residual errors and adjust the steady-state time. The differential adjustment coefficient can improve the system's dynamic performance, predict error trends, and correct errors in advance.

[0137] It should be noted that the proportional adjustment coefficient, the integral adjustment coefficient, and the differential adjustment coefficient may be pre-set values. It is also understood that the proportional adjustment coefficient, the integral adjustment coefficient, and the differential adjustment coefficient may be configured and updated by the user, and the embodiments of the present application do not limit the manner in which the proportional adjustment coefficient, the integral adjustment coefficient, and the differential adjustment coefficient are set, or the specific values ​​of the proportional adjustment coefficient, the integral adjustment coefficient, and the differential adjustment coefficient.

[0138] S407: The frequency value interface returns the second frequency value (pid_freq) of the processor in the second frequency modulation period to the closed-loop feedback frequency modulation service based on the closed-loop feedback loop algorithm and the first computing power difference (error).

[0139] The frequency point value interface can determine the second frequency point value of the processor in the second frequency modulation period based on a closed-loop feedback loop algorithm and the first computing power difference.

[0140] In some implementations, the second frequency point value of the processor in the second frequency modulation period can be determined by the following formula 3: pid_freq = last_pid_freq + p_freq + i_freq + d_freq (Formula 3)

[0141] In some examples, pid_freq represents the second frequency point value of the processor in the second frequency modulation cycle; last_pid_freq represents the first frequency point value of the processor in the first frequency modulation cycle; p_freq represents the calculation component of proportional control, p_freq = kp*error; i_freq represents the calculation component of integral control, i_freq = ki*error_sum, error_sum represents the sum of the computing power differences of the processor in at least one historical frequency modulation cycle; d_freq represents the calculation component of differential control, d_freq = kd*(error-last_error), last_error represents the second computing power difference of the processor in the third frequency modulation cycle; at least one of i_freq and d_freq can be omitted.

[0142] As can be seen from Formula 3, the closed-loop feedback loop algorithm can proportionally control the processor's frequency value through the processor's first computing power difference in the first frequency modulation period, integrally control the processor's frequency value through the sum of the processor's computing power differences in at least one historical frequency modulation period, and differentially control the processor's frequency value through the difference between the processor's first computing power difference in the first frequency modulation period and the processor's second computing power difference in the third frequency modulation period. Combined with the closed-loop feedback loop algorithm's fast response and anti-oscillation characteristics, the actual computing power provided by the processor in the second frequency modulation period is more closely matched to the computing power required by the load.

[0143] In some implementations, if the sum of the processor's computing power differences over at least one historical frequency modulation period is greater than or equal to a preset numerical range, the sum of the computing power differences may be scaled to that numerical range to mitigate issues such as integral saturation and inaccurate frequency modulation caused by an excessively large sum of computing power differences. For example, the numerical range may be 1-1024. Of course, in practical applications, the numerical range may also be other ranges.

[0144] S408: The frequency modulation strategy service obtains the second frequency point value (pid_freq) from the closed-loop feedback frequency modulation service and makes a decision.

[0145] When the frequency modulation policy service obtains the second frequency value, a decision may be made based on the second frequency value to determine whether to use the second frequency value as the final frequency value of the processor in the second frequency modulation period.

[0146] In some implementations, the frequency modulation policy service may determine the second frequency value as the final frequency value of the processor in the second frequency modulation period.

[0147] In some embodiments, the second frequency point value can be used as a frequency point reference value, and the frequency modulation strategy service can also determine more frequency point reference values ​​of the processor in the second frequency modulation period through other frequency modulation strategies, and select the largest frequency point reference value from multiple frequency point reference values ​​as the final frequency point value of the processor in the second frequency modulation period.

[0148] In an embodiment of the present application, the frequency modulation algorithm of the processor can be implemented through multiple services and computing interfaces. The closed-loop feedback frequency modulation service can initialize the historical data such as the first computing power difference of the processor in the first frequency modulation cycle when the accumulation time is long, and no longer determine the second frequency point value of the processor in the subsequent second frequency modulation cycle based on these historical data, thereby improving the accuracy of determining the second frequency point value of the processor in the second frequency modulation cycle. The load duty cycle interface can determine the load duty cycle of the processor in the first frequency modulation cycle based on the number of clock cycles of the processor in the first frequency modulation cycle, and the computing power interface can accurately determine the first computing power difference of the processor in the first frequency modulation cycle based on the load duty cycle. Since the number of clock cycles is obtained from the register of the processor, the load duty cycle can more accurately reflect the load situation of the processor, and the first computing power difference can also more accurately reflect the difference between the computing power actually provided by the processor in the first frequency modulation cycle and the computing power required by the load. The frequency point value interface can combine the fast response and anti-oscillation characteristics of the closed-loop feedback loop algorithm to determine the second frequency point value of the second frequency modulation cycle, so that the actual computing power provided by the processor in the second frequency modulation cycle is more closely matched with the computing power required by the load, thereby realizing on-demand supply of processor computing power.

[0149] Please refer to Figure 5, which is a flow chart of a frequency modulation method for an electronic device provided in an embodiment of the present application. This method can be used for an electronic device to frequency modulate a processor in a single frequency modulation cycle. It should be noted that this method is not limited to the specific sequence described in Figure 5 and below. It should be understood that in other embodiments, the order of some steps in this method can be interchanged according to actual needs, or some steps can be omitted or deleted. The method includes the following steps:

[0150] S501: The electronic device obtains a first computing power difference and a first frequency point value of a processor in a first frequency modulation period, where the first computing power difference is positively correlated with a difference between a load duty cycle of the processor in the first frequency modulation period and a target load duty cycle.

[0151] In some examples, the manner in which the electronic device obtains the first computing power difference and the first frequency point value of the processor in the first frequency modulation period can be referred to the relevant description in the aforementioned S301-S306.

[0152] S502: The electronic device determines, based on the first computing power difference and the first frequency value, a second frequency value of the processor in a second frequency modulation period, where the second frequency modulation period is subsequent to the first frequency modulation period.

[0153] In some examples, the electronic device determines the second frequency value of the processor in the second frequency modulation period based on the first computing power difference and the first frequency value. Please refer to the relevant description in the aforementioned S307, or refer to the relevant description in the aforementioned S401-S408.

[0154] S503: The electronic device adjusts the frequency value of the processor based on the second frequency value in the second frequency modulation period.

[0155] In some examples, the manner in which the electronic device adjusts the frequency value of the processor based on the second frequency value during the second frequency modulation period can be referred to the relevant descriptions in the aforementioned S308 and S408.

[0156] In an embodiment of the present application, the first computing power difference and the first frequency point value of the processor in the first frequency modulation period can be obtained. Since the first computing power difference is positively correlated with the difference between the load duty cycle of the processor in the first frequency modulation period and the target load duty cycle, and the load duty cycle can be used as a load measurement value of the processor in the first frequency modulation period, the first computing power difference can indicate the difference between the computing power actually provided by the processor in the first frequency modulation period and the target computing power. The second frequency point value of the processor in the second frequency modulation period is determined by the first computing power difference and the first frequency point value of the processor in the first frequency modulation period. In the second frequency modulation period, the frequency point value of the processor is adjusted based on the second frequency point value, which can improve the flexibility and accuracy of frequency modulation, realize the on-demand supply of the frequency point value of the processor, and have a fast response speed. It improves the problem of oversupply and undersupply of frequency point values, and does not require the frequency increase scenario to be set in advance, and has good generalization.

[0157] Please refer to Figure 6, which is a flow chart of a frequency modulation method for an electronic device provided in an embodiment of the present application. This method can be used for an electronic device to frequency modulate a processor in a single frequency modulation cycle. It should be noted that this method is not limited to the specific sequence described in Figure 6 and below. It should be understood that in other embodiments, the order of some steps in this method can be interchanged according to actual needs, or some steps can be omitted or deleted. The method includes the following steps:

[0158] S601, the electronic device identifies the current business scenario.

[0159] Electronic devices can determine business scenarios based on their current operating status. For example, electronic devices can detect the launch, running, and termination of applications; detect user input operations from input devices such as keyboards and touch screens; and further identify the type of input operation (such as a click operation or a touch operation). Based on the input operation and the display interface on the display screen, the electronic device can detect the operation object of the input operation (such as launching an application, pulling down the status bar, switching display interfaces, etc.).

[0160] It should be noted that the embodiments of the present application do not limit the manner in which the electronic device identifies the business scenario.

[0161] S602, in response to the business scenario being a specific scenario, the electronic device obtains a first computing power difference and a first frequency point value of the processor in the first frequency modulation period, and the first computing power difference is positively correlated with the difference between the load duty cycle of the processor in the first frequency modulation period and the target load duty cycle.

[0162] In some embodiments, the electronic device can obtain a specific scenario configured by the user. In some embodiments, the specific scenario includes one or more of launching an application, opening the status bar, switching display interfaces, responding to input operations, displaying animation effects, and displaying a virtual keyboard. It is understood that the specific scenario can also include more business scenarios.

[0163] Launching an application can include cold launching or hot launching. When launching an application, if there is no background process for the application in the electronic device, the electronic device will create a new process and assign it to the application. When hot launching an application, if there is already a background process for the application, the application can be launched from the existing process.

[0164] The status bar can be used to display the operating status of the electronic device, such as network mode, message notification mode, brightness, volume, etc. Users can query or configure the operating status of the electronic device by opening the status bar.

[0165] Switching the display interface may include switching between any multiple display interfaces of the electronic device. In some embodiments, switching the display interface may include switching the display interface within an application, or may include switching the display interface between applications.

[0166] The input operation can be used for a user or other external object to input data into the electronic device. In some embodiments, the input operation can include a click operation or a touch operation on the display screen.

[0167] Displaying animation effects can be used to provide users with a more realistic and dynamic visual experience. In some embodiments, corresponding animation effects can be displayed in response to user operations. For example, dynamic switching effects when switching display interfaces.

[0168] The virtual keyboard can be used to receive text and other data input by the user.

[0169] In some implementations, if the business scenario is a specific scenario, the electronic device may not execute the steps.

[0170] In some examples, the manner in which the electronic device obtains the first computing power difference and the first frequency point value of the processor in the first frequency modulation period can be referred to the relevant description in the aforementioned S301-S306.

[0171] S603: The electronic device determines, based on the first computing power difference and the first frequency value, a second frequency value of the processor in a second frequency modulation period, where the second frequency modulation period is subsequent to the first frequency modulation period.

[0172] In some examples, the electronic device determines the second frequency value of the processor in the second frequency modulation period based on the first computing power difference and the first frequency value. Please refer to the relevant description in the aforementioned S307, or refer to the relevant description in the aforementioned S401-S408.

[0173] S604: The electronic device adjusts the frequency value of the processor based on the second frequency value in the second frequency modulation period.

[0174] In some examples, the manner in which the electronic device adjusts the frequency value of the processor based on the second frequency value during the second frequency modulation period can be referred to the relevant descriptions in the aforementioned S308 and S408.

[0175] In an embodiment of the present application, the business scenario in which the electronic device is located can be identified, and when the electronic device is in a specific scenario, the frequency value of the processor can be supplied on demand, with a fast response speed, thereby improving the problem of oversupply and undersupply of frequency value.

[0176] The following will illustrate the beneficial effects of the frequency modulation method provided by the implementation of this application with reference to specific examples.

[0177] For example, the computing power and power consumption levels of electronic devices are shown in Table 1 below.

[0178] Table 1

[0179] As shown in Table 1, when the processor frequency value is 1172000, the processor computing power is 1397, the power consumption is 148, and the energy efficiency value is 0.11908; when the processor frequency value is 1882000, the processor computing power is 2224, the power consumption is 340, and the energy efficiency value is 0.16807.

[0180] If the processor runs at 1172000 and 1882000 for 5ms each, the computing power achieved by the processor = 1397*5 + 2224*5 = 18105, and the power consumed = 148*5 + 340*5 = 2440. If the processor runs at 1517000 for 10ms, the computing power achieved by the processor = 1809*10 = 18090, and the power consumed by the processor = 226*10 = 2260. By comparison, the processor running at 1517000 for 10ms achieves similar computing power as running at 1172000 and 1882000 for 5ms each, but with a 7.4% reduction in power consumption.

[0181] Please refer to Figure 7, which is a schematic diagram of a load following curve of a processor provided in an embodiment of the present application. In Figure 7, curve 4 is a frequency point value curve corresponding to frequency modulation strategy three (i.e., the frequency modulation method of the processor provided in the present application). Compared with curves 2 and 3 in the aforementioned Figure 2, curve 4 has a higher degree of overlap with curve 1, that is, the frequency modulation method of the processor provided in the present application has high flexibility and accuracy in frequency modulation, realizes on-demand supply of the frequency point value of the processor, has a fast response speed, and improves the problem of oversupply and undersupply of frequency point values. For example, compared with the undersupply area in Figure 2, curve 4 can increase the frequency point value of the processor to provide higher computing power, thereby making the processor have higher performance. Compared with the oversupply area in Figure 2, curve 4 can reduce the frequency point value of the processor to provide lower computing power, thereby reducing power waste.

[0182] Based on the same inventive concept, as an implementation of the above method, an embodiment of the present application provides a frequency modulation device for an electronic device. The device embodiment corresponds to the above method embodiment. For ease of reading, the present device embodiment will no longer repeat the details of the above method embodiment one by one, but it should be clear that the device in this embodiment can correspond to and implement all the contents of the above method embodiment.

[0183] In one possible implementation, the device may correspond to the processor in the above method embodiment, for example, a processor chip or a processor core within a processor chip. The device may have the function of executing each step or process corresponding to the frequency modulation method for an electronic device in the above method. This function may be implemented in hardware, or the corresponding software implementation may be executed by hardware.

[0184] Based on the same inventive concept, an embodiment of the present application further provides an electronic device comprising: a memory and a processor, wherein the memory is used to store a computer program; and the processor is used to execute the method described in the above method embodiment when the computer program is called.

[0185] The electronic device provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effects are similar, which will not be repeated here.

[0186] Based on the same inventive concept, an embodiment of the present application further provides a chip system, which includes a processor coupled to a memory, and executes a computer program stored in the memory to implement the method described in the above method embodiment.

[0187] In some examples, the chip system may be a single chip or a chip module composed of multiple chips.

[0188] An embodiment of the present application further provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the method described in the above method embodiment is implemented.

[0189] An embodiment of the present application further provides a computer program product. When the computer program product is run on an electronic device, the electronic device implements the method described in the above method embodiment when executing the computer program product.

[0190] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present application implements all or part of the process in the above-mentioned embodiment method, which can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a computer-readable storage medium. When the computer program is executed by the processor, the steps of the above-mentioned various method embodiments can be implemented. Wherein, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable storage medium may include at least: any entity or device capable of carrying the computer program code to an electronic device, a recording medium, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electric carrier signal, a telecommunication signal and a software distribution medium. For example, a USB flash drive, a mobile hard disk, a magnetic disk or an optical disk.

[0191] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant description of other embodiments.

[0192] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0193] In the embodiments provided in this application, it should be understood that the disclosed devices / equipment and methods can be implemented in other ways. For example, the device / equipment embodiments described above are merely schematic. For example, the division of the modules or units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0194] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, integers, steps, operations, elements and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or collections thereof.

[0195] It will also be understood that the term "and / or" used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

[0196] As used in this specification and the appended claims, the term "if" can be interpreted as "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "upon determination" or "in response to determining" or "upon detection of [described condition or event]" or "in response to detecting [described condition or event]," depending on the context.

[0197] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0198] References to "one embodiment" or "some embodiments" in this specification mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in one or more embodiments of the present application. Thus, phrases such as "in one embodiment," "in some embodiments," "in other embodiments," and "in other embodiments" appearing in various places in this specification do not necessarily refer to the same embodiment, but rather mean "one or more but not all embodiments," unless otherwise specifically emphasized. The terms "including," "comprising," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized.

[0199] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A frequency modulation method for an electronic device, characterized in that: include: Acquire a first computing power difference and a first frequency point value of the processor in a first frequency modulation period, wherein the first computing power difference is positively correlated with a difference between a load duty cycle of the processor in the first frequency modulation period and a target load duty cycle; Determining, based on the first computing power difference and the first frequency point value, a second frequency point value of the processor in a second frequency modulation period, where the second frequency modulation period is after the first frequency modulation period; In the second frequency modulation period, the frequency value of the processor is adjusted based on the second frequency value.

2. The method according to claim 1, characterized in that The obtaining of a first computing power difference of the processor in a first frequency modulation period includes: Obtaining the number of clock cycles consumed by the processor to execute instructions in the first frequency modulation cycle; Determining the load duty cycle of the processor in the first frequency modulation period based on the number of clock cycles; The first computing power difference is determined based on the load duty cycle and the target load duty cycle.

3. The method according to claim 2, characterized in that The obtaining the number of clock cycles consumed by the processor to execute instructions in the first frequency modulation cycle includes: The number of clock cycles consumed by the processor to execute instructions within the first frequency modulation cycle is obtained through a performance monitoring unit PMU or a register.

4. The method according to any one of claims 1 to 3, characterized in that: The determining, based on the first computing power difference and the first frequency value, a second frequency value of the processor in a second frequency modulation period includes: The second frequency point value of the processor in the second frequency modulation cycle is determined based on at least one of the first computing power difference and the first frequency point value, and the second computing power difference and the sum of the computing power difference of the processor in at least one historical frequency modulation cycle, where the second computing power difference is the computing power difference of the processor in a third frequency modulation cycle, and the third frequency modulation cycle is before the first frequency modulation cycle.

5. The method according to claim 4, characterized in that The method further comprises: From the moment when the first frequency modulation cycle ends, if the second frequency point value of the processor in the second frequency modulation cycle is not determined within the first time period based on the first computing power difference and the first frequency point value, and the second computing power difference and the sum of the computing power difference of the processor in the at least one historical frequency modulation cycle, then the first computing power difference, the first frequency point value, the second computing power difference and the sum of the computing power difference of the processor in the at least one historical frequency modulation cycle are deleted.

6. The method according to claim 5, characterized in that The first duration is an integer multiple of the frequency modulation period.

7. The method according to any one of claims 1 to 6, characterized in that: The determining, based on the first computing power difference and the first frequency value, a second frequency value of the processor in a second frequency modulation period includes: Based on a closed-loop feedback loop type algorithm, the first computing power difference and the first frequency point value, the second frequency point value of the processor in the second frequency modulation period is determined, and the closed-loop feedback loop type algorithm includes proportional control, and at least one of integral control and differential control.

8. The method according to any one of claims 1 to 7, characterized in that: The step of adjusting the frequency value of the processor based on the second frequency value during the second frequency modulation period includes: In the second frequency modulation period, the frequency point value of the processor is set to the second frequency point value.

9. A frequency modulation method for an electronic device, characterized in that: include: Identify business scenarios of electronic devices; In response to the business scenario being a specific scenario, obtaining a first computing power difference and a first frequency point value of the processor in a first frequency modulation period, wherein the first computing power difference is positively correlated with a difference between a load duty cycle of the processor in the first frequency modulation period and a target load duty cycle; Determining, based on the first computing power difference and the first frequency point value, a second frequency point value of the processor in a second frequency modulation period, where the second frequency modulation period is after the first frequency modulation period; In the second frequency modulation period, the frequency value of the processor is adjusted based on the second frequency value.

10. The method according to claim 9, characterized in that The specific scenario includes any of the following: starting an application, opening a status bar, switching a display interface, responding to an input operation, displaying an animation effect, and displaying a virtual keyboard.

11. An electronic device, characterized in that: include: A memory and a processor, the memory being used to store a computer program; the processor being used to execute the method according to any one of claims 1 to 8 when calling the computer program, or to execute the method according to claim 9 or 10.

12. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 8 is implemented, or the method according to claim 9 or 10 is implemented.

13. A computer program product, characterized in that When the computer program product runs on an electronic device, the electronic device executes the method according to any one of claims 1 to 8, or executes the method according to claim 9 or 10.

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