Packaging structure and packaging method

Abstract

The present invention provides a packaging structure. The packaging structure comprises: a substrate, comprising a first surface and a second surface which are opposite, wherein a chip mounting groove and a ball planting pad located on the side edge of the chip mounting groove are formed on the second surface; a first chip, mounted in the chip mounting groove; a bottom filler, located in the chip mounting groove and filling the bottom of the first chip close to the bottom surface of the chip mounting groove; and a solder ball, arranged on the ball planting pad. In this way, the bottom filler filling the bottom of the first chip is limited in the chip mounting groove, and the bottom filler does not diffuse and cover the ball planting pad located on the side edge of the chip mounting groove, so that the contamination of the bottom filler to the ball planting pad can be effectively avoided, the problem of poor ball planting caused by the contamination of the bottom filler to the ball planting pad is mitigated, and the packaging process flow is simple. The present invention further provides a packaging method.

Description

Packaging structure and packaging method Technical Field

[0001] The present invention relates to the field of packaging technology, and in particular to a packaging structure and a packaging method. Background Art

[0002] With the advancement of system-in-package (SIP) technology and the demand for device miniaturization, the distance between components in RF front-end modules is becoming increasingly smaller, making double-sided packaging a necessity. To improve the reliability of packaged modules, filling the bottom of the flip chip with underfill is a common method. However, when the flip chip is close to the ball pad, the underfill can easily contaminate the pad, resulting in poor ball placement.

[0003] To address the issue of poor ball placement caused by underfill contamination of the pads, existing methods include covering the pads with a film before ball placement and removing the film after dispensing the underfill to prevent the pads from being contaminated. However, this method is complex.

[0004] Summary of the Invention

[0005] One of the purposes of the present invention is to provide a packaging structure and a packaging method, which can improve the problem of poor ball planting caused by bottom filler contaminating the ball planting pad, and the packaging process is simple.

[0006] To achieve the above objectives, the present invention provides a packaging structure in one aspect. The packaging structure includes: a substrate having a first surface and a second surface opposite to each other, the second surface having at least one chip mounting recess and a ball pad located on at least one side of the chip mounting recess; at least one first chip, each first chip mounted in a corresponding chip mounting recess; an underfill located in the chip mounting recess and filling a bottom portion of the first chip adjacent to the bottom surface of the chip mounting recess; and solder balls disposed on the ball pads.

[0007] Optionally, the substrate has multiple metal layers and multiple dielectric layers isolating the metal layers, and the chip mounting groove is recessed in the dielectric layer.

[0008] Optionally, the chip mounting groove passes through one, two or three dielectric layers. Optionally, the bottom surface of the chip mounting groove has a fourth pad, and the first chip is fixed on the fourth pad and electrically connected to the fourth pad.

[0009] Optionally, the first chip is a flip-chip package type chip.

[0010] Optionally, the packaging structure further includes a plurality of functional elements, and the plurality of functional elements are mounted on the first surface of the substrate.

[0011] Optionally, the first surface of the substrate has at least one first pad; the plurality of functional elements include passive components, and the passive components are mounted on the first pad.

[0012] Optionally, the first surface of the substrate has at least one second pad and at least one third pad; the plurality of functional elements include a functional chip, the back side of the functional chip is mounted on the second pad, and the front side of the functional chip is electrically connected to the third pad via a metal wire.

[0013] Optionally, the packaging structure further includes a plastic packaging layer, which is formed on the first surface and covers the functional element.

[0014] Another aspect of the present invention provides a packaging method. The packaging method comprises:

[0015] Providing a substrate, the substrate having a first surface and a second surface opposite to each other, the second surface having at least one chip mounting groove and a ball pad located on at least one side of the chip mounting groove;

[0016] Mounting a first chip in the chip mounting groove;

[0017] Filling an underfill agent at the bottom of the first chip near the bottom surface of the chip mounting groove, wherein the underfill agent is filled in the chip mounting groove;

[0018] A solder ball is arranged on the ball planting pad.

[0019] In the packaging structure and packaging method provided by the present invention, the first chip is mounted in the chip mounting groove on the surface of the substrate, and the bottom filler fills the bottom of the first chip near the bottom surface of the chip mounting groove at the bottom of the chip mounting groove. Due to the limitation of the chip mounting groove, the bottom filler will not spread and cover the ball planting pads on the side of the chip mounting groove, thereby effectively avoiding the contamination of the ball planting pads by the bottom filler, improving the problem of poor ball planting caused by the bottom filler contaminating the ball planting pads, and the packaging process is simple. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] FIG1 is a flow chart of a packaging method provided by an embodiment of the present invention.

[0021] 2 to 6 are schematic cross-sectional views of the steps of a packaging method according to an embodiment of the present invention.

[0022] FIG7 is a schematic cross-sectional view of a packaging structure provided by an embodiment of the present invention.

[0023] Explanation of the accompanying drawings: 100-substrate; 101-metal layer; 102-dielectric layer; 103-first pad; 104-second pad; 105-third pad; 106-fourth pad; 107-ball pad; 108-solder mask layer; 109-chip mounting groove; 201-passive device; 202-functional chip; 300-metal wire; 400-plastic layer; 500-first chip; 501-bump; 600-bottom filler; 700-solder ball. DETAILED DESCRIPTION

[0024] The packaging structure and packaging method proposed in the present invention are further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the accompanying drawings are highly simplified and not to exact scale, and are intended solely to facilitate and clearly illustrate the embodiments of the present invention.

[0025] The terminology used herein is for the purpose of describing specific embodiments only and is not intended to limit the invention. Unless otherwise defined herein, technical or scientific terms used herein shall have the ordinary meaning as understood by a person of ordinary skill in the art to which the invention pertains. The terms "first," "second," and similar terms used in the specification and claims of the present invention do not denote any order, quantity, or importance, but are simply used to distinguish one component from another. Similarly, terms such as "a" or "an" do not denote a limitation of quantity, but rather denote the presence of at least one. "Multiple" or "several" refer to two or more. Unless otherwise indicated, terms such as "upper" and / or "lower" are for convenience only and are not intended to limit the invention to a specific location or spatial orientation. Terms such as "include" or "comprising" mean that the elements or structures preceding the term "include" or "comprising" encompass the elements or structures listed after the term and their equivalents, and do not exclude other elements or structures. Terms such as "connected" or "connected" are not limited to physical or mechanical connections and may include electrical connections, whether direct or indirect. As used in the present description and the appended claims, the singular forms "a," "an," "said," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0026] FIG1 is a flow chart of a packaging method provided by an embodiment of the present invention. As shown in FIG1 , the packaging method provided by this embodiment includes:

[0027] S1, providing a substrate, wherein the substrate has a first surface and a second surface opposite to each other, wherein the second surface has a chip mounting groove and a ball bonding pad located on a side of the chip mounting groove;

[0028] S2, installing the first chip in the chip installation groove;

[0029] S3, filling an underfill agent at the bottom of the first chip near the bottom surface of the chip mounting groove, wherein the underfill agent is filled in the chip mounting groove;

[0030] S4, placing a solder ball on the ball-planting pad.

[0031] Figures 2 to 6 are schematic cross-sectional views of the steps of a packaging method according to an embodiment of the present invention. Figure 7 is a schematic cross-sectional view of a packaging structure according to an embodiment of the present invention. The packaging method of this embodiment will be described below with reference to Figures 2 to 7.

[0032] As shown in FIG. 2 , a substrate 100 is provided. The substrate 100 has a first surface and a second surface opposite to each other. The second surface has a chip mounting groove 109 and a ball bonding pad 107 located on a side of the chip mounting groove 109 .

[0033] In this embodiment, the number of chip mounting grooves 109 on the second surface of substrate 100 can be one or more than two. The number of ball pads 107 on the second surface of substrate 100 can be multiple, and the multiple ball pads 107 can be arranged in an array on the sides of chip mounting grooves 109.

[0034] As shown in Figure 2, the substrate 100 may have multiple metal layers 101 and multiple dielectric layers 102 separating the metal layers 101. It should be noted that the boundaries between the dielectric layers are not shown in Figure 2.

[0035] The chip mounting recess 109 is recessed in the dielectric layer 102 of the substrate. Exemplarily, the chip mounting recess 109 extends through one, two, or three dielectric layers 102, but is not limited thereto. The depth of the chip mounting recess 109 can be designed based on actual needs. As shown in FIG2 , several metal layers 101 may be formed in the dielectric layer 102 corresponding to the sidewalls of the chip mounting recess 109. The bottom surface of the chip mounting recess 109 is lower than the plurality of metal layers 101. The plurality of metal layers 101 may comprise one, two, or three layers.

[0036] 2 , the first surface of the substrate 100 has a plurality of surface pads. For example, the first surface of the substrate 100 has a first pad 103 for mounting passive components, a second pad 104 for mounting functional chips, and a third pad 105 for carrying metal wires, but is not limited thereto.

[0037] A fourth pad 106 may be formed on the bottom surface of the chip mounting groove 109. The fourth pad 106 is used to mount and fix the first chip. There may be a plurality of fourth pads 106.

[0038] A solder resist layer 108 may be formed on both the first surface and the second surface of the substrate 100 , and the solder resist layer 108 at least exposes the pads on the first surface and the second surface.

[0039] After providing the substrate 100 , a plurality of functional elements are mounted on the first surface of the substrate 100 .

[0040] 3 , the plurality of functional elements may include a passive component 201, and the passive component 201 is mounted on the first pad 103. The passive component 201 may be a capacitor, a resistor, or an inductor.

[0041] 3 , the plurality of functional elements may include a functional chip 202, the back side of the functional chip 202 may be mounted on the second pad 104, and the front side of the functional chip 202 may be electrically connected to the third pad 105 via a metal wire 300. The metal wire 300 may be made of gold or copper.

[0042] It should be noted that in this embodiment, the functional chip 202 is electrically connected to the substrate 100 using wire bonding. That is, the functional chip 202 is a wire-bonded (WB) package type chip. In other embodiments, the functional chip 202 may also be a flip-chip (FC) package type chip. The present invention does not limit the package type of the functional chip 202. The functional chip 202 may be a semiconductor chip including gallium arsenide or silicon. In some embodiments, the multiple functional elements may include devices such as filters.

[0043] As shown in Figure 4, a molding layer 400 is formed on the first surface of the substrate 100, and the molding layer 400 covers the functional elements, the metal wires 300, and the pads on the first surface of the substrate 100. The molding layer 400 may be made of epoxy molding compound.

[0044] As shown in FIG5 , a first chip 500 is mounted in the chip mounting recess 109. In this embodiment, multiple first chips 500 can be mounted in multiple chip mounting recesses 109, that is, one first chip 500 can be mounted in one chip mounting recess 109. In other embodiments, one or more chip mounting recesses can be provided on the second surface of the substrate 100, and multiple first chips 500 can be mounted in one chip mounting recess 109.

[0045] As shown in FIG5 , the surface of the first chip 500 may have bumps 501. The bumps 501 may include solder pads on the surface of the first chip and a solder layer on the solder pads. The method of mounting the first chip 500 in the chip mounting recess 109 may include soldering the bumps 501 on the surface of the first chip 500 to the fourth solder pads 106 on the bottom surface of the chip mounting recess 109. The first chip 500 includes, but is not limited to, a flip chip.

[0046] As shown in FIG. 6 , an underfill 600 is filled at the bottom of the first chip 500 close to the bottom surface of the chip mounting groove 109 , and the underfill 600 is filled in the chip mounting groove 109 .

[0047] It should be noted that in this embodiment, due to the limitations of the chip mounting groove 109, the underfill 600 is only filled within the chip mounting groove 109 and is not likely to spread outside the chip mounting groove 109 and contaminate the ball bonding pads 107. The underfill 600 can fully fill the gap between the first chip 500 and the substrate 100, completely encapsulating the fourth bonding pads 106 and the bumps 501 on the surface of the first chip 500, and effectively sealing the solder joints between the first chip 500 and the substrate 100, thereby helping to improve the connection reliability between the first chip 500 and the substrate 100 and enhancing the reliability of the package structure.

[0048] As shown in Figure 7, solder balls 700 are provided on the ball pads 107. The plurality of ball pads 107 on the substrate 100 may be arranged in an array, and thus the solder balls 700 on the ball pads 107 may also be arranged in an array. The solder balls 700 are, for example, tin balls.

[0049] The present invention also provides a packaging structure, which can be manufactured by the above packaging method.

[0050] As shown in FIG7 , the package structure provided in this embodiment includes a substrate 100, a first chip 500, an underfill 600, and solder balls 700. The substrate 100 has a first surface and a second surface opposite each other. The second surface has a chip mounting recess 109 and ball pads 107 located on the sides of the chip mounting recess 109. The first chip 500 is mounted in the chip mounting recess 109. The underfill 600 is located in the chip mounting recess 109, filling the bottom of the first chip 500 near the bottom surface of the chip mounting recess 109. The solder balls 700 are disposed on the ball pads 107.

[0051] Specifically, the number of chip mounting grooves 109 on the second surface of substrate 100 may be more than two. The number of ball pads 107 on the second surface of substrate 100 may be multiple, and the multiple ball pads 107 may be arranged in an array on the side of chip mounting groove 109.

[0052] As shown in Figure 7 , the substrate 100 may have multiple metal layers 101 and multiple dielectric layers 102 separating the metal layers 101. It should be noted that the boundaries between the dielectric layers are not shown in Figure 7 .

[0053] The chip mounting recess 109 is recessed in the dielectric layer 102 of the substrate. Exemplarily, the chip mounting recess 109 extends through one, two, or three dielectric layers 102, but is not limited thereto. The depth of the chip mounting recess 109 can be designed based on actual needs. Referring to FIG. 7 , several metal layers 101 may be formed in the dielectric layer 102 corresponding to the sidewalls of the chip mounting recess 109. The bottom surface of the chip mounting recess 109 is lower than the several metal layers 101. The number of metal layers 101 may be one, two, or three, etc.

[0054] 7 , the first surface of the substrate 100 has a plurality of surface pads. For example, the first surface of the substrate 100 has a first pad 103 for mounting passive components, a second pad 104 for mounting functional chips, and a third pad 105 for carrying metal wires, but is not limited thereto.

[0055] A fourth pad 106 may be formed on the bottom surface of the chip mounting groove 109. The fourth pad 106 is used to mount and fix the first chip. There may be a plurality of fourth pads 106.

[0056] It should be noted that the pads on the surface of the substrate 100 are all electrically connected to the metal layer 101 inside the substrate 100 .

[0057] A solder resist layer 108 may be formed on both the first surface and the second surface of the substrate 100 , and the solder resist layer 108 at least exposes the pads on the first surface and the second surface.

[0058] As shown in FIG. 7 , the package structure may further include a plurality of functional elements, and the plurality of functional elements are mounted on the first surface of the substrate 100 .

[0059] 7 , the plurality of functional elements may include a passive component 201, and the passive component 201 is mounted and fixed on the first pad 103. The passive component 201 may be a capacitor, a resistor, or an inductor.

[0060] As shown in FIG. 7 , the plurality of functional elements may include a functional chip 202 , the back surface of the functional chip 202 may be mounted on the second pad 104 , and the front surface of the functional chip 202 may be electrically connected to the third pad 105 via a metal wire 300 .

[0061] It should be noted that in this embodiment, the functional chip 202 is electrically connected to the substrate 100 using wire bonding, meaning that the functional chip 202 is a wire-bonded packaged chip. In other embodiments, the functional chip 202 may also be a flip-chip packaged chip. The present invention does not limit the package type of the functional chip 202. The functional chip 202 may be a semiconductor chip including gallium arsenide or silicon. In some embodiments, the multiple functional elements may include devices such as filters.

[0062] As shown in FIG7 , the package structure may further include a plastic encapsulation layer 400 formed on the first surface of the substrate 100 and covering the functional elements. Specifically, the plastic encapsulation layer 400 may cover the plurality of functional elements, the metal wires 300, and the pads on the first surface of the substrate 100. The material of the plastic encapsulation layer 400 may be an epoxy molding compound.

[0063] As shown in FIG7 , a first chip 500 is mounted in the chip mounting recess 109 . The surface of the first chip 500 may have bumps 501 , which are soldered to the fourth pads 106 on the bottom surface of the chip mounting recess 109 . The first chip 500 includes, but is not limited to, a flip-chip package type chip. For example, the bumps 501 may include solder pads on the surface of the first chip and a solder layer on the solder pads.

[0064] As shown in FIG. 7 , an underfill 600 is filled at the bottom of the first chip 500 close to the bottom surface of the chip mounting groove 109 , and the underfill 600 is filled in the chip mounting groove 109 .

[0065] It should be noted that in this embodiment, due to the limitations of the chip mounting groove 109, the underfill 600 is only filled within the chip mounting groove 109 and is not likely to spread outside the chip mounting groove 109 and contaminate the ball bonding pads 107. The underfill 600 can fully fill the gap between the first chip 500 and the substrate 100, completely encapsulating the fourth bonding pads 106 and the bumps 501 on the surface of the first chip 500, and effectively sealing the solder joints between the first chip 500 and the substrate 100, thereby helping to improve the connection reliability between the first chip 500 and the substrate 100 and enhancing the reliability of the package structure.

[0066] As shown in Figure 7, solder balls 700 are provided on the ball pads 107. The plurality of ball pads 107 on the substrate 100 can be arranged in an array, and thus the solder balls 700 on the ball pads 107 can also be arranged in an array. The solder balls 700 are, for example, tin balls.

[0067] In the packaging structure and packaging method provided by the present invention, the first chip 500 is installed in the chip mounting groove 109 on the surface of the substrate 100, and the bottom filler 600 fills the bottom of the first chip 500 close to the bottom surface of the chip mounting groove 109 at the bottom of the chip mounting groove 109. Due to the limitation of the chip mounting groove 109, the bottom filler 600 will not spread and cover the ball planting pad 107 on the side of the chip mounting groove 109, thereby effectively avoiding the contamination of the ball planting pad 107 by the bottom filler 600, improving the problem of poor ball planting caused by the bottom filler contaminating the ball planting pad, and the packaging process flow is simple.

[0068] The above description is only a description of the preferred embodiment of the present invention, and does not limit the scope of the rights of the present invention. Any person skilled in the art can make possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the scope of protection of the technical solution of the present invention.

Claims

1. A packaging structure, characterized in that: include: A substrate, the substrate having a first surface and a second surface opposite to each other, the second surface having at least one chip mounting groove and a ball pad located on at least one side of the chip mounting groove; at least one first chip, each first chip being mounted in a corresponding chip mounting groove; A bottom filler, the bottom filler is located in the chip mounting groove and fills the bottom of the first chip close to the bottom surface of the chip mounting groove; and A solder ball is disposed on the ball-planting pad.

2. The packaging structure according to claim 1, characterized in that: The substrate has a plurality of metal layers and a plurality of dielectric layers isolating the metal layers, and the chip mounting groove is recessed in the dielectric layer.

3. The packaging structure according to claim 2, characterized in that: The chip mounting groove penetrates one, two or three dielectric layers.

4. The packaging structure according to claim 1, characterized in that: The bottom surface of the chip mounting groove has a fourth pad, and the first chip is fixed on the fourth pad and electrically connected to the fourth pad.

5. The packaging structure according to claim 1, characterized in that: The first chip is a flip-chip package type chip.

6. The packaging structure according to claim 1, characterized in that: The packaging structure further includes a plurality of functional elements, and the plurality of functional elements are mounted on the first surface of the substrate.

7. The packaging structure according to claim 6, characterized in that: The first surface of the substrate has at least one first pad; the plurality of functional elements include passive components, and the passive components are mounted on the first pad.

8. The packaging structure according to claim 6, characterized in that: The first surface of the substrate has at least one second pad and at least one third pad; the plurality of functional elements include a functional chip, the back side of the functional chip is mounted on the second pad, and the front side of the functional chip is electrically connected to the third pad via a metal wire.

9. The packaging structure according to claim 6, characterized in that: The packaging structure further includes a plastic packaging layer, which is formed on the first surface and covers the functional element.

10. A packaging method, characterized in that: include: Providing a substrate, the substrate having a first surface and a second surface opposite to each other, the second surface having at least one chip mounting groove and a ball pad located on at least one side of the chip mounting groove; Mounting a first chip in the chip mounting groove; Filling an underfill agent at the bottom of the first chip near the bottom surface of the chip mounting groove, wherein the underfill agent is filled in the chip mounting groove; and A solder ball is arranged on the ball planting pad.

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