RF switching circuit and electronic device including same

The RF switching circuit addresses the challenge of selective RF port connection by using a voltage supply circuit with both positive and negative voltages, generated through an RF-DC converter, to enhance transistor linearity and isolation, thereby improving RF signal processing efficiency.

WO2025075316A1PCT designated stage expired Publication Date: 2025-04-10SAMSUNG ELECTRONICS CO LTD
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Patent Information

Application Number
PCT/KR2024/013682
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-05
Filing Date
2024-09-10
Publication Date
2025-04-10

AI Technical Summary

Technical Problem

Existing RF switching circuits for electronic devices lack efficient methods to selectively connect RF ports with a common port while maintaining optimal transistor linearity and isolation.

Method used

The RF switching circuit incorporates a voltage supply circuit that provides both positive and negative voltages to transistor circuits, utilizing a converter circuit to generate a negative voltage from an RF signal, thereby enabling selective connection of RF ports and improving transistor performance.

Benefits of technology

This solution allows for efficient impedance tuning and improved RF signal processing by ensuring optimal voltage application to transistor circuits, enhancing the overall performance of RF switching circuits in electronic devices.

✦ Generated by Eureka AI based on patent content.

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Abstract

In embodiments, an electronic device is provided. The electronic device may comprise: a processor; a radio frequency (RF) transceiver; a radio frequency front end (RFFE) circuit; an antenna; an RF switching circuit for impedance tuning of the antenna; and a power supply circuit for the RF switching circuit. The RF switching circuit may comprise: a coupler connected to an RF common port; a plurality of transistor circuits connected to the coupler and for a plurality of RF ports; a voltage supply circuit configured to provide a voltage to each transistor circuit of the plurality of transistor circuits to selectively electrically connect one of the plurality of RF ports to the RF common port; and a converter circuit connected to the coupler and configured to convert an RF signal into a direct current (DC) signal.
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Description

RF switching circuit and electronic device including the same

[0001] Embodiments of the present disclosure relate to a radio frequency (RF) switching circuit and an electronic device including the RF switching circuit.

[0002] An electronic device may transmit or receive signals using an antenna. The electronic device may include various radio frequency (RF) components for processing the signals. For example, the electronic device may include a radio frequency front end (RFFE) circuit. For example, the electronic device may include an RF switching circuit for selectively connecting a specific element to an RF path or selecting a specific RF path for signal processing.

[0003] The above information may be provided as background art to aid in understanding the present disclosure. No claim or determination is made as to whether any of the above-described matters constitute prior art related to the present disclosure.

[0004] In embodiments, a radio frequency (RF) switching circuit is provided. The RF switching circuit may include a plurality of RF ports including an RF common port, a first RF port, and a second RF port, a plurality of transistor circuits including a first transistor circuit for the first RF port and a second transistor circuit for the second RF port, a voltage supply circuit configured to provide a voltage to the plurality of transistor circuits to selectively electrically connect one of the plurality of RF ports to the RF common port, a coupler connected to the RF common port, and a converter circuit configured to convert an RF signal obtained from the coupler into a direct current (DC) signal having a negative voltage. The voltage supply circuit may be configured to obtain a power signal having a positive voltage from a power supply circuit and obtain the DC signal having the negative voltage. The voltage supply circuit may be configured to provide a first voltage corresponding to the power signal and a second voltage corresponding to the DC signal to each transistor circuit of the plurality of transistor circuits.

[0005] In embodiments, an electronic device is provided. The electronic device may include a processor, a radio frequency (RF) transceiver, a radio frequency front end (RFFE) circuit, an antenna, an RF switching circuit for impedance tuning of the antenna, and a power supply circuit for the RF switching circuit. The RF switching circuit may include a coupler connected to an RF common port, a plurality of transistor circuits connected to the coupler and for a plurality of RF ports, a voltage supply circuit configured to provide a voltage to each transistor circuit of the plurality of transistor circuits to selectively electrically connect one of the plurality of RF ports to the RF common port, and a converter circuit connected to the coupler and configured to convert an RF signal into a direct current (DC) signal.

[0006] FIG. 1 is a block diagram of an electronic device within a network environment according to various embodiments of the present invention.

[0007] FIGS. 2A, 2B, and 2C illustrate examples of electronic devices including radio frequency (RF) switching circuits according to various embodiments of the present invention.

[0008] FIG. 3 illustrates an example of a functional configuration of an RF switching circuit according to various embodiments of the present invention.

[0009] FIG. 4 illustrates examples of components of a switching operation circuit according to various embodiments of the present invention.

[0010] FIG. 5 illustrates an example of an RF switching circuit for generating a negative voltage through RF-DC (direct current) conversion according to various embodiments of the present invention.

[0011] FIG. 6 illustrates examples of components of a transistor circuit of a switching operation circuit according to various embodiments of the present invention.

[0012] FIG. 7 illustrates an example of a transistor circuit of a switching operation circuit according to various embodiments of the present invention.

[0013] The terms used in this disclosure are used only to describe specific embodiments and may not be intended to limit the scope of other embodiments. The singular expression may include plural expressions unless the context clearly indicates otherwise. Terms used herein, including technical or scientific terms, may have the same meaning as commonly understood by those of ordinary skill in the art described in this disclosure. Terms defined in general dictionaries among the terms used in this disclosure may be interpreted as having the same or similar meaning in the context of the relevant technology, and shall not be interpreted in an idealized or overly formal sense unless explicitly defined in this disclosure. In some cases, even if a term is defined in this disclosure, it cannot be interpreted to exclude embodiments of the present disclosure.

[0014] The various embodiments of the present disclosure described below illustrate a hardware-based approach as an example. However, since the various embodiments of the present disclosure include techniques utilizing both hardware and software, the various embodiments of the present disclosure do not exclude a software-based approach.

[0015] In the following description, terms referring to parts of electronic devices (e.g., substrate, PCB (printed circuit board), FPCB (flexible PCB), module, antenna, element, circuit, processor, chip, component, device), terms referring to semiconductors (e.g., transistor, FET (field effect transistor), MOSFET (metal-oxide-semiconductor FET), JFET (junction FET), semiconductor circuit), terms referring to circuits (e.g., PCB, FPCB, signal line, feeding line, data line, RF signal line, antenna line, RF path, RF module, RF circuit, splitter, divider, coupler, combiner), etc. are examples for convenience of description. Therefore, the present disclosure is not limited to the terms described below, and other terms having equivalent technical meanings may be used. In addition, the terms '...bu', '...gi', '...mul', '...che', etc. used below may mean at least one shape structure or a unit that processes a function.

[0016] In addition, in the present disclosure, expressions such as "more than" or "less than" may be used to determine whether a specific condition is satisfied or fulfilled, but this is merely a description for expressing an example and does not exclude descriptions such as "more than" or "less than." A condition described as "more than" may be replaced with "more than," a condition described as "less than" may be replaced with "less than," and a condition described as "more than and less than" may be replaced with "more than and less than." In addition, hereinafter, "A" to "B" mean at least one of elements from A (including A) to B (including B). hereinafter, "C" and / or "D" mean at least one of "C" or "D," that is, including {"C", "D", "C" and "D"}.

[0017] FIG. 1 is a block diagram of an electronic device within a network environment according to various embodiments of the present invention.

[0018] Referring to FIG. 1, in a network environment (100), an electronic device (101) may communicate with an electronic device (102) via a first network (198) (e.g., a short-range wireless communication network), or may communicate with at least one of an electronic device (104) or a server (108) via a second network (199) (e.g., a long-range wireless communication network). According to one embodiment, the electronic device (101) may communicate with the electronic device (104) via the server (108). According to one embodiment, the electronic device (101) may include a processor (120), a memory (130), an input module (150), an audio output module (155), a display module (160), an audio module (170), a sensor module (176), an interface (177), a connection terminal (178), a haptic module (179), a camera module (180), a power management module (188), a battery (189), a communication module (190), a subscriber identification module (196), or an antenna module (197). In some embodiments, the electronic device (101) may omit at least one of these components (e.g., the connection terminal (178)), or may have one or more other components added. In some embodiments, some of these components (e.g., the sensor module (176), the camera module (180), or the antenna module (197)) may be integrated into one component (e.g., the display module (160)).

[0019] The processor (120) may, for example, execute software (e.g., a program (140)) to control at least one other component (e.g., a hardware or software component) of the electronic device (101) connected to the processor (120) and perform various data processing or calculations. According to one embodiment, as at least a part of the data processing or calculation, the processor (120) may store a command or data received from another component (e.g., a sensor module (176) or a communication module (190)) in a volatile memory (132), process the command or data stored in the volatile memory (132), and store the resulting data in a non-volatile memory (134). According to one embodiment, the processor (120) may include a main processor (121) (e.g., a central processing unit or an application processor) or a secondary processor (123) (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor)) that can operate independently or together therewith. For example, if the electronic device (101) includes a main processor (121) and a secondary processor (123), the secondary processor (123) may be configured to use less power than the main processor (121) or to be specialized for a specified function. The secondary processor (123) may be implemented separately from the main processor (121) or as a part thereof.

[0020] The auxiliary processor (123) may control at least a portion of functions or states associated with at least one component (e.g., a display module (160), a sensor module (176), or a communication module (190)) of the electronic device (101), for example, on behalf of the main processor (121) while the main processor (121) is in an inactive (e.g., sleep) state, or together with the main processor (121) while the main processor (121) is in an active (e.g., application execution) state. In one embodiment, the auxiliary processor (123) (e.g., an image signal processor or a communication processor) may be implemented as a part of another functionally related component (e.g., a camera module (180) or a communication module (190)). In one embodiment, the auxiliary processor (123) (e.g., a neural network processing unit) may include a hardware structure specialized for processing artificial intelligence models. The artificial intelligence models may be generated through machine learning. This learning can be performed, for example, on the electronic device (101) itself where the artificial intelligence model is executed, or can be performed through a separate server (e.g., server (108)). The learning algorithm can include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model can include multiple artificial neural network layers.The artificial neural network may be one of a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to, or alternatively to, a hardware structure, an artificial intelligence model may include a software structure.

[0021] The memory (130) can store various data used by at least one component (e.g., processor (120) or sensor module (176)) of the electronic device (101). The data can include, for example, software (e.g., program (140)) and input data or output data for commands related thereto. The memory (130) can include volatile memory (132) or non-volatile memory (134).

[0022] The program (140) may be stored as software in the memory (130) and may include, for example, an operating system (142), middleware (144), or an application (146).

[0023] The input module (150) can receive commands or data to be used in a component of the electronic device (101) (e.g., a processor (120)) from an external source (e.g., a user) of the electronic device (101). The input module (150) can include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0024] The audio output module (155) can output audio signals to the outside of the electronic device (101). The audio output module (155) can include, for example, a speaker or a receiver. The speaker can be used for general purposes, such as multimedia playback or recording playback. The receiver can be used to receive incoming calls. In one embodiment, the receiver can be implemented separately from the speaker or as part of the speaker.

[0025] The display module (160) can visually provide information to an external party (e.g., a user) of the electronic device (101). The display module (160) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling the device. In one embodiment, the display module (160) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of a force generated by the touch.

[0026] The audio module (170) can convert sound into an electrical signal, or vice versa, convert an electrical signal into sound. According to one embodiment, the audio module (170) can acquire sound through the input module (150), output sound through the sound output module (155), or an external electronic device (e.g., electronic device (102)) (e.g., speaker or headphone) directly or wirelessly connected to the electronic device (101).

[0027] The sensor module (176) can detect the operating status (e.g., power or temperature) of the electronic device (101) or the external environmental status (e.g., user status) and generate an electrical signal or data value corresponding to the detected status. According to one embodiment, the sensor module (176) can include, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0028] The interface (177) may support one or more designated protocols that may be used to directly or wirelessly connect the electronic device (101) with an external electronic device (e.g., the electronic device (102)). In one embodiment, the interface (177) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0029] The connection terminal (178) may include a connector through which the electronic device (101) may be physically connected to an external electronic device (e.g., electronic device (102)). According to one embodiment, the connection terminal (178) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0030] A haptic module (179) can convert electrical signals into mechanical stimuli (e.g., vibration or movement) or electrical stimuli that a user can perceive through tactile or kinesthetic sensations. In one embodiment, the haptic module (179) can include, for example, a motor, a piezoelectric element, or an electrical stimulation device.

[0031] The camera module (180) can capture still images and videos. According to one embodiment, the camera module (180) may include one or more lenses, image sensors, image signal processors, or flashes.

[0032] The power management module (188) can manage power supplied to the electronic device (101). According to one embodiment, the power management module (188) can be implemented, for example, as at least a part of a power management integrated circuit (PMIC).

[0033] A battery (189) may power at least one component of the electronic device (101). In one embodiment, the battery (189) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0034] The communication module (190) may support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device (101) and an external electronic device (e.g., electronic device (102), electronic device (104), or server (108)), and the performance of communication through the established communication channel. The communication module (190) may operate independently from the processor (120) (e.g., application processor) and may include one or more communication processors that support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (190) may include a wireless communication module (192) (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module (194) (e.g., a local area network (LAN) communication module, or a power line communication module). Among these communication modules, the corresponding communication module can communicate with an external electronic device (104) via a first network (198) (e.g., a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network (199) (e.g., a long-range communication network such as a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules can be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (192) can verify or authenticate the electronic device (101) within a communication network such as the first network (198) or the second network (199) by using subscriber information (e.g., an international mobile subscriber identity (IMSI)) stored in the subscriber identification module (196).

[0035] The wireless communication module (192) can support 5G networks and next-generation communication technologies following the 4G network, such as NR access technology (new radio access technology). NR access technology can support high-speed transmission of high-capacity data (eMBB (enhanced mobile broadband)), minimizing terminal power and connecting multiple terminals (mMTC (massive machine type communications)), or high reliability and low latency (URLLC (ultra-reliable and low-latency communications)). The wireless communication module (192) can support, for example, a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate. The wireless communication module (192) can support various technologies for securing performance in a high-frequency band, such as beamforming, massive multiple-input and multiple-output (MIMO), full dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large scale antenna. The wireless communication module (192) can support various requirements specified in the electronic device (101), an external electronic device (e.g., the electronic device (104)), or a network system (e.g., the second network (199)). According to one embodiment, the wireless communication module (192) can support a peak data rate (e.g., 20 Gbps or more) for eMBB realization, a loss coverage (e.g., 164 dB or less) for mMTC realization, or a U-plane latency (e.g., 0.5 ms or less for downlink (DL) and uplink (UL), or 1 ms or less for round trip) for URLLC realization.

[0036] The antenna module (197) can transmit or receive signals or power to or from an external device (e.g., an external electronic device). In one embodiment, the antenna module (197) may include an antenna including a radiator formed of a conductor or a conductive pattern formed on a substrate (e.g., a printed circuit board (PCB)). In one embodiment, the antenna module (197) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as the first network (198) or the second network (199), may be selected from the plurality of antennas by, for example, the communication module (190). A signal or power may be transmitted or received between the communication module (190) and an external electronic device through the selected at least one antenna. In some embodiments, in addition to the radiator, another component (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as a part of the antenna module (197).

[0037] According to various embodiments, the antenna module (197) may form a mmWave antenna module. According to one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent a first side (e.g., a bottom side) of the printed circuit board and capable of supporting a designated high-frequency band (e.g., a mmWave band), and a plurality of antennas (e.g., an array antenna) disposed on or adjacent a second side (e.g., a top side or a side side) of the printed circuit board and capable of transmitting or receiving signals in the designated high-frequency band.

[0038] At least some of the above components can be interconnected and exchange signals (e.g., commands or data) with each other via a communication method between peripheral devices (e.g., a bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)).

[0039] According to one embodiment, commands or data may be transmitted or received between the electronic device (101) and an external electronic device (104) via a server (108) connected to a second network (199). Each of the external electronic devices (102 or 104) may be the same or a different type of device as the electronic device (101). According to one embodiment, all or part of the operations executed in the electronic device (101) may be executed in one or more of the external electronic devices (102, 104, or 108). For example, when the electronic device (101) is to perform a certain function or service automatically or in response to a request from a user or another device, the electronic device (101) may, instead of or in addition to executing the function or service itself, request one or more external electronic devices to perform the function or at least a part of the service. One or more external electronic devices that receive the request may execute at least a portion of the requested function or service, or an additional function or service related to the request, and transmit the result of the execution to the electronic device (101). The electronic device (101) may process the result as is or additionally and provide it as at least a portion of a response to the request. For this purpose, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used, for example. The electronic device (101) may provide an ultra-low latency service by using distributed computing or mobile edge computing, for example. In another embodiment, the external electronic device (104) may include an Internet of Things (IoT) device. The server (108) may be an intelligent server using machine learning and / or a neural network. According to one embodiment, the external electronic device (104) or the server (108) may be included in the second network (199).The electronic device (101) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

[0040] FIGS. 2A, 2B, and 2C illustrate examples of electronic devices including radio frequency (RF) switching circuits according to various embodiments of the present invention.

[0041] Referring to FIG. 2A, the electronic device (101) may include a processor (210), an RF transceiver (220) (e.g., RFIC), an RF front end (RFFE) module (230), and an antenna (240). The electronic device (101) may include the processor (210). The processor (210) may include, for example, at least one of an application processor (AP) (e.g., the main processor (121) of FIG. 1)) or a communication processor (CP) (e.g., the auxiliary processor (123) of FIG. 1). For example, the processor (210) may include an AP and a CP. For example, the processor may include an AP. For example, the processor (210) may include a CP. The processor (210) may control the RF transceiver (220) via a control interface (211). For example, the processor (210) can generate a baseband signal. The processor (210) can control the RF transceiver (220) to process the generated baseband signal. The processor (210) can transmit a signal (213a) (e.g., analog data or digital data). The processor (210) can control the RF transceiver (220) to transmit the signal via the antenna (240). The processor (210) can receive a signal (213b) (e.g., analog data or digital data).

[0042] The electronic device (101) may include an RF transceiver (220). For example, the RF transceiver (220) may be implemented as a single chip (e.g., an RFIC chip) or as part of a single package. The RF transceiver (220) may provide an RF signal to an RFFE module (230) via a path (221). The RF transceiver (220) may include an analog to digital converter (ADC) for converting an analog signal to a digital signal. The RF transceiver (220) may include a mixer and an oscillator (e.g., a local oscillator (LO)) for down-conversion. The RF transceiver (220) may convert an RF signal received from an antenna (240) into a baseband signal so that the RF signal can be processed by the processor (210). The RF transceiver (220) may include one or more transmit ports. The RF transceiver (220) may receive an RF signal from an RFFE module (230) via a path (222). The RF transceiver (220) may include a digital to analog converter (DAC) for converting a digital signal into an analog signal. The RF transceiver (220) may include a mixer and an oscillator for up-conversion. The RF transceiver (220) may convert a baseband signal generated by the processor (210) into an RF signal. The RF transceiver (220) may include one or more receive ports. The RF transceiver (220) may receive a feedback signal provided from a component (e.g., a coupler (235)) of the RFFE module (230) that is electrically connected to an antenna (240). For example, the RF transceiver (220) may include a feedback receive port (FBRX) for a feedback signal. The coupler (235) may be electrically connected to the FBRX via a feedback path (251).The RF transceiver (220) can control at least a portion of the modulator or RFFE module (230) via a mobile industry processor interface (MIPI) interface.

[0043] The electronic device (101) may include an RFFE module (230). The RFFE module (230) may be configured to transmit a transmission signal from an RF transceiver (220) to an antenna (240). The RFFE module (230) may include a power amplifier (PA) (231), a duplexer (233), and / or a coupler (235) for a transmission path. The coupler (235) may provide a signal (hereinafter, a feedback signal) obtained through coupling with a signal transmitted to the antenna (240) to the RF transceiver (220) through a feedback path (251). The RF signal generated by the RF transceiver (220) may be radiated into the air through the antenna (240) via the transmission path. The RFFE module (230) may transmit a reception signal from the antenna (240) to the RF transceiver (220). For example, the RFFE module (230) may include components for a receive path in addition to components for a transmit path. The RFFE module (230) may include a low noise amplifier (LNA) (232) for the receive path. For example, in a frequency division duplex (FDD) frequency band, the RF path may be branched into a transmit path (e.g., path (221)) and a receive path (e.g., path (222)) through a duplexer (233) of the RFFE module (230).

[0044] According to one embodiment, the electronic device (101) may include an RF switching circuit (260) connected to a path between an RFFE module (230) and an antenna (240). For example, the RF switching circuit (260) may be a single pole n-throw (SPnT) switch (e.g., single pole double throw (SPDT), single pole four throw (SP4T)). The RF switching circuit (260) may be used for impedance tuning (or may be referred to as impedance matching). Impedance tuning refers to a technique for reducing power loss by adjusting the impedance of a load to correspond to the impedance of a circuit. The RF switching circuit (260) may be connected to a plurality of passive elements (e.g., inductors, capacitors, resistors). For example, RF output ports of the RF switching circuit (260) may be connected to each of the plurality of passive elements. Each of the plurality of passive elements may be connected to ground. The RF switching circuit (260) may electrically connect one of the plurality of passive elements to the path. For example, based on the control of the processor (210) or the RF transceiver (220), the RF switching circuit (260) may connect one of the plurality of passive elements to the path so that the impedance of the antenna load approaches the characteristic impedance.

[0045] Referring to FIG. 2B, the electronic device (101) may include a processor (210), an RF transceiver (220), an RFFE module (230), a first antenna (241), and a second antenna (242). To explain the components and operations of the processor (210), the RF transceiver (220), and the RFFE module (230), the descriptions of FIG. 2A may be referred to.

[0046] According to one embodiment, the electronic device (101) may include an RF switching circuit (260) connected to a first antenna (241) and a second antenna (242). For example, the RF switching circuit (260) may be a SPDT. The RF switching circuit (260) may be configured to connect the first antenna (241) or the second antenna (242) to the RFFE module (230) based on the control of the processor (210) or the RF transceiver (220). For example, the electronic device (101) may transmit a transmission signal in the frequency band of the duplexer (233) through the first antenna (241) or through the second antenna (242). The electronic device (101) may use one of a first transmission path for transmitting a signal through the first antenna (241) and a second transmission path for transmitting a signal through the second antenna (242). The electronic device (101) may be configured to electrically connect either the first transmission path or the second transmission path to the RFFE module (230) selectively via an RF switching circuit (260) connected to the RFFE module (230).

[0047] Referring to FIG. 2c, the electronic device (101) may include a processor (210), an RF transceiver (220), an RFFE module (280), and an antenna (240). To explain the components and operations of the processor (210), the RF transceiver (220), the RFFE module (280), and the antenna (240), the descriptions of FIG. 2a may be referred to.

[0048] According to one embodiment, the RFFE module (230) may include a PA (231), an LNA (232), an RF switching circuit (260), and / or a coupler (235). For example, the RFFE module (280) may support a time division duplex (TDD) frequency band. Since the TDD frequency band has the same transmit frequency band and receive frequency band, the RFFE module (280) may include an RF switching circuit (260) instead of a duplexer (233). For example, the RF switching circuit (260) may be a SPDT. An RF common (RFC) port of the RF switching circuit (260) may be electrically connected to an antenna (240). The RF common port may be a port corresponding to a pole in an SPDT. A first RF port of the RF switching circuit (260) may be connected to a transmission path for the PA (231), and a second RF port of the RF switching circuit (260) may be connected to a reception path for the LNA (232). The RF switching circuit (260) may selectively electrically connect the transmission path for the PA (231) or the reception path for the LNA (232) to the antenna (240) based on control of the processor (210) or the RF transceiver (220).

[0049] Although examples of RF switching circuits according to embodiments of the present disclosure are described in FIGS. 2A to 2C, the embodiments of the present disclosure are not limited to the examples described above. In addition to the examples of FIGS. 2A to 2C, an RF switching circuit (260) may be used as a component for passing or blocking RF signals.

[0050] A switch applied to an RF circuit (hereinafter, referred to as an RF switch) may include a plurality of transistors for switching operation of an RF path. In order to secure linearity and isolation of the transistors, a negative voltage may be applied to the gate and / or body of some of the transistors. For example, in order to activate a specific RF path, a positive voltage may be applied to the gate of a field effect transistor (FET) on the specific RF path. When a negative voltage is applied to the body of the FET while a positive voltage is applied to the gate of the FET, the occurrence of leakage current may be reduced due to the reverse bias between the source-substrate and the drain-substrate. In addition, for example, a shunt FET arranged in parallel to a specific RF path may have its FET channel activated when a positive voltage is applied to the gate due to an RF signal in a situation where a '0' bias is applied to the gate. To inactivate the FET channel of the shunt FET, a negative voltage can be applied to the gate of the shunt FET.

[0051] The RF switching circuit can utilize not only a positive voltage but also a negative voltage for the switching operation described above. A method of converting a positive voltage obtained from a power supply circuit (e.g., a power management integrated circuit (PMIC)) into a negative voltage through a charge-pump circuit may be considered, but the charge-pump circuit may increase the size of the switch and complicate the design. Therefore, in embodiments of the present disclosure, an RF switching circuit configured to generate a negative voltage used for the switching operation of a transistor without the charge-pump circuit is proposed. Hereinafter, components of the RF switching circuit for generating the negative voltage are described with reference to FIGS. 3 to 5 .

[0052] FIG. 3 illustrates an example of a functional configuration of an RF switching circuit (e.g., RF switching circuit (260)) according to various embodiments of the present invention.

[0053] Referring to FIG. 3, the RF switching circuit (260) may include a voltage supply circuit (310), a switching operation circuit (320), and a converter circuit (330). The switching operation circuit (320) may include an RF common (RFC) port (331), a first RF port (341), and a second RF port (342) to form an RF path within the RF switching circuit (260). The RF common port (331) may be electrically connected to one of the first RF port (341) or the second RF port (342). In FIG. 3, an SPDT is illustrated as an example of the RF switching circuit (260), but embodiments of the present disclosure are not limited thereto. For example, additional RF ports may be arranged in the RF switching circuit to implement SP4T.

[0054] The voltage supply circuit (310) can supply voltage to the switching operation circuit (320). The voltage supply circuit (310) can obtain a power signal (350) from an external component (e.g., a power supply circuit, a PMIC) of the RF switching circuit (260). The power signal (350) can have a positive voltage for driving the RF switching circuit (260). The voltage supply circuit (310) can use a negative voltage in addition to the positive voltage for linearity and / or isolation of the transistor. The voltage supply circuit (310) can obtain a DC signal (365) having a negative voltage from the converter circuit (330). The voltage supply circuit (310) can provide a first voltage (371) corresponding to the power signal (350) and a second voltage (372) corresponding to the DC signal (365) to the switching operation circuit (320). For example, the voltage supply circuit (310) can provide the voltage of the acquired signal as is to the switching operation circuit (320) without a separate voltage level conversion. The voltage supply circuit (310) can provide the positive voltage of the power signal (350) as a first voltage (371) to the switching operation circuit (320). The voltage supply circuit (310) can provide the negative voltage of the DC signal (365) as a second voltage (372) to the switching operation circuit (320). As another example, the voltage supply circuit (310) can include a level shifter. The level shifter can generate a first voltage (371) having a positive voltage by changing the voltage level of the power signal (350). The level shifter can generate a second voltage (372) having a negative voltage by changing the voltage level of the DC signal (365). The voltage supply circuit (310) can provide a first voltage (371) and a second voltage (372) to the switching operation circuit (320).

[0055] The switching operation circuit (320) may include a transistor circuit for switching by RF port. The first voltage (371) and the second voltage (372) may be used to activate or block the transistor circuits within the switching operation circuit (320). Depending on the connection mode of the RF switching circuit (260), it may be determined which path of the transistor circuit is to be activated and which path of the transistor circuit is to be blocked. For example, a positive voltage (e.g., the first voltage (371)) may be applied to the gate of an FET on the path of a transistor circuit for activating. For example, a negative voltage (e.g., the second voltage (372)) may be applied to the gate of an FET on the path of a transistor circuit for deactivating. The switching operation circuit (320) may include a coupler (325). The coupler (325) may pass an RF signal input to the RF common port (331). The above-described passed RF signal may be provided to each transistor circuit of the switching operation circuit (320). The RF signal may be transmitted to an RF port (e.g., a first RF port (371), a second RF port (372)) through an activated transistor circuit. The coupler (325) may couple an RF signal input to an RF common port (331). The coupler (325) may be used to provide at least a portion of the RF signal (e.g., an RF signal (360)) to the converter circuit (330). The coupled RF signal (360) may be provided to the converter circuit (330). In the present disclosure, a transistor circuit represents a circuit composed of one or more transistors, and may be referred to as a FET circuit, an FET stack circuit, stacked FETs, a semiconductor circuit, a stacked FET, a series FET, a series FET circuit, a shunt FET circuit, and / or equivalent technical terms thereof in addition to a transistor circuit.

[0056] The converter circuit (330) can obtain an RF signal (360) from the coupler (325) of the switching operation circuit (320). The converter circuit (330) can convert the RF signal (360) into a DC signal (365). The converter circuit (330) can convert the RF signal (360) into a DC signal (365) based on RF-DC conversion (or AC (alternating current)-DC conversion). According to one embodiment, the converter circuit (330) can be configured to rectify a negative component of a waveform of the RF signal (360) to generate a DC signal (365) having a negative voltage. The converter circuit (330) can generate a signal (365) having a negative voltage by rectifying the signal during a cycle in which the waveform of the RF signal (360) has a negative component. For example, the converter circuit (330) may include a rectifier diode configured to flow a negative component. The converter circuit (330) may be configured to transmit a DC signal (365) to the voltage supply circuit (310). In the present disclosure, the converter circuit (330) may represent a circuit configured to perform RF-DC conversion. The RF-DC conversion may be referred to as AC-DC conversion, variable voltage-to-fixed voltage conversion, RF-to-negative voltage conversion, and / or equivalent technical terms in addition to RF-DC conversion. In addition, in implementing the RF-DC conversion, the conversion may include an operation in which an RF signal having a waveform obtains a substantially fixed voltage magnitude (e.g., including a voltage value within a critical range having a ripple) through a capacitor and a rectifier (e.g., a diode).

[0057] FIG. 4 illustrates examples of components of a switching operation circuit (e.g., a switching operation circuit (320)) according to various embodiments of the present invention. As an example of the RF switching circuit (260), a SPDT is illustrated, but embodiments of the present disclosure are not limited thereto. For example, to implement a SP4T, additional RF ports and transistor circuits may be included in the RF switching circuit. The same reference numbers may be used for the same description.

[0058] Referring to FIG. 4, the switching operation circuit (320) may include a coupler (325) for extracting an RF signal (360). The coupler (325) may include an input port connected to an RF common port (331), a pass port connected to an input terminal (405) of transistor circuits, and a coupling port for feedback. The coupler (325) may obtain an RF signal (360) coupled from an RF signal obtained through the RF common port (331). The coupler (325) may output the RF signal (360) through the coupling port.

[0059] The switching operation circuit (320) may include a first transistor circuit (411) for the first RF port (341). The first transistor circuit (411) may obtain a voltage (e.g., a first voltage (371) and / or a second voltage (372)) from the voltage supply circuit (310) via the first voltage path (461). The first transistor circuit (411) may electrically connect the RF common port (331) and the first RF port (341) based on the voltage (e.g., the first voltage (371) and / or the second voltage (372)) from the voltage supply circuit (310). For example, the first transistor circuit (411) may include FETs arranged in series between the RF common port (331) and the first RF port (341). As an example, the FETs may be stacked FETs. The switching operation circuit (320) can activate a transistor circuit (e.g., a first transistor circuit (411)) between the RF common port (331) and the first RF port (341) and block another transistor circuit (e.g., a second transistor circuit) for electrical connection between the RF common port (331) and the first RF port (341) of the RF switching circuit (260). Activation or blocking of the transistor circuit can be performed based on a first voltage (371) and a second voltage (372).

[0060] The switching operation circuit (320) may include a second transistor circuit (412) for the second RF port (342). The second transistor circuit (412) may obtain a voltage (e.g., a first voltage (371) and / or a second voltage (372)) from the voltage supply circuit (310) via the second voltage path (462). The second transistor circuit (412) may electrically connect the RF common port (331) and the second RF port (342) based on the voltage (e.g., the first voltage (371) and / or the second voltage (372)) from the voltage supply circuit (310). For example, the second transistor circuit (412) may include FETs arranged in series between the RF common port (331) and the second RF port (342). As an example, the FETs may be stacked FETs. The switching operation circuit (320) can activate a transistor circuit (e.g., a second transistor circuit (412)) between the RF common port (331) and the second RF port (342) and block another transistor circuit (e.g., a first transistor circuit) for electrical connection between the RF common port (331) and the second RF port (342) of the RF switching circuit (260). Activation or blocking of the transistor circuit can be performed based on a first voltage (371) and a second voltage (372).

[0061] In the first connection mode (401), the electronic device (101) can electrically connect the RF common port (331) to the first RF port (341). The processor (210) can control the RF switching circuit (260) to connect the RF common port (331) to the first RF port (341) in the first connection mode (401). In the first connection mode (401), a positive voltage (e.g., a first voltage (371)) can be applied to the gates of the FETs of the first transistor circuit (411). While the positive voltage (e.g., the first voltage (371)) is applied to the gates of the FETs of the first transistor circuit (411), a negative voltage (e.g., a second voltage (372)) can be applied to the bodies (e.g., the substrate) of the FETs. As a negative voltage is applied to the body, the threshold voltage may increase and the leakage current may decrease. In the first connection mode (401), while a positive voltage (e.g., a first voltage (371)) is applied to the gates of the FETs of the first transistor circuit (411), a negative voltage (e.g., a second voltage (372)) may be applied to the gates of the FETs of the second transistor circuit (412). In order to block the electrical connection between the RF common port (331) and the second RF port (342) due to the RF signal, a negative voltage (e.g., a second voltage (372)) may be applied to the gates of the FETs of the second transistor circuit (412).

[0062] In the second connection mode (402), the electronic device (101) can electrically connect the RF common port (331) to the second RF port (342). The processor (210) can control the RF switching circuit (260) to connect the RF common port (331) to the second RF port (342) in the second connection mode (402). In the second connection mode (402), a positive voltage (e.g., a first voltage (371)) can be applied to the gates of the FETs of the second transistor circuit (412). While the positive voltage (e.g., the first voltage (371)) is applied to the gates of the FETs of the second transistor circuit (412), a negative voltage (e.g., a second voltage (372)) can be applied to the bodies (e.g., the substrate) of the FETs. As a negative voltage is applied to the body, the threshold voltage may increase and the leakage current may decrease. In the second connection mode (402), while a positive voltage (e.g., the first voltage (371)) is applied to the gates of the FETs of the second transistor circuit (412), a negative voltage (e.g., the second voltage (372)) may be applied to the gates of the FETs of the first transistor circuit (411). In order to block the electrical connection between the RF common port (331) and the first RF port (341) due to the RF signal, a negative voltage (e.g., the second voltage (372)) may be applied to the gates of the FETs of the first transistor circuit (411).

[0063] FIG. 5 illustrates an example of an RF switching circuit (e.g., an RF switching circuit 260) for generating a negative voltage through RF-to-DC (direct current) conversion according to various embodiments of the present invention. As an example of the RF switching circuit (260), an SPDT is illustrated, but embodiments of the present disclosure are not limited thereto. For example, for the implementation of an SP4T, additional RF ports and transistor circuits may be included in the RF switching circuit. The same reference numbers may be used for the same description.

[0064] Referring to FIG. 5, the RF switching circuit (260) can obtain a power signal (350) from the power supply circuit (550). The power signal (350) can have a positive voltage. The voltage supply circuit (310) can obtain a DC signal (365) from the converter circuit (330). The DC signal (365) can have a negative voltage. The voltage supply circuit (310) of the RF switching circuit (260) can include a voltage control circuit (510), a first voltage supply unit (511), and a second voltage supply unit (512). The first voltage supply unit (511) can provide a voltage to be applied to a gate of an FET in the first transistor circuit (411) and / or a voltage to be applied to a body of an FET in the first transistor circuit (411) through a first voltage path (461). The second voltage supply unit (512) can provide a voltage to be applied to a gate of an FET in the second transistor circuit (412) and / or a voltage to be applied to a body of an FET in the second transistor circuit (412) through a second voltage path (462). The voltage control circuit (510) can provide a first voltage (371) corresponding to a power signal (350) to the first voltage supply unit (511) and the second voltage supply unit (512). The voltage control circuit (510) can provide a second voltage (372) corresponding to a DC signal (365) to the first voltage supply unit (511) and the second voltage supply unit (512). For example, the voltage control circuit (510) can provide a positive voltage of the power signal (350) as the first voltage (371) to each of the first voltage supply unit (511) and the second voltage supply unit (512). The voltage control circuit (510) can provide the negative voltage of the DC signal (365) as a second voltage (372) to each of the first voltage supply unit (511) and the second voltage supply unit (512). As another example, the voltage control circuit (510) can be a level shifter.The level shifter can generate a first voltage (371) having a positive voltage by changing the voltage level of the power signal (350). The level shifter can generate a second voltage (372) having a negative voltage by changing the voltage level of the DC signal (365). The voltage control circuit (510) can provide the first voltage (371) and the second voltage (372) to the first voltage supply unit (511) and the second voltage supply unit (512), respectively. In various embodiments of the present disclosure, the level shifter includes a circuit device configured to convert, adjust, control, and / or directly use the level of the voltage, and may be referred to as a voltage providing circuit, a voltage level shifting circuit, a level shifter, a level shifting circuit, a level converter, a voltage level converter, a voltage level conversion circuit, and / or equivalent technical terms thereof in addition to the level shifter.

[0065] The RF switching circuit (260) may include a coupler (325) and a converter circuit (330) which is a feedback circuit from the coupler (325) to generate a negative voltage. The converter circuit (330) may convert an RF signal (360) obtained from the coupler (325) into a DC signal (365). The DC signal (365) may have a negative voltage. A second voltage (372) corresponding to the DC signal (365) may also have a negative voltage. The negative voltage may be applied to a body of an FET or a gate of the FET, thereby improving the linearity of transistors in the RF switching circuit (260) or the isolation performance of an RF path of each RF port. Hereinafter, examples in which the negative voltage is used for linearity and / or isolation are described with reference to FIGS. 6 and 7.

[0066] FIG. 6 illustrates examples of components of transistor circuits (e.g., a first transistor circuit (411) and a second transistor circuit (412)) of a switching operation circuit (e.g., a switching operation circuit (320)) according to various embodiments of the present invention. As an example of the RF switching circuit (260), an SPDT is illustrated, but embodiments of the present disclosure are not limited thereto. For example, for the implementation of SP4T, additional RF ports and transistor circuits may be included in the RF switching circuit. The same reference numbers may be used for the same description.

[0067] Referring to FIG. 6, the RF common port (331) can be connected to the first transistor circuit (411) and the second transistor circuit (412) through a coupler (325).

[0068] The first transistor circuit (411) may include a first series FET circuit (611) and a first shunt FET circuit (621). The first series FET circuit (611) may be used to control current flow in an electrical path (hereinafter, referred to as a first RF path) between an RF common port (331) and a first RF port (341). The first series FET circuit (611) may include first FETs arranged in series on the first RF path. The first shunt FET circuit (621) may be used to protect against damage caused by a surge voltage and to control current flowing on the first RF path. The first shunt FET circuit (621) may be arranged in parallel on the first RF path. For example, the first shunt FET circuit (621) may include third FETs arranged in parallel on the first RF path.

[0069] The second transistor circuit (412) may include a second series FET circuit (612) and a second shunt FET circuit (622). The second series FET circuit (612) may be used to control current flow in an electrical path (hereinafter, referred to as a second RF path) between the RF common port (331) and the second RF port (342). The second series FET circuit (612) may include second FETs arranged in series on the first RF path. The second shunt FET circuit (622) may be used to protect against damage caused by a surge voltage and to control current flowing on the second RF path. The second shunt FET circuit (622) may be arranged in parallel on the second RF path. For example, the second shunt FET circuit (622) may include four FETs arranged in parallel on the second RF path.

[0070] The first transistor circuit (411) can obtain a first voltage (650) having a positive voltage and a second voltage (665) having a negative voltage from the voltage supply circuit (310). The second transistor circuit (412) can obtain a first voltage (650) having a positive voltage and a second voltage (665) having a negative voltage from the voltage supply circuit (310). The first voltage (650) can be provided based on a power signal (350) from a power supply circuit (e.g., power supply circuit (550)). The second voltage (665) can be provided based on a DC signal (365) from a converter circuit (330). The first voltage (650) and the second voltage (665) can be applied to the gate and / or the body for a switching operation of the FETs of the switching operation circuit (320).

[0071] In FIG. 6, a situation is described in which voltages are applied to the first series FET circuit (611), the first shunt FET circuit (621), the second series FET circuit (612), and / or the second shunt FET circuit (622) when the RF common port (331) and the first RF port (341) are electrically connected. For example, when the RF common port (331) and the first RF port (341) are electrically connected, the second voltage (665) having the negative voltage may be applied to the body of the FET of the first series FET circuit (611). By applying the negative voltage to the body of the FET while the first voltage (650) having the positive voltage is applied to the gate of the FET, the linearity of the FET may be improved.

[0072] For example, when the RF common port (331) and the first RF port (341) are electrically connected, the second voltage (665) having the negative voltage can be applied to the gate of the FET of the second series FET circuit (612). As the negative voltage is applied to the gate of the FET on the second RF path that is different from the first RF path that is electrically connected, the channel of the path other than the first RF path that is activated (e.g., the second RF path) is completely turned off, so that the isolation performance can be improved. Additionally, in order to improve the isolation performance, the first voltage (650) having the positive voltage can be applied to the body of the FET.

[0073] For example, when the RF common port (331) and the first RF port (341) are electrically connected, the second voltage (665) having the negative voltage can be applied to the gate of the shunt FET of the first shunt FET circuit (621). As the negative voltage is applied to the gate of the shunt FET, the isolation performance can be improved. Additionally, in order to improve the isolation performance, the first voltage (650) having the positive voltage can be applied to the body of the FET.

[0074] For example, when the RF common port (331) and the first RF port (341) are electrically connected, the second voltage (665) having the negative voltage can be applied to the body of the shunt FET of the second shunt FET circuit (622). In order to block the RF signal to the second RF port (342), the first voltage (650) having the positive voltage can be applied to the gate of the shunt FET of the second shunt FET circuit (622). By applying the negative voltage to the body of the shunt FET while the first voltage (650) having the positive voltage is applied to the gate of the shunt FET, the linearity of the shunt FET and the isolation of the first RF path with respect to the second RF path can be improved.

[0075] In FIG. 6, a situation is described in which voltages are applied to the first series FET circuit (611), the first shunt FET circuit (621), the second series FET circuit (612), and / or the second shunt FET circuit (622) when the RF common port (331) and the first RF port (341) are electrically connected. However, the technical principles described through FIG. 6 can be equally applied even when the RF common port (331) and the second RF port (342) are electrically connected. For example, when the RF common port (331) and the second RF port (342) are electrically connected, the second voltage (665) having the negative voltage can be applied to the body of the FET of the second series FET circuit (612). For example, when the RF common port (331) and the second RF port (342) are electrically connected, the second voltage (665) having the negative voltage can be applied to the gate of the FET of the first series FET circuit (611). For example, when the RF common port (331) and the second RF port (342) are electrically connected, the second voltage (665) having the negative voltage can be applied to the gate of the shunt FET of the second shunt FET circuit (622). For example, when the RF common port (331) and the second RF port (342) are electrically connected, the second voltage (665) having the negative voltage can be applied to the body of the shunt FET of the first shunt FET circuit (621).

[0076] FIG. 7 illustrates examples of transistor circuits (e.g., a first transistor circuit (411) and a second transistor circuit (412)) of a switching operation circuit (e.g., a switching operation circuit (320)) according to various embodiments of the present invention. As an example of the RF switching circuit (260), an SPDT is illustrated, but embodiments of the present disclosure are not limited thereto. For example, for the implementation of SP4T, additional RF ports and transistor circuits may be included in the RF switching circuit. The same reference numbers may be used for the same description.

[0077] Referring to FIG. 7, the electronic device (101) can electrically connect the RF common port (331) to the first RF port (341). The processor (210) can control the RF switching circuit (260) to connect the RF common port (331) to the first RF port (341) in the first connection mode (e.g., the first connection mode (401)).

[0078] The first series FET circuit (611) may include a plurality of first FETs (711). A drain terminal of a start FET of the plurality of first FETs (711) may be connected to an input terminal (705) through a capacitor (703a). A source terminal of a last FET of the plurality of first FETs (711) may be connected to a first RF port (341) through a capacitor (703b). When a first voltage (650) having a positive voltage is applied to the gates of the plurality of first FETs (711), a current may flow on the first RF path (701). A second voltage (665) having a negative voltage may be applied to a load (703e) connected to the source terminal. Through the load (703e), a negative voltage can be applied to the bodies (e.g., substrates of the stacked FETs) of the plurality of first FETs (711). While the first voltage (650) is applied to the gates of the plurality of first FETs (711), a second voltage (665) having a negative voltage is applied to the bodies, thereby improving the linearity of the FETs. The first shunt FET circuit (621) can include a plurality of third FETs (721). A drain terminal of a start FET of the plurality of third FETs (721) can be connected to the first RF path (701) through a capacitor (703c). A source terminal of a last FET of the plurality of third FETs (721) can be connected to ground through a capacitor (703d). A second voltage (665) having a negative voltage may be applied to the gates of the plurality of third FETs (721) so that the current flowing on the first RF path (701) does not flow into the first shunt FET circuit (621) connected in parallel. In addition, a first voltage (650) having a positive voltage may be applied to a load (703f) connected to the source terminal. Through the load (703f), a positive voltage may be applied to the bodies (e.g., substrates of the stack FET) of the plurality of third FETs (721).

[0079] The second series FET circuit (612) may include a plurality of second FETs (712). A drain terminal of a start FET of the plurality of second FETs (712) may be connected to an input terminal (705) through a capacitor (704a). A source terminal of a last FET of the plurality of second FETs (712) may be connected to a second RF port (342) through a capacitor (704b). As a second voltage (665) having a negative voltage is applied to the gates of the plurality of second FETs (712), no current may flow on the second RF path (702). A first voltage (650) having a positive voltage may be applied to a load (704e) connected to the source terminal. Through the load (704e), a negative voltage may be applied to the bodies (e.g., substrates of the stacked FETs) of the plurality of second FETs (712). While the second voltage (665) is applied to the gates of the plurality of second FETs (712), a first voltage (650) having a positive voltage may be applied to the bodies, thereby improving the linearity of the FETs. The second shunt FET circuit (622) may include a plurality of fourth FETs (722). A drain terminal of a start FET of the plurality of fourth FETs (722) may be connected to the second RF path (702) through a capacitor (704c). A source terminal of a last FET of the plurality of fourth FETs (722) may be connected to ground through a capacitor (704d). A first voltage (650) having a positive voltage may be applied to the gates of the plurality of fourth FETs (722) so that even if a current flows on the second RF path (702), the current does not flow into the second RF port (342) but flows to the second shunt FET circuit (622) connected in parallel. In addition, a second voltage (665) having a negative voltage may be applied to a load (704f) connected to the source terminal. Through the load (704f), a negative voltage may be applied to the body (e.g., the substrate of the stack FET) of the plurality of fourth FETs (722).

[0080] For comparison between the magnitude of the negative voltage obtained through DC conversion of the RF signal (360) and the voltage for the operation of the FET (e.g., threshold voltage), the output power of the RF signal passing through the coupler (325) can be used. The magnitude of the voltage applied to the FETs according to the output power of the RF signal can be determined based on the mathematical equation below.

[0081] [Mathematical Formula 1]

[0082] P out = 10*log(P watt ) + 30

[0083] P out represents the output power in dBm, and P watt represents the output power in Watts.

[0084] [Equation 2]

[0085] P watt = 10 (Pout / 10) * 0.001 = V RMS 2 / Z0

[0086] Z0 represents the load impedance, and V RMS represents the RMS voltage magnitude.

[0087] [Equation 3]

[0088] V PEAK = (2*Z0*P watt ) 0.5

[0089] V PEAK represents the maximum voltage magnitude.

[0090] [Equation 4]

[0091] V pp = V PEAK * 2

[0092] V pp represents twice the maximum voltage magnitude.

[0093] [Equation 5]

[0094] V max= V PP / 2 * [1+ ]

[0095] V max is VSWR (voltage standing wave ratio) and P out Indicates the magnitude of the voltage applied to the FET circuit. For example, assuming that the characteristic impedance (Z0) is approximately 50 ohms, the relationship between the voltage magnitude and the output of the RF signal can be determined based on the table below.

[0096] Pout[dBm]Pwatt[W]Vpeak[V]Vpp[V]VSWRVmax[V]240.2515.01210.02430.0009.700140. 0251.5853.1702.0002.113150.0321.7783.55730.0003.44250.0030.5621.1252.0000.7 50342.51215.84931.69810.00028.816353.16217.78335.56610.00032.332363.98119.95339.90510.00036.277375.01222.38744.77410.00040.704386.31025.11950.23810.00 045.671397.94328.18456.36810.00051.2434010.00031.62363.24610.00057.4964112.58935.48170.96310.00064.5124215.84939.81179.62110.00072.3834319.95344.66889 .33710.00081.2154425.11950.119100.23710.00091.1254531.62356.234112.46810.000102.2444639.81163.096126.19110.000114.7204750.11970.795141.58910.000128.717

[0097] For example, the output power of the RF signal passing through the coupler (325) may be 24 dBm. The first series FET circuit (611) may include five first FETs (711). The second series FET circuit (612) may include five second FETs (712). The first FETs (711) and the second FETs (712) may be stacked. For example, the voltage applied to the second FETs (712) may be about 9.7 V. About 1.94 V may be applied to each FET by the RF signal. Meanwhile, the coupler (325) may extract an RF signal (360) based on the RF signal and convert the extracted RF signal (360) into a DC signal (365). For example, assuming that the coupling factor of the coupler (325) is about 10 dB, the magnitude of the RF signal (360) may be about 14 dBm. The magnitude of the negative voltage of the DC signal (365) may be about -2 V. Assuming that the turn-on voltage of the FET is 0.7 V, the RF signal passing through the coupler may cause the FET of the second RF path (702) (e.g., the FET of the second series FET circuit (712)) to turn on. To prevent this turn-on, a negative voltage (e.g., about -2 V) may be applied to the gate of the FET. Due to the negative voltage being applied to the gate, the FET of the second RF path (702) may be turned off. Since no current flows on the second RF path (702), the isolation performance of the first RF path (701) may be improved.

[0098] For example, the output power of the RF signal passing through the coupler (325) may be 15 dBm. The voltage applied to the second FETs (712) may be about 3.5 V. About 0.7 V may be applied to each FET by the RF signal. Meanwhile, the coupler (325) may extract the RF signal (360) based on the RF signal and convert the extracted RF signal (360) into a DC signal (365). For example, assuming a coupling factor of about 10 dB, the magnitude of the RF signal (360) may be about 5 dBm. The magnitude of the negative voltage of the DC signal (365) may be about -0.75 V. Assuming that the turn-on voltage of the FET is 0.7 V, the FET of the second RF path (702) (e.g., the FET of the second series FET circuit (712)) may be turned on due to the RF signal passing through the coupler. To prevent this turn-on, a negative voltage (e.g., about -0.75 V) may be applied to the gate of the FET. Due to the negative voltage being applied to the gate, the FET of the second RF path (702) may be turned off. Since no current flows on the second RF path (702), the isolation performance of the first RF path (701) may be improved.

[0099] In FIG. 7, a situation is described in which voltages are applied to the first series FET circuit (611), the first shunt FET circuit (621), the second series FET circuit (612), and / or the second shunt FET circuit (622) when the RF common port (331) and the first RF port (341) are electrically connected. However, the technical principles described through FIG. 7 can be equally applied even when the RF common port (331) and the second RF port (342) are electrically connected.

[0100] In embodiments, a radio frequency (RF) switching circuit (260) is provided. The RF switching circuit (260) may include a plurality of RF ports including an RF common port (331), a first RF port (341), and a second RF port (342), a plurality of transistor circuits including a first transistor circuit (441) for the first RF port (341) and a second transistor circuit (442) for the second RF port (342), a voltage supply circuit (310) configured to provide a voltage to the plurality of transistor circuits to selectively electrically connect one of the plurality of RF ports to the RF common port (331), a coupler (325) connected to the RF common port (331), and a converter circuit (330) configured to convert an RF signal obtained from the coupler (325) into a direct current (DC) signal (365) having a negative voltage. The voltage supply circuit (310) may be configured to obtain a power signal (350) having a positive voltage from a power supply circuit (550) and to obtain the DC signal (365) having a negative voltage. The voltage supply circuit (310) may be configured to provide a first voltage (371; 650) corresponding to the power signal (350) and a second voltage (372; 665) corresponding to the DC signal (365) to each transistor circuit of the plurality of transistor circuits.

[0101] According to one embodiment, the voltage supply circuit (310) may be configured to apply the first voltage (371; 650) to each gate of at least one first field effect transistor (FET) of the first transistor circuit (441) and to apply the second voltage (372; 665) to each gate of at least one second FET of the second transistor circuit (442), in a first connection mode for electrically connecting the RF common port (331) and the first RF port (341). The voltage supply circuit (310) may be configured to apply the second voltage (372; 665) to each gate of at least one first FET of the first transistor circuit (441) and to apply the first voltage (371; 650) to each gate of at least one second FET of the second transistor circuit (442) in a second connection mode for electrically connecting the RF common port (331) and the second RF port (342).

[0102] According to one embodiment, the converter circuit (330) may be configured to obtain the RF signal from the coupler (325). The converter circuit (330) may be configured to generate the DC signal (365) having the negative voltage by rectifying a negative component of a waveform of the RF signal.

[0103] According to one embodiment, the input port of the coupler (325) may be connected to the RF common port (331). The pass port of the coupler (325) may be connected to the input terminals of the plurality of transistor circuits for receiving the RF signal of the RF common port (331). The coupling port of the coupler (325) may be connected to the converter circuit (330).

[0104] According to one embodiment, the voltage supply circuit (310) may include a level shifter configured to generate a first voltage (371; 650) by adjusting a voltage level of the positive voltage and to generate a second voltage (372; 665) by adjusting a voltage level of the negative voltage. The level shifter may be configured to obtain the positive voltage from the power supply circuit (550) and the negative voltage from the converter circuit (330).

[0105] According to one embodiment, the voltage supply circuit (310) may be connected to the power supply circuit (550) for providing the positive voltage without a charge pump circuit for DC-DC conversion. The voltage supply circuit (310) may be connected to the converter circuit (330) for providing the negative voltage through an AC (alternating current)-DC conversion different from the DC-DC conversion.

[0106] According to one embodiment, the first transistor circuit (441) may include a first series field effect transistor (FET) circuit connecting the RF common port (331) and the first RF port (341). The second transistor circuit (442) may include a second series FET circuit connecting the RF common port (331) and the second RF port (342). The RF common port (331) may be connected to a first drain terminal of the first series FET circuit and a second drain terminal of the second series FET circuit through the coupler (325).

[0107] In one embodiment, the first series FET circuit may be configured to electrically connect the RF common port (331) and the first RF port (341) based on the first voltage (371; 650) and the second voltage (372; 665) in a first connection mode. The second series FET circuit may be configured to electrically connect the RF common port (331) and the second RF port (342) based on the first voltage (371; 650) and the second voltage (372; 665) in a second connection mode.

[0108] In one embodiment, the voltage supply circuit (310) may be configured to apply the second voltage (372; 665) to the first body terminals of the first FETs of the first series FET circuit while the first voltage (371; 650) is applied to the first gates of the first FETs of the first series FET circuit in the first connection mode. The voltage supply circuit (310) may be configured to apply the first voltage (371; 650) to the second body terminals of the second FETs of the second series FET circuit while the second voltage (372; 665) is applied to the second gates of the second FETs of the second series FET circuit in the first connection mode.

[0109] In one embodiment, the voltage supply circuit (310) may be configured to apply the first voltage (371; 650) to the first body terminals of the first FETs of the first series FET circuit while the second voltage (372; 665) is applied to the first gates of the first FETs of the first series FET circuit in the second connection mode. The voltage supply circuit (310) may be configured to apply the second voltage (372; 665) to the second body terminals of the second FETs of the second series FET circuit while the first voltage (371; 650) is applied to the second gates of the second FETs of the second series FET circuit in the second connection mode.

[0110] In one embodiment, the first transistor circuit (441) may include a first shunt FET circuit connected in parallel to the first RF port (341) and the first series FET circuit. The second transistor circuit (442) may include a second shunt FET circuit connected in parallel to the second RF port (342) and the second series FET circuit. The voltage supply circuit (310) may be configured to apply the second voltage (372; 665) to third gates of third FETs of the first shunt FET circuit and to apply the first voltage (371; 650) to fourth gates of fourth FETs of the second shunt FET circuit in the first connection mode. The voltage supply circuit (310) may be configured to apply the first voltage (371; 650) to the third gates of the third FETs of the first shunt FET circuit and to apply the second voltage (372; 665) to the fourth gates of the fourth FETs of the second shunt FET circuit in the second connection mode.

[0111] In one embodiment, the voltage supply circuit (310) may be configured to apply the first voltage (371; 650) to the third body terminals of the third FETs while the second voltage (372; 665) is applied to the third gates of the third FETs in the first connection mode. The voltage supply circuit (310) may be configured to apply the second voltage (372; 665) to the fourth body terminals of the fourth FETs while the first voltage (371; 650) is applied to the fourth gates of the fourth FETs in the first connection mode.

[0112] In one embodiment, the voltage supply circuit (310) may be configured to apply the second voltage (372; 665) to the third body terminals of the third FETs while the first voltage (371; 650) is applied to the third gates of the third FETs in the second connection mode. The voltage supply circuit (310) may be configured to apply the first voltage (371; 650) to the fourth body terminals of the fourth FETs while the second voltage (372; 665) is applied to the fourth gates of the fourth FETs in the second connection mode.

[0113] According to one embodiment, the coupler (325) may be disposed between the RF common port (331) and input terminals of the plurality of transistor circuits. The plurality of RF ports may include a third RF port and a fourth RF port. The plurality of transistor circuits may include a third transistor circuit connecting between the third RF port and the input terminal and a fourth transistor circuit connecting between the fourth RF port and the input terminal.

[0114] According to one embodiment, the voltage supply circuit (310) may be configured to apply the first voltage (371; 650) to the gates of the first transistor circuit (441) and the second voltage (372; 665) to the gates of the second transistor circuit (442), the third transistor circuit, and the fourth transistor circuit in a first connection mode for connecting the first RF port (341) and the RF common port (331). The voltage supply circuit (310) may be configured to apply the first voltage (371; 650) to the gates of the second transistor circuit (442) and the second voltage (372; 665) to the gates of the first transistor circuit (441), the third transistor circuit, and the fourth transistor circuit in a second connection mode for connecting the second RF port (342) and the RF common port (331). The voltage supply circuit (310) may be configured to apply the first voltage (371; 650) to the gates of the third transistor circuit and the second voltage (372; 665) to the gates of the first transistor circuit (441), the second transistor circuit (442), and the fourth transistor circuit in a third connection mode for connecting the third RF port and the RF common port (331). The voltage supply circuit (310) may be configured to apply the first voltage (371; 650) to the gates of the fourth transistor circuit and the second voltage (372; 665) to the gates of the first transistor circuit (441), the second transistor circuit (442), and the third transistor circuit in a fourth connection mode for connecting the fourth RF port and the RF common port (331).

[0115] In embodiments, an electronic device (101) is provided. The electronic device (101) may include a processor (210), an RF (radio frequency) transceiver (220), an RFFE (radio frequency front end) circuit (230), an antenna (240), an RF switching circuit (260) for impedance tuning of the antenna, and a power supply circuit (550) for the RF switching circuit (260). The RF switching circuit (260) may include a coupler (325) connected to an RF common port (331), a plurality of transistor circuits connected to the coupler (325) and for a plurality of RF ports, a voltage supply circuit (310) configured to provide a voltage to each transistor circuit of the plurality of transistor circuits to selectively electrically connect one of the plurality of RF ports to the RF common port (331), and a converter circuit (330) connected to the coupler (325) and configured to convert an RF signal into a DC (direct current) signal (365).

[0116] According to one embodiment, the converter circuit (330) may be configured to convert an RF signal obtained from the coupler (325) into a DC signal (365) having a negative voltage. The voltage supply circuit (310) may be configured to generate a first voltage (371; 650) of a positive voltage based on a power signal (350) obtained from the power supply circuit (550), and the voltage supply circuit (310) may be configured to generate a second voltage (372; 665) of the negative voltage based on the DC signal (365) obtained from the converter circuit (330). The first voltage (371; 650) and the second voltage (372; 665) may be configured to be provided to each transistor circuit of the plurality of transistor circuits.

[0117] According to one embodiment, the plurality of RF ports may include a first RF port (341) and a second RF port (342). The plurality of transistor circuits may include a first transistor circuit (441) for the first RF port (341) and a second transistor circuit (442) for the second RF port (342). The first RF port (341) may be electrically connected to a first passive element. The second RF port (342) may be electrically connected to a second passive element.

[0118] According to one embodiment, the voltage supply circuit (310) may be configured to apply the first voltage (371; 650) to each gate of at least one first field effect transistor (FET) of the first transistor circuit (441) and to apply the second voltage (372; 665) to each gate of at least one second FET of the second transistor circuit (442), in a first connection mode for electrically connecting the RF common port (331) and the first RF port (341). The voltage supply circuit (310) may be configured to apply the second voltage (372; 665) to each gate of at least one first FET of the first transistor circuit (441) and to apply the first voltage (371; 650) to each gate of at least one second FET of the second transistor circuit (442) in a second connection mode for electrically connecting the RF common port (331) and the second RF port (342).

[0119] According to one embodiment, the voltage supply circuit (310) may be connected to the power supply circuit (550) for providing the positive voltage without a charge pump circuit for DC-DC conversion. The voltage supply circuit (310) may be connected to the converter circuit (330) for providing the negative voltage through an AC (alternating current)-DC conversion different from the DC-DC conversion.

[0120] Electronic devices according to the various embodiments disclosed in this document may take various forms. Electronic devices may include, for example, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, electronic devices, or home appliances. Electronic devices according to the embodiments of this document are not limited to the aforementioned devices.

[0121] The various embodiments of this document and the terminology used therein are not intended to limit the technical features described in this document to specific embodiments, but should be understood to include various modifications, equivalents, or substitutes of the embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of the items, unless the context clearly indicates otherwise. In this document, each of the phrases "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" can include any one of the items listed together in the corresponding phrase among those phrases, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used merely to distinguish one component from another, and do not limit the components in any other respect (e.g., importance or order). When a component (e.g., a first component) is referred to as "coupled" or "connected" to another component (e.g., a second component), with or without the terms "functionally" or "communicatively," it means that the component can be connected to the other component directly (e.g., wired), wirelessly, or through a third component.

[0122] The term "module" used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit. A module may be an integral component, or a minimum unit or part of such a component that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0123] Various embodiments of the present document may be implemented as software (e.g., a program (140)) including one or more instructions stored in a storage medium (e.g., an internal memory (136) or an external memory (138)) readable by a machine (e.g., an electronic device (101)). For example, a processor (e.g., a processor (120)) of the machine (e.g., an electronic device (101)) may call at least one instruction among the one or more instructions stored from the storage medium and execute it. This enables the machine to operate to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-transitory' simply means that the storage medium is a tangible device and does not contain signals (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently or temporarily on the storage medium.

[0124] According to one embodiment, the method according to various embodiments disclosed in the present document may be provided as included in a computer program product. The computer program product may be traded as a product between a seller and a buyer. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disc read-only memory (CD-ROM)), or may be distributed online (e.g., downloaded or uploaded) through an application store (e.g., Play Store) or directly between two user devices (e.g., smart phones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily generated in a machine-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

[0125] According to various embodiments, each component (e.g., a module or a program) of the above-described components may include one or more entities, and some of the entities may be separated and placed in other components. According to various embodiments, one or more components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., a module or a program) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to various embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims

1. In electronic devices, processor; RF(radio frequency) transceiver; RFFE(radio frequency front end) circuit; antenna; RF switching circuit for impedance tuning of the above antenna; and A power supply circuit for the above RF switching circuit is included, The above RF switching circuit, Coupler connected to the RF common port; A plurality of transistor circuits connected to the above coupler and for a plurality of RF ports; A voltage supply circuit configured to provide a voltage to each transistor circuit of the plurality of transistor circuits to selectively electrically connect one of the plurality of RF ports to the RF common port; and A converter circuit comprising: a converter circuit connected to the above coupler and configured to convert an RF signal into a DC (direct current) signal; Electronic devices.

2. In claim 1, The above converter circuit is configured to convert an RF signal obtained from the coupler into a DC signal having a negative voltage, The above voltage supply circuit, Generating a first voltage of positive voltage based on a power signal obtained from the above power supply circuit, Generating a second voltage of the negative voltage based on the DC signal obtained from the converter circuit, configured to provide the first voltage and the second voltage to each transistor circuit of the plurality of transistor circuits, Electronic devices.

3. In claim 2, The above plurality of RF ports include a first RF port and a second RF port; The above plurality of transistor circuits include a first transistor circuit for the first RF port and a second transistor circuit for the second RF port, The first RF port is electrically connected to the first passive element, The second RF port is electrically connected to the second passive component, Electronic devices.

4. In claim 3, The above voltage supply circuit, In a first connection mode for electrically connecting the RF common port and the first RF port, the first voltage is applied to each gate of at least one first FET (field effect transistor) of the first transistor circuit, and the second voltage is applied to each gate of at least one second FET of the second transistor circuit. In a second connection mode for electrically connecting the RF common port and the second RF port, the second voltage is applied to each gate of at least one first FET of the first transistor circuit and the first voltage is applied to each gate of at least one second FET of the second transistor circuit. Electronic devices.

5. In claim 4, The above voltage supply circuit is connected to the power supply circuit for providing the positive voltage without a charge pump circuit for DC-DC conversion, The above voltage supply circuit is connected to the converter circuit for providing the negative voltage through an AC (alternating current)-DC conversion different from the DC-DC conversion. Electronic devices.

6. In RF(radio frequency) switching circuits, RF common port; A plurality of RF ports including a first RF port and a second RF port; A plurality of transistor circuits including a first transistor circuit for the first RF port and a second transistor circuit for the second RF port; A voltage supply circuit configured to provide a voltage to the plurality of transistor circuits to selectively electrically connect one of the plurality of RF ports to the RF common port; A coupler connected to the above RF common port; and A converter circuit configured to convert an RF signal obtained from the above coupler into a DC (direct current) signal having a negative voltage, The above voltage supply circuit, Obtaining a power signal having a positive voltage from a power supply circuit, and obtaining the DC signal having the negative voltage, configured to provide a first voltage corresponding to the power signal and a second voltage corresponding to the DC signal to each transistor circuit of the plurality of transistor circuits, RF switching circuit.

7. In claim 6, The above voltage supply circuit, In a first connection mode for electrically connecting the RF common port and the first RF port, the first voltage is applied to each gate of at least one first FET (field effect transistor) of the first transistor circuit, and the second voltage is applied to each gate of at least one second FET of the second transistor circuit. In a second connection mode for electrically connecting the RF common port and the second RF port, the second voltage is applied to each gate of at least one first FET of the first transistor circuit and the first voltage is applied to each gate of at least one second FET of the second transistor circuit. RF switching circuit.

8. In claim 7, The above converter circuit, Obtaining the RF signal from the above coupler, configured to generate the DC signal having the negative voltage by rectifying the negative component of the waveform of the RF signal; RF switching circuit.

9. In claim 6, The input port of the above coupler is connected to the RF common port, The pass port of the above coupler is connected to the input terminals of the plurality of transistor circuits for receiving RF signals of the RF common port, The coupling port of the above coupler is connected to the above converter circuit, RF switching circuit.

10. In claim 6, The above voltage supply circuit includes a level shifter configured to generate a first voltage by adjusting a voltage level of the positive voltage and to generate a second voltage by adjusting a voltage level of the negative voltage. The above level shifter is configured to obtain the positive voltage from the power supply circuit and the negative voltage from the converter circuit. RF switching circuit.

11. In claim 6, The above voltage supply circuit is connected to the power supply circuit for providing the positive voltage without a charge pump circuit for DC-DC conversion, The above voltage supply circuit is connected to the converter circuit for providing the negative voltage through an AC (alternating current)-DC conversion different from the DC-DC conversion. RF switching circuit.

12. In claim 6, The first transistor circuit includes a first series FET (field effect transistor) circuit connecting the RF common port and the first RF port, The second transistor circuit connects the RF common port and the second RF port and includes a second series FET circuit, The above RF common port is connected to the first drain terminal of the first series FET circuit and the second drain terminal of the second series FET circuit through the coupler. RF switching circuit.

13. In claim 12, The above first series FET circuit is configured to electrically connect the RF common port and the first RF port based on the first voltage and the second voltage in the first connection mode, The second series FET circuit is configured to electrically connect the RF common port and the second RF port based on the first voltage and the second voltage in the second connection mode. RF switching circuit.

14. In claim 6, The above coupler is arranged between the RF common port and the input terminals of the plurality of transistor circuits, The above multiple RF ports further include a third RF port and a fourth RF port, The above plurality of transistor circuits further include a third transistor circuit connecting between the third RF port and the input terminal and a fourth transistor circuit connecting between the fourth RF port and the input terminal. RF switching circuit.

15. In claim 14, The above voltage supply circuit, In a first connection mode for connecting the first RF port and the RF common port, the first voltage is applied to the gates of the first transistor circuit and the second voltage is applied to the gates of the second transistor circuit, the third transistor circuit, and the fourth transistor circuit, In a second connection mode for connecting the second RF port and the RF common port, the first voltage is applied to the gates of the second transistor circuit and the second voltage is applied to the gates of the first transistor circuit, the third transistor circuit, and the fourth transistor circuit. In a third connection mode for connecting the third RF port and the RF common port, the first voltage is applied to the gates of the third transistor circuit and the second voltage is applied to the gates of the first transistor circuit, the second transistor circuit, and the fourth transistor circuit. In a fourth connection mode for connecting the fourth RF port and the RF common port, the first voltage is applied to the gates of the fourth transistor circuit and the second voltage is applied to the gates of the first transistor circuit, the second transistor circuit, and the third transistor circuit. RF switching circuit.

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