A stochastic processing unit, a classical processing unit, a hybrid processing unit, and a method for performing at least one stochastic computation

Abstract

The invention relates to a stochastic processing unit (102) for use in a cryogenic environment, comprising a conversion unit (106) and a stochastic processing module (104). The conversion unit is configured to receive at least one external deterministic digital input signal (002) and transmit at least one external deterministic digital output signal (008). The stochastic processing module (104) is configured to perform at least one stochastic computation operation. The conversion unit (106) is further configured to convert at least one received external deterministic digital input signal (002) into a stochastic signal and transmit said stochastic signal to the stochastic processing module (104) as an internal stochastic output signal (006a). The stochastic processing module (104) is further configured to perform the at least one stochastic computation operation based on the at least one internal stochastic output signal (006a) to obtain at least one internal stochastic input signal (004a) and transmit said at least one internal stochastic input signal (004a) to the conversion unit (106). The conversion unit (106) is additionally configured to convert at least one received internal stochastic input signal (004a) to a deterministic digital signal to obtain at least one external deterministic digital output signal (008) to be transmitted. The invention also relates to a classical processing unit (202), to a hybrid processing unit (222) and to a method of performing at least one stochastic computation.

Description

[0001] A STOCHASTIC PROCESSING UNIT, A CLASSICAL PROCESSING UNIT, A HYBRID PROCESSING UNIT, AND A METHOD FOR PERFORMING AT LEAST ONE STOCHASTIC COMPUTATION

[0002] TECHNICAL FIELD OF THE INVENTION

[0003] The invention relates to processing of information in general. More specifically, the invention relates to a stochastic processing unit that is configured to be coupled to a quantum device, where the stochastic processing unit and quantum device may be operable in a cryogenic environment.

[0004] BACKGROUND OF THE INVENTION

[0005] Quantum devices are often coupled to at least one classical processing unit, where the classical processing unit shall perform processing tasks that are associated with the quantum device. For instance, relating to quantum processing units (QPUs) that comprise quantum elements such as qubits for performing quantum computations, the QPU will usually be coupled to at least one classical processing unit (CPU), where the classical processing unit is configured to be used for processing tasks that cannot be carried out on the QPU but are used to determine and / or implement the operations that are to be carried out on the QPU. Such processing tasks may comprise e.g. decoding errors associated with the Quantum Error Correction process.

[0006] Current quantum devices are typically also operated in cryogenic environments. At least some of the classical processing units associated with quantum devices are, however, typically high in power consumption and heat production, and cannot be placed in the cryogenic environment of the quantum device. As the distance between the quantum device and the classical processing unit is increased, the length of connecting elements such as wires is also increased, which leads to increased time needed for data transfer and additional heat load.

[0007] In connection with QPUs, a portion of the classical processing that is carried out may be implemented via cryogenic classical processing units which may be placed in a cryogenic environment and close to the QPU. Some examples of such cryogenic processing units include qubit readout units and qubit drive units, which may for instance be based on silicon or superconducting logic, such as single flux quantum (SFQ) or adiabatic quantum-flux-parametron (AQFP) logic. With these cryogenic CPUs, a problem is that the computations that are feasible within the thermal budget are limited, i.e. the complexity of computations that can be done with the cryogenic CPUs is restricted due to the amount of heat that would be generated.

[0008] Feasible solutions where classical computations can be done close to a quantum device at or near the cryogenic environment where the quantum device is located are currently not available.

[0009] SUMMARY OF THE INVENTION

[0010] An object of the invention is to alleviate at least some of the problems relating to the known prior art. In one aspect of the invention, a stochastic processing unit is provided for use in a cryogenic environment, wherein the stochastic processing unit comprises a conversion unit configured to receive at least one external deterministic digital input signal, and transmit at least one external deterministic digital output signal, and a stochastic processing module configured to perform at least one stochastic computation operation based on at least one received signal. The stochastic processing unit is characterised in that the conversion unit is configured to convert at least one received external deterministic digital input signal into a stochastic signal and transmit said stochastic signal as at least one internal stochastic output signal to the stochastic processing module, and the stochastic processing module is configured to perform the at least one stochastic computation operation based on the at least one internal stochastic output signal received to obtain at least one internal stochastic input signal, and the stochastic processing module is further configured to transmit at least one internal input signal to the conversion unit, the at least one internal input signal comprising at least said at least one internal stochastic input signal, and further the conversion unit is configured to convert the at least one received internal stochastic input signal from the stochastic processing module to a deterministic digital output signal to obtain at least one external deterministic digital output signal to be transmitted.

[0011] A classical processing unit in the form of a stochastic processing unit may be provided, which can be feasibly operated in a cryogenic environment of a quantum device. The stochastic processing unit may be configured to be directly or indirectly coupled to at least one quantum device. Stochastic processing may be highly beneficial due to the inherent nature of energy efficiency and parallelism. Stochastic computing may provide several advantages, such as simple (boolean) hardware implementation and low footprint, simple communication over a single wire resulting in high interconnectivity, fault tolerance, and high clock rates.

[0012] The stochastic processing unit of the invention may be utilized to perform more complex computing operations than the cryogenic CPUs that are known in the prior art to be used in connection with quantum devices, while keeping power consumption and heat generation at such a level that the stochastic processing unit itself can be located in the cryogenic environment. By performing the computations in the cryogenic environment and close to the quantum device, speed of quantum- classical computations via reduced latency and increased throughput of data between the QPU and CPU can be increased while enabling real time decoding of quantum error correction syndromes, compared to CPUs which are required to be operated at higher temperatures, such as room temperature, due to the closer proximity of the devices.

[0013] Low power, error tolerant, parallel processing based on stochastic computing and implementable on superconducting digital electronics, for example using SFQ or AQFP logic, may be achieved. The stochastic processing unit may run at very low temperature and can allow extremely low power processing and / or very high-speed digital processing.

[0014] The conversion unit may comprise at least one of the following of an input / output module and / or an input module and / or an output module.

[0015] The conversion unit may be additionally configured to transmit at least one received external deterministic digital input signal as an unconverted internal deterministic digital output signal to the stochastic processing module, further wherein the stochastic processing module is configured to perform at least one deterministic binary computation operation based on the internal deterministic digital output signal received to obtain at least one internal deterministic digital input signal, wherein the conversion unit is configured to receive the at least one internal deterministic digital input signal and transmit the at least one internal deterministic digital input signal as an unconverted external deterministic digital output signal.

[0016] Thus, the stochastic processing unit may be configured to perform deterministic binary computational operations in addition to stochastic computations. For signals to be transmitted to the stochastic processing module as internal output signals, the conversion unit may be configured to either convert a received external deterministic digital input signal into an internal stochastic signal or transmit the external deterministic digital input signal as an unconverted internal deterministic digital output signal. Thus, the internal output signals to the stochastic processing unit coming from the conversion unit can be a combination of internal stochastic signals and internal deterministic signals. The conversion unit may be configured to retransmit at least one received internal input signal back to the stochastic processing module at least once. The retransmitting may be carried out before the conversion unit provides the at least one external deterministic digital output signal. The retransmitting may be carried out at least once or multiple times between the conversion unit and the stochastic processing module. The retransmitting may be carried out before or after a conversion at the conversion unit of the input signal received from the stochastic processing module.

[0017] Regarding the retransmission of a signal between the conversion unit and the stochastic processing module, if the received internal input signal at the conversion unit is an internal stochastic input signal, the conversion unit may be configured to retransmit the internal stochastic input signal back to the stochastic processing module for further stochastic operations or the conversion unit may be configured to convert the internal stochastic input signal into an internal deterministic digital output signal and retransmit said signal back to the stochastic processing module for digital operations, when required. If the received internal input signal at the conversion unit is an internal deterministic digital input signal, the conversion unit may be configured to convert the internal deterministic digital input signal into an internal stochastic output signal before transmission back to the stochastic processing module for stochastic operations, when required. Thus, a retransmitted signal may be a converted signal, from deterministic digital to stochastic or vice versa,) or an unconverted stochastic signal.

[0018] The stochastic processing unit may be configured to provide at least one of the external deterministic digital output signals as an input signal to a quantum device or to a transmission unit that is coupled to at least one quantum device. The at least one external deterministic output signal may first go through a transmission unit which then transmits the signal to a quantum device.

[0019] The stochastic processing unit may comprise one or more Josephson junctions, and thus be based on superconducting logic.

[0020] The stochastic processing unit may comprise adiabatic quantum flux parametron (AQFP) logic elements.

[0021] In one embodiment, the stochastic processing unit may be configured to perform one or more real-time quantum error correction computations. Stochastic computing may be an efficient way to implement decoding of error correction algorithms on hardware, specifically for e.g. Quantum Low-Density Parity-Check (QLDPC) codes. The invention may provide a way to implement real-time detection of errors via syndrome decoding of the QEC code (e.g., QLDPC) using e.g. belief propagation algorithms. For instance, the repeated parity measurements of the readout signals from the syndrome qubits of the QPU can be processed stochastically via the beliefpropagation algorithm on the stochastic processing unit determine the source of the error. A subsequent drive signal can be sent from the stochastic processing unit to the erroneous qubit to correct it or the data can be sent to external output to process it via post processing.

[0022] A low-level partial decoding of errors can also be implemented on the stochastic processing unit, to handle lower-weight, more frequent errors. Less frequent higher- weight errors can be computed at one or more units outside of the stochastic processing unit, such as at room temperature by transmitting partially processed information to room temperature via the external outputs, e.g. to a probing unit as described further below. This way the decoding can be run in a parallel manner both at cryogenic and at room temperature to enable high-throughput decoding of errors.

[0023] In one embodiment, the stochastic processing unit may be configured to perform at least one or more stochastic computation operations towards classical optimization of quantum algorithms.

[0024] Furthermore, in relation to classical optimization of quantum algorithms, the present invention may provide benefits. The current noisy intermediate-scale quantum (NISQ) algorithms such as the variational quantum eigensolver (VQE) and the quantum approximate optimization algorithm (QAOA) require classical optimization between successive quantum computational runs. These may be off-loaded to the stochastic processing unit to be solved using probabilistic techniques based on belief-propagation algorithm.

[0025] Other classical computational problems such as the detection and execution of automatic recalibration requirements can also be potentially off-loaded to the stochastic processing unit by transforming it onto a factor graph.

[0026] One aspect of the invention relates to a classical processing unit comprising a stochastic processing unit as described above, a readout unit configured to receive a signal from a quantum device, and a transmission unit. The stochastic processing unit may be configured to transmit at least one external deterministic digital output signal to the transmission unit or to a quantum device. The transmission unit of the classical processing unit may be configured to receive the at least one external deterministic digital output signal from the stochastic processing unit and transmit at least one signal to a quantum device based on the at least one external deterministic digital output signal from the stochastic processing unit.

[0027] The transmission unit of the classical processing unit may comprise single-flux quantum (SFQ) logic elements, and if the external deterministic digital output signal is based on AQFP logic, the transmission unit may be configured to convert the external deterministic digital output signal into an SFQ-based signal that is transmitted to a quantum device.

[0028] The readout unit of the classical processing unit may be configured to determine at least one state of the at least one quantum element of the quantum device based on the signal received from the quantum device, and wherein the stochastic processing unit, in particular the conversion unit of the stochastic processing unit, may be configured to receive at least one external deterministic digital input signal from the readout unit.

[0029] In one embodiment, a hybrid processing unit may be provided, meaning a processing unit configured to execute both quantum computations and classical computations, the hybrid processing unit comprising at least a stochastic processing unit as described above and a quantum device comprising at least one quantum element, wherein the stochastic processing unit is configured to transmit at least one external deterministic digital output signal to a quantum device or to be utilized in connection with a quantum device.

[0030] The hybrid processing unit may further comprise a transmission unit configured to receive the at least one external deterministic digital output signal from the stochastic processing unit and transmit at least one signal to the quantum device, in particular the at least one quantum element of the quantum device, based on the at least one external deterministic digital output signal from the stochastic processing unit. In that case, the hybrid processing unit may comprise the classical processing unit described above and the quantum device, in particular a quantum processing unit.

[0031] In one embodiment, the transmission unit may be a drive unit that is configured to provide a drive signal to the quantum device or at least one quantum element of a quantum device for driving the quantum device or quantum element, such as qubit device.

[0032] The transmission unit may comprise single-flux quantum (SFQ) logic elements, while the conversion unit may comprise AQFP logic element. In such a case if the external deterministic digital output signal from the stochastic processing unit may be based on AQFP logic the transmission unit may be configured to convert the external deterministic digital output signal received from the stochastic processing unit into an SFQ-based signal that is then further transmitted, for example to the quantum device. The SFQ-based signal provided by the hybrid processing unit can be a drive signal for the quantum device, for example for a qubit, but it may also be a signal to perform two-qubit gate operations or qubit reset, for instance.

[0033] The hybrid processing unit may also further comprise a readout unit configured to receive a signal from the quantum device, and transmit the signal received to the conversion unit of the stochastic processing unit. The readout unit may be configured to determine at least one state of the at least one quantum element of the quantum device based on the signal received from the quantum device. Thus, the conversion unit of the stochastic processing unit may be configured to receive at least one external deterministic digital input signal from the readout unit.

[0034] The hybrid processing unit may be configured to be placed within a cryostat, and at least the stochastic processing unit and the quantum device may be configured to be located in a cryogenic environment. A readout unit and transmission unit may also be configured to be located in a cryogenic environment.

[0035] At least the stochastic processing unit and the quantum device may be provided on a common substrate, in particular as part of a monolithic electronic circuit. A readout unit and transmission unit may also be configured to be provided on the common substrate.

[0036] Alternatively, the quantum device may be provided on a first substrate, and at least part of the remaining components of the hybrid processing unit may be provided on at least a second substrate, the first substrate being different from the second substrate.

[0037] At least in the case of first and second substrate as specified above, at least the stochastic processing unit may be provided at a different stage of a cryogenic environment, such that at least the stochastic processing unit is located at different temperature environment within the cryogenic environment than the quantum device. Alternatively, like the stochastic processing unit, the readout unit and / or the transmission unit may be located at different temperature environment within the cryogenic environment than the quantum device. Thus, part of the hybrid processing unit or the whole hybrid processing unit may be located at different temperature environment within the cryogenic environment than the quantum device.

[0038] A hybrid processing unit may additionally comprise or be configured to be coupled to a probing unit, wherein at least one external deterministic digital output signal of the stochastic processing unit is additionally or alternatively delivered to the probing unit. The probing unit may be configured to perform at least one computation based on the external deterministic digital output signal received from the stochastic processing unit. The probing unit may be configured to be located at a higher temperature than at least a portion of the remaining hybrid processing unit, in particular at room temperature. Here, computations that are not feasible at the stochastic processing unit may be carried out by the probing unit.

[0039] The readout unit and the transmission unit of the hybrid processing unit or of the classical processing unit may be configured to utilize SFQ and / or AQFP logic. The readout unit and / or transmission unit may comprise a conversion unit for conversion of signals from SFQ logic to AQFP login or vice versa.

[0040] A method for performing at least one stochastic computation relating to at least one quantum device is also provided, the method comprising receiving and transmitting at least one external deterministic digital input signal from a stochastic processing unit as described above.

[0041] The method comprises receiving at least one external deterministic digital input signal at a stochastic processing unit, in particular at a conversion unit of a stochastic processing unit, transmitting at least one external deterministic digital output signal from the stochastic processing unit, in particular from a conversion unit of a stochastic processing unit, to at least one quantum device or to be utilized in connection with at least one quantum device. The method further comprises converting at least one of the external deterministic digital input signals received at the stochastic processing unit, in particular at the conversion unit, into an internal stochastic signal, transmitting the internal stochastic signal as at least one internal stochastic output signal from the conversion unit to a stochastic processing module of the stochastic processing unit, performing at least one stochastic computation at the stochastic processing module based on the at least one internal stochastic output signal received, transmitting at least one internal stochastic input signal based on the performed at least one stochastic computation from the stochastic processing module to the conversion unit, converting at least one received internal stochastic input signal into an external deterministic digital external output signal at the conversion unit.

[0042] In one embodiment of a method, before converting at least one received internal stochastic input signal into an external deterministic digital output signal at the conversion unit, the method may comprise retransmitting at least one internal output signal to the stochastic processing module, performing at least one further computation at the stochastic processing module, and transmitting at least one further internal input signal from the stochastic processing module to the conversion unit.

[0043] At least one stochastic computation may relate to quantum error correction computations.

[0044] At least one stochastic computation may relate to decoding of error syndromes, in particular parallel decoding of error syndromes via belief-propagation.

[0045] The method may be performed at a cryogenic temperature.

[0046] The method may additionally comprise transmitting at least one external deterministic digital output signal to a probing unit, wherein the method further comprises performing at least one classical computation relating to quantum error correction computations at the probing unit and transmitting at least one probing signal from the probing unit to the conversion unit. The probing unit being located at room temperature, outside of the stochastic processing unit, enables implementing a low-level partial decoding of errors on the stochastic processing unit, to handle lower-weight, more frequent errors. Less frequent higher-weight errors can be computed at one or more units outside of the stochastic processing unit, such as at room temperature by transmitting partially processed information to room temperature via the external outputs, e.g. to a probing unit as described further below. This way the decoding can be run in a parallel manner both at cryogenic and room temperature to enable high throughput decoding of errors.

[0047] The exemplary embodiments presented in this text are not to be interpreted to pose limitations to the applicability of the appended claims. The verb "to comprise" is used in this text as an open limitation that does not exclude the existence of also unrecited features. The features recited in depending claims are mutually freely combinable unless otherwise explicitly stated. The novel features which are considered as characteristic of the invention are set forth in particular in the appended claims. The invention itself, however, both as to its construction and its method of operation, together with additional objects and advantages thereof, will be best understood from the following description of specific example embodiments when read in connection with the accompanying drawings.

[0048] BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Next the invention will be described in greater detail with reference to exemplary embodiments in accordance with the accompanying drawings.

[0050] Figure 1 schematically illustrates an exemplary stochastic processing unit.

[0051] Figure 2 schematically illustrates an exemplary stochastic processing unit.

[0052] Figure 3A illustrates an example of an input module of the stochastic processing unit according to the invention.

[0053] Figure 3B illustrates an example of an output module of the stochastic processing unit according to the invention.

[0054] Figure 4A illustrates an AQFP buffer cell of the stochastic processing unit according to the invention.

[0055] Figure 4B illustrates an example of a random number generator (RNG) of the stochastic processing unit according to the invention.

[0056] Figure 4C illustrates another example of a random number generator (RNG) of the stochastic processing unit according to the invention.

[0057] Figure 5 depicts an example of an equality comparator.

[0058] Figure 6 shows an example of an N input majority gate.

[0059] Figure 7 shows an example of a multiplexer.

[0060] Figure 8 illustrates an example of an Nbit shift register.

[0061] Figure 9 schematically illustrates at 9A and 9B examples of a classical processing unit according to the invention connected to a quantum device.

[0062] Figure 10 shows one example of an SFQ / AQFP conversion interface which may be used at a readout unit. Figure 11 shows one example of an SFQ / AQFP conversion interface which may be used at a drive unit.

[0063] Figure 12A shows a flow chart of a method according to one embodiment of the invention.

[0064] Figure 12B shows a flow chart of a method according to a variant of one embodiment of the invention.

[0065] DETAILED DESCRIPTION

[0066] Figure 1 shows one example of a stochastic processing unit 102 according to the invention. The stochastic processing unit 102 comprises a stochastic processing module 104 and a conversion unit 106.

[0067] The conversion unit 106 may be implemented as one module or as a plurality of modules. The conversion unit 106 may comprise at least one of an input / output module and / or an input module and / or an output module. The conversion unit 106 is configured to receive one or more external deterministic digital input signals 002 from outside of the stochastic processing unit 102. The received external input signals 002 are preferably external deterministic digital input signals. The conversion unit 106 is also configured to receive one or more internal input signals 004. The internal input signals 004 are received from the stochastic processing module 104. The notion of internal and external signals are related to the fact that either such signals originate from outside the stochastic processing unit and are as thus denoted external, while the signals originating from inside the stochastic processing unit are denoted as internal. The notion of input and output signals are related to the fact that either such signals arrive to the conversion unit and are as thus denoted input, while the signals leaving the conversion unit are denoted as output.

[0068] The conversion unit 106 is configured to transmit output signals, which correspond to internal output signals 006 and external output signals 008. The external output signals 008 are preferably external deterministic digital output signals and are external to the stochastic processing unit 102.

[0069] The internal output signals 006 of the conversion unit 106 correspond to the received external input signals 002 of the conversion unit 106 which are transmitted internally within the stochastic processing unit 102. These internal output signals 006 correspond to the received external input signals 002 of the conversion unit 106 which can be converted and / or unconverted signals. Converted signals are signals that are converted from deterministic digital signals, in particular deterministic binary digital signals, to stochastic signals 006a or from stochastic signals to deterministic digital signals 006b. Deterministic digital signal includes signals in the deterministic binary logic. Thus, the internal output signals 006 from the conversion unit 106 can be a combination of deterministic digital signals 006b and stochastic signals 006a.

[0070] Stochastic signals are Bernoulli sequences where a decimal number (probability) is denoted by the number of occurrences of the symbol (0 or 1 ) in the signal divided by the total length of the signal.

[0071] The conversion unit 106 and the stochastic processing module 104 may be fabricated on or be configured to use logic based on utilizing superconducting material, and / or semiconducting material, magnetic material, dielectric material, and / or any combination of these.

[0072] In one embodiment, the conversion unit 106 and the stochastic processing module 104 may be fabricated utilizing superconducting material and each may comprise at least one Josephson junction. Here, the conversion unit 106 and the stochastic processing module 104 may be configured to use SQQF or AQFP logic. This may be advantageous in connection with a quantum device comprising a quantum element readout unit and quantum element drive unit based on SQF or AQFP logic, which will be discussed further below.

[0073] The stochastic processing unit 102 may be configured to be located and / or operated in a cryogenic environment.

[0074] Figure 2 shows a further example of a stochastic processing unit 102 according to the invention. The arrows illustrate how signals may be transmitted between the different components, where solid lines refer to deterministic digital signals and dashed lines refer to stochastic signals.

[0075] As already specified, the output signals of the conversion unit 106 may be internal output signals 006 or external output signals 008. Internal output signals 006 are signals that are transmitted from the conversion unit 106 to the stochastic processing module 104, as converted or unconverted signals. Internal output signals are transmitted within the stochastic processing unit 102. The internal output signals 006 may be internal stochastic output signals 006a, corresponding to a converted signal, and / or internal deterministic digital output signals 006b, corresponding to an unconverted signal. The internal output signals 006 may be a combination of internal stochastic output signals 006a and internal deterministic digital output signals 006b. External output signals 008 are digital external output signals that are transmitted from the conversion unit 106 to an entity outside of the stochastic processing unit 102, in particular to a probing unit and / or to a quantum device or to an external entity such as a transmission unit that is configured to be coupled to a quantum device.

[0076] A quantum device may e.g. be a quantum computing unit or a resonator or tunable coupler, for instance.

[0077] The stochastic processing module 104 is configured to receive at least one internal output signal 006 from the conversion unit 106. The stochastic processing module 104 is additionally configured to perform at least one stochastic computation based on at least one received internal stochastic output signal 006a.

[0078] The stochastic processing module 104 is then configured to transmit at least one signal based on the at least one performed stochastic computation to the conversion unit 106 as an internal stochastic input signal 004a.

[0079] The stochastic processing unit 104 may further be configured to receive at least one internal deterministic digital output signal 006b from the conversion unit 106. The stochastic processing module may further be configured to perform at least one classical computation based on the received internal deterministic digital output signal 006b.

[0080] The stochastic processing module 104 is then configured to transmit at least one signal based on the at least one performed classical computation to the conversion unit 106 as an internal deterministic digital input signal 004b.

[0081] The stochastic processing module 104 may thus be configured to perform at least stochastic computations using hardware designed for stochastic computing (involving e.g. logic gates and multiplexers). This same hardware may also optionally be utilized for limited / minimal classical binary / deterministic digital computation operations.

[0082] The result of the at least one stochastic computation by the stochastic processing module may be delivered to the conversion unit 106 as an internal stochastic input signal 004a. The conversion unit 106 may be configured to retransmit the internal stochastic input signal 004a to the stochastic processing module 104 as a converted internal deterministic digital output signal 006b. The stochastic processing module 104 may then be further configured to perform one or more classical binary computations on the received signal, the results of which may be once more delivered to the conversion unit 106, as an internal deterministic digital input signal 004b. The retransmission of signals from the conversion unit 106 to the stochastic processing module 104 may occur at least once or a plurality of times before the conversion unit 106 transmits an external deterministic digital output signal 008.

[0083] As a summary, the stochastic processing unit according to the invention enables to use a combination of stochastic and digital signals. The combination of stochastic and digital signals can be obtained by different ways.

[0084] The internal output signal 006 from the conversion unit 104 to the stochastic processing module 104 may be a combination of digital signals 006b and stochastic signals 006a. A computation, either digital or stochastic or both, or no computation takes place at the stochastic processing module 104 and a combination of stochastic 004a and digital signal 004b may be going back to the conversion unit 106 from the stochastic processing module 104. However, this combination is not the same as the one received by the stochastic processing module 104 from the conversion unit 106 in the first place.

[0085] In general, stochastic computing can be used to efficiently compute graph-based algorithms, such as factor graph-based algorithms. In one example, the stochastic processing module 104 may be configured to perform at least one computation based on at least one algorithm for stochastic belief-propagation (BP)-based decoding of QLDPC codes for quantum error correction.

[0086] In quantum error correction (QEC), QLDPC usage can be especially beneficial as it requires fewer parity check measurements, which does not scale as in the case of surface code. Fewer physical qubits per logical qubit are required for the same threshold, which leads to better scaling than surface code. The present invention may provide more fault-tolerant quantum computers, for instance. Other QEC techniques such as continuous error correction with weak measurements and surface codes can also be decoded using such techniques and can gain advantage from the present invention.

[0087] The conversion unit 106 is additionally configured to transmit at least one external deterministic digital output signal 008 based on at least one received internal stochastic input signal 004a, which the conversion unit 106 converts from a stochastic signal to a deterministic digital signal.

[0088] At least one of the external deterministic digital output signals 008 may be delivered as a drive input to a quantum device drive unit. External output signals (either deterministic digital or stochastic, converted or unconverted) may be delivered to other external entities outside of the stochastic processing unit 102.

[0089] External deterministic digital input signals 002 may be transmitted by the conversion unit 106 as external deterministic digital output signals 008 that are not converted and have not been operated on by the stochastic processing module 104. Such signals may e.g. be received from a quantum element readout unit and delivered to a probing unit, which may be configured to be operated in room temperature conditions. External deterministic digital input signals 002 may also for example be received from a probing unit and routed through the conversion unit 106 as external deterministic digital output signals 008 that are delivered to a quantum element drive unit.

[0090] In relation to probing units, external deterministic digital output signals 008 may also be transmitted from the conversion unit 106 to the probing unit 112, where an external deterministic digital input signal 008 is based on an internal stochastic input signal 004a from the stochastic processing module 104 which has been converted. External deterministic digital input signals 002 may also be received by the conversion unit 106 from the probing unit 112, where the conversion unit 106 is configured to convert the received external deterministic input signal into an internal stochastic output signal 006a that is then transmitted to the stochastic processing module 104 for processing. Signals obtained from a probing unit 112 may be used to directly drive quantum elements such as qubits or the signals may be used to program the stochastic processing unit 102. Such signals may also be used for performing two qubit gate operations or qubit reset.

[0091] An advantage of routing signals from probing units through the stochastic processing unit 102 may be signal multiplexing in the case of receiving quantum element external signals from the probing units. Only one or a few lines may be required, which could be multiplexed by a serial to parallel interface (SPI) unit onto a plurality of quantum elements, e.g. that are to be driven. The multiplexing could be done by the SPI unit located close to the stochastic processing unit (102), as shown in Fig. 9B. The SPI unit can be located on the stochastic processing unit (SPU) itself, namely on the same substrate, or in between the stochastic processing unit and the RT probing unit. The SPI is located at cryogenic temperatures.

[0092] The stochastic processing module 104 may be a field-programmable gate array (FPGA) unit. The stochastic processing module 104 may be an all-AQFP FPGA unit. The considered stochastic processing module 104 may comprise a plurality of logic gates 108. The stochastic processing module 104 may further comprise other components such AQFP buffer chain memory (BCM).

[0093] An all-AQFP FPGA may be considered as a cross matrix of computing units comprising smaller logical cells, such as logic gates. The conversion unit 106 in this example may be arranged along a periphery of the stochastic processing module 104, as shown in Fig. 2. In Fig. 2, the conversion unit 106 comprises a single module, namely an input / output module all around the stochastic processing module 104. The conversion unit 106 may also comprise a plurality of modules, spaced apart from each other and surrounding the stochastic processing module 104. The conversion unit 106 may, alternatively to being arranged along the periphery of the logic cells 108, be arranged as spread among the computing units. In this alternative, a specific all-AQFP FPGA should be employed where random number generators are properly implemented on top of logic cells.

[0094] The stochastic processing unit 102 can therefore be implemented in a reprogrammable fashion by using a classical FPGA type module as a stochastic processing module 104 with an additional conversion unit 106.

[0095] The proposed FPGA architecture is the all AQFP-FGPA as shown in Takahashi D. et. al., “Design and Demonstration of a Superconducting Field-Programmable Gate Array Using Adiabatic Quantum-Flux-Parametron Logic and Memory,” IEEE TAS, vol. 32, no. 7, pp. 1 -7, Oct. 2022, with the high-level diagram of an elementary block as shown in Fig. 10 of the reference.

[0096] The all-AQFP FPGA unit comprises one logic block (LB), four switch blocks (SBs), two input connection blocks (iCBs), two output connection blocks (oCBs), and AQFP buffer chain memories (BCMs).

[0097] The AQFP BCM (Buffer Chain Memory) is a local memory used to set the digital functionality and connections of the FPGA Unit. The data stored in the BCM can be used to program logical function of the LB, which is a two-input logic circuit. The iCB and oCB connect the inputs and outputs of the LB with routing channels depending on the data in the BCM. The SB and oCB can execute several logical functions.

[0098] The construction of the stochastic processing module 104 and conversion unit 106 may be implemented in various ways depending on the type of used material for fabrication, for instance. Further details of e.g. an all-AQFP FPGA or other suitable stochastic processing module 104 will not be described in detail and can be found in Takahashi D. et. al., “Design and Demonstration of a Superconducting Field- Programmable Gate Array Using Adiabatic Quantum-Flux-Parametron Logic and Memory,” IEEE TAS, vol. 32, no. 7, pp. 1 -7, Oct. 2022.

[0099] Figure 3A schematically shows an example of an input module 020 and Figure 3B schematically shows an example of an output module 030 which may be used at the conversion unit 106 in the case AQFP logic, with the all-AQFP FPGA as stochastic processing module 104. The conversion unit 106 may be implemented as one entity comprising one combined input / output module or the conversion unit 106 may be implemented as any number of separate entities, which may each comprise one or more combined input / output modules or one or more input modules 020 and / or output modules 030.

[0100] Fig. 3A illustrates schematically an example of an input module 020 of the conversion unit 102 that may be configured to receive external input signals 002, in particular external deterministic digital input signals 002. The input module 020 as shown in Fig. 3A comprises three different channels a, b, and c available to the external deterministic digital input signal 002. An external deterministic digital input signal 002 may be transmitted as an internal output signal 006 that is either converted, namely an internal stochastic output signal 006a, or unconverted, namely an internal deterministic digital output signal 006b.

[0101] The input module 020 as shown in Fig. 3A comprises a shift register 804, an Nbit majority gate 806, a memory 808, a random number generator (RNG) 812, a shift register 814, an equality comparator 816, a buffer chain memory (BCM) 824, and a multiplexer 810, these elements being organized in three different channels a, b and c available to the external input signal 002.

[0102] The channel a relates to a readout signal sampling channel, through which one or more external deterministic digital input signals 002 come from a readout unit, in particular a readout unit connected to a quantum device, and an input signal 002 may be obtained. The signal sampling may refer to sampling obtained through the readout unit and is not performed at the input module 020. The input module 020 comprises a shift register 804, used for the input signal of channel a, so that parallel input signals may be provided from the obtained serial readout input signals from the signals sampling from the readout unit.

[0103] In an example of the embodiment, the readout signal sampling is a qubit sampling originating from a readout unit connected to a qubit device. In this example, an Nbit majority gate 806 may be used to determine a state of a qubit from a plurality of qubit state samples obtained from the readout unit, for example from a SFQ-based readout unit.

[0104] A 1 -bit memory 808 may be used to provide a stream of relevant serial bits (1 or 0) based on the determined state. The 1 -bit memory 808 may be clocked as required to provide the output stream, and the output may be determined M times. Channel a provides an output signal 006 based on an external input signal 002 which has been converted at the input module 020. The output stream may then be transmitted to a multiplexer 810.

[0105] The input module 020 may utilize a random number generator (RNG) 812 and shift register 814, where the RNG 812 and shift register 814 are used for conversion of signals and providing serial to parallel output. Equality comparator 816 may determine conversion from a deterministic signal to a stochastic signal.

[0106] The input signal channel b is configured to receive input signals 002 from an external source such as a probing unit or a serial periphery interface (SPI) unit associated with a probing unit. The external deterministic digital input signal 002 going through channel b may be provided via a N bit memory and converted as required via an equality comparator 816. The converted signal may be transmitted to the multiplexer 810. Channel b provides an internal output signal to the conversion unit 106 based on an external input signal 002 which has been converted at the input module 020.

[0107] The input signal channel c of Fig. 3A relates to a channel for an external deterministic digital input signal 002 from an external source which is not converted to a stochastic signal at the input module 020 of the conversion unit 102 but instead is passed on to the stochastic processing module 104 as an unconverted signal. As such, the input module 020 comprises a buffer chain memory (BCM) 824, through which the external deterministic digital input signal 002 may be transmitted to the multiplexer 810. Channel c provides an internal output signal based on an external input signal 002 which has not been converted at the input module 020, thus at the conversion unit 102.

[0108] The external sources such as probing unit or SPI unit providing the external deterministic digital input signals which may go through channel b or c may refer to a same external source or they may be different external sources.

[0109] Selection between internal stochastic output signal 006a or internal deterministic digital output signals 006b may be made with the multiplexer 810, which finally outputs the selected signal from the conversion unit 102 to the stochastic processing module 104.

[0110] Fig. 3B illustrates schematically an example of an output module 030 of the conversion unit 106 of the stochastic processing unit 102. The output module 030 may be configured to receive internal input signals 004 from the stochastic processing module 104. The output module 030 may comprise a demultiplexer 826 and a counter 830. The internal input signals 004 first go through a demultiplexing 826, which results in selecting the signal to be outputted from the conversion unit 102 via two separate channels a and b.

[0111] Channel a depicts an internal input signal 004 being passed through the output module 030 and thus through the conversion unit 102 without conversion. Such external signal 008 can then be transmitted to an external unit coupled to a quantum device 204, such as a transmission unit (e.g. drive unit), or directly to a quantum device 204 or can also be sent back to the stochastic processing module 104.

[0112] Channel b depicts an internal input signal 004 that is to be converted from a stochastic signal to a digital signal, wherein a counter 830 may be employed, such that an external deterministic digital output signal 008 is provided out of the conversion unit 102. For example, the deterministic digital output signal 008 may be transmitted or provided to a unit, in particular an external unit e.g. a probing unit being located at room temperature, or for example to a serial periphery interface (SPI) unit connected to an external unit, for example a probing unit. In another example, the external deterministic digital output signal 008 may be transmitted to an external unit coupled to a quantum device 202, such as a transmission unit (e.g. drive unit), or directly to a quantum device 202. Such converted internal input signal 004 can also be sent back to the stochastic processing module 104 after its conversion at the conversion unit 102 for undergoing further stochastic operations at the stochastic processing module 104, and then sent again to the conversion unit 102.

[0113] A BCM block may be used in both input 020 and output module 030 (or combined input / output module) of the conversion unit 106 to define which input to select and may be a simple chaining of buffer cells 500 that are used to synchronize the timing of all possible input signal paths that ends in the multiplexer block 810 to select the desired output signal. The synchronization of all the input signal channels enables the input signals to arrive / be present at the multiplexer block 810 at the same time. Figure 4A illustrates in more detail an AQFP buffer cell 500, which may be used to implement the RNG 812, of which Figs. 4B and 4C give possible examples.

[0114] The AQFP buffer cell 500 comprises two superconducting loops, with each loop comprising a Josephson junction, here a first Josephson junction Ji and second Josephson junction J2. An excitation current lexmay be applied to the buffer while an input current hn is also applied. Depending on the polarity of the input current, either of the first Josephson junction Ji or second Josephson junction J2 switches. The application of the excitation current leads to a current flowing in the loop inductance Lin. Magnetic coupling of Lin to Lout causes an output current lout. AQFP logic circuits may typically be excited by four-phase sinusoidal excitation clocks to provide the excitation current to propagate signals from one majority gate to another majority gate.

[0115] Fig. 4B shows one implementation of the RNG 812, where the buffer gate 500 is given an input current of 0. Here, clock excitations may then bring energy to the buffer gate 500, inducing the output of the gate 500 to randomly switch int a “1 ” logic state or a “0” logic state.

[0116] Fig. 4C shows one other possible implementation of the RNG 812, where the properties of thermal noise may be used to generate a random output by the buffer gate 500 by shunting to ground the input of the buffer gate 500. Here, thermal noise induced current input to the buffer gate 500 will induce switching of the output to one of the logical states depending on the polarity of the current input when the clock excitation brings energy into the buffer cell 500.

[0117] It may be noted that the components shown in the examples herein are based on AQFP logic. If the stochastic processing unit 102 is based on SFQ logic, the RNG may e.g. be implemented through a comparator where the input port may be a noisy DC current source.

[0118] Figure 5 depicts at example of an equality comparator 816. The equality comparator 816 is implemented as a XNOR gate, relying on majority gates 702 which are used as a universal gate in AQFP logic. The majority gates 702 each comprise three inputs, which is usual in AQFP logic.

[0119] The number of inputs for the majority gate may be increased as long as the condition of odd number of inputs is respected to realize the majority function. Figure 6 shows an example of a majority gate 808 comprising N inputs, which may be used as the Nbit majority gate 808 of the input module 020 of Fig.3A. Figure 7 shows an example of a multiplexer 810 which may be used at the input module 020 of Fig. 3A. The multiplexer 810 is a three-input multiplexer comprising six majority gates 702, each comprising three inputs. The multiplexer 810 may obtain a one-bit logic signal to select the desired output. The select information may be stored in a programmable local memory 808 dedicated to input signal configuration within the conversion unit 106.

[0120] A parity check gate may be implemented in the all-AQFP FPGA by using three elementary AQFP FPGA units. An equality stochastic gate may be implemented in the all-AQFP FPGA by using two elementary AQFP FPGA units.

[0121] The logic operations of the parity check gate correspond to a very general structure used in belief propagation based-decoders. E.g. Boolean to stochastic converters may further be utilized. The actual implementation of a used decoder for decoding errors from measurement data obtained at a QEC cycle may vary and / or may require further components. Other implementations of logic operations used for stochastic computing will be known to the skilled person, for instance from Gross W. J. et. al., “Stochastic implementation of LDPC decoders," Conference record of the 39thAsilomar conference on signals, systems and computers 2005, pp. 713, 2005. Yet, the elementary all-AQFP FPGA unit may be readily modified to implement logic operations as needed in a single elementary all-AQFP FPGA unit to modify the unit into a more complex unit, which may natively implement the desired complex logic functions.

[0122] Figure 9A shows one example of a classical processing unit 202 according to the invention being connected to a quantum device 204.

[0123] The classical processing unit 202 comprises at least the stochastic processing unit 102 according to the invention and as described previously, a readout unit 208 and a transmission unit 210, and the stochastic processing unit 102 is configured to transmit at least one external deterministic digital output signal 008 to the transmission unit or to a quantum device 204 connected to the classical processing unit 202.

[0124] The readout unit 208 is configured to receive a signal from the quantum device connected to the classical processing unit 202.

[0125] The transmission unit 210 is configured to receive the at least one external deterministic digital output signal (008) from the stochastic processing unit (102) and transmit at least one signal to a quantum device (204) based on the at least one external deterministic digital output signal (008) from the stochastic processing unit (102).

[0126] The transmission unit 210 of the classical processing unit 202 comprises single-flux quantum (SFQ) logic elements, and if the external deterministic digital output signal is based on AQFP logic, the transmission unit 210 is configured to convert the external deterministic digital output signal into an SFQ-based signal that is transmitted to the quantum device 204 connected to the classical processing unit 202.

[0127] The readout unit 208 of the classical processing unit 202 is configured to determine at least one state of the at least one quantum element 206 of the quantum device 204 based on the signal received from the quantum device 204, and wherein the stochastic processing unit 102, in particular the conversion unit 106 of the stochastic processing unit 102, is configured to receive at least one external deterministic digital input signal 002 from the readout unit 208.

[0128] The invention also relates to a hybrid processing unit 222 comprising at least one stochastic processing unit 102 according to the invention and at least one quantum device 204. The stochastic processing unit 102 is configured to transmit at least one external deterministic digital output signal 008 to at least one quantum device 204 or to be utilized in connection with at least one quantum device 204.

[0129] A hybrid processing unit refers to a processing unit being configured to execute both quantum computations and classical computations.

[0130] The hybrid processing unit 222 may be configured to be operated in a cryogenic environment, in particular within a cryostat.

[0131] The quantum device 204 and the stochastic processing unit 102 of the hybrid processing unit 222 may be provided as part of a monolithic electronic circuit, on a common substrate. Alternatively, the quantum device 204 may be provided on a separate substrate.

[0132] The hybrid processing unit 202 may also in this case be configured to be operated in a cryogenic environment, but the quantum device 204 may optionally be provided in a cryogenic environment that is different from the cryogenic environment where the remaining portion of the hybrid processor, such as at least the stochastic processing unit 102, is configured to be operated in. The different cryogenic environments may be provided by different stages of a cryostat. Yet, even if fabricated on separate substrates, the hybrid processing unit 202 may be configured to be located in and operated in one cryogenic environment.

[0133] The quantum device 204 may be a quantum computing device such as quantum processing unit and the at least one quantum element 206 may be at least one qubit.

[0134] The hybrid processing unit 222 may further comprise a readout unit 208 configured to receive a signal from at least one quantum device 204, and in particular to determine at least one state of the at least one quantum element 206 of the quantum device 204 based on the signal received, and a transmission unit 210 configured to transmit a signal to at least one quantum device 204. The transmission unit 210 may be a drive unit for driving a quantum device 204 or at least one quantum element 206 of a quantum device 204.

[0135] The stochastic processing unit 102, a readout unit 208, and a transmission unit 210 may be provided as a classical processing unit 202 according to the invention and separately from a quantum device 204. In this case, the classical processing unit 202 may be configured to be coupled to the quantum device 204. Fig. 9A actually shows this variant of the hybrid processing unit 222 as well.

[0136] The quantum device 204, the readout unit 208, the transmission unit 210 and the stochastic processing unit 102 may be provided as part of a monolithic electronic circuit, on a common substrate. Alternatively, at least the quantum device 204 may be provided on a separate substrate.

[0137] In that case again, part of the hybrid processing unit 222 may be located at cryogenic temperatures, but at a different cryogenic temperature than the quantum device 204.

[0138] The readout unit 208 may be configured to determine a state of the at least one quantum element 206 of the quantum device 204 and deliver at least one external deterministic digital input signal to the conversion unit 106 of the stochastic processing unit 102 as a digital signal.

[0139] The readout unit 208 of the classical processing unit 202 or of the hybrid processing unit 222 may comprise an SFQ / AQFP conversion interface and an SFQ / AQFP readout signal processing block. A readout signal from the quantum device, e.g. qubit, may be an SFQ signal. The SFQ / AQFP conversion interface may be implemented with either SFQ logic or AQFP logic. The readout of the qubit may be carried out through a resonator that requires an external excitation power in order to output the resonance frequency of the qubit which is different in the ground state and in the excited state. The readout of the qubit state may be done by sampling the qubit output and comparing the phase difference between the sampling frequency and the qubit frequency.

[0140] The classical processing unit 202 or the hybrid processing unit 222 may be further connected to an external unit, in particular a probing unit 212. The probing unit 212 may be located at room temperature, while the classical processing unit 202 or the hybrid processing unit 222 is located at cryogenic temperature.

[0141] The probing unit 212 is directly connected to the stochastic processing unit 104 of the hybrid processing unit 222 or of the classical processing unit 202, in particular to the conversion unit 106 of the stochastic processing unit 104. External deterministic digital output signals 008 may also be transmitted from the conversion unit 106 to the probing unit 212, where an external deterministic digital input signal 008 is based on an internal stochastic input signal 004a from the stochastic processing module which has been converted. External deterministic digital input signals 002 may also be received by the conversion unit 106 from the probing unit 212, where the conversion unit 106 is configured to convert the received external deterministic input signal into an internal stochastic output signal 006a that is then transmitted to the stochastic processing module 104 for processing.

[0142] Signals obtained from a probing unit 212 may be used to directly drive quantum elements such as qubits or the signals may be used to program the stochastic processing unit 102. Such signals may also be used for performing two qubit gate operations or qubit reset.

[0143] Figure 9B shows another example of a classical processing unit 202 according to the invention being connected to a quantum device 204, where at least the classical processing unit 202 and the quantum device 204 may constitute a hybrid processing unit 222 according to the invention. Furthermore, the classical processing unit 202 is not directly connected to a probing unit 212. A serial to parallel interface (SPI) unit 218 is connected between the stochastic processing unit 102 and the probing unit 212, in particular between the conversion unit 106 of the stochastic processing unit 102 and the probing unit 212. The SPI unit 818 may multiplex signals from the probing unit 212, and / or signals to the probing unit 212 may be serialized from parallel to serial.

[0144] An advantage of routing signals from probing units through the stochastic processing unit 102 may be signal multiplexing in the case of receiving quantum element external signals from the probing units. Only one or a few lines may be required, which could be multiplexed by the serial to parallel interface (SPI) unit 212 onto a plurality of quantum elements, e.g. that are to be driven. The multiplexing could be done by the SPI unit.

[0145] The SPI unit 212 may be located close to the stochastic processing unit 102. The SPI unit 212 can be located on the stochastic processing unit (SPU) itself, namely on the same substrate, or in between the stochastic processing unit and the RT probing unit. The SPI unit 212 is located at cryogenic temperatures.

[0146] Figure 10 shows an example of an SFQ / AQFP conversion interface which may be employed at a readout unit 208 of the classical processing unit 202 or of the hybrid processing unit 222. When the SFQ clock frequency and phase matches the frequency and phase of the quantum element of which the state is being determined, the output bit stream of the SFQ interface is a succession of “1 ” logic. If the frequency of both SFQ clock input and quantum element are different, a phase mismatch will happen, and the output logic stream will contain “0” logic that increases with the dephasing.

[0147] An SFQ / AQFP readout signal processing block may be used to extract the resonance frequency / phase to deduce the state of the qubit.

[0148] The transmission unit 210 of the classical processing unit 202 or of the hybrid processing unit 222 may be implemented with either SFQ logic or AQFP logic. If the stochastic processing unit 102 is implemented using AQFP logic and the transmission unit 210 is implemented using SFQ logic, an SFQ / AQFP conversion interface may be required at the transmission unit 210 to transform the AQFP signal obtained via the stochastic processing unit 102 into an SFQ signal. The transmitted signal from the transmission unit can be a drive signal for the quantum device. It can also be a signal for performing two-qubit gate operations or other operations at the quantum device, e.g. gate reset.

[0149] In one further embodiment, the e.g. qubit may be driven by using an AQFP interface modified such that rapid voltage pulses are emitted to drive the qubit.

[0150] Figure 11 shows one example of an SFQ / AQFP conversion interface which may be employed at a drive unit 210 of the classical processing unit 202 or of the hybrid processing unit 222. Here, the AQFP input may be received directly from the stochastic processing unit 102 as an external deterministic digital output signal 008. An inductive coupling between the AQFP output transformer and one inductance connected to an SFQ comparator pair may ensure the conversion from AQFP to SFQ. The final output stage, comprising a Josephson Transmission Line (JTL), may aid in regenerating a proper SFQ pulse towards the output, and ensure an isolation between the SFQ output and the AQFP input. The SFQ output can be directly connected to the quantum element that is driven and drive it using SFQ pulses.

[0151] Figure 12A shows a flow chart of a method for performing at least one stochastic computation relating to at least one quantum device 204. The method is performed using a stochastic processing unit 102 according to the invention and described above, being connected to a quantum device 104, or using a classical processing unit according to the invention and as described previously connected to a quantum device 104 or using a hybrid processing unit according to the invention and as described previously.

[0152] The method comprises receiving 302 at least one external deterministic digital input signal 002 at the conversion unit 102. At least one received external deterministic digital signal is converted 304 to a stochastic signal at a conversion unit 106 of a stochastic processing unit 102.

[0153] The converted signal is transmitted 306 from the conversion unit 102 to a stochastic processing module 104 of the stochastic processing unit 103 as an internal stochastic output signal 006a. The method further comprises performing 308 at least one stochastic computation at the stochastic processing module 104, based on the internal stochastic output signal. Based on the computation, the method further comprises providing an internal stochastic input signal 004a at the stochastic processing module 104, which is transmitted 310 to the conversion unit 106.

[0154] At least one received internal stochastic input signal 004a is converted 312 into an external deterministic digital output signal 008, which is transmitted 314 to a quantum device 204 or for use in connection with a quantum device 204. The transmission to a quantum device 204 may be carried out directly or the external deterministic digital output signal may be delivered to one or more external units that may be part of the quantum device or may be configured to be coupled to the quantum device 204. The external deterministic digital output signal 008 may be delivered to a transmission unit 210, where the transmission unit 210 is configured to process the external deterministic digital output signal 008 and then deliver e.g. a converted, for instance SFQ-based, signal to the quantum device 204. In a variant the converted SFQ-based signal may be a drive signal to the quantum device 204 for driving a quantum element 206 of the quantum device 204, for example for driving a qubit.

[0155] The above explained conversion 304 of at least one external deterministic digital input signal 002 into an internal stochastic output signal 006a at the conversion unit 102 and the subsequent conversion 310 of at least one internal stochastic input signal 004a into an external deterministic digital output signal 008 at the conversion unit 102 may each occur at least once.

[0156] Additionally, and as depicted in Fig. 12B, the method may comprise transmission 306 of at least one external deterministic digital input signal 002 as an unconverted signal, namely an internal deterministic digital output signal 006a to the stochastic processing module 104. Such a signal may be utilized in performing one or more binary computation operations 902 at the stochastic processing module 104.

[0157] Furthermore, based on one or more binary computation operations at the stochastic processing module 104, a resulting internal deterministic digital input signal 004a may be transmitted 904 from the stochastic processing module 104 to the conversion unit 106. The internal deterministic digital output signal 006a can be transmitted by the conversion unit 106 as an unconverted external deterministic digital output signal 008.

[0158] Additionally, or alternatively, instead of transmitting an internal input signal 004 (converted or unconverted), as an external output signal 008, the method may comprise retransmission of an internal input signal 004 from the conversion unit 102 to the stochastic processing module 104, as depicted by the arrows 906, 908, 910 and 912 in Fig. 12B, for further processing. The retransmissions 906, 908, 910, 912 may each occur at least once or a plurality of times. The retransmission may take place before or after conversion of the internal input signal 004 at the conversion unit 106.

[0159] For example, it is possible to retransmit internal input signals 004 received by the conversion unit 106 from the stochastic processing module 104 back to the stochastic processing module as unconverted internal output signals 006 as depicted by arrow 908. This could be the case when the internal input signal 004 received by the conversion unit 102 is a stochastic signal 004a. Accordingly, an internal stochastic input signal 004a obtained as a result of at least one stochastic computation may be retransmitted 908 from the conversion unit 102 to the stochastic processing module 104 for one or more stochastic operations, and then transmitted back 310 to the conversion unit 106 from the stochastic processing module 104. In one other example, an internal input signal 004 received by the conversion unit 102 is a digital deterministic signal 004b. Here, an internal stochastic input signal 004b obtained as a result of at least one binary computation performed at the conversion unit 102 may be retransmitted 912 from the conversion unit 102 to the stochastic processing module 104 for one or more operations, and then transmitted back 904 to the conversion unit 106 from the stochastic processing module 104.

[0160] In one further example, an internal stochastic input signal 004a obtained as a result of at least one stochastic computation performed at the stochastic processing module 104 may be converted 312 at the conversion unit 102 into an internal deterministic digital output signal 006b and retransmitted 906 to the stochastic processing module 104 for one or more binary operations, resulting in one or more internal deterministic digital input signals 004b, which are transmitted 904 to the conversion unit 106 from the stochastic processing module 104.

[0161] Accordingly, an internal deterministic digital input signal 004b obtained as a result of at least one binary computation may be converted 312 at the conversion unit 102 into an internal stochastic output signal 006a and retransmitted 910 to the stochastic processing module 104 for one or more stochastic operations, resulting in one or more internal stochastic input signals 004a, which are then transmitted to the conversion unit 106 from the stochastic processing module 104.

[0162] At least one stochastic computation may relate to quantum error correction computations. Quantum error correction codes may be decoded using e.g. beliefpropagation or other factor graph-based algorithms which may be implemented at the stochastic processing module 104.

[0163] The method may additionally comprise transmitting 314 at least one external deterministic digital signal 008 to a probing unit 212. The method may then further comprise performing at least one classical computation relating to quantum error correction computations at the probing unit 212 and transmitting at least one probing signal from the probing unit to the conversion unit 106.

[0164] The invention has been explained above with reference to the aforementioned embodiments, and several advantages of the invention have been demonstrated. It is clear that the invention is not only restricted to these embodiments but comprises all possible embodiments within the spirit and scope of the inventive thought and the following patent claims. The features recited in dependent claims are mutually freely combinable unless otherwise explicitly stated.

Claims

CLAIMS1 . A stochastic processing unit (102) for use in a cryogenic environment, wherein the stochastic processing unit (102) comprises:- a conversion unit (106) configured to receive at least one external deterministic digital input signal (002) and transmit at least one external deterministic digital output signal (008), and- a stochastic processing module (104) configured to perform at least one stochastic computation operation based on at least one received signal, characterized in that- the conversion unit (106) is configured to convert at least one received external deterministic digital input signal (002) into a stochastic signal (006a) and transmit said stochastic signal to the stochastic processing module (104) as an internal stochastic output signal (006a), and- the stochastic processing module (104) is configured to perform the at least one stochastic computation operation based on the at least one internal stochastic output signal (006a) received to obtain at least one internal stochastic input signal (004a), and the stochastic processing module (104) is further configured to transmit at least one internal input signal (004) to the conversion unit (106), the at least one internal input signal (004) comprising at least said at least one internal stochastic input signal (004a), and further in that- the conversion unit (106) is configured to convert at least one received internal stochastic input signal (004a) from the stochastic processing module (104) to a deterministic digital signal to obtain at least one external deterministic digital output signal (008) to be transmitted.

2. A stochastic processing unit (102) according to claim 1 , wherein the conversion unit (106) comprises at least one of the following of an input / output module and / or an input module 020 and / or an output module 030.

3. The stochastic processing unit (102) of any previous claim, wherein the conversion unit (106) is additionally configured to transmit at least one received external deterministic digital input signal (002) as an unconverted internal deterministic digital output signal (006b) to the stochastic processing module (104), further wherein the stochastic processing module (104) is configured to perform at least one binary computation operation based on the internal deterministic digital output signal (006b) received to obtain at least one internal deterministic digital inputsignal (004b), wherein the conversion unit (106) is configured to receive the at least one internal deterministic digital input signal (004b) and transmit the at least one internal deterministic digital input signal as an unconverted external deterministic digital output signal (008).

4. The stochastic processing unit (102) of any previous claim, wherein the conversion unit (106) is configured to retransmit at least one received internal input signal (004) back to the stochastic processing module (104), in particular retransmit the at least one received internal input signal (004) at least once, before transmitting the at least one external deterministic digital output signal (008).

5. The stochastic processing unit (102) of claim 4, wherein the conversion unit (106) is configured to convert at least one received internal input signal (004) from a deterministic digital signal to a stochastic signal or vice versa before retransmitting to the stochastic processing module (104).

6. The stochastic processing unit (102) of any previous claim, wherein the stochastic processing unit (102) is configured to provide at least one of the external deterministic digital output signals (008) as an input signal to a quantum device (204) or to a transmission unit (210) that is coupled to at least one quantum device (204).

7. The stochastic processing unit (102) of any previous claim, wherein at least the stochastic processing unit (102) comprises adiabatic quantum flux parametron (AQFP) logic elements.

8. The stochastic processing unit (102) of any previous claim, wherein the stochastic processing unit (102) is configured to perform one or more decoding of quantum error correction computations.

9. The stochastic processing unit (102) of any previous claim, wherein the stochastic processing unit (102) is configured to perform one or more stochastic computation operations towards classical optimization of quantum algorithms.

10. A classical processing unit (202) configured to be coupled to a quantum device (204) and comprising at least:- the stochastic processing unit (102) of any previous claim 1 to 9,- a readout unit (208) configured to receive a signal from a quantum device(204), and- a transmission unit (210), wherein the stochastic processing unit (102) is configured to transmit at least one external deterministic digital output signal (008) to the transmission unit or to a quantum device (204)11 . The classical processing unit (202) of claim 10, wherein the transmission unit (210) is configured to receive the at least one external deterministic digital output signal (008) from the stochastic processing unit (102) and transmit at least one signal to a quantum device (204) based on the at least one external deterministic digital output signal (008) from the stochastic processing unit (102).

12. The classical processing unit (202) of claim 11 , wherein the transmission unit (210) comprises single-flux quantum (SFQ) logic elements, and if the external deterministic digital output signal is based on AQFP logic, the transmission unit (210) is configured to convert the external deterministic digital output signal into an SFQ-based signal that is transmitted to a quantum device (204).

13. The classical processing unit (202) of claim 11 or 12, wherein the readout unit (208) is configured to determine at least one state of the at least one quantum element (206) of the quantum device (204) based on the signal received from the quantum device (204), and wherein the stochastic processing unit (102), in particular the conversion unit (106) of the stochastic processing unit (102), is configured to receive at least one external deterministic digital input signal (002) from the readout unit (208).

14. A hybrid processing unit (222) comprising at least a quantum device (104) and a stochastic processing unit (102) according to any of claims 1 to 9, wherein at least the stochastic processing unit (102) and the quantum device (204) are configured to be located in a cryogenic environment.

15. The hybrid processing unit (222) of claim 14 further comprising a readout unit (208) configured to receive a signal from the quantum device (204) and a transmission unit (210) configured to receive the at least one external deterministic digital output signal (008) from the stochastic processing unit (102).

16. The hybrid processing unit (222) of claim 14 or 15, wherein at least the stochastic processing unit (102) and the quantum device (204) are provided on a common substrate, in particular as part of a monolithic electronic circuit.

17. The hybrid processing unit (222) of claim 14 or 15, wherein the quantum device (204) is provided on a first substrate, and at least part of the remaining components of the hybrid processing unit (222) are provided on at least a second substrate, the first substrate being different from the second substrate.

18. The hybrid processing unit (222) of any of claims 14-17, additionally comprising a probing unit (212), wherein at least one external deterministic digital output signal (008) of the stochastic processing unit (102) is additionally or alternatively transmitted to the probing unit (212), wherein the probing unit (212) is configured to perform at least one computation based on the at least one external deterministic digital output signal (008) received from the stochastic processing unit (102).

19. A method for performing at least one stochastic computation relating to at least one quantum device (204), the method comprising using a stochastic processing unit (102) according to one of the previous claims 1 to 9 connected to a quantum device (104) or using a classical processing unit according to one of the previous claims 10 to 13 connected to a quantum device (104) or using a hybrid processing unit according to one the previous claims 14 to 18.

20. A method for performing at least one stochastic computation relating to at least one quantum device (204), the method comprising:- receiving (302) at least one external deterministic digital input signal (002) at a stochastic processing unit (104), in particular at a conversion unit (106) of the stochastic processing unit (104), and- transmitting at least one external digital output signal (008) from the stochastic processing unit (104), in particular from the conversion unit (106) of the stochastic processing unit (104), to at least one quantum device (104) or to be utilized in connection with at least one quantum device (104), characterized in that the method comprises:- converting (304) at least one of the external deterministic digital input signals (002) received at the stochastic processing unit (102), in particular at the conversion unit (106) of the stochastic processing unit (102), into an internal stochastic signal (006a), and- transmitting (306) the internal stochastic signal (006a) as at least one internal stochastic output signal (006a) from the conversion unit (106) to a stochastic processing module (104) of the stochastic processing unit(102),- performing (308) at least one stochastic computation at the stochastic processing module (104) based on the at least one internal stochastic output signal (006a) received,- transmitting (310) at least one internal stochastic input signal (004a), based on the performed at least one stochastic computation, from the stochastic processing module (104) to the conversion unit (106),- converting (312) at least one received internal stochastic input signal (004a) into an external deterministic digital output signal (008) at the conversion unit (106).21 . The method of claim 20, wherein before converting (312) at least one received internal stochastic input signal (004a) into an external deterministic digital output signal (008) at the conversion unit (106), the method comprises retransmitting (908, 910) at least one internal output signal to the stochastic processing module (104), performing at least one further computation (308) at the stochastic processing module (104), and transmitting (310) at least one further internal input signal from the stochastic processing module (104) to the conversion unit (106).

22. The method of claim 20 or 21 , wherein the at least one stochastic computation relates to quantum error correction computations.

23. The method of any one of claims 20 to 22, wherein the at least one stochastic computation of the stochastic processing unit, in particular of the stochastic processing module (104), relates to decoding of error syndromes, in particular parallel decoding of error syndromes via belief-propagation.

24. The method of any one of claims 19 to 23, wherein the method is performed at a cryogenic temperature.

25. The method of any one of claims 20 to 24, wherein the method additionally comprises transmitting at least one external deterministic digital output signal (008) to a probing unit (212), wherein the method further comprises performing at least one classical computation relating to quantum error correction computations at the probing unit (212) and transmitting at least one probing signal from the probing unit (212) to the stochastic processing unit (104), in particular to the conversion unit (106) of the stochastic processing unit (104).

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