Clock signal temperature drift correction method and circuit, chip and electronic device

Abstract

Embodiments of the present application provide a clock signal temperature drift correction method and circuit, a chip and an electronic device. The clock signal temperature drift correction method comprises: determining whether a first clock signal and a second clock signal have a temperature drift phenomenon; and when the first clock signal and the second clock signal have the temperature drift phenomenon, adjusting a frequency of the first clock signal and a frequency of the second clock signal, such that the frequency of the first clock signal and the frequency of the second clock signal satisfy a preset relationship, wherein a first temperature coefficient of the first clock signal is not equal to a second temperature coefficient of the second clock signal, and when the frequency of the first clock signal and the frequency of the second clock signal satisfy the preset relationship, the frequency of the first clock signal is a first set frequency at a set temperature, and the frequency of the second clock signal is a second set frequency at the set temperature. The present application achieves the zero temperature drift characteristics of the first clock signal and the second clock signal.

Description

Clock signal temperature drift correction method, circuit, chip and electronic device

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on December 4, 2023, with application number 202311639080.0 and invention name “Clock signal temperature drift correction method, circuit, chip and electronic device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of electronic technology, and in particular to a clock signal temperature drift correction method, circuit, chip and electronic equipment. Background Art

[0003] Currently, clock signals are the foundation of sequential logic, determining when states within logic units are updated to ensure the synchronous operation of related electronic components. However, when the ambient temperature of the clock circuit changes (for example, when the chip heats up), the period and frequency of the clock signal will change, causing errors in the clock signal, which can easily lead to confusion in the sequential logic.

[0004] In the related art, in order to reduce the temperature drift of the clock signal, the traditional method is to reduce the temperature drift of the electronic components in the clock circuit. For example, in the classic RC oscillator clock, since the elements that affect the clock period include resistors and capacitors, reducing the temperature drift of the resistors and / or the temperature drift of the capacitors can weaken the temperature drift of the clock signal. In the related art, the temperature change value can also be measured by a temperature sensor, and then the period of the clock signal is corrected according to the relationship between the temperature and frequency based on the temperature change value. However, the above method is greatly affected by objective factors such as the circuit preparation process and the accuracy of the temperature sensor, and the temperature drift of the clock signal cannot be completely avoided. Technical issues

[0005] The embodiments of the present application provide a clock signal temperature drift correction method, circuit, chip and electronic device to solve the clock signal temperature drift phenomenon. Technical Solutions

[0006] The technical solution of this application is as follows:

[0007] In a first aspect, the present application provides a hybrid analog-to-digital conversion circuit, comprising:

[0008] The present application provides a method for correcting a clock signal temperature drift. The method is applied to a clock signal generating circuit. The clock signal generating circuit includes a first clock module generating a first clock signal and a second clock module generating a second clock signal. The method includes:

[0009] Determining whether temperature drift occurs between the first clock signal and the second clock signal;

[0010] When the first clock signal and the second clock signal experience temperature drift, the frequency of the first clock signal and the frequency of the second clock signal are adjusted so that the frequency of the first clock signal and the frequency of the second clock signal satisfy a preset relationship;

[0011] In which, the first temperature coefficient of the first clock signal is not equal to the second temperature coefficient of the second clock signal, and when the frequency of the first clock signal and the frequency of the second clock signal satisfy a preset relationship, the frequency of the first clock signal is the first set frequency at the set temperature, and the frequency of the second clock signal is the second set frequency at the set temperature.

[0012] In a second aspect, the present application provides a clock signal temperature drift correction circuit, comprising:

[0013] A clock signal generating circuit, the clock signal generating circuit comprising a first clock module generating a first clock signal and a second clock module generating a second clock signal;

[0014] a temperature drift correction circuit, the temperature drift correction circuit being used to determine whether temperature drift occurs between the first clock signal and the second clock signal. When temperature drift occurs between the first clock signal and the second clock signal, the temperature drift correction circuit adjusts the frequency of the first clock signal and the frequency of the second clock signal so that the frequency of the first clock signal and the frequency of the second clock signal satisfy a preset relationship;

[0015] In which, the first temperature coefficient of the first clock signal is not equal to the second temperature coefficient of the second clock signal, and when the frequency of the first clock signal and the frequency of the second clock signal satisfy a preset relationship, the frequency of the first clock signal is the first set frequency at the set temperature, and the frequency of the second clock signal is the second set frequency at the set temperature.

[0016] In a third aspect, the present application provides a chip comprising the clock signal temperature drift correction circuit described in the second aspect.

[0017] In a fourth aspect, the present application provides an electronic device comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program in the memory to execute the steps of the clock signal temperature drift correction method described in the first aspect. Beneficial effects

[0018] The clock signal temperature drift correction method provided in the embodiment of the present application is that since the first temperature coefficient of the first clock signal and the second temperature coefficient of the second clock signal are not equal, when the temperature change causes the frequency of the first clock signal and the frequency of the second clock signal to change, the frequency relationship between the first clock signal and the second clock signal changes. For example, the first temperature coefficient is greater than the second temperature coefficient, and the frequency difference / ratio between the first clock signal and the second clock signal gradually increases as the temperature rises. Therefore, the present application makes the frequency of the first clock signal and the frequency of the second clock signal meet the preset relationship again after the temperature drift occurs. Then, the frequency of the first clock signal can be set to the first set frequency at the set temperature, and the frequency of the second clock signal can be set to the second set frequency at the set temperature. Therefore, even if the first clock signal and the second clock signal experience temperature drift, they can return to the corresponding set frequencies after the ambient temperature changes, and finally achieve zero temperature drift characteristics of the first clock signal and the second clock signal, avoiding the clock signal temperature drift phenomenon that cannot be completely avoided by traditional methods due to objective factors such as circuit preparation process and temperature sensor accuracy.

[0019] These and other aspects of the present application will become more readily apparent from the description of the following embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0021] FIG1 shows a schematic diagram of an application scenario of a clock signal temperature drift correction method provided in an embodiment of the present application.

[0022] FIG2 shows a flow chart of a method for correcting a clock signal temperature drift according to an embodiment of the present application.

[0023] FIG3 shows a schematic diagram of the relationship between clock signal frequency and temperature provided in an embodiment of the present application.

[0024] FIG4 shows a schematic diagram of a process for adjusting the frequency of a clock signal provided in an embodiment of the present application.

[0025] FIG5 shows another schematic flow chart of adjusting the clock signal frequency provided in an embodiment of the present application.

[0026] FIG6 shows another schematic flow chart of adjusting the clock signal frequency provided in an embodiment of the present application.

[0027] FIG7 shows a schematic diagram of a process for adjusting the frequency of a first clock signal provided in an embodiment of the present application.

[0028] FIG8 shows another schematic flow chart of adjusting the clock signal frequency provided in an embodiment of the present application.

[0029] FIG9 shows a schematic diagram of a process for adjusting the frequency of the second clock signal provided in an embodiment of the present application.

[0030] FIG10 shows a schematic diagram of a process for adjusting the frequencies of a first clock signal and a second clock signal provided in an embodiment of the present application.

[0031] FIG11 shows a module schematic diagram of a clock signal temperature drift correction circuit provided in an embodiment of the present application.

[0032] Electronic device 100, clock circuit 10, first clock module 11, second clock module 12, clock control module 20;

[0033] Clock signal temperature drift correction circuit 1000 , clock signal generation circuit 1001 , temperature drift correction circuit 1002 .

[0034] Implementation Methods of the Application

[0035] The embodiments of the present application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and are not to be construed as limiting the present application.

[0036] In order to enable those skilled in the art to better understand the solutions of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0037] In the embodiments of the present application, it should be noted that, in this document, relational terms such as first and second, etc., are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations.

[0038] Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not preclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0039] In the description of the embodiments of this application, words such as "example" or "for example" are used to indicate an example, illustration, or description. Any embodiment or design described as "for example" or "for example" in the embodiments of this application is not to be construed as being preferred or having more advantages than another embodiment or design. The use of words such as "example" or "for example" is intended to clearly present relative concepts.

[0040] In addition, in the embodiments of the present application, "plurality" refers to two or more. In view of this, in the embodiments of the present application, "plurality" can also be understood as "at least two". "At least one" can be understood as one or more, for example, one, two, or more. For example, "including at least one" means including one, two, or more, and does not limit which ones are included. For example, "including at least one of A, B, and C" means including A, B, C, A and B, A and C, B and C, or A, B, and C.

[0041] It should be noted that in the embodiments of the present application, "and / or" describes the association relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / ", unless otherwise specified, generally indicates that the associated objects are in an "or" relationship.

[0042] It should be noted that in the embodiments of the present application, "connection" can be understood as electrical connection, and the connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be either a direct connection between A and B or an indirect connection between A and B through one or more other electrical components.

[0043] Currently, clock signals are the foundation of sequential logic, determining when states within logic units are updated to ensure the synchronous operation of related electronic components. However, when the ambient temperature of the clock circuit changes (for example, when the chip heats up), the period and frequency of the clock signal will change, causing errors in the clock signal, which can easily lead to confusion in the sequential logic.

[0044] In related technologies, clock signal temperature drift elimination solutions mainly include two implementation methods:

[0045] 1. Reduce the temperature drift of electronic components in the clock circuit. For example, in the classic RC oscillator clock, since the elements that affect the clock period include resistors and capacitors, reducing the temperature drift of resistors and / or capacitors can weaken the temperature drift of the clock signal.

[0046] 2. Measure the temperature through a temperature sensor, and then correct the clock period according to a predetermined ratio or offset based on the temperature and a preset temperature drift calibration code value or conversion formula to eliminate the temperature drift of the clock signal.

[0047] However, the first method mentioned above is limited by the circuit preparation process and cannot accurately calibrate the temperature drift of the clock signal. The second method requires a high-precision temperature sensor, logic circuit and pre-calibrated parameters, which is expensive and limited by the accuracy of the temperature sensor. It is also unable to accurately calibrate the temperature drift of the clock signal.

[0048] To this end, the present application provides a clock signal temperature drift correction method, circuit, chip and electronic device, which are described below respectively.

[0049] First, refer to Figure 1, which shows a schematic diagram of an application scenario of the clock signal temperature drift correction method in the implementation of the present application. The clock signal temperature drift correction method provided by the present invention can be applied to an electronic device 100 as shown in Figure 1, wherein the electronic device 100 includes a clock circuit 10 and a clock control module 20, and the clock circuit 10 includes a first clock module 11 that generates a first clock signal and a second clock module 12 that generates a second clock signal. Specifically, the first clock module 11 and the second clock module 12 can be any one of an RC oscillator, an LC oscillator or a crystal oscillator. Among them, RC oscillators include but are not limited to bridge oscillators, RC phase-shift oscillators or dual-T oscillators, LC oscillators include but are not limited to mutually inductive coupling oscillators, inductive feedback oscillators or capacitive feedback oscillators, and crystal oscillators include but are not limited to parallel crystal oscillators or series crystal oscillators.

[0050] The clock control module 20 refers to a module that receives a first clock signal and / or a second clock signal. After receiving the first clock signal and / or the second clock signal, the clock control module 20 can use the first clock signal and / or the second clock signal to achieve stable operation of related circuits, such as clock control of the display panel display, synchronization of data frames, synchronization of network communications, ensuring the correctness of data transmission, achieving timing control, synchronizing the operation of various modules of the chip, etc. As an example, the clock control module 20 can refer to a chip in an electronic device that receives a basic clock signal, so that the chip operates based on the basic clock signal; as another example, the clock control module 20 can refer to a display control circuit (such as a GOA circuit) of a display panel in an electronic device, so that the display control circuit refreshes the display screen after receiving the clock signal.

[0051] 2 , which shows a flow chart of a method for correcting a clock signal temperature drift according to an embodiment of the present application, wherein the method for correcting a clock signal temperature drift includes:

[0052] Step S201, determining whether the first clock signal CLK1 and the second clock signal CLK2 have temperature drift;

[0053] In some embodiments of the present application, the ambient temperature of the first clock module 11 and / or the second clock module 12 can be detected. When the ambient temperature changes by more than a certain value (for example, the temperature rises by 5°C or the temperature drops by 5°C), it can be determined that the first clock signal CLK1 and the second clock signal CLK2 have temperature drifted; otherwise, it can be determined that the first clock signal CLK1 and the second clock signal CLK2 have not temperature drifted.

[0054] It should be noted that, in the present application, detecting the ambient temperature of the first clock module 11 and / or the second clock module 12 is only used to determine whether temperature drift occurs in the first clock signal CLK1 and the second clock signal CLK2. Therefore, it is only necessary to roughly detect the ambient temperature of the first clock module 11 and / or the second clock module 12, and it is not necessary to obtain a high-precision value of the ambient temperature of the first clock module 11 and / or the second clock module 12. That is to say, the implementation method of detecting the ambient temperature of the first clock module 11 and / or the second clock module 12 in the present application does not require the accuracy of the temperature sensor, and a high-precision temperature sensor may not be used.

[0055] In some embodiments of the present application, the frequency of the first clock signal CLK1 and / or the second clock signal CLK2 can be detected, and then it can be determined whether the frequency of the first clock signal CLK1 and / or the second clock signal CLK2 deviates from the set frequency by a certain value, so that it can be determined that the first clock signal CLK1 and the second clock signal CLK2 have experienced temperature drift. For example, if the actual frequency of the first clock signal CLK1 is detected to be 4.1 MHz, and the first set frequency of the first clock signal CLK1 is 4 MHz, and the difference between the actual frequency of the first clock signal CLK1 and the first set frequency is greater than or equal to 0.1 MHz, it can be determined that the first clock signal CLK1 and the second clock signal CLK2 have experienced temperature drift.

[0056] In some embodiments of the present application, the frequencies of the first clock signal CLK1 and the second clock signal CLK2 can also be detected, and then the frequency difference between the first clock signal CLK1 and the second clock signal CLK2 is calculated. The actual frequency difference between the first clock signal CLK1 and the second clock signal CLK2 and the set frequency difference are used to determine whether the first clock signal CLK1 and the second clock signal CLK2 have temperature drift. The set frequency difference refers to the set frequency difference between the first clock signal CLK1 and the second clock signal CLK2 at the set temperature, that is, the set frequency difference is the difference between the first set frequency and the second set frequency. Specifically, referring to Figure 3, Figure 3 shows a schematic diagram of the relationship between the clock signal frequency and temperature in an embodiment of the present application. According to the relationship between frequency and temperature, it can be obtained: f1 = f01*(1+TC1*(T0-t)) f2 = f02*(1+TC2*(T0-t))

[0057] Wherein, T0 is a set temperature (for example, 25°C), t is the actual ambient temperature, f1 is the frequency of the first clock signal CLK1 at the actual ambient temperature, f2 is the frequency of the second clock signal CLK2 at the actual ambient temperature, f01 is the first set frequency of the first clock signal CLK1 at the set temperature, f02 is the second set frequency of the second clock signal CLK2 at the set temperature, TC1 is the first temperature coefficient of the first clock signal CLK1, and TC2 is the second temperature coefficient of the second clock signal CLK2.

[0058] Therefore, the frequency difference between the first clock signal CLK1 and the second clock signal CLK2 at the actual ambient temperature satisfies the following relationship: f1-f2=f01*(1+TC1*(T0-t))-f02*(1+TC2*(T0-t))

[0059] Because the first temperature coefficient of the first clock signal CLK1 and the second temperature coefficient of the second clock signal CLK2 are not equal, the frequency difference between the first clock signal CLK1 and the second clock signal CLK2 changes after the actual ambient temperature changes. For example, the first set frequency of the first clock signal CLK1 is 4 MHz, and the second set frequency of the second clock signal CLK2 is 48 MHz. At the set temperature, the frequency difference between the first clock signal CLK1 and the second clock signal CLK2 is 44 MHz. However, after the actual ambient temperature deviates from the set temperature, the frequency difference between the first clock signal CLK1 and the second clock signal CLK2 may change to 44.11 MHz. By determining whether the frequency difference between the first clock signal CLK1 and the second clock signal CLK2 exceeds a corresponding threshold range (e.g., 43.9 MHz-44.1 MHz), it can be determined whether the first clock signal CLK1 and the second clock signal CLK2 have experienced temperature drift.

[0060] In some embodiments of the present application, whether temperature drift occurs in the first clock signal CLK1 and the second clock signal CLK2 can also be determined based on the actual frequency ratio of the first clock signal CLK1 and the second clock signal CLK2 and the set frequency ratio, wherein the set frequency ratio refers to the set frequency ratio of the first clock signal CLK1 and the second clock signal CLK2 at a set temperature, that is, the set frequency ratio is the ratio of the first set frequency to the second set frequency. Similarly, referring to FIG3 , based on the above-mentioned frequency-temperature relationship, the frequency ratio of the first clock signal CLK1 and the second clock signal CLK2 at the actual ambient temperature satisfies the following relationship:

[0061] Since the first temperature coefficient of the first clock signal CLK1 and the second temperature coefficient of the second clock signal CLK2 are not equal, the frequency ratio of the first clock signal CLK1 to the second clock signal CLK2 also changes after the actual ambient temperature changes. For example, the first set frequency of the first clock signal CLK1 is 4 MHz, and the second set frequency of the second clock signal CLK2 is 48 MHz. At the set temperature, the set frequency ratio of the first clock signal CLK1 to the second clock signal CLK2 is 12. However, after the actual ambient temperature deviates from the set temperature, the frequency difference between the first clock signal CLK1 and the second clock signal CLK2 may change to 12.06. By determining whether the frequency ratio of the first clock signal CLK1 to the second clock signal CLK2 exceeds a corresponding threshold range (e.g., 11.95-12.05), it can be determined whether the first clock signal CLK1 and the second clock signal CLK2 have experienced temperature drift.

[0062] It should be noted that, since the frequency and period of the clock signal are inversely proportional, the implementation methods involving the use of frequency in the embodiments of the present application can be equivalently replaced by the use of period. At the same time, the implementation methods using period should be considered to have adopted the embodiments of the present application regarding frequency. For example, the period of the first clock signal CLK1 and / or the second clock signal CLK2 can be detected, and then it can be determined whether the period of the first clock signal CLK1 and / or the second clock signal CLK2 deviates from the set period by a certain value, and then it can be determined whether the first clock signal CLK1 and the second clock signal CLK2 have temperature drift. The implementation method of detecting the period of the first clock signal CLK1 and / or the second clock signal CLK2 should be considered to be the same implementation method as the detection of the frequency of the first clock signal CLK1 and / or the second clock signal CLK2 in the present application.

[0063] In step S202 , when temperature drift occurs in the first clock signal CLK1 and the second clock signal CLK2 , the frequencies of the first clock signal CLK1 and the second clock signal CLK2 are adjusted so that the frequencies of the first clock signal CLK1 and the second clock signal CLK2 satisfy a preset relationship.

[0064] When it is determined that the first clock signal CLK1 and the second clock signal CLK2 have temperature drift, the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2 can be adjusted so that the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2 satisfy a preset relationship. When the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2 satisfy the preset relationship, the frequency of the first clock signal CLK1 is the first set frequency at the set temperature, and the frequency of the second clock signal CLK2 is the second set frequency at the set temperature. Therefore, even if the first clock signal CLK1 and the second clock signal CLK2 have temperature drift, they can return to the corresponding set frequencies after the ambient temperature changes, and finally achieve zero temperature drift characteristics of the first clock signal CLK1 and the second clock signal CLK2, avoiding the clock signal temperature drift phenomenon that cannot be completely avoided by traditional methods due to objective factors such as the influence of circuit preparation process and the accuracy of temperature sensor.

[0065] It should be noted that the numerical parameters used in the specification and claims of this application are approximate values ​​and may vary depending on the desired features of individual embodiments. For example, the first set frequency and the second set frequency referred to in this application may allow for a certain frequency variation between the first set frequency and the second set frequency. When the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2 satisfy a preset relationship, the frequency of the first clock signal CLK1 is within a range of ±0.1% of the first set frequency, and the frequency of the second clock signal CLK2 is within a range of ±0.1% of the second set frequency. It is understood that the range of variation of the numerical parameters used in the specification and claims of this application can be adjusted according to actual needs. For example, the first set frequency and the second set frequency can also be adjusted according to the actual oscillator and pulse signal accuracy requirements, and this application does not make specific limitations here.

[0066] In some embodiments of the present application, the preset relationship may refer to the actual frequency difference between the first clock signal CLK1 and the second clock signal CLK2 being the set frequency difference. Since the first temperature coefficient of the first clock signal CLK1 and the second temperature coefficient of the second clock signal CLK2 are not equal, the frequency difference between the first clock signal CLK1 and the second clock signal CLK2 changes after the actual ambient temperature changes. Therefore, after the temperature drift phenomenon occurs, the actual frequency difference between the first clock signal CLK1 and the second clock signal CLK2 is readjusted to the set frequency difference. The frequency of the first clock signal CLK1 can be the first set frequency at the set temperature, and the frequency of the second clock signal can be the second set frequency at the set temperature. For example, in the embodiment described above, the frequency difference between the first clock signal CLK1 and the second clock signal CLK2 is 44 MHz at the set temperature. However, when the actual ambient temperature deviates from the set temperature, the frequency difference between the first clock signal CLK1 and the second clock signal CLK2 may change to 44.11 MHz. The frequencies of the first clock signal CLK1 and the second clock signal CLK2 may be adjusted so that the frequency difference between the first clock signal CLK1 and the second clock signal CLK2 returns to 44 MHz.

[0067] In some embodiments of the present application, the preset relationship may refer to the actual frequency ratio of the first clock signal CLK1 and the second clock signal CLK2 being the set frequency ratio. Similarly, since the first temperature coefficient of the first clock signal CLK1 and the second temperature coefficient of the second clock signal CLK2 are not equal, the frequency ratio of the first clock signal CLK1 and the second clock signal CLK2 also changes after the actual ambient temperature changes. Therefore, after the temperature drift phenomenon occurs, the frequency ratio of the first clock signal CLK1 and the second clock signal CLK2 is readjusted to the set frequency ratio. The frequency of the first clock signal CLK1 can be set to the first set frequency at the set temperature, and the frequency of the second clock signal can be set to the second set frequency at the set temperature. For example, in the embodiment described above, where the frequency ratio of the first clock signal CLK1 to the second clock signal CLK2 is 12 at the set temperature, and the frequency difference between the first clock signal CLK1 and the second clock signal CLK2 may change to 12.06 after the actual ambient temperature deviates from the set temperature, the frequencies of the first clock signal CLK1 and the second clock signal CLK2 may be adjusted so that the frequency ratio of the first clock signal CLK1 to the second clock signal CLK2 returns to 12.

[0068] It can be understood that the preset relationship may also mean that the actual frequency ratio of the first clock signal CLK1 and the second clock signal CLK2 is the set frequency ratio, and the actual frequency difference between the first clock signal CLK1 and the second clock signal CLK2 is the set frequency difference.

[0069] In some embodiments of the present application, such as those in which the first clock module 11 and the second clock module 12 are RC oscillators, the temperature coefficient-related electronic components in the RC oscillators can be adjusted to adjust the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2. For example, the resistance of a resistor in the RC oscillator can be changed; another example, the capacitance of a capacitor in the RC oscillator can be changed; and another example, the resistance of a resistor and the capacitance of a capacitor in the RC oscillator can be changed.

[0070] In some embodiments of the present application, for example, in embodiments where the first clock module 11 and the second clock module 12 are LC oscillators, electronic components related to the temperature coefficient in the LC oscillator can be adjusted to adjust the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2. For example, the capacitance of a capacitor in the LC oscillator can be changed; another example, the inductance of an inductor in the LC oscillator can be changed; and another example, the capacitance of a capacitor and the inductance of an inductor in an RC oscillator can be changed.

[0071] In some embodiments of the present application, for example, in embodiments where the first clock module 11 and the second clock module 12 are crystal oscillators, electronic components related to the temperature coefficient of the crystal oscillator can be adjusted to adjust the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2. For example, the capacitance of the crystal oscillator can be changed; for another example, the inductance of the crystal oscillator can be changed.

[0072] In some embodiments of the present application, after adjusting the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2, the frequency of the first clock signal CLK1 has a first change ratio relative to the first set frequency, and the frequency of the second clock signal CLK2 has a second change ratio relative to the second set frequency; wherein a first ratio of the first change ratio to the first temperature coefficient is equal to a second ratio of the second change ratio to the second temperature coefficient.

[0073] It should be noted that, according to the relationship between frequency and temperature, the changing frequency of the first clock signal CLK1 and the changing frequency of the second clock signal CLK2 satisfy the following relationship: Δf1=f01*TC1*Δt1 Δf2=f02*TC2*Δt2

[0074] Among them, Δt1 is the ambient temperature change of the first clock module corresponding to the first clock signal CLK1, Δt2 is the ambient temperature change of the second clock module corresponding to the second clock signal CLK2, Δf2 is the change value of the frequency of the first clock signal CLK1 relative to the first set frequency, and Δf1 is the change value of the frequency of the second clock signal CLK2 relative to the second set frequency.

[0075] Since the first ratio of the first change ratio to the first temperature coefficient is equal to the second ratio of the second change ratio to the second temperature coefficient, the change frequency of the first clock signal CLK1 and the change frequency of the second clock signal CLK2 also satisfy the following relationship: Δf1 / f01=x1 Δf2 / f02=x2 x1 / TC1=x2 / TC2

[0076] Here, x1 is the change ratio of the first clock signal CLK1, and x2 is the change ratio of the second clock signal CLK2.

[0077] Combining the above two calculation formulas for the changing frequency of the first clock signal CLK1 and the changing frequency of the second clock signal CLK2, it can be known that: TC1*Δt1 / TC1=TC2*Δt2 / TC2

[0078] That is, Δt1=Δt2. If Δt1 and Δt2 are the differences between the actual ambient temperature and the set temperature, then after adjusting the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2 (for example, adjusting the electronic component parameters related to the temperature coefficient in the RC oscillator), the frequency of the first clock signal CLK1 is the first set frequency at the set temperature, and the frequency of the second clock signal CLK2 is the second set frequency at the set temperature, thereby making the first clock signal CLK1 and the second clock signal CLK2 have the characteristic of zero temperature drift.

[0079] As an example, the second temperature coefficient of the second clock signal CLK2 is twice the first temperature coefficient of the first clock signal CLK1, the first set frequency of the first clock signal CLK1 is 4 MHz, the second set frequency of the second clock signal CLK2 is 48 MHz, and the ratio of the second clock signal CLK2 to the first clock signal CLK1 at the set temperature is 12. If the temperature drift phenomenon occurs, the frequency of the first clock signal CLK1 is 4.1 MHz, and the frequency of the second clock signal CLK2 is 50.4 MHz. At this time, the frequency ratio of the first clock signal CLK1 to the second clock signal CLK2 is 12.29. This causes the frequency of the first clock signal CLK1 to change by a first variation ratio of 0.025% relative to the first set frequency, while simultaneously changing the second clock signal CLK2 by a second variation ratio of 0.05%. This allows the frequency of the first clock signal CLK1 to be readjusted to 4 MHz, and the frequency of the second clock signal CLK2 to be readjusted to 48 MHz. Furthermore, since the second temperature coefficient of the second clock signal CLK2 is twice the first temperature coefficient of the first clock signal CLK1, according to 0.025% = 0.05% / 2, it can be seen that the first ratio of the first variation ratio to the first temperature coefficient is equal to the second ratio of the second variation ratio to the second temperature coefficient.

[0080] It can be seen that the present application can make the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2 satisfy a preset relationship by changing the frequency of the first clock signal CLK1 by a first change ratio relative to the first set frequency, and changing the frequency of the second clock signal CLK2 by a second change ratio relative to the second set frequency, while making the first ratio of the first change ratio to the first temperature coefficient equal to the second ratio of the second change ratio to the second temperature coefficient, so that the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2 finally meet the preset relationship, and finally make the frequency of the first clock signal CLK1 the first set frequency at the set temperature, and the frequency of the second clock signal CLK2 the second set frequency at the set temperature.

[0081] In some embodiments of the present application, referring to FIG. 4 , FIG. 4 shows a flow chart of adjusting the clock signal frequency in an embodiment of the present application. When the first clock signal CLK1 and the second clock signal CLK2 experience temperature drift, the steps of adjusting the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2 include:

[0082] Step S401, determining a first deviation value according to the actual frequency ratio of the first clock signal CLK1 to the second clock signal CLK2, and the ratio of the first set frequency to the second set frequency;

[0083] In some embodiments of the present application, the actual frequency ratio of the first clock signal CLK1 to the second clock signal CLK2 can be obtained by measuring the first clock signal CLK1 and the second clock signal CLK2 against each other. For example, the number of pulse periods of the second clock signal CLK2 can be measured by the first clock signal CLK1 within a certain number of pulse periods. Assuming that the number of pulse periods of the second clock signal CLK2 measured by the first clock signal CLK1 within N pulse periods is M, the actual frequency ratio of the first clock signal CLK1 to the second clock signal CLK2 is M / N.

[0084] In some embodiments of the present application, the frequency of the first clock signal CLK1 is greater than the frequency of the second clock signal CLK2, so that the period of the low-frequency second clock signal CLK2 can be measured using the high-frequency first clock signal CLK1, and the actual frequency ratio of the first clock signal CLK1 to the second clock signal CLK2 can be obtained. For example, if the frequency of the first clock signal CLK1 is 128 MHz and the frequency of the second clock signal CLK2 is 8 MHz, the number of periods of the second clock signal CLK2 that can be measured within a single period of the first clock signal CLK1 is 16, and the actual frequency ratio of the first clock signal CLK1 to the second clock signal CLK2 is determined to be 16.

[0085] In some embodiments of the present application, the frequencies of the first clock signal CLK1 and the second clock signal CLK2 may be measured using a reference clock to obtain an actual frequency ratio of the first clock signal CLK1 to the second clock signal CLK2. For example, if the reference clock measures N pulse periods of the first clock signal CLK1 within a single pulse cycle, and measures M periods of the second clock signal CLK2 within a single cycle, the actual frequency ratio of the first clock signal CLK1 to the second clock signal CLK2 is M / N.

[0086] After obtaining the actual frequency ratio of the first clock signal CLK1 to the second clock signal CLK2, the first deviation value can be determined in combination with the ratio of the first set frequency to the second set frequency. Generally, the difference between the actual frequency ratio of the first clock signal CLK1 to the second clock signal CLK2 and the set frequency ratio can be used as the first deviation value, that is, the first deviation value D1 can be calculated according to the following formula:

[0087] Assuming the ratio of the first set frequency to the second set frequency is N0, the simplified result is:

[0088] Among them, TC2 2 *Δt 2 , the quadratic term TC1*Δt*TC2*Δt is extremely small.

[0089] Therefore, the simplified first deviation value D1 can be calculated as follows:

[0090] That is: D1=(TC1-TC2)*Δt

[0091] It can be seen that since the first temperature coefficient is not equal to the second temperature coefficient, the first deviation value D varies with temperature. In other words, the relationship between the frequency ratio of the first clock signal CLK1 and the second clock signal CLK2 and the temperature is one-to-one. The first deviation value represents the temperature drift parameter of the first clock signal CLK1 and the second clock signal CLK2 relative to the set temperature. Therefore, based on the frequency ratio of the first clock signal CLK1 and the second clock signal CLK2, a high-precision temperature drift parameter can be obtained without the need for a temperature sensor.

[0092] It is understood that the first deviation value may also be obtained by performing corresponding mathematical processing on the actual frequency ratio of the first clock signal CLK1 to the second clock signal CLK2 and the set frequency ratio. For example, the first deviation value may be rounded to obtain an integer first deviation value. In another example, the actual frequency ratio of the first clock signal CLK1 to the second clock signal CLK2 may be measured multiple times, and then the difference between the multiple actual frequency ratios and the set frequency ratio is calculated. Finally, the first deviation value is obtained by performing processing such as averaging or average difference based on the multiple differences.

[0093] In some embodiments of the present application, one of the first clock signal CLK1 and the second clock signal CLK2 has a positive temperature coefficient, and the other has a negative temperature coefficient. Combined with the first deviation value D1 calculation formula: D1 = (TC1-TC2)*Δt, when the temperature changes, the first deviation value is larger, thereby making the first deviation value D1 more sensitive to temperature, which is beneficial to improving the sensitivity of the clock signal temperature drift elimination method of the present application.

[0094] Step S402, determining a first change ratio according to the first deviation value, the first temperature coefficient, and the second temperature coefficient;

[0095] Specifically, according to the changing frequency of the clock signal, the calculation formula of the first deviation value D, and the calculation formula of the first changing ratio x1 of the first clock signal CLK1: Δf1=f01*TC1*Δt Δt=D1 / (TC1-TC2) x1=Δf1 / f01

[0096] It can be concluded that: x1=TC1*D1 / (TC1-TC2)

[0097] It can be seen that since the first deviation value represents the temperature drift parameter of the first clock signal CLK1 relative to the set temperature, the first change ratio of the first clock signal CLK1 can be determined based on the first deviation value, the first temperature coefficient and the second temperature coefficient, so as to change the first clock signal CLK1 by the first change ratio relative to the first set frequency, and finally return the frequency of the first clock signal CLK1 to the first set frequency at the set temperature.

[0098] Step S403 : determining a second change ratio according to the first deviation value, the first temperature coefficient, and the second temperature coefficient.

[0099] Similarly, according to the changing frequency of the clock signal, the calculation formula of the first deviation value D1, and the calculation formula of the second changing ratio x2 of the second clock signal CLK2, it can be obtained that: x2 = TC2*D1 / (TC1-TC2)

[0100] It can be seen that since the first deviation value represents the temperature drift parameter of the second clock signal CLK2 relative to the set temperature, the second change ratio of the second clock signal CLK2 can be determined based on the first deviation value, the first temperature coefficient and the second temperature coefficient, so as to change the second clock signal CLK2 by the second change ratio relative to the second set frequency, and finally return the frequency of the second clock signal CLK2 to the second set frequency at the set temperature.

[0101] It should be noted that, according to the calculation formula of the first deviation value D1: D1 = (TC1-TC2) * Δt, it can be seen that the first change ratio and the second change ratio in the above embodiment are mainly the frequency change part of the clock signal for the first-order temperature coefficient, and in fact, the frequency change of the clock signal when the temperature changes also includes the frequency change part of the high-order temperature coefficient. For example, in the derivation process of the above first deviation value D1, the omitted TC2 2 *Δt 2、TC1*Δt*TC2*Δt second-order temperature coefficient. To further eliminate the frequency change part corresponding to the higher-order temperature coefficient, please refer to the following:

[0102] In some embodiments of the present application, the first variation ratio includes a first sub-variation ratio and a second sub-variation ratio, and the second variation ratio includes a third sub-variation ratio and a fourth sub-variation ratio. The first sub-variation ratio and the third sub-variation ratio are affected by a first-order temperature coefficient, and the second sub-variation ratio and the fourth sub-variation ratio are affected by a higher-order temperature coefficient. Referring to FIG. 5 , FIG. 5 is a schematic diagram of another flow chart for adjusting the clock signal frequency in an embodiment of the present application, wherein, when the first clock signal CLK1 and the second clock signal CLK2 experience temperature drift, the steps of adjusting the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2 include:

[0103] Step S501, determining a first deviation value according to the actual frequency ratio of the first clock signal CLK1 to the second clock signal CLK2, and the ratio of the first set frequency to the second set frequency;

[0104] Step S502, determining a first sub-change ratio and a third sub-change ratio according to the first deviation value, the first temperature coefficient, and the second temperature coefficient;

[0105] Step S503, determining the second sub-change ratio according to the actual frequency ratio and a first preset mapping relationship between the second sub-change ratio and the actual frequency ratio;

[0106] Step S504 : determining a fourth sub-change ratio according to the actual frequency ratio and a second preset mapping relationship between the fourth sub-change ratio and the actual frequency ratio.

[0107] Specifically, the first sub-change ratio and the third sub-change ratio are affected by the first-order temperature coefficient, and the second sub-change ratio and the fourth sub-change ratio are affected by the high-order (e.g., second-order) temperature coefficient. Taking the first clock signal CLK1 as an example, when considering the influence of the high-order (e.g., second-order) temperature coefficient, the relationship between the change frequency of the first clock signal CLK1 and the temperature can be calculated according to the following relationship: Δf1 = f01*Δt*N1 + f01*Δt*N2

[0108] Wherein, N1 is the first-order temperature coefficient, N2 is the higher-order temperature coefficient, Δt*N1 is the first sub-change ratio, and Δt*N2 is the third sub-change ratio.

[0109] For the first sub-change ratio and the third sub-change ratio, combined with the above-mentioned first deviation value calculation formula, the first sub-change ratio and the third sub-change ratio can be calculated as follows: x11 = TC1*D1 / (TC1-TC2) x21 = TC2*D1 / (TC1-TC2)

[0110] Among them, x11 is the first sub-change ratio, and x21 is the third sub-change ratio.

[0111] As for the second sub-ratio of change and the fourth sub-ratio of change, since the second sub-ratio of change and the fourth sub-ratio of change are affected by a high-order (e.g., second-order) temperature coefficient, the second sub-ratio of change and the fourth sub-ratio of change can be obtained by querying a first preset mapping relationship and a second preset mapping relationship, respectively. The first preset mapping relationship refers to a pre-calibrated data set of the relationship between the second sub-ratio of change and the actual frequency ratio, and the second preset mapping relationship refers to a pre-calibrated data set of the relationship between the fourth sub-ratio of change and the actual frequency ratio.

[0112] After determining the actual frequency ratio of the first clock signal CLK1 to the second clock signal CLK2, the first sub-change ratio is calculated using the above formula, and the second sub-change ratio can be determined by querying the first preset mapping relationship. The frequency of the first clock signal CLK1 is comprehensively adjusted in combination with the first sub-change ratio and the second sub-change ratio, which is conducive to completely eliminating the influence of the first-order temperature coefficient and the high-order temperature coefficient, so that the frequency of the first clock signal CLK1 can be more accurately returned to the frequency at the set temperature.

[0113] As an example, if the first set frequency of the first clock signal CLK1 at a set temperature of 25°C is 2MHz, the cycles of the second clock signal CLK2 are counted by the first clock signal CLK1, and the actual frequency ratio of the first clock signal CLK1 to the second clock signal CLK2 is determined to be 12.5 (indicating that the ambient temperature is 30°C), the first sub-change ratio is calculated to be 5%, and the corresponding second sub-change ratio in the first preset mapping relationship is 1%. In this case, the first change ratio of the frequency of the first clock signal CLK1 needs to be changed by 6% in order for the frequency of the first clock signal CLK1 to return to 2MHz. The same is true for the second clock signal CLK2, and no further details are given here.

[0114] It can be seen that the present application utilizes the pre-calibrated first preset mapping relationship and the second preset mapping relationship to further eliminate the influence of the high-order temperature coefficient, thereby making the frequencies of the first clock signal CLK1 and the second clock signal CLK2 return to the frequencies at the set temperature more accurately.

[0115] It can be understood that the first preset mapping relationship can also be a data set of the relationship between the first sub-change ratio and the actual frequency ratio, and the second preset mapping relationship can also be a data set of the relationship between the third sub-change ratio and the actual frequency ratio. That is, the change ratio of the first clock signal CLK1 with respect to the first-order temperature coefficient can be determined through the first preset mapping relationship. Since the frequency change of the clock signal is greatly affected by the first-order temperature coefficient, the frequency of the first clock signal CLK1 can also be accurately returned to the first set frequency at the set temperature; or, the first preset mapping relationship and the second preset mapping relationship simultaneously include the frequency change ratios corresponding to the first-order temperature coefficient and the higher-order temperature coefficient. That is, the first preset mapping relationship and the second preset mapping relationship are pre-test calibration results that include the frequency change ratios corresponding to the first-order temperature coefficient and the higher-order temperature coefficient. Therefore, the first preset mapping relationship and the second preset mapping relationship can directly and simultaneously eliminate the influence of the first-order temperature coefficient and the higher-order temperature coefficient, so that the frequencies of the first clock signal CLK1 and the second clock signal CLK2 can more accurately return to the frequencies at the set temperature.

[0116] In some embodiments of the present application, a second deviation value can also be determined based on the actual frequency difference and the set frequency difference between the first clock signal CLK1 and the second clock signal CLK2; and then the first change ratio and the second change ratio can be determined based on the second deviation value, the first temperature coefficient, and the second temperature coefficient. Similarly, because the first temperature coefficient and the second temperature coefficient are not equal, the second deviation value also varies with temperature. The second deviation value also represents the temperature drift parameter of the first clock signal CLK1 and the second clock signal CLK2 relative to the set temperature. Therefore, the first change ratio of the first clock signal CLK1 and the second change ratio of the second clock signal CLK2 can be determined based on the second deviation value, the first temperature coefficient, and the second temperature coefficient.

[0117] In some embodiments of the present application, after determining the first change ratio of the first clock signal CLK1, the frequency of the first clock signal CLK1 can be directly adjusted to change the first change ratio. In other embodiments of the present application, after determining the first change ratio of the first clock signal CLK1, the frequency of the first clock signal CLK1 can be adjusted to the first change ratio in multiple steps. For example, after temperature drift occurs, the first change ratio of the frequency of the first clock signal CLK1 relative to the first set frequency is 0.25%. The frequency of the first clock signal CLK1 can be first changed from 1.0025 times the first set frequency to 1.0015 times the first set frequency, and then the frequency of the first clock signal CLK1 can be changed from 1.0015 times the first set frequency to the first set frequency. It can be understood that the frequency adjustment of the second clock signal CLK2 can be performed in the above manner, which will not be repeated here.

[0118] In some embodiments of the present application, for example, for an embodiment in which the frequency of the first clock signal CLK1 is adjusted to a first change ratio in multiple steps, refer to FIG6 , which shows another flowchart of adjusting the clock signal frequency in an embodiment of the present application, wherein the step of adjusting the frequency of the first clock signal CLK1 includes:

[0119] Step S601, determining a first step length change ratio of the first clock signal CLK1;

[0120] Specifically, the first step frequency change ratio is the frequency change ratio of the first clock signal CLK1 relative to the first set frequency during each adjustment step of the first clock signal CLK1. For example, the first change ratio is 0.05%, 0.01%, etc. of the first set frequency. In some embodiments of the present application, the first step frequency change ratio can be determined based on the parameters of the electronic components in the first clock module. For example, in an embodiment in which the frequency of an RC oscillator is adjusted by trimming a capacitor, the first step frequency change ratio can be determined based on the capacitance of the smallest unit of the capacitor array. In some embodiments of the present application, the first step frequency change ratio can be used to determine the frequency adjustment step size based on the temperature coefficient. For example, if the temperature changes by 1°C, the frequency of the first clock signal CLK1 changes by 0.5% relative to the first set frequency. In this case, the frequency of the first clock signal CLK1 can be adjusted according to the first step frequency change ratio of 0.1%.

[0121] It is understandable that the first step length change ratio can be adjusted according to actual needs, and this application does not make any specific limitations here.

[0122] Step S602, determining a first adjustment step number according to the first step length change ratio and the first change ratio;

[0123] After determining the first length change ratio, the first trimming step number can be determined based on the first length change ratio and the first change ratio. For example, if the first change ratio is 0.5% and the first length change ratio is 0.1%, the first trimming step number can be determined to be 5 steps. In some embodiments of the present application, when determining the first trimming step number, if the first change ratio and the first length change ratio are not integer multiples, the ratio of the first change ratio to the first length change ratio can be rounded up. For example, if the first change ratio is 0.41% and the first length change ratio is 0.2%, the first trimming step number can be determined to be 2 steps.

[0124] It can be understood that the smaller the first step length change ratio is, the easier it is to make the first change ratio and the first step length change ratio an integer multiple, and thus the frequency of the first clock signal CLK1 can be accurately adjusted to the first set frequency. Therefore, if the electronic components in the first clock module allow, the first step length change ratio should be set as small as possible.

[0125] In step S603 , the frequency of the first clock signal CLK1 is gradually adjusted by a first change ratio relative to the first set frequency according to the first step change ratio and the first adjustment step number.

[0126] After determining the first frequency change ratio and the first number of adjustment steps, the frequency of the first clock signal CLK1 can be gradually adjusted by the first frequency change ratio relative to the first set frequency. For example, referring to FIG. 7 , FIG. 7 illustrates a schematic diagram of a process for adjusting the frequency of the first clock signal CLK1 in an embodiment of the present application. If the first frequency change ratio is 0.5% and the first frequency change ratio is 0.1%, the frequency of the first clock signal CLK1 will eventually return to the first set frequency after five steps.

[0127] It can be understood that in the process of adjusting the frequency of the first clock signal CLK1 to the first set frequency, the frequency ratio of each step may not be equal. For example, if the first change ratio is 1%, the frequency of the first clock signal CLK1 changes in 4 steps of 0.4%, 0.3%, 0.2%, and 0.1% in sequence and finally returns to the first set frequency.

[0128] In some embodiments of the present application, for example, for an embodiment in which the frequency of the second clock signal CLK2 is adjusted to a second change ratio in multiple steps, refer to FIG8 , which shows another flowchart of adjusting the clock signal frequency in an embodiment of the present application, wherein the step of adjusting the frequency of the second clock signal CLK2 includes:

[0129] Step S801, determining a second step length change ratio of the second clock signal CLK2;

[0130] Specifically, the second step change ratio is the ratio of the frequency change of the second clock signal CLK2 relative to the second set frequency during each adjustment step of the second clock signal CLK2. For example, the second change ratio is 0.05%, 0.01%, etc. of the first set frequency. In some embodiments of the present application, the second step change ratio can be determined based on the parameters of the electronic components in the second clock module. For example, for an RC oscillator, the frequency can be adjusted by trimming resistors, and the second step change ratio can be determined based on the minimum unit resistance of the resistor array. In some embodiments of the present application, the second step change ratio can be used to determine the frequency adjustment step size based on the temperature coefficient. For example, if the temperature changes by 1°C, the frequency change ratio of the second clock signal CLK2 relative to the second set frequency is 0.4%. In this case, the frequency of the first clock signal CLK1 can be adjusted according to the first step change ratio of 0.2%.

[0131] Step S802, determining a second adjustment step number according to the second step length change ratio and the second change ratio;

[0132] After determining the second step size change ratio, the second trimming step number can be determined based on the second step size change ratio and the second change ratio. For example, if the second change ratio is 0.4% and the second step size change ratio is 0.2%, the second trimming step number can be determined to be 2 steps. In some embodiments of the present application, when determining the second trimming step number, if the second change ratio and the second step size change are not integer multiples, the ratio of the second change ratio to the second step size change ratio can be rounded. For example, if the second change ratio is 0.62% and the first step size change ratio is 0.1%, the first trimming step number can be determined to be 3 steps.

[0133] It can be understood that the smaller the second step change ratio is, the easier it is to make the second change ratio and the second step change ratio an integer multiple, thereby accurately adjusting the frequency of the second clock signal CLK2 to the second set frequency.

[0134] In step S803 , the frequency of the second clock signal CLK2 is gradually adjusted to change by a second change ratio relative to the second set frequency according to the second step change ratio and the second adjustment step number.

[0135] After determining the second step change ratio and the second number of adjustment steps, the frequency of the second clock signal CLK2 can be gradually adjusted relative to the second set frequency by the second change ratio. For example, referring to FIG. 9 , FIG. 9 illustrates a schematic diagram of a process for adjusting the frequency of the second clock signal CLK2 in an embodiment of the present application. If the second change ratio is 0.8% and the second step change ratio is 0.2%, the frequency of the second clock signal CLK2 will eventually return to the second set frequency after four steps.

[0136] It can be understood that in the process of adjusting the frequency of the second clock signal CLK1 to the second set frequency, the frequency ratio of each step may not be equal. For example, if the second change ratio is 0.6%, the frequency of the second clock signal CLK2 is adjusted in three steps of 0.3%, 0.2%, and 0.1% to finally return to the second set frequency.

[0137] In some embodiments of the present application, referring to FIG. 10 , FIG. 10 shows a schematic diagram of a process for adjusting the frequencies of the first clock signal CLK1 and the second clock signal CLK2 in an embodiment of the present application, wherein the first adjustment step number is equal to the second adjustment step number. Specifically, due to the first change ratio, the first step length change ratio, and the first adjustment step number, the second change ratio, the second step length change ratio, and the second adjustment step number satisfy the following relationship: x11 = x1 / N1 x21 = x2 / N2

[0138] Wherein, N1 is the first adjustment step number, N2 is the second adjustment step number, x11 is the first step length change ratio, and x21 is the second step length change ratio.

[0139] At the same time, according to the clock signal change frequency calculation formula: x11=TC1*Δt01 x21=TC2*Δt02

[0140] Δt01 is the temperature change value corresponding to each change of the first step length of the first clock signal CLK1 , and Δt02 is the temperature change value corresponding to each change of the second step length of the second clock signal CLK2 .

[0141] According to the above relationship, we can conclude that: N1=x1 / TC1*Δt01 N2=x2 / TC2*Δt02

[0142] Since the first adjustment step number is equal to the second adjustment step number, we know that: x1 / TC1*Δt01=x2 / TC2*Δt02

[0143] Since, in the embodiment of the present application, the first ratio of the first change ratio to the first temperature coefficient is equal to the second ratio of the second change ratio to the second temperature coefficient, Δt01=Δt02. That is, when the first adjustment step number is equal to the second adjustment step number, during the process of adjusting the frequencies of the first clock signal CLK1 and the second clock signal CLK2, the adjustment processes of the first clock signal CLK1 and the second clock signal CLK2 are synchronized in terms of temperature, which helps to ensure the temperature consistency of the frequency adjustment processes of the first clock signal CLK1 and the second clock signal CLK2.

[0144] The present invention also provides a clock signal temperature drift correction circuit 1000. Referring to FIG. 11 , FIG. 11 shows a block diagram of the clock signal temperature drift correction circuit 1000 in the present invention. The clock signal temperature drift correction circuit 1000 includes:

[0145] A clock signal generating circuit 1001, the clock signal generating circuit 1001 includes a first clock module generating a first clock signal CLK1 and a second clock module generating a second clock signal CLK2;

[0146] A temperature drift correction circuit 1002 is configured to determine whether temperature drift occurs in the first clock signal CLK1 and the second clock signal CLK2. When temperature drift occurs, the temperature drift correction circuit 1002 adjusts the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2 so that the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2 satisfy a predetermined relationship.

[0147] In which, the first temperature coefficient of the first clock signal CLK1 is not equal to the second temperature coefficient of the second clock signal CLK2, and when the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2 satisfy a preset relationship, the frequency of the first clock signal CLK1 is a first set frequency at a set temperature, and the frequency of the second clock signal CLK2 is a second set frequency at a set temperature.

[0148] The clock signal temperature drift correction circuit provided by the embodiment of the present application has a first temperature coefficient of the first clock signal CLK1 and a second temperature coefficient of the second clock signal CLK2 that are not equal. Therefore, when the temperature changes and causes the frequency of the first clock signal CLK1 and the frequency of the second clock signal CLK2 to change, the frequency relationship between the first clock signal CLK1 and the second clock signal CLK2 changes. For example, the first temperature coefficient is greater than the second temperature coefficient. As the temperature rises, the frequency difference / ratio between the first clock signal CLK1 and the second clock signal CLK2 gradually increases. Therefore, the present application makes the frequency of the first clock signal CLK1 and the second clock signal CLK2 different. When the frequency of the signal CLK2 satisfies the preset relationship again after the temperature drift occurs, the frequency of the first clock signal CLK1 can be set to the first set frequency at the set temperature, and the frequency of the second clock signal can be set to the second set frequency at the set temperature. In this way, even if the first clock signal CLK1 and the second clock signal CLK2 experience temperature drift, they can return to the corresponding set frequencies after the ambient temperature changes, and finally achieve the zero temperature drift characteristics of the first clock signal CLK1 and the second clock signal CLK2, avoiding the clock signal temperature drift phenomenon that cannot be completely avoided by traditional methods due to objective factors such as the circuit preparation process and the accuracy of the temperature sensor.

[0149] The present application also provides a chip including the aforementioned clock signal temperature drift correction circuit. An integrated circuit (IC) is also referred to as a chip, and the chip may be, but is not limited to, a system-on-chip (SOC) chip or a system-in-package (SIP) chip. Because the chip in the present application includes the aforementioned clock signal temperature drift correction circuit, it possesses all the beneficial effects of the aforementioned clock signal temperature drift correction circuit, and this application will not elaborate further here.

[0150] An embodiment of the present application also provides an electronic device, which includes a memory and a processor, wherein the memory stores a computer program, and the processor is used to run the computer program in the memory to execute the steps in the clock signal temperature drift correction method described in any of the above embodiments. The electronic device can be, but is not limited to, a weight scale, a body fat scale, a nutrition scale, an infrared electronic thermometer, a pulse oximeter, a body composition analyzer, a mobile power supply, a wireless charger, a fast charger, a car charger, an adapter, a display, a USB (Universal Serial Bus) docking station, a stylus, a true wireless headset, a car central control panel, a car, a smart wearable device, a mobile terminal, and a smart home device. Smart wearable devices include, but are not limited to, smart watches, smart bracelets, and cervical massagers. Mobile terminals include, but are not limited to, smartphones, laptops, tablets, and POS (point of sales terminal) machines. Smart home devices include, but are not limited to, smart sockets, smart rice cookers, smart sweepers, and smart lights.

[0151] The above is only a preferred embodiment of the present application and does not constitute any form of limitation to the present application. Although the present application has been disclosed as above with preferred embodiments, it is not intended to limit the present application. Any person skilled in the art can make some changes or modifications to equivalent embodiments using the technical contents disclosed above without departing from the scope of the technical solution of the present application. However, any brief modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. A clock signal temperature drift correction method, characterized in that: The method is applied to a clock signal generating circuit, the clock signal generating circuit comprising a first clock module generating a first clock signal and a second clock module generating a second clock signal, and the method comprises: Determining whether a temperature drift phenomenon occurs between the first clock signal and the second clock signal; When the first clock signal and the second clock signal experience a temperature drift phenomenon, adjusting the frequency of the first clock signal and the frequency of the second clock signal so that the frequency of the first clock signal and the frequency of the second clock signal satisfy a preset relationship; In which, the first temperature coefficient of the first clock signal is not equal to the second temperature coefficient of the second clock signal, and when the frequency of the first clock signal and the frequency of the second clock signal satisfy a preset relationship, the frequency of the first clock signal is a first set frequency at a set temperature, and the frequency of the second clock signal is a second set frequency at a set temperature.

2. The clock signal temperature drift correction method according to claim 1, characterized in that: After the frequency of the first clock signal and the frequency of the second clock signal are adjusted, the frequency of the first clock signal has a first change ratio relative to the first set frequency, and the frequency of the second clock signal has a second change ratio relative to the second set frequency; A first ratio of the first change ratio to the first temperature coefficient is equal to a second ratio of the second change ratio to the second temperature coefficient.

3. The clock signal temperature drift correction method according to claim 2, characterized in that: When the first clock signal and the second clock signal experience temperature drift, the step of adjusting the frequency of the first clock signal and the frequency of the second clock signal comprises: Determine a first deviation value according to an actual frequency ratio of the first clock signal to the second clock signal, and a ratio of the first set frequency to the second set frequency; determining the first change ratio according to the first deviation value, the first temperature coefficient, and the second temperature coefficient; The second change ratio is determined according to the first deviation value, the first temperature coefficient, and the second temperature coefficient.

4. The clock signal temperature drift correction method according to claim 2, characterized in that: The first change ratio includes a first sub-change ratio and a second sub-change ratio, the second change ratio includes a third sub-change ratio and a fourth sub-change ratio, the first sub-change ratio and the third sub-change ratio are affected by a first-order temperature coefficient, and the second sub-change ratio and the fourth sub-change ratio are affected by a high-order temperature coefficient; When the first clock signal and the second clock signal experience temperature drift, the step of adjusting the frequency of the first clock signal and the frequency of the second clock signal comprises: Determine a first deviation value according to an actual frequency ratio of the first clock signal to the second clock signal, and a ratio of the first set frequency to the second set frequency; determining the first sub-change ratio and the third sub-change ratio according to the first deviation value, the first temperature coefficient, and the second temperature coefficient; determining the second sub-change ratio according to the actual frequency ratio and a first preset mapping relationship between the second sub-change ratio and the actual frequency ratio; The fourth sub-change ratio is determined according to the actual frequency ratio and a second preset mapping relationship between the fourth sub-change ratio and the actual frequency ratio.

5. The clock signal temperature drift correction method according to claim 3 or 4, characterized in that: When the first clock signal and the second clock signal experience temperature drift, the step of adjusting the frequency of the first clock signal and the frequency of the second clock signal further includes: Determining a first step length change ratio of the first clock signal; Determining a first adjustment step number according to the first step length change ratio and the first change ratio; According to the first step length change ratio and the first adjustment step number, the frequency of the first clock signal is gradually adjusted to change the first change ratio relative to the first set frequency.

6. The clock signal temperature drift correction method according to claim 5, characterized in that: When the first clock signal and the second clock signal experience temperature drift, the step of adjusting the frequency of the first clock signal and the frequency of the second clock signal further includes: determining a second step change ratio of the second clock signal; Determining a second adjustment step number according to the second step length change ratio and the second change ratio; According to the second step change ratio and the second adjustment step number, the frequency of the second clock signal is gradually adjusted to change the second change ratio relative to the second set frequency.

7. The clock signal temperature drift correction method according to claim 6, characterized in that: The first trimming step number is equal to the second trimming step number.

8. The clock signal temperature drift correction method according to claim 1, characterized in that: The step of determining whether the first clock signal and the second clock signal have temperature drift comprises: Whether the first clock signal and the second clock signal have temperature drift is determined according to the actual frequency ratio of the first clock signal to the second clock signal and the ratio of the first set frequency to the second set frequency.

9. The clock signal temperature drift correction method according to claim 1, characterized in that: One of the first clock signal and the second clock signal has a positive temperature coefficient, and the other has a negative temperature coefficient.

10. The clock signal temperature drift correction method according to claim 1, characterized in that: The frequency of the first clock signal is greater than the frequency of the second clock signal.

11. The clock signal temperature drift correction method according to claim 1, characterized in that: The preset relationship is that the actual frequency ratio of the first clock signal to the second clock signal is a set frequency ratio, and the set frequency ratio is a ratio of the first set frequency to the second set frequency; or The preset relationship is that the actual frequency difference between the first clock signal and the second clock signal is a set frequency difference, and the set frequency difference is a difference between the first set frequency and the second set frequency.

12. A clock signal temperature drift correction circuit, characterized in that: include: A clock signal generating circuit, wherein the clock signal generating circuit comprises a first clock module generating a first clock signal and a second clock module generating a second clock signal; a temperature drift correction circuit, the temperature drift correction circuit being used to determine whether the first clock signal and the second clock signal have a temperature drift phenomenon, and when the first clock signal and the second clock signal have a temperature drift phenomenon, the temperature drift correction circuit adjusts the frequency of the first clock signal and the frequency of the second clock signal so that the frequency of the first clock signal and the frequency of the second clock signal satisfy a preset relationship; Among them, the first temperature coefficient of the first clock signal is not equal to the second temperature coefficient of the second clock signal, and when the frequency of the first clock signal and the frequency of the second clock signal satisfy a preset relationship, the frequency of the first clock signal is a first set frequency at a set temperature, and the frequency of the second clock signal is a second set frequency at a set temperature.

13. A chip, characterized in that: It comprises the clock signal temperature drift correction circuit as claimed in claim 12.

14. An electronic device, characterized in that: It comprises a memory and a processor, wherein the memory stores a computer program, and the processor is used to run the computer program in the memory to execute the steps in the clock signal temperature drift correction method according to any one of claims 1 to 11.

Images