A procedure to operate high frequency crystal oscillators

Abstract

Methods and circuits for detecting and controlling for parasitic oscillations in a crystal oscillator circuit. An example method comprises initializing (710) power-up of the crystal oscillator circuit, wherein said initializing (710) power-up comprises increasing an effective transconductance of the crystal oscillator circuitry over time, at a first rate, and detecting (720) a frequency of oscillation of the crystal oscillator circuit. This example method further comprises, in response to determining that the detected frequency of oscillation is lower than a target frequency, restarting (730) power-up of the crystal oscillator, wherein said restarting power-up comprises increasing the effective transconductance of the crystal oscillator circuitry over time at a second rate that is slower than the first rate.

Description

[0001] A PROCEDURE TO OPERATE HIGH FREQUENCY CRYSTAL OSCILLATORS

[0002] TECHNICAL FIELD

[0003] The present disclosure is related to crystal oscillator circuits and, more particularly, detecting and controlling for parasitic oscillations in such circuits.

[0004] BACKGROUND

[0005] High-frequency crystal oscillators (XO) are attractive for use in such wireless devices as user equipments (UEs) or access points (Aps) used in wireless networks, given that in radio-frequency (RF) synthesizer circuits the phase noise in the RF output from a synthesizer circuit is improved as the frequency multiplication from the reference oscillator, typically an XO, is reduced. This addresses a fundamental problem related to phase noise degradation at higher frequency, which also limits the minimum achievable error vector magnitude (EVM). Improvements in phase noise and EVM are necessary for enabling future sixth-generation (6G) wireless products at millimeter-wave frequencies.

[0006] One alternative for such applications is the use of a watt-level phase-locked loop (PLL) system to enable low jitter and high reference frequency. Thanks to new advancements in crystal technology, Gigahertz (GHz) crystals are a key focus for device manufacturers. The use of GHz crystals could allow the watt-level PLL to be replaced with a milliwatt-level XO. Differential high frequency oscillators are also desirable for on chip signaling which then becomes less susceptible to supply noise.

[0007] However, high-frequency differential oscillators currently suffer from at least three issues.

[0008] A first issue is the possibility of a low-frequency parasitic oscillation (i.e., a parasitic oscillation at a frequency lower than the desired oscillation frequency for the circuit). This parasitic oscillation has an unknown frequency that depends on the effective transconductance, or gm, of the circuit. This oscillation is likely to occur when the effective gm is increased. The XO circuit needs time to accumulate energy into the crystal, and if the low frequency oscillation occurs this may not be possible. This is discussed in [1] C. Elgaard and L. Sundstrbm, "A 491.52 MHz 840 uW crystal oscillator in 28 nm FD-SOI CMOS for 5G applications," ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference, Leuven, Belgium, 2017, pp. 247-250.

[0009] To address this problem, a gm reduction, e.g., using a feedback capacitor (Cf), is often used to c - c r 4-C reduce the effective gm, according to C

[0010] 7f< 2 — - — — « 2 — — -, where gmis the transconductance K / Jnr1Rfdm of the transistor pair in the core, CLis the combined parasitic capacitance of the core oscillator circuit (see Figure 8, where this is shown as CL0AD), Cois the parallel capacitance from the basic crystal model (see Figure 2), and and Rf are feedback capacitance and resistance in the core oscillator circuit (e.g., as arranged in Figure 1 (a) or (b)). However, this may result in an excessively small that would not guarantee XO start-up. This problem becomes more severe at high frequencies where the required could be very small for parasitic oscillation to be suppressed.

[0011] A second problem is a high-frequency parasitic oscillation, i.e., at a frequency higher than the target oscillation frequency, which may be due to the packaging and high-Q. package inductance. This is a less severe problem which can be overcome using a de-Q'ing resistor, as discussed in reference [1],

[0012] A third issue is the need for amplitude control, to avoid excessive noise from the active devices. This is discussed in [2] J. Peltonen, C. Elgaard, A.K. Stenman, "Oscillator circuit with bias current generator", Patent application EP3149848A1.

[0013] SUMMARY

[0014] Embodiments described herein address at least some of the problems discussed above by providing a circuit structure and a method to detect and correct for parasitic low and high frequency oscillations in an XO, to ensure that the XO starts and reaches steady state at the desired, or target, frequency.

[0015] In some of the embodiments described herein, an oscillator transconductance control technique, e.g., a current bleeding technique, is used to suppress the low frequency parasitic oscillation mode in an XO, e.g., in a high-frequency XO used in a wireless device. To ensure that the oscillation frequency is the intended one, a feedback loop and a control algorithm are used. The algorithm provides solutions for when the low frequency parasitic oscillation occurs, but also for when high frequency parasitic oscillation occurs. A gear shifting algorithm to recover from a parasitic oscillation is also described below.

[0016] Thus, methods and circuits for detecting and controlling for parasitic oscillations in a crystal oscillator circuit are described in detail below. An example method for detecting and controlling for parasitic oscillations in a crystal oscillator circuit, according to some embodiments, comprises initializing power-up of the crystal oscillator circuit, wherein said initializing power-up comprises increasing an effective transconductance of the crystal oscillator circuitry over time, at a first rate, and detecting a frequency of oscillation of the crystal oscillator circuit. This example method further comprises, in response to determining that the detected frequency of oscillation is lower than a target frequency, restarting power-up of the crystal oscillator, wherein said restarting power-up comprises increasing the effective transconductance of the crystal oscillator circuitry over time at a second rate that is slower than the first rate.

[0017] In some embodiments or instances of this example method, rather than increasing the effective transconductance at a slower rate, in response to detecting that the frequency of oscillation is lower than the target frequency, the method instead comprises increasing one or more damping resistances connected between a core and a crystal of the crystal oscillator circuit, in response to the detected frequency of oscillation being higher than the target frequency, i.e., in response to detecting a high-frequency parasitic oscillation.

[0018] Corresponding circuits are also described in detail below. An example oscillator circuit, according to some embodiments, comprises a crystal oscillator, which in turn comprises a crystal and a core crystal oscillator circuit connected in parallel to the crystal. The example oscillator circuit further comprises a frequency detection circuit coupled to an output of the crystal oscillator, , and control circuitry operatively coupled to the frequency detection circuit. The control circuitry is configured, according to various embodiments, to initialize power-up of the crystal oscillator circuit, where said initializing power-up comprises controlling one or more components in or connected to the core crystal oscillator to increase the effective transconductance of the core crystal oscillator circuit over time, at a first rate, and, responsive to determining that a frequency of oscillation of the crystal oscillator detected by the frequency detection circuit differs from a target frequency, restart power- up of the crystal oscillator. This restarting power-up may comprise controlling the one or more components in or connected to the core crystal oscillator to increase the effective transconductance of the core crystal oscillator circuit over time at a second rate that is slower than the first rate, in response to the detected frequency of oscillation being lower than the target frequency, or increasing one or more damping resistances connected between a core and a crystal of the crystal oscillator circuit, in response to the detected frequency of oscillation being higher than the target frequency.

[0019] These and other embodiments of the techniques and circuits described herein may be used to solve the problem of parasitic oscillations in a high frequency crystal oscillator circuit, e.g., by providing an adaptive algorithm to start the XO circuit and recover if a parasitic oscillation occurs.

[0020] Details and variations of these examples are provided in the detailed description that follows and illustrated in the attached figures. BRIEF DESCRIPTION OF THE FIGURES

[0021] Figure 1 illustrates examples of a core of a crystal oscillator circuit, according to some embodiments.

[0022] Figure 2 is a schematic illustration of a crystal model.

[0023] Figure 3 shows crystal voltage build up for a simulated 492 MHz crystal oscillator circuit.

[0024] Figure 4 shows crystal voltage build up for a simulated 984 MHz crystal oscillator circuit.

[0025] Figure 5 shows a simulation of the energy stored in a crystal, in various scenarios.

[0026] Figure 6 illustrates a system arrangement for an oscillator circuit, according to some embodiments.

[0027] Figure 7 is a flow chart illustrating how to start up a crystal oscillator circuit and correct for unwanted behavior, according to some embodiments.

[0028] Figure 8 is a schematic diagram of a simple linear model of a crystal oscillator circuit consisting of an active on-chip part connected to a piezoelectric crystal.

[0029] Figure 9 is a detailed model of a crystal including the packing model.

[0030] Figure 10 is a process flow diagram illustrating an example method for detecting and controlling for parasitic oscillations in a crystal oscillator circuit, according to some embodiments.

[0031] DETAILED DESCRIPTION

[0032] Examples of circuits and techniques for detecting and correcting for parasitic oscillations in a crystal oscillator circuit, e.g., crystal oscillator circuits using high-frequency crystals, such as crystals for use in GHz crystal oscillators. Techniques and circuits for addressing low-frequency parasitic oscillation, i.e., parasitic oscillation at a frequency lower than the target oscillation frequency, are discussed first, followed by a discussion of techniques and circuits for addressing high-frequency parasitic oscillation, i.e., parasitic oscillation at a frequency higher than the target oscillation frequency.

[0033] Note that "lower than" and "higher than," in the present context, should generally be understood as referring to oscillation frequencies that are enough lower or higher than the target oscillation frequency that it can be determined, e.g., by comparing a detected frequency to a threshold offset from the target frequency, that the oscillation is due to a mode different from the intended oscillation mode and not simply a matter of a need for tuning of one or more circuit parameters. It will be appreciated that because these techniques may be used in crystal oscillator circuits where the operating frequency is not locked to another reference frequency, the oscillation frequency when operating in the intended mode may differ somewhat from the target frequency. A design tolerance for such an oscillator might be + / - 10%, for instance, or might be tighter, such as a + / - 3% tolerance. Thus, "lower than the target frequency" could be understood as referring to a difference, from a nominal target frequency, of more than about 10%, in many design contexts, or might be understood as referring to a somewhat smaller difference, in others. The same goes, of course, for the phrase "higher than the target frequency," in the description herein. As will be seen in the discussion that follows, an aspect of at least some of the embodiments and circuits described herein is that a determination is made of whether an oscillation frequency differs from a target oscillation frequency to the extent that a parasitic oscillation is at least suspected. While it may be desirable, in a particular design context, to tune the detection of this difference so as to reliably detect a parasitic oscillation while minimizing the possibility of incorrectly detecting one, the precise difference used for this determination is less important, for the purposes of understanding and employing the inventive concepts described in this document, than the use of the detection mechanism itself in the manners described herein.

[0034] 1) Low frequency Parasitic Oscillation

[0035] Two example differential XO schematics are shown in Figure 1, labeled (a) and (b). In these examples of the core of a crystal oscillator circuit, the crystal is connected to outmand outpnodes. With either topology, the effective transconductance, referred to as "gm," suitable to start the oscillation at the wanted frequency needs to be carefully selected. If too high a gm is chosen, a low frequency parasitic oscillation occurs. The crystal will be unable to accumulate enough energy as the oscillator devices are driven with large oscillation amplitudes, with only a little energy injected into the crystal at the desired frequency of operation.

[0036] In XO circuits operating at higher frequencies, the required gm to suppress low frequency parasitic oscillation reduces. The effective gm can be controlled by and R as given by the equation below: where gmis the transconductance of the transistor pair in the core, CLis the combined parasitic capacitance of the core oscillator circuit (see Figure 8, where this is shown as CL0AD), Cois the parallel capacitance from the basic crystal model (see Figure 2), and and Rf are feedback capacitance and resistance in the core oscillator circuit (e.g., as arranged in Figure 1 (a) or (b)). As seen in this equation, if the gain factor Rfgmis reduced, then practical values for can be found. However, reducing the gain factor heavily will result in a loop gain that does not satisfy Barkhausen oscillation criteria and oscillation will therefore not occur.

[0037] An alternative to providing a fixed gm that prevents low-frequency oscillation while also providing for reliable oscillation at the target frequency is to provide a low gm, initially, with the gm continually increasing until the correct oscillation occurs. This can be done in many ways and therefore mentioning any specific technique serves only as an example. One such specific technique is adding a current bleeding component to the XO core, as seen in the two examples in Figure 1. Note that an additional alternative to those illustrated in Figure 1 is to add the controlled damping resistor between outmand outp. The damping resistor is configured to a low resistance initially, ensuring no oscillation at all can start. The damping resistance is then slowly increased. At some point, the effective gm becomes suitable for injecting energy into the crystal, without starting the low frequency parasitic oscillation.

[0038] Another technique is to load the output in differential mode, i.e., between the outputs outmand outpof the XO. Switched resistors or MOS devices can be used to implement such a technique. Yet another technique would be to change the bias settings of the active transistors to control their transconductance. All of these three techniques, i.e., current bleeding, output loading, and bias control, aim at controlling the effective transconductance in a desirable way during startup.

[0039] In the discussion that follows, circuitry and techniques for controlling parasitic oscillation in circuits that employ the current bleeding techniques are described. It should be understood, however, that similar techniques for controlling the parasitic oscillation may be used in circuits that employ output loading and / or bias control techniques instead, as well as in circuits that employ other approaches to increasing the effective gmin a controlled manner, to start oscillation.

[0040] Referring back to Figure 1, the circuit identified as (a) has been implemented in a 22-nm CMOS process with two high-frequency crystal models provided by two foundries: one at approximately 492 MHz and the other at approximately 984 MHz. Metal-oxide-semiconductor (MOS) devices with parasitic models were used to ensure reasonable operating conditions.

[0041] To prove the concepts described herein, transient simulations were performed on the XO-core using the same modelling structure shown in Figure 2 for each of the crystal models. The model parameters for the 492 MHz Crystal are shown in Table 1. Since the crystal is modeled with a series RLC circuit with a very high Q-factor (in the order of thousands), the internal voltage is very high. Transient simulations were performed on both crystals, with and without current bleeding. When current bleeding technique was used, a ramp down period of 50 us was used, in which case simulations showed the oscillator gracefully starting at the right frequency. When current bleeding was not used in the simulations, however, simulations showed the XO oscillating at a lower frequency than the target frequency (the crystal design frequency), with little or no energy at the desired frequency being stored in the crystal. This can be seen in Figure 3 and Figure 4, which show crystal model voltage build up for a 492 MHz XO and for a 984 MHz XO, respectively. Looking at the energy stored in the crystal, as shown in Figure 5 for the 984 MHz XO, the simulations make clear that the use of the current bleeding technique effectively injects enough energy, into the crystal, for the XO to operate at the wanted frequency while avoiding going to the wrong mode of oscillation.

[0042] Table 1 - Parameter values for the 492 MHz Crystal Model

[0043] It should be noted, however, that the desired ramp period is expected to change, depending on the circuit design. Extensive simulations have also shown that when the effective gm is enough to start a parasitic oscillation, then the lower the gm the higher the frequency of the parasitic oscillation. In all cases, however, the frequency of the parasitic oscillation is still less than the wanted frequency. This is very useful, as it gives insight on how the XO operates and how it can be tuned.

[0044] Note also that while a 50-us ramp was used in the design to prove the concepts, it is important to be able to tune the oscillator to reach wanted oscillation in all cases. A block diagram of a system for solving this problem is shown in Figure 6.

[0045] As seen in Figure 6, the XO circuit 610 is connected to a frequency detector circuit 620, which is clocked using a system clock 625 that operates at a much lower frequency than the target frequency for XO circuit 610. Such a clock is typically available in wireless devices, such as user equipments (UEs) and access points used in wireless networks. The frequency detection in frequency detection circuit 620 can be done in any of several different ways. One straightforward implementation is to use a counter, with its input connected to the output of XO circuit 610, and latch the result with the low-frequency system clock. This latched result can then be compared to a quantity corresponding to the desired ratio between the XO circuit target frequency and the system clock frequency. The error, e.g., the difference between this latched result and a desired target ratio, may be fed to a digital signal processing (DSP) unit 630, or other control circuitry, which configures / controls the current bleeding to ensure correct frequency.

[0046] An example procedure the DSP 330 may use to ensure that the XO circuit 610 is oscillating at the correct frequency is shown in Figure 7. The system is started, as shown at block 710, with the effective gm of the XO circuit 610 being set to a minimum, e.g., as determined by look-up table settings. Frequency detection is performed, as shown at block 720, while increasing the gm gradually, e.g., in steps or in a continuous ramp. If no oscillation is detected, then the current bleeding is reduced such that the gm is increased further.

[0047] If an oscillation is detected, then the frequency detector determines if it is the correct frequency or if it is higher or lower, as shown at blocks 730 and 740. A higher-frequency parasitic oscillation can be solved by, for example, de-Q'ing the high frequency parasitic oscillation, as explained below and as shown generally at block 745. If a low-frequency oscillation is detected, on the other hand, i.e., a XO circuit oscillation frequency lower than the target frequency, then a so-called gear shifting algorithm shifts the gear down and restarts the ramping, as shown at block 750. Here, reducing the gear means increasing the ramping period, i.e., increasing the effective gm of the Xo circuit 610 at a slower rate than the previous rate.

[0048] After reducing the gear, if lower frequency oscillation still persists, then further gear shifting is performed. The oscillation frequency may be compared to the earlier detected values in the past to make sure the gear shifting is effective, in some embodiments. If the frequency remains the same, then more aggressive gear shifting with slow ramps is required.

[0049] Once the correct oscillation is reached then the values may be saved in a look up table, as shown at block 760, and stored for future use on the same XO circuit. Note that this could also be performed in the lab, for a circuit representative of a circuit to be mass-produced, with those settings being saved for use in subsequently mass-produced XO circuits using the same crystal type and circuit design. Also note that by "correct oscillation" is meant that the detected frequency of oscillation is at least approximately equal to the target frequency, i.e., within some tolerance range, such as + / - 10% or lower. As noted above, a XO circuit that is not locked to an accurate reference frequency may oscillate at a frequency slightly higher than or lower than the nominal target frequency, depending on circuit component tolerances, operating temperature, etc. The simulations discussed above showed that the parasitic oscillations are enough higher or lower than the frequency targeted by the circuit so that distinguishing between a parasitic oscillation and a "correct" oscillation that is somewhat different from the nominal target frequency is readily possible. 2) High frequency Parasitic Oscillation

[0050] A linear model of the interface of the active part of a crystal oscillator circuit and the crystal itself is shown in Figure 8. In an example implementation, the crystal model contains values from the 492-MHz model from Table 1. The wires connecting the active chip and the crystal may be modeled with an effective parasitic inductance of Lpar=3 nH, for example. The active part of the core oscillator circuit contains transistors here modeled by a negative resistance Rneg and a tuning of the oscillation frequency by modifying Cload. As is well known, adding damping resistors Rxp / Rxn, also referred to as "de-Q'ing resistors," with carefully selected values will stop a high- frequency parasitic oscillation, i.e., an oscillation at a frequency greater than the target frequency for the crystal oscillator circuit.

[0051] Adding resistors Rxp / Rxn as shown in Figure 8 will greatly reduce the Q-value of the parasitic oscillation. But, the Q-value of the wanted oscillation will not be affected as much as the parasitic one. However, if resistors Rxp / Rxn are chosen too high they will effectively ruin the wanted oscillation, and if they are chosen too low they will not remove the conditions that causes the high frequency parasitic oscillation. Accordingly, a careful selection of Rxp / Rxn is needed. An optimal value will depend on the actual implementation, but it can be found either by analytical calculations or by using circuit simulations.

[0052] With a very high crystal oscillator frequency, the package parasitics form a relatively high-Q. resonator at higher frequency than the wanted one. In the 984 MHz crystal oscillator design, the detailed package parasitics formed a resonator at 6.5 GHz, for example.

[0053] To show the importance of the method proposed herein for controlling high-frequency parasitics, the detailed model illustrated in Figure 9 was used in simulations. During start-up, the low frequency oscillation followed by the high frequency oscillation both occurred, while the crystal energy build up was not fast enough to overtake. This indicates that the proposed methods are important in order to take the required action based on the oscillation frequency. Changing the rate of change for the effective gm of the circuit is effective to control and eliminate the low- frequency parasitic oscillation. Adjusting the damping resistance in response to detecting a high- frequency parasitic oscillation is effective to de-Q the circuit, and dampen the parasitic oscillation. These techniques can thus be combined, to ensure start-up of a high-frequency XO circuit at the target frequency.

[0054] In view of the detailed examples and description provided above, it will be appreciated that Figure

[0055] 10 is a block diagram illustrating an example method incorporating the techniques described above, for detecting and controlling for parasitic oscillations in a crystal oscillator circuit. Note that the method illustrated in Figure 10 is intended to represent a generalization of the techniques described above. Thus, where the terminology used below to describe the method shown in Figure 10 differs from that used above, the terms used below should be interpreted, wherever reasonably possible, to at least encompass similar or clearly related terms used above.

[0056] As shown at block 1010, the example method includes a step of initializing power-up of the crystal oscillator circuit, where this initializing power-up comprises increasing an effective transconductance of the crystal oscillator circuitry over time, at a first rate. The method further includes, as shown at block 1020, the step of detecting a frequency of oscillation of the crystal oscillator circuit. Then, as shown at block 1030, the method comprises restarting power-up of the crystal oscillator, responsive to determining that the detected frequency of oscillation differs from a target frequency. In some instances and / or embodiments, this restarting power-up comprises increasing the effective transconductance of the crystal oscillator circuitry over time at a second rate that is slower than the first rate, in response to the detected frequency of oscillation being lower than the target frequency. In other instances and / or embodiments, the restarting power-up comprises increasing one or more damping resistances connected between a core and a crystal of the crystal oscillator circuit, in response to the detected frequency of oscillation being higher than the target frequency. Thus, various instances and / or embodiments of the illustrated method may address low-frequency parasitic oscillations as discussed above, or high-frequency parasitic oscillations, as also discussed above, or both.

[0057] In some embodiments of the illustrated method, where the detected frequency of oscillation is lower than the target frequency, the method may further comprise performing the following steps repeatedly until it is determined that the frequency of oscillation of the crystal oscillator is at least approximately equal to the target frequency. First, the frequency of oscillation of the crystal oscillator is detected after the restarting of power-up shown at block 1030. Then, in response to determining that the detected frequency of oscillation is still lower than the target frequency, power-up of the crystal oscillator is restarted again, wherein this restarting of power-up again comprises increasing the effective transconductance over time at a rate that is slower than the rate used in the immediately previous restarting of power-up. These steps, which may be repeated one or several times, correspond to the "gearing down" discussed above.

[0058] In some embodiments or instances, the method may comprise, after one or more re-startings, determining that the frequency of oscillation is at least approximately equal to the target frequency. This determining that the frequency of oscillation is at least approximately equal to the target frequency may comprise, for example, determining that the frequency of oscillation is within about 10% of the target frequency.

[0059] The method may then comprise storing one or more parameters representative of the most recent rate used for increasing the effective transconductance. As noted above, these stored parameters may be used for subsequent start-ups of the oscillator circuit. Thus, in some embodiments and / or instances, the method may comprise, after a power-off of the crystal oscillator circuit following the storing of the one or more parameters, powering on the crystal oscillator, using a ramp-up of the effective transconductance at a rate based on the stored one or more parameters. As also noted above, these stored parameters may be used in other implementations of the crystal oscillator circuit in which the method is carried out, e.g., in subsequent manufacture of many instances of the same crystal oscillator design.

[0060] As was discussed above, several techniques may be used for increasing the effective transconductance of the crystal oscillator circuit over time, in response to determining that the detected frequency of oscillation is lower than the target frequency. One approach to increasing the effective transconductance over time comprises reducing, over time, a bleeding current applied in parallel to at least a portion of a core of the crystal oscillator circuit. Another approach to increasing the effective transconductance over time comprises adjusting, over time, a capacitive loading on a core of the crystal oscillator circuit. This capacitive loading implements a capacitive divider which divides the voltage and effectively reduces the effective transconductance. Still another approach to increasing the effective transconductance over time comprises adjusting, over time, a bias current in a core of the crystal oscillator circuit.

[0061] The system shown in Figure 6 may be understood as one possible implementation of a crystal oscillator circuit configured to operate in accordance with the method illustrated in Figure 10 and, more generally, with any one or more of the techniques described above. The circuitry shown in Figure 6 is thus an example of an oscillator circuit comprising a crystal oscillator 610, which in turn comprises a crystal and a core crystal oscillator circuit connected in parallel to the crystal. Figure 1 shows two examples of the core crystal oscillator circuit - it will be appreciated that many other core crystal oscillator circuits may be used.

[0062] Oscillator circuits operable according to the techniques described herein may be used in any of a variety of wireless devices, such as UEs and / or access points. These oscillator circuits further include a frequency detection circuit 620 coupled to an output of the crystal oscillator. One implementation of a frequency detection circuit 620, utilizing a latching counter and a comparator, was described above - again it will be appreciated that other implementations of a frequency detection circuit are possible.

[0063] Oscillator circuits operable according to the techniques described herein further include control circuitry operatively coupled to the frequency detection circuit 620 and the power-up circuit. DSP 630 in Figure 6 is one example of such control circuitry. The control circuitry is configured to initialize power-up of the crystal oscillator circuit, where initializing power-up comprises controlling one or more components of the crystal oscillator circuit to increase an effective transconductance of the core crystal oscillator circuit over time, at a first rate, e.g., as determined by stored parameters. One example of the one or more components controlled by the control circuitry to increase the effective transconductance of the core crystal oscillator at a controlled rate is the bleed-off circuit Ibieed shown in Figure 1. Other examples were described in detail above. The control circuitry is further configured to, responsive to determining that a frequency of oscillation of the crystal oscillator detected by the frequency detection circuit differs from a target frequency, restart power-up of the crystal oscillator. This restarting of power-up comprises, in some instances, controlling the one or more components of the crystal oscillator circuit to increase the effective transconductance of the core crystal oscillator circuit over time at a second rate that is slower than the first rate, in response to the detected frequency of oscillation being lower than the target frequency. This restarting of power-up may comprise, in other instances, increasing one or more damping resistances connected between a core and a crystal of the crystal oscillator circuit, in response to the detected frequency of oscillation being higher than the target frequency. An oscillator circuit operating according to the techniques described herein may be configured to carry out either or both of these techniques.

[0064] In various embodiments, the control circuitry of an oscillator circuit operable according to the techniques described herein may be configured to carry out any of the variations of the method discussed above, in connection with Figure 10. Thus, in instances where the detected frequency of oscillation is lower than the target frequency, the control circuitry may be configured to perform the following steps repeatedly until it determines that the frequency of oscillation of the crystal oscillator detected by the frequency detection circuit is at least approximately equal to the target frequency: determining the frequency of oscillation of the crystal oscillator detected by the frequency detection circuit after the previous restarting of power-up; and, responsive to determining that the determined frequency of oscillation is still lower than the target frequency, restarting power-up of the crystal oscillator again, wherein said restarting power-up again comprises controlling the one or more components of the crystal oscillator circuit to increase the effective transconductance over time at a rate that is slower than the rate used in the immediately previous restarting of power-up.

[0065] In some embodiments or instances, the control circuitry may be configured to determine that the frequency of oscillation detected by the frequency detection circuit is at least approximately equal to the target frequency, and store one or more parameters representative of the most recent rate used for increasing the effective transconductance. In some embodiments or instances, the control circuitry may be further configured to, after a power-off of the crystal oscillator circuit following the storing of the one or more parameters, control the one or more components of the crystal oscillator circuit to power on the crystal oscillator using a ramp-up of the effective transconductance at a rate based on the stored one or more parameters.

[0066] Again, as was discussed above, several techniques may be used for increasing the effective transconductance of the crystal oscillator circuit over time, in response to determining that the detected frequency of oscillation is lower than the target frequency. Thus, in some embodiments the control circuitry is configured to increase the effective transconductance over time by reducing, over time, a bleeding current applied in parallel to at least a portion of a core of the crystal oscillator circuit. In other embodiments, the control circuitry is configured to increase the effective transconductance over time by adjusting, over time, a capacitive loading on a core of the crystal oscillator circuit. In still other embodiments, the control circuitry may be configured to increase the effective transconductance over time by adjusting, over time, a bias current in a core of the crystal oscillator circuit.

[0067] The various techniques and circuits described above may be used to solve the problem of parasitic oscillations in a high frequency crystal oscillator circuit, e.g., by providing an adaptive algorithm to start the XO circuit and recover if a parasitic oscillation occurs. Variations of the various sub-circuits described herein may be used without departing from the inventive concepts described herein.

Claims

CLAIMS1. A method for detecting and controlling for parasitic oscillations in a crystal oscillator circuit, the method comprising: initializing (1010) power-up of the crystal oscillator circuit, wherein said initializing power-up comprises increasing an effective transconductance of the crystal oscillator circuit over time, at a first rate; detecting (1020) a frequency of oscillation of the crystal oscillator circuit; and then, in response to the detected frequency of oscillation being lower than a target frequency, restarting (1030) power-up of the crystal oscillator, wherein said restarting power-up comprises increasing the effective transconductance of the crystal oscillator circuit over time at a second rate that is slower than the first rate, or in response to the detected frequency of oscillation being higher than the target frequency, increasing the resistance of one or more damping resistors connected between a core circuit and a crystal of the crystal oscillator circuit.

2. The method of claim 1, wherein the detected frequency of oscillation is lower than the target frequency and wherein the method further comprises performing the following steps repeatedly until it is determined that the frequency of oscillation of the crystal oscillator is at least approximately equal to the target frequency: detecting the frequency of oscillation of the crystal oscillator after the previous restarting of power-up; and responsive to determining that the detected frequency of oscillation is still lower than the target frequency, restarting power-up of the crystal oscillator again, wherein said restarting power-up again comprises increasing the effective transconductance over time at a rate that is slower than the rate used in the immediately previous restarting of power-up.

3. The method of claim 1 or 2, wherein the method comprises: determining that the frequency of oscillation is at least approximately equal to the target frequency; and storing one or more parameters representative of the most recent rate used for increasing the effective transconductance.

4. The method of claim 3, wherein the method comprises, after a power-off of the crystal oscillator circuit following said storing, powering on the crystal oscillator, using a ramp-up of the effective transconductance at a rate based on the stored one or more parameters.

5. The method of any of claims 2-4, wherein determining that the frequency of oscillation is at least approximately equal to the target frequency comprises determining that the frequency of oscillation is within about 10% of the target frequency.

6. The method of any one of claims 1-5, wherein the detected frequency of oscillation is lower than the target frequency and wherein increasing the effective transconductance over time comprises reducing, over time, a bleeding current applied to the core circuit of the crystal oscillator circuit.

7. The method of any one of claims 1-5, wherein the detected frequency of oscillation is lower than the target frequency and wherein increasing the effective transconductance over time comprises reducing, over time, a capacitive loading on the core circuit of the crystal oscillator circuit.

8. The method of any one of claims 1-5, wherein the detected frequency of oscillation is lower than the target frequency and wherein increasing the effective transconductance over time comprises increasing, over time, a bias current in the core circuit of the crystal oscillator circuit.

9. An oscillator circuit, comprising: a crystal oscillator (610) comprising a crystal and a core crystal oscillator circuit connected in parallel to the crystal; a frequency detection circuit (620) coupled to an output of the crystal oscillator and configured to detect a frequency of oscillation of the crystal oscillator (610); and control circuitry (630) operatively coupled to the frequency detection circuit (620) and configured to initialize power-up of the crystal oscillator circuit, wherein said initializing power-up comprises controlling one or more components in or connected to the core crystal oscillator to increase an effective transconductance of the core crystal oscillator circuit over time, at a first rate, wherein the control circuitry (630) is further configured to perform either or both of: in response to the detected frequency of oscillation being lower than a target frequency, restart power-up of the crystal oscillator, wherein said restarting power-up comprises controlling the one or more components in orconnected to the core crystal oscillator to increase the effective transconductance of the core crystal oscillator circuit over time at a second rate that is slower than the first rate, and, in response to the detected frequency of oscillation being higher than the target frequency, increase one or more damping resistances connected between the core crystal oscillator circuit and the crystal.

10. The oscillator circuit of claim 9, wherein the detected frequency of oscillation is lower than the target frequency and wherein the control circuitry is configured to perform the following steps repeatedly until it determines that the frequency of oscillation of the crystal oscillator detected by the frequency detection circuit is at least approximately equal to the target frequency: determining the frequency of oscillation of the crystal oscillator detected by the frequency detection circuit after the previous restarting of power-up; and responsive to determining that the determined frequency of oscillation is still lower than the target frequency, restarting power-up of the crystal oscillator again, wherein said restarting power-up again comprises controlling the one or more components in or connected to the core crystal oscillator to increase the effective transconductance over time at a rate that is slower than the rate used in the immediately previous restarting of power-up.

11. The oscillator circuit of claim 9 or 10, wherein the control circuitry is configured to: determine that the frequency of oscillation detected by the frequency detection circuit is at least approximately equal to the target frequency; and store one or more parameters representative of the most recent rate used for increasing the effective transconductance.

12. The oscillator circuit of claim 11, wherein the control circuitry is configured to, after a power-off of the crystal oscillator circuit following said storing, control the one or more components in or connected to the core crystal oscillator to power on the crystal oscillator using a ramp-up of the effective transconductance at a rate based on the stored one or more parameters.

13. The oscillator circuit of any of claims 10-12, wherein determining that the frequency of oscillation is at least approximately equal to the target frequency comprises determining that the frequency of oscillation is within about 10% of the target frequency.

14. The oscillator circuit of any one of claims 9-13, wherein the detected frequency of oscillation is lower than the target frequency and wherein the control circuit is configured to control the one or more components in or connected to the core crystal oscillator to increase the effective transconductance of the core crystal oscillator circuit over time by controlling the one or more components in or connected to the core crystal oscillator to reduce, over time, a bleeding current applied in parallel to at least a portion of the core crystal oscillator circuit.

15. The oscillator circuit of any one of claims 9-13, wherein the detected frequency of oscillation is lower than the target frequency and wherein the control circuit is configured to control the one or more components in or connected to the core crystal oscillator to increase the effective transconductance of the core crystal oscillator circuit over time by controlling the one or more components in or connected to the core crystal oscillator to adjust, over time, a capacitive loading on the core crystal oscillator circuit.

16. The oscillator circuit of any one of claims 9-13, wherein the detected frequency of oscillation is lower than the target frequency and wherein the control circuit is configured to control the one or more components in or connected to the core crystal oscillator to increase the effective transconductance of the core crystal oscillator circuit over time by controlling the one or more components in or connected to the core crystal oscillator to adjust, over time, a bias current in the core crystal oscillator circuit.

17. A wireless device comprising the oscillator circuit of any one of claims 9-16.

18. The wireless device of claim 17, wherein the wireless device is a user equipment, UE.

19. The wireless device of claim 17, wherein the wireless device is an access point for use in a wireless network.

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