Resistor

Abstract

This resistor includes an insulating substrate, a pair of upper-surface electrodes, a resistor, a pair of bottom-surface electrodes, a pair of end-face electrodes, and a pair of plating layers. The pair of upper-surface electrodes are formed on a first main surface positioned on one side in the thickness direction of the insulating substrate. The resistor is formed on the first main surface and electrically connects the pair of upper-surface electrodes to each other. The pair of bottom-surface electrodes are formed on a second main surface located on the other side in the thickness direction of the insulating substrate. The pair of end-face electrodes are formed on end faces (outer peripheral surfaces) along the thickness direction of the insulating substrate, and electrically connect the pair of upper-surface electrodes and the pair of bottom-surface electrodes. The pair of plating layers are formed on the pair of upper-surface electrodes, the pair of bottom-surface electrodes, and the pair of end-face electrodes. The pair of bottom-surface electrodes have an asymmetric shape when viewed from a direction perpendicular to the second main surface.

Description

resistor

[0001] The present disclosure relates generally to resistors, and more particularly to a resistor including an insulating substrate and a resistive element, electrodes, and plating layers disposed on the insulating substrate.

[0002] Patent Document 1 discloses a chip resistor that includes at least an insulating substrate made of a heat-resistant insulator such as ceramic and configured in a rectangular chip shape with long sides L and short sides W in a plan view, a pair of upper electrodes formed on both the left and right sides of the upper surface of the insulating substrate in the longitudinal direction of the rectangle, a resistive film formed on the upper surface of the insulating substrate in a portion between the two upper electrodes and extending in the longitudinal direction of the rectangle, soldering terminal electrodes formed on the two long side surfaces of the rectangular insulating substrate and extending along the entire lengths of the long side surfaces, a pair of lower electrodes formed on the lower surface of the insulating substrate in portions adjacent to the two long side surfaces and extending along the two long side surfaces, and a glass or synthetic resin cover coat formed on the upper surface of the insulating substrate so as to entirely cover the resistive film.

[0003] Japanese Patent Application Laid-Open No. 2007-142165

[0004] 13, in the technology described in Patent Document 1, in a work-in-progress 9 before a plating layer is formed on the electrodes, a pair of lower surface electrodes 92 formed on a rectangular lower surface 91 of an insulating substrate have the same rectangular shape along a pair of long sides of the lower surface 91. Therefore, the lower surface 91 having the lower surface electrodes 92 has an axisymmetric shape with the center line parallel to the long side and the center line parallel to the short side as axes of symmetry (see dashed dotted lines).

[0005] To form a plating layer on the pair of lower electrodes 92, barrel plating, which can form a plating layer on a large number of work-in-progress products 9 at once, is performed. As shown in FIG. 14 , during the barrel plating process, the surfaces of the pair of lower electrodes 92 of the two work-in-progress products 9 are attached to each other with the same surface area, and the outer surfaces 93 of the two work-in-progress products 9 are continuously flush with each other. In this state, even if the work-in-progress products 9 collide with another work or dummy during the barrel plating process, the two work-in-progress products 9 with the attached pair of lower electrodes 92 are unlikely to receive force in a direction that would separate them, and the two work-in-progress products 9 are unlikely to separate. During the barrel plating process, if the pair of lower electrodes 92 of the two work-in-progress products 9 remained attached to each other, it was difficult to form a plating layer on the pair of lower electrodes 92 (pair of second electrodes).

[0006] A resistor according to one aspect of the present disclosure includes an insulating substrate, a pair of first electrodes, a resistive element, a pair of second electrodes, a pair of end surface electrodes, and a pair of plating layers. The pair of first electrodes are formed on a first main surface located on one side of the insulating substrate in a thickness direction. The resistive element is formed on the first main surface and electrically connects the pair of first electrodes to each other. The pair of second electrodes are formed on a second main surface located on the other side of the insulating substrate in the thickness direction. The end surface electrodes are formed on end surfaces of the insulating substrate along the thickness direction and electrically connect the pair of first electrodes to the pair of second electrodes. The pair of plating layers are formed on the pair of first electrodes, the pair of second electrodes, and the pair of end surface electrodes. The pair of second electrodes has an asymmetrical shape when viewed from a direction perpendicular to the second main surface.

[0007] According to the resistor according to one aspect of the present disclosure, a plating layer is easily formed on the pair of second electrodes.

[0008] FIG. 1 is a cross-sectional view of a resistor according to a first embodiment. FIG. 2 is a plan view of the resistor. FIG. 3 is a bottom view of the resistor. FIG. 4 is a side view of the short side of the resistor. FIG. 5 is a side view of the long side of the resistor. FIG. 6 is a plan view showing a state in which the resistors according to the first embodiment are attached to each other via a pair of back electrodes. FIG. 7 is a bottom view of a resistor according to a second embodiment. FIG. 8 is a bottom view of a resistor according to a third embodiment. FIG. 9 is a bottom view of a resistor according to a fourth embodiment. FIG. 10 is a bottom view of a resistor according to a fifth embodiment. FIG. 11 is a plan view of a resistor according to a modified example. FIG. 12 is a plan view of a resistor according to another modified example. FIG. 13 is a bottom view of a resistor according to a conventional example. FIG. 14 is a perspective view showing a state in which the resistors according to the conventional example are attached to each other via a pair of back electrodes.

[0009] Resistors according to embodiments 1 to 5 will be described below with reference to the drawings. The drawings described in the following embodiments 1 to 5 are schematic diagrams, and the ratios of the sizes and thicknesses of the components do not necessarily reflect the actual dimensional ratios. Furthermore, the configurations described in the following embodiments 1 to 5 are merely examples of the present disclosure. The present disclosure is not limited to the following embodiments 1 to 5, and various modifications are possible depending on the design, etc., as long as the effects of the present disclosure can be achieved.

[0010] (1) Overview of Resistor First, an overview of a resistor 1 according to the present disclosure will be described with reference to FIG.

[0011] The resistor 1 according to the present disclosure is, for example, a surface mount (SMT) chip resistor that is mounted on the surface (mounting surface) of a printed circuit board using a surface mounter. The resistor 1 is, for example, a thin film chip resistor.

[0012] As shown in FIG. 1 , a resistor 1 according to the present disclosure includes an insulating substrate 2, a pair of top electrodes 3 (first electrodes), a resistive element 4, a pair of back electrodes 5 (second electrodes), a pair of end electrodes 6, and a pair of plating layers 7. Each of the pair of top electrodes 3 contains at least one of Cu (copper) and Ag (silver) and is formed on a first main surface 21 located on one side of the insulating substrate 2 in a first direction D1, which is the thickness direction of the insulating substrate 2. The resistive element 4 contains Cr (chromium), Si (silicon), and N (nitrogen), and is formed on the first main surface 21 to electrically connect the pair of top electrodes 3 to each other. Each of the pair of back electrodes 5 contains at least one of Cu (copper) and Ag (silver), and is formed on a second main surface 22 located on the other side of the first direction D1. The pair of end electrodes 6 contains, for example, a CuNi (copper-nickel) alloy and is formed on an end surface (outer peripheral surface 23) along the first direction D1. The pair of end electrodes 6 electrically connects the pair of top electrodes 3 and the pair of back electrodes 5. The pair of plating layers 7 contain, for example, Ni (nickel) or Sn (tin), and are formed on the pair of top electrodes 3, the pair of back electrodes 5, and the pair of end electrodes 6. Each of the pair of back electrodes 5 has an asymmetrical shape when viewed from a direction perpendicular to the second main surface 22.

[0013] In the resistor 1 according to the present disclosure, a pair of plating layers 7 are likely to be formed on the pair of rear electrodes 5 (second electrodes).

[0014] (2) First Embodiment Next, the configuration of a resistor 1 according to a first embodiment will be described with reference to FIGS.

[0015] 1 , the resistor 1 according to the first embodiment includes an insulating substrate 2, a resistive element 4, a pair of first electrodes (top electrodes) 3, a pair of second electrodes (back electrodes) 5, a pair of end electrodes 6, and a pair of plating layers 7. The resistor 1 further includes a protective film 8.

[0016] (2.1) Insulating Substrate The insulating substrate 2 is, for example, a ceramic substrate. The material of the ceramic substrate is, for example, an alumina sintered body with an alumina content of 96% or more. The insulating substrate 2 is formed in a rectangular shape when viewed from a first direction D1. In the first embodiment, the insulating substrate 2 is formed in a rectangular shape having short sides extending in a second direction D2 perpendicular to the first direction D1 and long sides extending in a third direction D3 perpendicular to the first direction D1 and the second direction D2. The insulating substrate 2 has a first main surface (upper surface) 21, a second main surface (lower surface) 22, and an outer peripheral surface 23.

[0017] The first main surface 21 and the second main surface 22 face each other in the first direction D1. Each of the first main surface 21 and the second main surface 22 is a flat surface extending along the second direction D2. The outer peripheral surface 23 includes four side surfaces extending along the first direction D1. The first direction D1 is a direction parallel to the thickness direction of the insulating substrate 2 (the up-down direction in FIG. 1 ). The second direction D2 is a direction parallel to the longitudinal direction or width direction (short-side direction) of the insulating substrate 2 (the left-right direction in FIG. 1 ). In the first embodiment, as an example, the second direction D2 is a direction parallel to the short-side direction of the insulating substrate 2.

[0018] (2.2) Resistor The resistor 4 is provided on the insulating substrate 2. More specifically, the resistor 4 is, for example, a thin film and is formed on the first main surface 21 of the insulating substrate 2. As shown in Fig. 2 , the resistor 4 has, for example, a rectangular shape when viewed from above in the first direction D1, but can have any shape depending on the resistance value of the resistor 4. The resistor 4 is not formed on the first main surface 21 over the entire length in the third direction D3, and is not formed on both ends in the third direction D3.

[0019] The resistor 4 electrically connects a pair of first electrodes (top electrodes 3) to each other. The resistor 4 is made of, for example, an alloy containing Cr, Si, and N. That is, the resistor 4 contains Cr, Si, and N. The atomic ratio of Si to Cr in the resistor 4 is 2 / 3 or more and 4 or less, at least at the center of the resistor 4 in the first direction D1. In other words, the atomic ratio of Cr to Si in the resistor 4 is 3:2 or more and 1:4 or less. Furthermore, the total atomic amount of N in the total atomic amount of metals constituting the resistor 4 is, for example, 50 atomic % or less. That is, the atomic percentage of N in the resistor 4 is 50 atomic % or less, at least at the center of the resistor 4 in the first direction D1 (film thickness direction of the resistor 4).

[0020] In the resistor 1 according to the first embodiment, the resistive element 4 further contains oxygen (O). The atomic percentage of O in the resistive element 4 is 10 atom % or less at least at the center of the resistive element 4 in the first direction D1.

[0021] The resistor 4 is formed in a substantially rectangular shape by forming a thin-film conductor over almost the entire surface of the insulating substrate 2 using a thin-film process such as sputtering, and then removing unnecessary portions of the thin-film conductor using a photolithography process.

[0022] The atomic composition ratio of the resistor 4 is calculated from the spectral ratio obtained for each of the elements Cr, Si, N, and O on the top surface or cross section of the resistor 4 using, for example, an energy dispersive X-ray spectroscopy (TEM-EDX) or an electron energy loss spectroscopy (TEX-EELS) attached to a transmission electron microscope (TEM). Alternatively, the atomic composition ratio is calculated by correcting each atomic composition ratio evaluated using X-ray photoelectron spectroscopy (XPS) based on a correction factor for each element evaluated using Rutherford backscattering spectroscopy (RBS).

[0023] Here, it is possible to adjust the resistivity of the resistor 4 by changing the atomic ratio of Cr to Si in the resistor 4. The resistivity of the resistor 4 is preferably 500 μΩ·cm or more and 30,000 μΩ·cm or less.

[0024] (2.3) Top Electrode (First Electrode) A pair of top electrodes 3 are provided on the insulating substrate 2. More specifically, the pair of top electrodes 3 are formed on the first main surface 21 located on one side of the insulating substrate 2 in the thickness direction (first direction D1). The pair of top electrodes 3 are provided at both ends of the insulating substrate 2 in the longitudinal direction (second direction D2). Each of the pair of top electrodes 3 contains at least one of Cu and Ag. In the first embodiment, each of the pair of top electrodes 3 contains Cu. Specifically, each of the pair of top electrodes 3 is a CuNi (copper-nickel) alloy. In each of the top electrodes 3, the atomic percentage of Cu is, for example, 60 atom %. Furthermore, in each of the top electrodes 3, the atomic percentage of Ni is, for example, 40 atom %. The pair of top electrodes 3 are formed on the insulating substrate 2 by, for example, screen printing using a paste material. Each of the pair of upper surface electrodes 3 has, for example, a rectangular shape when viewed from above in the first direction D1. The pair of upper surface electrodes 3 is formed on the first main surface 21 over the entire length in the third direction D3.

[0025] Each of the pair of upper electrodes 3 has a pair of end faces and a main surface 31. The pair of end faces face each other in the second direction D2. Each of the pair of end faces is a flat surface along the first direction D1. The main surface 31 is the surface of the upper electrode 3 on the opposite side to the resistor 4 side. The main surface 31 is a flat surface along the second direction D2. When measuring the resistance value of the resistor 4, a probe is brought into contact with the main surface 31 of each of the pair of upper electrodes 3.

[0026] (2.4) Rear Electrode (Second Electrode) Each of the pair of rear electrodes 5 is made of, for example, epoxy resin containing Ag (silver) as a conductive material. The pair of rear electrodes 5 is formed on the second main surface 22 located on the other side of the insulating substrate 2 in the thickness direction (first direction D1). As shown in FIG. 3 , the pair of rear electrodes 5 is located at both ends of the second main surface 22 of the insulating substrate 2 in the short direction (second direction D2). The pair of rear electrodes 5 is formed, for example, by applying epoxy resin to both ends of the second main surface 22 of the insulating substrate 2 in the short direction by screen printing, and then curing the epoxy resin by irradiating it with ultraviolet light. The pair of rear electrodes 5 corresponds one-to-one to the pair of upper surface electrodes 3. The pair of second electrodes (rear electrodes 5) has an asymmetrical shape when viewed perpendicular to the second main surface 22 (in a plan view). The pair of rear electrodes 5 is trapezoidal and formed on the second main surface 22 over the entire length in the third direction D3. The shape of the pair of rear electrodes 5 will be described later.

[0027] 1 , each of the pair of back electrodes 5 has a main surface 51 and a pair of end surfaces. The main surface 51 is the surface of the pair of back electrodes 5 opposite the resistor 4 side. The main surface 51 is a flat surface along the second direction D2. The pair of end surfaces are adjacent to the edges of the pair of back electrodes 5 in the second direction D2 and face the second direction D2. When measuring the resistance value of the resistor 4, a probe is brought into contact with the main surface 51 of each of the pair of back electrodes 5.

[0028] When viewed from a direction perpendicular to the second main surface 22, the ratio of the area of ​​the pair of second electrodes (rear electrode 5) to the area of ​​the second main surface 22 is 30% or more and 75% or less. This more effectively prevents the outer peripheral surfaces 23 of the two insulating substrates from being continuous on the same plane, making it even easier for one insulating substrate 2 to be separated from the other insulating substrate 2.

[0029] (2.5) End Electrodes A pair of end electrodes 6 are formed on the end surfaces (outer peripheral surfaces 23) of the insulating substrate 2 along the thickness direction (first direction D1). Each of the pair of end electrodes 6 is made of, for example, a CuNi alloy. The pair of end electrodes 6 is located at both ends of the insulating substrate 2 in the short-side direction (second direction D2). The pair of end electrodes 6 are formed at both ends of the insulating substrate 2 in the short-side direction using, for example, a thin-film process such as sputtering. The pair of end electrodes 6 are electrically connected to the pair of top electrodes 3 and the pair of back electrodes 5, and electrically connect the pair of top electrodes 3 and the pair of back electrodes 5.

[0030] (2.6) Plating Layer Fig. 4 shows a side view of the short side of the resistor 1, and Fig. 5 shows a side view of the long side of the resistor 1. Since the side views of the pair of short sides of the resistor 1 are the same, only the side view of one short side is shown in Fig. 4, and the side view of the other short side is omitted. Since the side views of the pair of long sides of the resistor 1 are the same, only the side view of one long side is shown in Fig. 5, and the side view of the other long side is omitted.

[0031] As shown in FIGS. 1 , 4 , and 5 , the pair of plating layers 7 are formed to cover the pair of first electrodes (top electrodes 3), the pair of second electrodes (back electrodes 5), and the pair of end electrodes 6. That is, one of the pair of plating layers 7 covers one of the pair of first electrodes (top electrodes 3), one of the pair of second electrodes (back electrodes 5), and one of the pair of end electrodes 6, while the other of the pair of plating layers 7 covers the other of the pair of first electrodes (top electrodes 3), the other of the pair of second electrodes (back electrodes 5), and the other of the pair of end electrodes 6. Each of the pair of plating layers 7 is composed of two layers, a Ni plating layer and a Sn plating layer. Each of the pair of plating layers 7 covers a portion of the corresponding one of the pair of top electrodes 3 and is in contact with a second protective film 82, which will be described later. Furthermore, each of the pair of plating layers 7 covers the corresponding one of the pair of end electrodes 6. Furthermore, each of the pair of plating layers 7 covers the corresponding back electrode 14 of the pair of back electrodes 5.

[0032] (2.7) Protective Film The protective film 8 (inorganic protective film) is a film for protecting the resistor 4. As shown in FIG. 1 , the protective film 8 also covers a portion of the pair of upper electrodes 3. The protective film 8 includes a first protective film 81 and a second protective film 82.

[0033] The first protective film 81 is made of, for example, Al ２ O ３ The first protective film 81 is formed on a part of the main surface 31 of the pair of upper electrodes 3 by applying an alumina paste, for example.

[0034] The second protective film 82 (resin protective film) is made of, for example, epoxy resin. The second protective film 82 covers the entire first protective film 81 and parts of the pair of upper electrodes 3. That is, in a plan view from the first direction D1, the second protective film 82 covers the boundary between the first protective film 81 and the pair of upper electrodes 3, and also continuously covers from the first protective film 81 to at least parts of the pair of upper electrodes 3.

[0035] The second protective film 82 is formed, for example, by applying an epoxy resin by screen printing and then curing the epoxy resin by irradiating it with ultraviolet light. Note that the portions of the pair of upper electrodes 3 that are located between both ends (portions covering the pair of upper electrodes 3) of the first protective film 81 in the longitudinal direction (second direction D2) of the pair of upper electrodes 3 and the plating layer 7 are directly covered with the second protective film 82.

[0036] (3) Method for Manufacturing Resistor Next, a method for manufacturing the resistor 1 according to the first embodiment will be described.

[0037] The method for manufacturing the resistor 1 according to the first embodiment is a method for manufacturing the above-described resistor 1. The method for manufacturing the resistor 1 includes a substrate preparation step, a resistor element formation step, an electrode formation step, a protective film formation step, and a plating layer formation step. In the method for manufacturing the resistor 1 according to the first embodiment, the substrate preparation step, resistor element formation step, electrode formation step, protective film formation step, and plating layer formation step are performed in this order.

[0038] The substrate preparation step is a step of preparing the insulating substrate 2. More specifically, in the substrate preparation step, the insulating substrate 2 is arranged so that the first main surface 21 is on the upper side and the second main surface 22 is on the lower side, for example.

[0039] The resistor formation step is a step of forming the resistor 4 on the insulating substrate 2. More specifically, in the resistor formation step, the resistor 4 is formed on the first main surface 21 of the insulating substrate 2 by, for example, reactive sputtering in which nitrogen is reacted with the resistor 4, or reactive sputtering in which nitrogen is reacted with oxygen. The resistor 4 is formed over the entire first main surface 21 of the insulating substrate 2. The sputtering target for the reactive sputtering contains, for example, Cr, Si, and O, with an atomic ratio of Cr to Si of 3:7 and an atomic percentage of O of 20 atom %.

[0040] In the resistor formation step, a pattern of the resistor 4 is formed on the insulating substrate 2. More specifically, for example, the pattern of the resistor 4 is formed by removing a part of the resistor 4 using a photolithography process.

[0041] The electrode formation step is a step of forming a pair of upper electrodes 3 on the first main surface 21 of the insulating substrate 2 and a pair of back electrodes 5 on the second main surface 22 of the insulating substrate 2. More specifically, in the electrode formation step, the pair of upper electrodes 3 is formed on both sides of the first main surface 21 of the insulating substrate 2 in the second direction D2 by, for example, screen printing using a paste material.

[0042] In addition, in the electrode formation process, for example, an epoxy resin containing a conductive material (such as A) is applied to both ends of the second main surface 22 of the insulating substrate 2 in the short direction by screen printing, and then the epoxy resin is hardened by irradiating it with ultraviolet light, thereby forming a pair of back electrodes 5.

[0043] In the electrode formation step, a pair of end electrodes 6 are formed on both ends of the insulating substrate 2 in the lateral direction by using a thin film process such as sputtering.

[0044] The protective film forming step is a step of forming the protective film 8 (first protective film 81 and second protective film 82) so as to cover at least one of the pair of upper surface electrodes 3 and the resistor 4. More specifically, in the protective film forming step, the first protective film 81 is formed on the entire upper surface of the resistor 4 and on part of the main surface 31 of the pair of upper surface electrodes 3 by applying, for example, an alumina paste.

[0045] Thereafter, for example, an epoxy resin is applied by screen printing, and then the epoxy resin is cured by irradiating it with ultraviolet light, thereby forming the second protective film 82 .

[0046] The plating layer formation step is a step of forming a pair of plating layers 7 by barrel plating on the insulating substrate 2 on which the pair of upper electrodes 3, the resistor element 4, the pair of back electrodes 5, the pair of end electrodes 6, and the protective film 8 have been formed. In the barrel plating, the plating layer 7 is formed on the surfaces of the pair of upper electrodes 3, the pair of back electrodes 5, and the pair of end electrodes 6, but the plating layer 7 is not formed on the surfaces of the insulating substrate 2 and the protective film 8.

[0047] (4) Shape of the Pair of Rear Surface Electrodes As described above, the pair of rear surface electrodes 5 have a non-axisymmetric shape when viewed from the first direction D1. Specifically, as shown in FIG. 3 , the pair of rear surface electrodes 5 do not have an axisymmetric shape on the second main surface 22 of the insulating substrate 2, with the center line L1 (extending in the third direction D3) parallel to the long side serving as the axis of symmetry. Furthermore, the pair of rear surface electrodes 5 do not have an axisymmetric shape on the second main surface 22 of the insulating substrate 2, with the center line L2 (extending in the second direction D2) parallel to the short side serving as the axis of symmetry. Furthermore, the pair of rear surface electrodes 5 do not have an axisymmetric shape on the second main surface 22 of the insulating substrate 2, with any straight line serving as the axis of symmetry. In the first embodiment, the opposing sides 52 of the pair of rear surface electrodes 5 are parallel straight lines inclined with respect to the second direction D2 and the third direction D3. The pair of rear surface electrodes 5 are formed on the second main surface 22 over the entire length in the third direction D3.

[0048] The pair of second electrodes (rear electrodes 5) have a point-symmetric shape when viewed from a direction perpendicular to the second main surface 22. Specifically, the pair of rear electrodes 5 have a point-symmetric shape with respect to the center point P1 of the second main surface 22 of the insulating substrate 2.

[0049] (5) Effect The pair of back electrodes 5 are not symmetrical on the second main surface 22 with respect to the center line L1. Therefore, in barrel plating, the two insulating substrates 2 are unlikely to be rotated 180 degrees about the center line L1 from a state in which they face the same direction, resulting in the pair of back electrodes 5 facing each other and the outer peripheral surfaces 23 of the two insulating substrates 2 being coplanar and continuous (see FIG. 14 ). That is, when the pair of opposing back electrodes 5 are attached to each other in barrel plating, they tend to be attached so that the area of ​​the attached back electrodes 5 is maximized. Therefore, in the first embodiment in which the pair of back electrodes 5 have the shape shown in FIG. 3 , the area of ​​the attached back electrodes 5 is maximized in barrel plating when the outer peripheral surfaces 23 of the two insulating substrates 2 are not coplanar and continuous, as shown in FIG. 6 . When two insulating substrates 2 are in the state shown in Figure 6, during barrel plating, another work or dummy may collide with the part of one insulating substrate 2 that does not overlap the other insulating substrate 2, and one insulating substrate 2 and the other insulating substrate 2 may easily separate.

[0050] As a result, in the plating layer forming step, the problem of a predetermined pair of plating layers 7 not being formed on a pair of rear electrodes 5 is less likely to occur, and the yield in the plating layer forming step is improved.

[0051] Furthermore, since the pair of rear electrodes 5 are point-symmetric when viewed from the first direction D1, the pair of rear electrodes 5 in the resistor 1 have no directionality and are easy to use.

[0052] Second Embodiment Next, a resistor 1 according to a second embodiment will be described with reference to Fig. 7. In the resistor 1 according to the second embodiment, the same components as those in the resistor 1 according to the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted.

[0053] The resistor 1 according to the second embodiment differs from the resistor 1 according to the first embodiment in the shapes of the pair of back electrodes 5 and the pair of plating layers 7 when viewed from the first direction D1. In the first embodiment, the pair of back electrodes 5 are formed on the second main surface 22 over the entire length in the third direction D3. In contrast, in the second embodiment, the pair of back electrodes 5 are trapezoidal and are not formed on the second main surface 22 over the entire length in the third direction D3, and are not formed on both ends in the third direction D3.

[0054] In the second embodiment, the pair of back electrodes 5 is the same as in the first embodiment in that it does not have an axisymmetric shape with any straight line as an axis of symmetry on the second main surface 22 of the insulating substrate 2. Also, the pair of back electrodes 5 is the same as in the first embodiment in that it has a point-symmetric shape with respect to the center point P1 of the second main surface 22 of the insulating substrate 2. Also, the pair of back electrodes 5 is the same as in the first embodiment in that opposing sides 52 of the pair of back electrodes 5 are parallel straight lines that are inclined with respect to the second direction D2 and the third direction D3.

[0055] In the second embodiment, the same effects as those in the first embodiment can be obtained.

[0056] Third Embodiment Next, a resistor 1 according to a third embodiment will be described with reference to Fig. 8. In the resistor 1 according to the third embodiment, the same components as those in the resistor 1 according to the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted.

[0057] The resistor 1 according to the third embodiment differs from the resistor 1 according to the first embodiment in the shapes of the pair of back electrodes 5 and the pair of plating layers 7 when viewed from the first direction D1. In the first embodiment, the opposing sides 52 of the pair of back electrodes 5 are parallel straight lines inclined with respect to the second direction D2 and the third direction D3. In contrast, in the third embodiment, the opposing sides 52 of the pair of back electrodes 5 are parallel straight lines parallel to the second direction D2 or the third direction D3. The pair of back electrodes 5 have a shape similar to two types of rectangles having different widths joined together. A width W1 (length in the second direction D2) of a portion of the pair of back electrodes 5 is shorter than a width W2 of the other portion of the pair of back electrodes 5.

[0058] In the third embodiment, the pair of back electrodes 5 do not have an axisymmetric shape with any straight line as an axis of symmetry on the second main surface 22 of the insulating substrate 2. The pair of back electrodes 5 have a point-symmetric shape with the center point P1 of the second main surface 22 of the insulating substrate 2 as the center.

[0059] In the third embodiment, the same effects as those in the first embodiment can be obtained.

[0060] (Embodiment 4) Next, a resistor 1 according to embodiment 4 will be described with reference to Fig. 9. In the resistor 1 according to embodiment 4, the same components as those in the resistor 1 according to embodiment 1 are denoted by the same reference numerals, and the description thereof will be omitted.

[0061] The resistor 1 according to the fourth embodiment differs from the resistor 1 according to the first embodiment in the shapes of the pair of back electrodes 5 and the pair of plating layers 7 when viewed from the first direction D1. In the first embodiment, the opposing sides 52 of the pair of back electrodes 5 are parallel straight lines that are inclined with respect to the second direction D2 and the third direction D3. In contrast, in the fourth embodiment, the opposing sides 52 of the pair of back electrodes 5 form an elliptical arc. Specifically, the sides 52 have a shape formed by dividing an ellipse having a major axis extending in the third direction D3 at the intersection with the major axis, and connecting the divided arcs in the major axis direction.

[0062] In the fourth embodiment, the pair of back electrodes 5 also does not have an axisymmetric shape with any straight line as the axis of symmetry on the second main surface 22 of the insulating substrate 2. Moreover, the pair of back electrodes 5 have a point-symmetric shape with the center point P1 of the second main surface 22 of the insulating substrate 2 as the center.

[0063] In the fourth embodiment, the same effects as those in the first embodiment can be obtained.

[0064] Fifth Embodiment Next, a resistor 1 according to a fifth embodiment will be described with reference to Fig. 10. In the resistor 1 according to the fifth embodiment, the same components as those in the resistor 1 according to the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted.

[0065] The resistor 1 according to the fifth embodiment differs from the resistor 1 according to the first embodiment in the shapes of the pair of back electrodes 5 and the pair of plating layers 7 when viewed from the first direction D1. In the first embodiment, opposing sides 52 of the pair of back electrodes 5 are parallel straight lines inclined with respect to the second direction D2 and the third direction D3. In contrast, in the fifth embodiment, the side 52 of one of the pair of back electrodes 5 (the back electrode 5 on the right side in FIG. 10 ) forms an elliptical arc similar to the pair of back electrodes 5 according to the fourth embodiment. Furthermore, the side 52 of the other of the pair of back electrodes 5 (the back electrode 5 on the left side in FIG. 10 ) is a straight line parallel to the second direction D2 or the third direction D3.

[0066] In the fifth embodiment, the pair of back electrodes 5 do not have an axisymmetric shape with any straight line as the axis of symmetry on the second main surface 22 of the insulating substrate 2. Moreover, the pair of back electrodes 5 do not have a point-symmetric shape with respect to the center point P1 of the second main surface 22 of the insulating substrate 2.

[0067] In embodiment 5, as in embodiment 1, the defect of a predetermined pair of plating layers 7 not being formed on a pair of back electrodes 5 during the plating layer formation process is less likely to occur, thereby improving the yield in the plating layer formation process.

[0068] (Modifications) Embodiments 1 to 5 are merely one of various embodiments of the present disclosure. Various modifications of Embodiments 1 to 5 can be made depending on the design, etc., as long as the object of the present disclosure can be achieved. Modifications of Embodiments 1 to 5 are listed below. The modifications described below can be applied in appropriate combinations.

[0069] (1) Modification 1 In the first to fifth embodiments, the resistor 4 contains Cr, Si, N, and O. However, the resistor 4 may contain Al (aluminum) in addition to Cr, Si, N, and O. That is, in the resistor 1 according to Modification 1, the resistor 4 further contains Al. The atomic percentage of Al in the resistor 4 is 30 atomic % or less at least at the center of the resistor 4 in the first direction D1 (the film thickness direction of the resistor 4).

[0070] In the resistor 1 according to the first modification, the resistive element 4 contains Al in addition to Cr, Si, N, and O. This allows the resistivity of the resistor 4 to be higher than when the resistor 4 does not contain Al.

[0071] (2) Other Modifications Other modifications are listed below.

[0072] In the first to fifth embodiments, the resistor 4 contains O, but the resistor 4 does not necessarily contain O. In other words, the resistor 4 only needs to contain at least Cr, Si, and N.

[0073] In the first to fifth embodiments, each of the pair of upper surface electrodes 3 contains Cu, but each of the pair of upper surface electrodes 3 may contain, for example, Ag, or both Cu and Ag. That is, each of the pair of upper surface electrodes 3 preferably contains at least one of Cu and Ag. The type of conductive material contained in the pair of upper surface electrodes 3 is not limited. When each of the pair of upper surface electrodes 3 contains Ag, each of the pair of upper surface electrodes 3 is, for example, an AgPd alloy. When each of the pair of upper surface electrodes 3 contains both Cu and Ag, each of the pair of upper surface electrodes 3 is, for example, an AgCuPd alloy.

[0074] In the first to fifth embodiments, each of the pair of rear surface electrodes 5 contains Ag, but each of the pair of rear surface electrodes 5 may contain, for example, Cu, or both Cu and Ag. That is, each of the pair of rear surface electrodes 5 preferably contains at least one of Cu and Ag. The type of conductive material contained in the pair of rear surface electrodes 5 is not limited.

[0075] In the first to fifth embodiments, each of the pair of end electrodes 6 contains Cu, but each of the pair of end electrodes 6 may contain, for example, Ag, or both Cu and Ag. That is, each of the pair of end electrodes 6 preferably contains at least one of Cu and Ag. The type of conductive material contained in the pair of end electrodes 6 is not limited.

[0076] In the first to fifth embodiments, each of the pair of plating layers 7 is a plating layer consisting of one Ni plating layer or one Sn plating layer, but the pair of plating layers 7 may be a plating layer consisting of two or more layers. In addition, the type of metal contained in the pair of plating layers 7 is not limited.

[0077] In the first to fifth embodiments, the resistor 1 includes the protective film 8, but the protective film 8 may have any configuration, and the resistor 1 may not include the protective film 8. Furthermore, when the resistor 1 includes the protective film 8, the protective film 8 is not limited to being made up of two layers (the first protective film 81 and the second protective film 82), but may be made up of one layer or three or more layers. The material of the protective film 8 is not limited.

[0078] The resistor 1 may also include an oxynitride film. The oxynitride film is provided on the resistive element 4. When the resistor 1 includes an oxynitride film, the manufacturing method of the resistor 1 includes a substrate preparation step, a resistor formation step, an oxynitride film formation step, an oxynitride film removal step, an electrode formation step, a protective film formation step, and a plating layer formation step, and each step is performed in this order. In the oxynitride film formation step, the insulating substrate 2 on which the resistive element 4 is formed is placed in a heat treatment furnace and heat-treated, thereby forming an oxynitride film on one surface of the resistor 4. In the oxynitride film removal step, the oxynitride film is removed by, for example, dry etching.

[0079] In the first to fifth embodiments, the resistor 4 is formed using a thin-film process such as sputtering, but the resistor 4 may also be formed using, for example, a resistor paste. In this case, for example, the first electrode (top electrode 3) is formed by screen-printing an electrode paste containing at least one of Cu and Ag, followed by firing. The resistor 4 is also formed by screen-printing a resistor paste containing ruthenium oxide or the like, followed by firing. The end electrodes 6 are also formed by applying a conductive paste containing conductive powder and resin, followed by curing.

[0080] In embodiments 1 to 5, the pair of upper electrodes 3 and the pair of back electrodes 5 are formed by screen printing using a paste material, but the pair of upper electrodes 3 and the pair of back electrodes 5 may also be formed using a thin film process such as sputtering.

[0081] In the first to fifth embodiments, the pair of upper surface electrodes 3 and the pair of plating layers 7 have the shape shown in Fig. 2 when viewed from the first direction D1. However, the pair of upper surface electrodes 3 and the pair of plating layers 7 may have the shape shown in Fig. 11 or the shape shown in Fig. 12.

[0082] (Aspects) The present specification discloses the following aspects.

[0083] The resistor 1 according to the first aspect includes an insulating substrate 2, a pair of first electrodes (top electrodes 3), a resistive element 4, a pair of second electrodes (back electrodes 5), a pair of end electrodes 6, and a pair of plating layers 7. The pair of first electrodes (top electrodes 3) are formed on a first main surface 21 located on one side of the insulating substrate 2 in the thickness direction (first direction D1). The resistive element 4 is formed on the first main surface 21 and electrically connects the pair of first electrodes (top electrodes 3). The pair of second electrodes (back electrodes 5) are formed on a second main surface 22 located on the other side of the insulating substrate 2 in the thickness direction (first direction D1). The pair of end electrodes 6 are formed on an end surface (outer peripheral surface 23) of the insulating substrate 2 along the thickness direction (first direction D1) and electrically connects the pair of first electrodes (top electrodes 3) and the pair of second electrodes (back electrodes 5). The pair of plating layers 7 are formed on the pair of first electrodes (top electrodes 3), the pair of second electrodes (back electrodes 5), and the pair of end electrodes 6. The pair of second electrodes (back electrodes 5) have an asymmetrical shape when viewed from a direction perpendicular to the second main surface 22.

[0084] According to this embodiment, the outer peripheral surfaces 23 of the two insulating substrates 2 are less likely to be continuous and in the same plane, and during barrel plating, other workpieces or dummies may collide with the portion of one insulating substrate 2 that does not overlap with the other insulating substrate 2, making it easier for one insulating substrate 2 to separate from the other insulating substrate 2.

[0085] In the resistor 1 according to the second aspect, the pair of second electrodes (rear surface electrodes 5 ) in the first aspect have a point-symmetric shape when viewed in a direction perpendicular to the second main surface 22 .

[0086] According to this embodiment, the pair of rear electrodes 5 of the resistor 1 has no directionality, and is easy to use.

[0087] In the resistor 1 according to the third aspect, in the first or second aspect, when viewed from a direction perpendicular to the second main surface 22, the ratio of the area of ​​the pair of second electrodes (rear surface electrodes 5) to the area of ​​the second main surface 22 is 30% or more and 75% or less.

[0088] According to this embodiment, in the resistor 1, the outer surfaces 23 of the two insulating substrates are more effectively prevented from being continuous on the same plane, making it even easier for one insulating substrate 2 to be separated from the other insulating substrate 2.

[0089] REFERENCE SIGNS LIST 1 resistor 2 insulating substrate 21 first main surface 22 second main surface 23 outer peripheral surface 3 upper electrode 31 main surface 4 resistor element 5 back electrode 51 main surface 6 end electrode 7 plating layer D1 first direction

Claims

1. A resistor comprising: an insulating substrate; a pair of first electrodes formed on a first main surface located on one side in the thickness direction of the insulating substrate; a resistor formed on the first main surface of the insulating substrate to electrically connect the pair of first electrodes; a pair of second electrodes formed on a second main surface located on the other side in the thickness direction of the insulating substrate; a pair of end face electrodes formed on an end face along the thickness direction of the insulating substrate to electrically connect the pair of first electrodes and the pair of second electrodes; and a pair of plating layers formed on the pair of first electrodes, the pair of second electrodes, and the pair of end face electrodes, wherein the pair of second electrodes has a non-axisymmetric shape when viewed from a direction perpendicular to the second main surface.

2. The resistor according to claim 1, wherein the pair of second electrodes has a point-symmetric shape when viewed from a direction perpendicular to the second main surface.

3. The resistor according to claim 1 or 2, wherein when viewed from a direction perpendicular to the second main surface, the ratio of the area of the pair of second electrodes to the area of the second main surface is 30% or more and 75% or less.

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